Pixel circuit and driving method, display substrate and driving method, display device

Abstract

A pixel circuit and a driving method thereof, a display substrate and a driving method thereof, and a display device. The pixel circuit includes a pixel sub-circuit (100). The pixel sub-circuit (100) includes a driving circuit (110), a voltage transmission circuit (120), and a data writing circuit (130). The driving circuit (110) includes a control terminal (111), a first terminal (112), and a second terminal (113). The voltage transmission circuit (120) is configured to apply a reset voltage (Vinit) and a first power voltage (VDD) to the first terminal (112) of the driving circuit (110) in response to a transmission control signal (VT). The data writing circuit (130) is configured to write a data signal (DATA) to the control terminal (111) of the driving circuit (110) in response to a scan signal (SN) and store the written data signal (DATA). The driving circuit (110) is configured to control a voltage of the second terminal (113) of the driving circuit (110) according to the data signal (DATA) of the control terminal (111) of the driving circuit (110) and the voltage of the first terminal (112) of the driving circuit (110), and generate a driving current for driving a light emitting element (L) to emit light based on the voltage of the second terminal (113) of the driving circuit (110). The data writing circuit (130) includes two switching transistors (M4, M5) of different types.

Description

Technical Field

[0001] Embodiments of this disclosure relate to a pixel circuit and its driving method, a display substrate and its driving method, and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) display devices have advantages such as thinness, light weight, wide viewing angle, active light emission, continuously adjustable emission color, low cost, fast response speed, low power consumption, low driving voltage, wide operating temperature range, simple manufacturing process, high luminous efficiency, and flexible display. They are increasingly widely used in display fields such as mobile phones, tablets, and digital cameras.

[0003] Silicon-based OLED displays differ from traditional OLED displays that use amorphous silicon, microcrystalline silicon, or polycrystalline silicon on a glass substrate. They use monocrystalline silicon chips as the substrate, and the pixel size can be 1 / 10 of the pixel size of traditional display devices, for example, less than 100 micrometers. Summary of the Invention

[0004] At least one embodiment of this disclosure provides a pixel circuit, including: a pixel sub-circuit; the pixel sub-circuit includes a driving circuit, a voltage transmission circuit, and a data writing circuit; the driving circuit includes a control terminal, a first terminal, and a second terminal; the voltage transmission circuit is configured to apply a reset voltage and a first power supply voltage to the first terminal of the driving circuit respectively in response to a transmission control signal; the data writing circuit is configured to write a data signal to the control terminal of the driving circuit and store the written data signal in response to a scan signal; the driving circuit is configured to control the voltage of the second terminal of the driving circuit according to the data signal at the control terminal of the driving circuit and the voltage of the first terminal of the driving circuit, and generate a driving current for driving the light-emitting element to emit light based on the voltage of the second terminal of the driving circuit; the data writing circuit includes two switching transistors of different types.

[0005] For example, some embodiments of the pixel circuit provided in this disclosure further include: a voltage control circuit; wherein the voltage control circuit is configured to provide the reset voltage to the voltage transmission circuit in response to a reset control signal, and to provide the first power supply voltage to the voltage transmission circuit in response to a light emission control signal.

[0006] For example, in the pixel circuit provided in some embodiments of this disclosure, the voltage control circuit includes a first control sub-circuit and a second control sub-circuit; the first control sub-circuit is configured to provide the reset voltage to the voltage transmission circuit in response to the reset control signal; the second control sub-circuit is configured to provide the first power supply voltage to the voltage transmission circuit in response to the light emission control signal.

[0007] For example, in the pixel circuit provided in some embodiments of this disclosure, the first control sub-circuit includes a first switching transistor, and the second control sub-circuit includes a second switching transistor; the gate of the first switching transistor is connected to a reset control signal terminal to receive the reset control signal, the first electrode of the first switching transistor is connected to a reset voltage terminal to receive the reset voltage, and the second electrode of the first switching transistor is connected to a first node; the gate of the second switching transistor is connected to a light emission control signal terminal to receive the light emission control signal, the first electrode of the second switching transistor is connected to a first power supply terminal to receive the first power supply voltage, and the second electrode of the second switching transistor is connected to the first node.

[0008] For example, in some embodiments of the pixel circuit provided in this disclosure, the voltage transmission circuit includes a third switching transistor; the gate of the third switching transistor is connected to a transmission control signal terminal to receive the transmission control signal, the first terminal of the third switching transistor is connected to the first node, and the second terminal of the third switching transistor is connected to the second node.

[0009] For example, in the pixel circuit provided in some embodiments of this disclosure, the driving circuit includes a driving transistor; the gate of the driving transistor is connected to a fourth node as the control terminal of the driving circuit, the first electrode of the driving transistor is connected to a second node as the first terminal of the driving circuit, and the second electrode of the driving transistor is connected to a third node as the second terminal of the driving circuit.

[0010] For example, in the pixel circuit provided in some embodiments of this disclosure, the two different types of switching transistors in the data writing circuit include a fourth switching transistor and a fifth switching transistor, and the data writing circuit further includes a storage capacitor; the gate of the fourth switching transistor is connected to a scan signal terminal to receive the scan signal, the first terminal of the fourth switching transistor is connected to a data signal terminal to receive the data signal, and the second terminal of the fourth switching transistor is connected to the fourth node; the gate of the fifth switching transistor is used to receive the inverted signal of the scan signal, the first terminal of the fifth switching transistor is connected to a data signal terminal to receive the data signal, and the second terminal of the fifth switching transistor is connected to the fourth node; the first terminal of the storage capacitor is connected to the fourth node, and the second terminal of the storage capacitor is connected to a first voltage terminal to receive a first voltage.

[0011] For example, in the pixel circuit provided in some embodiments of this disclosure, the first electrode of the light-emitting element is coupled to the third node, and the second electrode of the light-emitting element is connected to the second power supply terminal to receive the second power supply voltage.

[0012] For example, in some embodiments of the pixel circuit provided in this disclosure, the pixel sub-circuit further includes: a current transmission circuit; the current transmission circuit is configured to transmit the driving current generated by the driving circuit to the light-emitting element.

[0013] For example, in the pixel circuit provided in some embodiments of this disclosure, the current transmission circuit includes a sixth switching transistor; the gate of the sixth switching transistor is connected to a second voltage terminal to receive a second voltage, the first terminal of the sixth switching transistor is connected to the third node, the second terminal of the sixth switching transistor is coupled to the first terminal of the light-emitting element, and the second terminal of the light-emitting element is connected to a second power supply terminal to receive a second power supply voltage; the sixth switching transistor remains substantially in a conducting state under the control of the second voltage.

[0014] At least one embodiment of this disclosure also provides a display substrate, including: a pixel circuit provided in any embodiment of this disclosure; the display substrate includes a display area; the display area includes a plurality of sub-pixels arranged in an array, each sub-pixel including the light-emitting element and the pixel sub-circuit coupled to the light-emitting element.

[0015] For example, in some embodiments of the display substrate provided in this disclosure, the pixel circuit further includes a voltage control circuit configured to provide the reset voltage to the voltage transmission circuit in response to a reset control signal, and to provide the first power supply voltage to the voltage transmission circuit in response to a light emission control signal; the display substrate further includes a non-display area; the non-display area includes a plurality of the voltage control circuits, each of the voltage control circuits being coupled to the pixel sub-circuit in at least one row of sub-pixels.

[0016] For example, some embodiments of the present disclosure provide a display substrate that further includes: multiple voltage transmission lines corresponding one-to-one with each row of sub-pixels; the pixel sub-circuit in each row of sub-pixels is connected to the voltage control circuit through the corresponding voltage transmission line, and the voltage transmission line is configured to transmit the reset voltage and the first power supply voltage.

[0017] For example, in some embodiments of the present disclosure, the display substrate includes a silicon substrate, the pixel circuit is at least partially formed in the silicon substrate, and the light-emitting element is formed on the pixel circuit.

[0018] For example, in some embodiments of the display substrate provided in this disclosure, the light-emitting element includes one of organic light-emitting diodes, quantum dot light-emitting diodes, and inorganic light-emitting diodes.

[0019] At least one embodiment of this disclosure also provides a display device, including: a display substrate provided in any embodiment of this disclosure.

[0020] At least one embodiment of this disclosure also provides a driving method for a pixel circuit corresponding to any embodiment of this disclosure, comprising: a reset stage, a data writing stage, and a light-emitting stage; in the reset stage, a reset control signal and a transmission control signal are input, the voltage control circuit and the voltage transmission circuit are turned on, and the reset voltage is applied to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit to reset the light-emitting element; in the data writing stage, a scan signal is input, the data writing circuit is turned on, the data signal is written to the control terminal of the driving circuit through the data writing circuit, and the written data signal is stored by the data writing circuit; in the light-emitting stage, the light-emitting control signal and the transmission control signal are input, the voltage control circuit, the voltage transmission circuit and the driving circuit are turned on, the first power supply voltage is applied to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit, so that the driving circuit controls the voltage of the second terminal of the driving circuit according to the data signal at the control terminal of the driving circuit and the first power supply voltage at the first terminal of the driving circuit, and generates the driving current based on the voltage at the second terminal of the driving circuit to drive the light-emitting element to emit light.

[0021] For example, in the pixel circuit driving method provided in some embodiments of this disclosure, after the light-emitting stage, the driving method further includes: a non-light-emitting stage; in the non-light-emitting stage, the input of the transmission control signal is stopped, the voltage transmission circuit is turned off, so that the first power supply voltage cannot be applied to the first terminal of the driving circuit, so that the light-emitting element stops emitting light.

[0022] For example, the pixel circuit driving method provided in some embodiments of this disclosure further includes: controlling the display grayscale of the light-emitting element by adjusting the magnitude of the data signal and the duration of the transmission control signal during the light-emitting phase.

[0023] For example, in the pixel circuit driving method provided in some embodiments of this disclosure, the display grayscale of the light-emitting element is controlled by adjusting the magnitude of the data signal and the duration of the transmission control signal during the light-emitting phase. This includes: when the target display grayscale of the light-emitting element is less than a preset value, keeping the magnitude of the data signal unchanged, and adjusting the duration of the transmission control signal during the light-emitting phase to make the display grayscale of the light-emitting element conform to the target display grayscale; when the target display grayscale of the light-emitting element is not less than the preset value, keeping the duration of the transmission control signal during the light-emitting phase unchanged, and adjusting the magnitude of the data signal to make the display grayscale of the light-emitting element conform to the target display grayscale.

[0024] At least one embodiment of this disclosure also provides a driving method for a display substrate corresponding to any embodiment of this disclosure, comprising: within a frame display time, causing all row sub-pixels to sequentially enter a reset stage, a data writing stage, and a light-emitting stage; in the reset stage of each row sub-pixel, inputting the reset control signal and the transmission control signal, activating the voltage control circuit and the voltage transmission circuit, and applying the reset voltage to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit to reset the light-emitting element of the row sub-pixel; in the data writing stage of each row sub-pixel, inputting the scan signal, activating the data writing circuit, and applying the reset voltage to the first terminal of the driving circuit through the data writing circuit to reset the light-emitting element of the row sub-pixel; Data signals are written to the control terminal of the driving circuit and stored by the data writing circuit. During the light-emitting stage of each row of sub-pixels, the light-emitting control signal and the transmission control signal are input to turn on the voltage control circuit, the voltage transmission circuit, and the driving circuit. The first power supply voltage is applied to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit. The driving circuit controls the voltage of the second terminal of the driving circuit according to the data signal at the control terminal of the driving circuit and the first power supply voltage at the first terminal of the driving circuit. The driving current is generated based on the voltage at the second terminal of the driving circuit to drive the light-emitting element to emit light.

[0025] For example, the driving method of the display substrate provided in some embodiments of this disclosure further includes: during the display time of one frame, causing all row sub-pixels to enter the non-light-emitting stage row by row; during the non-light-emitting stage of each row sub-pixel, stopping the input of the transmission control signal, turning off the voltage transmission circuit, so that the first power supply voltage cannot be applied to the first terminal of the driving circuit, so that the light-emitting element stops emitting light.

[0026] For example, the driving method of the display substrate provided in some embodiments of this disclosure further includes: causing all row sub-pixels to simultaneously enter a non-light-emitting stage during the display time of one frame; stopping the input of the transmission control signal and turning off the voltage transmission circuit during the non-light-emitting stage of all row sub-pixels, so that the first power supply voltage cannot be applied to the first terminal of the driving circuit, so that the light-emitting elements of all row sub-pixels simultaneously stop emitting light. Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0028] Figure 1 This is a schematic diagram of the structure of a silicon-based OLED display device;

[0029] Figure 2 A schematic block diagram of a pixel circuit provided for at least one embodiment of this disclosure;

[0030] Figure 3 A schematic block diagram of another pixel circuit provided in at least one embodiment of this disclosure;

[0031] Figure 4 for Figure 2 The diagram shows a circuit structure of a specific implementation example of the pixel circuit shown.

[0032] Figure 5 for Figure 3 The diagram shows a circuit structure of a specific implementation example of the pixel circuit shown.

[0033] Figure 6 A signal timing diagram of a driving method for a pixel circuit provided in at least one embodiment of this disclosure;

[0034] Figures 7 to 10 They are respectively Figure 4 The circuit shown corresponds to Figure 6 The circuit diagram for the four stages;

[0035] Figure 11 This is a schematic diagram illustrating the principle of controlling the display grayscale in a pixel circuit driving method provided in at least one embodiment of the present disclosure.

[0036] Figure 12 This is a schematic diagram of the structure of a display substrate provided in at least one embodiment of the present disclosure;

[0037] Figure 13 A signal timing diagram of a driving method for a display substrate provided in at least one embodiment of this disclosure;

[0038] Figure 14 Signal timing diagram of another driving method for a display substrate provided in at least one embodiment of this disclosure; and

[0039] Figure 15 This is a schematic diagram of a display device provided for at least one embodiment of the present disclosure. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0041] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0042] The present disclosure will now be described through several specific embodiments. To keep the following description of the embodiments of the present disclosure clear and concise, detailed descriptions of known functions and known components may be omitted. When any component of an embodiment of the present disclosure appears in more than one drawing, that component is represented by the same or similar reference numerals in each drawing.

[0043] Figure 1 This is a schematic diagram of the structure of a silicon-based OLED display device. Figure 1 As shown, the silicon-based OLED display device includes a silicon substrate 10 and a pixel circuit layer 12 disposed on the silicon substrate. For example, the pixel circuit layer 12 may include multiple pixel circuits, each used to drive multiple subsequently formed light-emitting elements (i.e., OLEDs). The circuit structure and layout of the pixel circuits can be designed according to actual needs, and this disclosure does not limit this. It should be noted that, for clarity and brevity, Figure 1 Only one transistor T1 in each pixel circuit is schematically shown, which is used to couple with the subsequently formed light-emitting element. For example, the pixel circuit layer 12 may also include various traces such as scan signal lines and data signal lines, which are not limited in this disclosure.

[0044] For example, such as Figure 1 As shown, taking transistor T1 as an example, each transistor in pixel circuit layer 12 includes a gate electrode G, a source electrode S, and a drain electrode D. For example, these three electrodes are electrically connected to three electrode connection portions, such as through tungsten metal-filled vias (i.e., tungsten vias, W-vias); furthermore, these three electrodes can be electrically connected to other electrical structures (e.g., transistors, traces, light-emitting elements, etc.) through their corresponding electrode connection portions.

[0045] For example, the silicon substrate 10 and the pixel circuit layer 12 can be fabricated by a front-end wafer fab using a single-crystal silicon wafer process.

[0046] like Figure 1 As shown, the silicon-based OLED display device also includes a plurality of light-emitting elements 30 formed on the pixel circuit layer 12. For example, each light-emitting element 30 includes a first electrode 22 (e.g., as an anode), an organic light-emitting functional layer 24, and a second electrode 26 (e.g., as a cathode) stacked sequentially. For example, the first electrode 22 can be electrically connected to the source electrode S of the corresponding transistor T1 in the pixel circuit through a tungsten via (via the connection portion corresponding to the source electrode S). It is understood that the positions of the source electrode S and the drain electrode D can be interchanged, that is, the first electrode 22 can also be replaced by being electrically connected to the drain electrode D. For example, the organic light-emitting functional layer 24 may include an organic light-emitting layer, and may also include one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer. For example, the second electrode 26 is a transparent electrode; for example, the second electrode 26 is a common electrode, that is, multiple light-emitting elements 30 share a single surface of the second electrode 26. For example, the emission color of the light-emitting element 30 can be white, but is not limited thereto.

[0047] like Figure 1 As shown, the silicon-based OLED display device further includes a first encapsulation layer 32, a color filter layer 34, a second encapsulation layer 36, and a cover plate 38 sequentially disposed on a plurality of light-emitting elements 30. For example, the first encapsulation layer 32 and the second encapsulation layer 36 can be polymer and / or ceramic thin film encapsulation layers, but are not limited thereto. For example, the color filter layer 34 includes a red filter unit R, a green filter unit G, and a blue filter unit R, but is not limited thereto. For example, one filter unit and its corresponding light-emitting element and pixel circuit can be divided into a sub-pixel; for example, the red filter unit R, the green filter unit G, and the blue filter unit R correspond to the red sub-pixel, the green sub-pixel, and the blue sub-pixel, respectively. For example, the material of the color filter layer 34 can be a material commonly used in the art. For example, the cover plate 138 can be a glass cover plate, but is not limited thereto.

[0048] For example, the light-emitting element 30, including the first electrode 22, the organic light-emitting functional layer 24, and the second electrode 26, the first encapsulation layer 32, the color filter layer 34, the second encapsulation layer 36, and the cover plate 38 can all be manufactured in the back-end panel factory.

[0049] It should be noted that, Figure 1The diagram only exemplarily illustrates the structure of the display area (also known as the active area, AA) of a silicon-based OLED display device. This silicon-based OLED display device may also include a non-display area (the area other than the display area). For example, depending on the structure and function of each region within the non-display area, the non-display area can be further divided into dummy areas, bonding areas (BA), integrated circuit function blocks, etc. For example, the structure of the dummy area is basically the same as the display area, and it can be used to ensure the uniformity of the display area; for example, the bonding area includes pads for electrical connection with external circuits and signal transmission; for example, the integrated circuit function block can be used to set up gate drive circuits (e.g., gate drive circuits formed using GOA technology) and circuits with other functions, etc.

[0050] Silicon-based OLED display devices have small pixel sizes (e.g., less than 100 micrometers), making them suitable for microdisplay applications. However, pixel circuits typically include multiple transistors and capacitors, and due to limitations in fabrication precision, these circuits often occupy a large area within the sub-pixel, hindering pixel size reduction and the achievement of high-resolution (Pixel Per Inch, PPI) displays.

[0051] At least one embodiment of this disclosure provides a pixel circuit. The pixel circuit may include a pixel sub-circuit. The pixel sub-circuit includes a driving circuit, a voltage transmission circuit, and a data writing circuit; the driving circuit includes a control terminal, a first terminal, and a second terminal; the voltage transmission circuit is configured to apply a reset voltage and a first power supply voltage to the first terminal of the driving circuit respectively in response to a transmission control signal; the data writing circuit is configured to write a data signal to the control terminal of the driving circuit and store the written data signal in response to a scan signal; the driving circuit is configured to control the voltage of the second terminal of the driving circuit according to the data signal at the control terminal of the driving circuit and the voltage of the first terminal of the driving circuit, and generate a driving current for driving a light-emitting element to emit light based on the voltage of the second terminal of the driving circuit; the data writing circuit includes two switching transistors of different types. The pixel circuit may further include a voltage control circuit configured to provide a reset voltage to the voltage transmission circuit in response to a reset control signal, and to provide a first power supply voltage to the voltage transmission circuit in response to an emission control signal.

[0052] Some embodiments of this disclosure also provide a driving method corresponding to the above-described pixel circuit, a display substrate and a driving method for the display substrate, and a display device.

[0053] The pixel circuit provided in at least one embodiment of this disclosure has a relatively simple structure of pixel sub-circuit, which can be disposed in the sub-pixel of the display area, thereby reducing the area occupied by the pixel circuit in the sub-pixel and facilitating the realization of high resolution (high PPI) display. At the same time, the data writing circuit uses two switching transistors of different types, which can increase the voltage range of the data signal. In addition, the voltage transmission circuit disposed in the pixel circuit can be used to ensure the uniformity of PWM (Pulse Width Modulation) control of the sub-pixel.

[0054] The following detailed description, with reference to the accompanying drawings, describes some embodiments and examples of this disclosure.

[0055] Figure 2 This is a schematic block diagram of a pixel circuit provided for at least one embodiment of the present disclosure. Figure 2 As shown, the pixel circuit includes a voltage control circuit 200 and a pixel sub-circuit 100.

[0056] For example, the voltage control circuit 200 is configured to provide a reset voltage Vinit to the pixel sub-circuit 100 in response to a reset control signal RS (e.g., to the voltage transmission circuit 120 in the pixel sub-circuit 100, which will be described later), and to provide a first power supply voltage VDD to the pixel sub-circuit 100 in response to a light emission control signal EM (e.g., to the voltage transmission circuit 120 in the pixel sub-circuit 100, which will be described later). For example, the first power supply voltage VDD may be a driving voltage, such as a high voltage.

[0057] For example, such as Figure 2 As shown, the voltage control circuit 200 includes a first control sub-circuit 210 and a second control sub-circuit 220.

[0058] For example, the first control sub-circuit 210 is configured to provide a reset voltage Vinit to the pixel sub-circuit 100 in response to a reset control signal RS, for example, to the voltage transmission circuit 120 in the pixel sub-circuit 100, which will be described later. For example, in some examples, during the reset phase, the first control sub-circuit 210 is turned on in response to the reset control signal RS, thereby providing the reset voltage Vinit to the pixel sub-circuit 100 and performing a reset operation on the light-emitting element L via the pixel sub-circuit 100.

[0059] For example, the second control sub-circuit 220 is configured to provide a first power supply voltage VDD to the pixel sub-circuit 100 in response to the light emission control signal EM, for example, to the voltage transmission circuit 120 in the pixel sub-circuit 100, which will be described later. For example, in some examples, during the light emission phase, the second control sub-circuit 220 is turned on in response to the light emission control signal EM, thereby providing the first power supply voltage VDD to the pixel sub-circuit 100 to drive the pixel sub-circuit 100 to generate a driving current, which in turn drives the light-emitting element L to emit light. For example, in some examples, after the light emission phase has lasted for a period of time, the input of the light emission control signal EM can be stopped, the second control sub-circuit can be turned off, so that the first power supply voltage VDD cannot be provided to the pixel sub-circuit 100, so that the pixel sub-circuit 100 cannot generate a driving current, the light-emitting element L stops emitting light, and enters the non-light emission phase; for example, in some examples, after the non-light emission phase has lasted for a period of time, the light emission control signal EM can be input again, so that the light-emitting element L returns to the light emission phase. Therefore, after entering the light-emitting stage, the light-emitting time of the light-emitting element L can be controlled by controlling whether the light-emitting control signal EM is input, thereby realizing PWM dimming.

[0060] For example, such as Figure 2 As shown, the pixel sub-circuit 100 includes a driving circuit 110, a voltage transmission circuit 120, and a data writing circuit 130.

[0061] For example, the driving circuit 110 includes a control terminal 111, a first terminal 112, and a second terminal 113, and is configured to control the voltage of the second terminal 113 based on the voltage of the control terminal 111 (e.g., the voltage of a data signal) and the voltage of the first terminal 112 (e.g., a first power supply voltage), and generate a driving current for driving the light-emitting element L to emit light based on the voltage of the second terminal 113. For example, in some examples, during the light-emitting phase, the driving circuit 110 can control the voltage V of the second terminal 113 based on the voltage of the control terminal 111 (e.g., the voltage of a data signal) and the voltage of the first terminal 112 (e.g., the first power supply voltage VDD), and generate a driving current based on this voltage Vs, thereby providing a driving current to the light-emitting element L to drive the light-emitting element L to emit light, and providing a corresponding driving current to drive the light-emitting element L to emit light according to the grayscale to be displayed. It should be noted that, in the embodiments of this disclosure, the grayscale displayed by the light-emitting element L is not only related to the magnitude of the driving current, but also to the duration of the driving current applied to the light-emitting element L (i.e., the light-emitting time of the light-emitting element L).

[0062] For example, voltage transmission circuit 120 is configured to apply a reset voltage Vinit and a first power supply voltage VDD to the first terminal 112 of drive circuit 110 in response to transmission control signal VT. For example, in some examples, during the reset phase, voltage transmission circuit 120 is turned on in response to transmission control signal VT, thereby applying the reset voltage Vinit provided by first control sub-circuit 210 to the first terminal 112 of drive circuit 110. Since drive circuit 110 remains on under the control of the data signal of the previous frame, the reset voltage Vinit can be transmitted through drive circuit 110 to light-emitting element L, thereby resetting light-emitting element L. For example, in some examples, during the light-emitting phase, voltage transmission circuit 120 is turned on in response to transmission control signal VT, thereby applying the first power supply voltage VDD provided by second control sub-circuit 220 to the first terminal 112 of drive circuit 110. Since drive circuit 110 remains on under the control of the data signal of the current frame, drive circuit 110 can generate a drive current under the drive of the first power supply voltage VDD, thereby driving light-emitting element L to emit light. For example, in some examples, after entering the light-emitting stage, the voltage transmission circuit 120 can be turned on or off by controlling whether to input the transmission control signal VT, thereby controlling the light-emitting time of the light-emitting element L and thus realizing PWM dimming. For example, for specific details, please refer to the aforementioned description on controlling the light-emitting time of the light-emitting element L by controlling whether to input the light-emitting control signal EM, which will not be repeated here.

[0063] It should be noted that after entering the light-emitting stage, the light-emitting time of the light-emitting element L can be controlled by controlling whether to input the light-emitting control signal EM and / or the transmission control signal VT. The embodiments of this disclosure do not limit this.

[0064] For example, the data writing circuit 130 is configured to write the data signal DATA to the control terminal 111 of the driving circuit 110 and store the written data signal DATA in response to the scan signal SN. For example, the data writing circuit 130 also includes a storage capacitor that can receive and store the written data signal DATA. For example, in some examples, during the data writing phase, the data writing circuit 130 is turned on in response to the scan signal SN, thereby writing the data signal DATA to the control terminal 111 of the driving circuit 110. Simultaneously, the storage capacitor can store the written data signal DATA, and then during the light-emitting phase, the stored data signal DATA can be used to control the driving circuit 110, causing the driving circuit 110 to generate a driving current to drive the light-emitting element L to emit light according to the data signal DATA. For example, the data writing circuit includes two switching transistors of different types, for example, the two switching transistors are turned on in response to the scan signal SN; specifically, one of the two switching transistors is turned on in response to the scan signal SN, and the other of the two switching transistors is turned on in response to the inverted signal SN' of the scan signal SN.

[0065] For example, such as Figure 2 As shown, the first electrode (e.g., anode) of the light-emitting element L is coupled to the second terminal 113 of the driving circuit 110, and the second electrode (e.g., cathode) of the light-emitting element L is coupled to the second power supply terminal to receive the second power supply voltage VSS. For example, the second power supply voltage VSS can be a low voltage, such as zero voltage or ground voltage.

[0066] Figure 3 This is a schematic block diagram of another pixel circuit provided in at least one embodiment of the present disclosure. Figure 3 As shown, in Figure 2 Based on the pixel circuit shown, Figure 3 The pixel circuit shown also includes a current transmission circuit 140. It should be noted that... Figure 3 Other circuit structures in the pixel circuit shown (e.g., voltage control circuit 200, driving circuit 110, voltage transmission circuit 120, data writing circuit 130, etc.) are similar to... Figure 2 The pixel circuits shown are basically the same, so I will not repeat them here.

[0067] For example, such as Figure 3As shown, the first electrode (e.g., anode) of the light-emitting element L is coupled to the second terminal 113 of the driving circuit 110 via the current transfer circuit 140, and the second electrode (e.g., cathode) of the light-emitting element L is coupled to the second power supply terminal to receive the second power supply voltage VSS. For example, the current transfer circuit 140 is configured to transfer the driving current generated by the driving circuit 110 to the light-emitting element L. For example, in some examples, the control terminal of the current transfer circuit 140 is connected to the second voltage terminal to receive the second voltage V2, and the current transfer circuit 140 remains substantially on under the control of the second voltage V2; thus, during the reset phase, the current transfer circuit 140 allows the reset voltage Vinit to be transferred to the light-emitting element L, and during the light-emitting phase, the current transfer circuit 140 allows the driving current generated by the driving circuit 110 to be transferred to the light-emitting element L.

[0068] For example, in some examples, by selecting an appropriate second voltage V2, the current transmission circuit 140 can function as a current clamp. For instance, when displaying a higher grayscale, the current transmission circuit 140 has a higher degree of activation under the control of the second voltage V2 and the voltage at the second terminal of the driving circuit 110, thus allowing the light-emitting element L to have higher luminous brightness; for instance, when displaying a lower grayscale, the current transmission circuit 140 has a lower degree of activation under the control of the second voltage V2 and the voltage at the second terminal of the driving circuit 110, thus allowing the light-emitting element L to have lower luminous brightness; for instance, when displaying the lowest grayscale, the current transmission circuit 140 has an extremely low degree of activation (e.g., close to the off state) under the control of the second voltage V2 and the voltage at the second terminal of the driving circuit 110, thus the light-emitting element L essentially does not emit light. This improves the display contrast of the display substrate.

[0069] Figure 4 for Figure 2 The diagram shows a circuit structure schematic of a specific implementation example of the pixel circuit shown. Figure 4 As shown, the pixel sub-circuit 100 includes a driving transistor M0, a first switching transistor M1, a second switching transistor M2, a third switching transistor M3, a fourth switching transistor M4, and a fifth switching transistor M5, as well as a storage capacitor Cst. For example, Figure 4 The diagram also illustrates a light-emitting element L. For example, the light-emitting element L may include one of an organic light-emitting diode, a quantum dot light-emitting diode, and an inorganic light-emitting diode. For example, the light-emitting element L may be a micrometer-scale light-emitting element, such as a Micro-LED or Mini-LED, and embodiments of this disclosure include, but are not limited to, these. It should be noted that... Figure 5 The types of switching transistors described herein are exemplary and should not be construed as limiting the embodiments of this disclosure.

[0070] For example, such as Figure 4As shown, the first control sub-circuit 210 in the voltage control circuit 200 can be implemented as a first switching transistor M1. The gate of the first switching transistor M1 is connected to the reset control signal terminal to receive the reset control signal RS, the first terminal of the first switching transistor M1 is connected to the reset voltage terminal to receive the reset voltage Vinit, and the second terminal of the first switching transistor M1 is connected to the first node N1. For example, as... Figure 4 As shown, the first switching transistor M1 can be an N-type transistor, and embodiments of this disclosure include, but are not limited to, this. For example, the reset voltage Vinit can be zero voltage or ground voltage, or it can be other fixed levels, such as low voltage, etc., and embodiments of this disclosure do not limit this. For example, when the reset control signal RS is high, the N-type first switching transistor M1 is turned on; when the reset control signal RS is low, the N-type first switching transistor M1 is turned off.

[0071] For example, such as Figure 4 As shown, the second control sub-circuit 220 in the voltage control circuit 200 can be implemented as a second switching transistor M2. The gate of the second switching transistor M2 is connected to the light-emitting control signal terminal to receive the light-emitting control signal EM, the first terminal of the second switching transistor M2 is connected to the first power supply terminal to receive the first power supply voltage VDD, and the second terminal of the second switching transistor M2 is connected to the first node N1. For example, as... Figure 4 As shown, the second switching transistor M2 can be a P-type transistor, and embodiments of this disclosure include, but are not limited to, this. For example, the first power supply voltage VDD can be a driving voltage, such as a high voltage. For example, when the light emission control signal EM is low, the P-type second switching transistor M2 is turned on; when the light emission control signal EM is high, the P-type second switching transistor M2 is turned off.

[0072] For example, such as Figure 4 As shown, the voltage transmission circuit 120 in the pixel sub-circuit 100 can be implemented as a third switching transistor M3. The gate of the third switching transistor M3 is connected to the transmission control signal terminal to receive the transmission control signal VT, the first terminal of the third switching transistor M3 is connected to the first node N1, and the second terminal of the third switching transistor M3 is connected to the second node N2. For example, as... Figure 4 As shown, the third switching transistor M2 can be an N-type transistor, and embodiments of this disclosure include, but are not limited to, this. For example, when the transmission control signal VT is high, the N-type third switching transistor M3 is turned on; when the transmission control signal VT is low, the N-type third switching transistor M3 is turned off.

[0073] For example, such as Figure 4As shown, the driving circuit 110 in the pixel sub-circuit 100 can be implemented as a driving transistor M0. The gate of the driving transistor M0 serves as the control terminal 111 of the driving circuit 110 and is connected to the fourth node N4. The first terminal of the driving transistor M0 serves as the first terminal 112 of the driving circuit 110 and is connected to the second node N2. The second terminal of the driving transistor M0 serves as the second terminal 113 of the driving circuit 110 and is connected to the third node N3. For example, as... Figure 4 As shown, the driving transistor M0 can be an N-type transistor, and embodiments of this disclosure include, but are not limited to, this.

[0074] For example, such as Figure 4 As shown, the data writing circuit 130 in the pixel sub-circuit 100 can be implemented as a fourth switching transistor M4 and a storage capacitor Cst. The gate of the fourth switching transistor M4 is connected to the scan signal terminal to receive the scan signal SN, the first terminal of the fourth switching transistor M4 is connected to the data signal terminal to receive the data signal DATA, the second terminal of the fourth switching transistor M4 is connected to the fourth node N4, the first terminal of the storage capacitor Cst is connected to the fourth node N4 (i.e., coupled to the gate of the driving transistor M0), and the second terminal of the storage capacitor Cst is connected to the first voltage terminal to receive the first voltage V1. For example, the first voltage V1 can be a fixed voltage, such as zero voltage or ground voltage. For example, the storage capacitor Cst can store the data signal DATA written to the fourth node N4 (i.e., the gate of the driving transistor M0). For example, as... Figure 4 As shown, the fourth switching transistor M4 can be an N-type transistor, and embodiments of this disclosure include, but are not limited to, this. For example, when the scan signal SN is high, the N-type fourth switching transistor M4 is turned on; when the scan signal SN is low, the N-type fourth switching transistor M4 is turned off.

[0075] For example, in some examples, such as Figure 4 As shown, the data writing circuit 130 in the pixel sub-circuit 100 may further include a fifth switching transistor M5, that is, the data writing circuit 130 can be implemented as a fourth switching transistor M4, a fifth switching transistor M5, and a storage capacitor Cst. The gate of the fifth switching transistor M5 is used to receive the inverted signal SN' of the scan signal SN, the first terminal of the fifth switching transistor M5 is connected to the data signal terminal to receive the data signal DATA, and the second terminal of the fifth switching transistor M5 is connected to the fourth node N4. For example, the fifth switching transistor M5 and the fourth switching transistor M4 are of different types; for example, as... Figure 4As shown, when the fourth switching transistor is an N-type transistor, the fifth switching transistor M4 is a P-type transistor. For example, when the scan signal SN is high, its inverted signal SN' is low, and the P-type fifth switching transistor M5 is turned on; when the scan signal SN is low, its inverted signal SN' is high, and the P-type fifth switching transistor M5 is turned off. That is, the fifth switching transistor M5 and the fourth switching transistor M4 can be turned on and off simultaneously. For example, the fifth switching transistor M5 and the fourth switching transistor M4 can be symmetrical transistor devices; for example, the fifth switching transistor M5 and the fourth switching transistor M4 can form a transmission gate (also called an analog switch).

[0076] For example, the inverted signal SN' of the scan signal SN can be obtained by inputting the scan signal SN into an inverting circuit, and embodiments of this disclosure include, but are not limited to, this. For example, the scan signal SN can be input to the input terminal of the inverting circuit, thereby outputting the inverted signal SN' at the output terminal of the inverting circuit. For example, the inverting circuit can be set in each sub-pixel of the display area AA, or it can be set in the non-display area NA and the inverted signal SN' of the scan signal SN can be transmitted to each row of sub-pixels through traces. For example, the inverting circuit can adopt common implementation methods, which will not be described in detail here.

[0077] When the data writing circuit 130 includes only the fourth switching transistor M4, the threshold voltage and internal resistance of the fourth switching transistor M4 typically need to be considered when writing the data signal DATA, resulting in a relatively small voltage range for the data signal DATA. The case where the data writing circuit 130 includes only the fifth switching transistor M5 is similar to the case where it includes only the fourth switching transistor M4, and will not be elaborated further. When the data writing circuit includes both the fifth switching transistor M5 and the fourth switching transistor M4, the influence of the threshold voltage and internal resistance of these two switching transistors is smaller, thus increasing the voltage range of the data signal DATA. For example, the operating principle of the fifth switching transistor M5 and the fourth switching transistor M4 (the principle that allows the data signal DATA to have a large voltage range) can be referenced from the operating principle of common CMOS transmission gates used in analog circuits, and will not be elaborated further here.

[0078] For example, such as Figure 4 The first electrode (e.g., anode) of the light-emitting element L is coupled to the second electrode of the driving transistor MO, and the second electrode (e.g., cathode) of the light-emitting element L is coupled to a second power supply terminal to receive a second power supply voltage VSS. For example, the second power supply voltage VSS can be a low voltage, such as zero voltage or ground voltage.

[0079] Figure 5 for Figure 3 The diagram shows a circuit structure schematic of a specific implementation example of the pixel circuit shown. Figure 5 As shown, in Figure 4 Based on the pixel circuit shown, Figure 5 The pixel circuit shown also includes a sixth switching transistor M6. It should be noted that... Figure 5 Other circuit structures in the pixel circuit shown (e.g., driving transistor M0, first to fifth switching transistors M1 to M5, storage capacitor Cst, etc.) and Figure 4 The pixel circuits shown are basically the same, so I will not repeat them here.

[0080] For example, such as Figure 5 As shown, the current transmission circuit 140 in the pixel sub-circuit 100 can be implemented as a sixth switching transistor M6. The gate of the sixth switching transistor M6 is connected to the second voltage terminal to receive the second voltage V2. The first terminal of the sixth switching transistor M6 is connected to the third node N3. The second terminal of the sixth switching transistor M6 is coupled to the first terminal (e.g., anode) of the light-emitting element L. The second terminal (e.g., cathode) of the light-emitting element L is connected to the second power supply terminal to receive the second power supply voltage VSS. For example, as... Figure 5 As shown, the sixth switching transistor M6 can be a P-type transistor, and embodiments of this disclosure include, but are not limited to, this. For example, when the sixth switching transistor M6 is a P-type transistor, the second voltage V2 can be zero voltage or ground voltage, or it can be other fixed levels, such as low voltage. For example, the sixth switching transistor M6 remains substantially in the on state under the control of the second voltage V2.

[0081] It should be noted that, in the embodiments of this disclosure, the storage capacitor Cst can be a capacitor device manufactured through a process, such as by fabricating dedicated capacitor electrodes. The electrodes of the capacitor can be implemented using metal layers, semiconductor layers (e.g., doped polysilicon), etc. Furthermore, the capacitor can also be a parasitic capacitance between various devices, implemented through the transistor itself and other devices or circuits. The connection method of the capacitor is not limited to the method described above; other applicable connection methods are also possible, as long as they can store the voltage level of the corresponding node.

[0082] It should be noted that in the description of the embodiments of this disclosure, the first node N1, the second node N2, the third node N3 and the fourth node N4 do not represent components that must actually exist, but rather represent the junction points of related electrical connections in the circuit diagram.

[0083] It should be noted that the transistors used in the embodiments of this disclosure can all be thin-film transistors, field-effect transistors, or other switching devices with the same characteristics, and the embodiments of this disclosure do not limit this. The source and drain of the transistors used here can be symmetrical in structure, so their source and drain can be indistinguishable in structure. In the embodiments of this disclosure, in order to distinguish the two poles of the transistor other than the gate, one pole is directly described as the first pole and the other pole as the second pole. For example, in a specific implementation, taking a P-type transistor as an example, the first pole can be the source and the second pole can be the drain; taking an N-type transistor as an example, the first pole can be the drain and the second pole can be the source. It should be noted that the embodiments of this disclosure do not limit the type of transistor. In a specific implementation, it is only necessary to connect the poles of the selected type of transistor according to the corresponding poles of the corresponding transistors in the embodiments of this disclosure, and provide the corresponding high voltage or low voltage at the corresponding voltage terminals.

[0084] At least one embodiment of this disclosure also provides a driving method corresponding to the pixel circuit provided in the above embodiments. Figure 6 This is a signal timing diagram of a pixel circuit driving method provided in at least one embodiment of the present disclosure. The following is in conjunction with... Figure 6 The signal timing diagram shown illustrates the driving method of the pixel circuit provided in the embodiments of this disclosure. It should be noted that... Figure 6 The high and low potentials in the signal timing diagram shown are only schematic and do not represent actual potential values ​​or relative proportions. Corresponding to the embodiments of this disclosure, a low-level signal corresponds to the turn-on signal of a P-type transistor, while a high-level signal corresponds to the turn-off signal of a P-type transistor.

[0085] The following is based on Figure 2 Taking the pixel circuit shown as an example, and using... Figure 2 The pixel circuit shown is specifically implemented as follows: Figure 4 With reference to the circuit structure shown, the driving method of the pixel circuit provided in the embodiments of this disclosure will be described in detail.

[0086] For example, such as Figure 6 As shown, the driving method provided in this embodiment may include four stages: a reset stage S1, a data writing stage S2, a light-emitting stage S3, and a non-light-emitting stage S4. Figure 6 The timing waveforms of each control signal (reset control signal RS, scan signal SN, transmission control signal VT, and light emission control signal EM) in each stage are shown.

[0087] Figures 7 to 10 They are respectively Figure 4 The pixel circuit shown corresponds to Figure 6 The circuit diagram shows the four stages. Specifically, Figure 7 for Figure 4 The diagram shown is a schematic of the pixel circuit in the reset phase S1. Figure 8 for Figure 4 The diagram shown is a schematic of the pixel circuit in the data writing stage S2. Figure 9 for Figure 4 The diagram shown is a schematic of the pixel circuit in the light-emitting stage S3. Figure 10 for Figure 4 The diagram shown illustrates the pixel circuit in the non-light-emitting stage S4. Additionally, Figures 7 to 10 Transistors marked with an X (cross) indicate that they are in the off state during the corresponding stage. Figures 7 to 10 The dashed line with an arrow indicates the current path of the pixel circuit in the corresponding stage (the direction of the arrow does not indicate the direction of the current).

[0088] During the reset phase S1, a reset control signal RS and a transmission control signal VT are input to activate the voltage control circuit 200 and the voltage transmission circuit 120. The reset voltage Vinit is then applied to the first terminal 112 of the drive circuit 110 via the voltage control circuit 200 and the voltage transmission circuit 120 to reset the light-emitting element L. Specifically, during the reset phase S1, the voltage control circuit 200 is activated by activating the first control sub-circuit 210, and the reset voltage Vinit is applied to the first terminal 112 of the drive circuit 110 via the first control sub-circuit 210 and the voltage transmission circuit 120.

[0089] like Figure 6 and Figure 7 As shown, during the reset phase S1, the first N-type switching transistor M1 is turned on by the high level of the reset control signal RS, and the third N-type switching transistor M3 is turned on by the high level of the transmission control signal VT. At the same time, the second P-type switching transistor M2 is turned off by the high level of the light emission control signal EM, and the fourth N-type switching transistor M4 is turned off by the low level of the scan signal SN. Correspondingly, the fifth P-type switching transistor M5 is turned off by the high level of the inverted signal SN' of the scan signal SN. In addition, the driving transistor M0 is turned on by the level of the fourth node N4 (i.e., the data signal DATA stored in the storage capacitor Cst during the display of the previous frame).

[0090] like Figure 7 As shown, during the reset phase S1, a reset path can be formed (such as...). Figure 7 (As shown by the dashed line with arrows). Since the reset voltage Vinit is a low voltage (e.g., ground voltage or zero voltage), the light-emitting element L can be reset through this reset path.

[0091] During the data writing stage S2, the scan signal SN is input to turn on the data writing circuit 130. The data signal DATA is written to the control terminal 111 of the drive circuit 110 through the data writing circuit 130, and the written data signal DATA is stored by the data writing circuit 130.

[0092] like Figure 6 and Figure 8 As shown, during the data writing stage S2, the N-type fourth switching transistor M4 is turned on by the high level of the scan signal SN, and correspondingly, the P-type fifth switching transistor M5 is turned on by the low level of the inverted signal SN' of the scan signal SN; at the same time, the N-type first switching transistor M1 is turned off by the low level of the reset control signal RS, the P-type second switching transistor M2 is turned off by the high level of the light emission control signal EM, and the N-type third switching transistor M3 is turned off by the low level of the transmission control signal VT.

[0093] like Figure 8 As shown, in the data writing stage S2, a data writing path can be formed (e.g., Figure 8 (As shown by the dashed line with arrows). The data signal DATA charges the first terminal of the storage capacitor Cst (i.e., the fourth node N4, which is also the gate of the driving transistor M0) through the data write path, so that the potential of the first terminal of the storage capacitor Cst becomes DATA. Under the control of the data signal DATA, the driving transistor M0 remains in the on state.

[0094] After the data writing stage S2, the potential of the first terminal of the storage capacitor Cst (i.e., the fourth node N4, which is also the gate of the driving transistor M0) is DATA. In other words, the voltage information of the data signal DATA is stored in the storage capacitor Cst, which is used to control the driving transistor M0 to generate driving current during the light emission stage.

[0095] In the light-emitting stage S3, the light-emitting control signal EM and the transmission control signal VT are input, activating the voltage control circuit 200, the voltage transmission circuit 120, and the driving circuit 110. The voltage control circuit 200 and the voltage transmission circuit 120 apply the first power supply voltage VDD to the first terminal 112 of the driving circuit 110. This causes the driving circuit 110 to control the voltage Vs of its second terminal 113 based on the data signal DATA at its control terminal 111 and the first power supply voltage VDD at its first terminal 112. A driving current is then generated based on the voltage Vs at the second terminal 113 of the driving circuit 110 to drive the light-emitting element L to emit light. Specifically, in the light-emitting stage S3, the voltage control circuit 200 is activated by activating the second control sub-circuit 220, and the first power supply voltage VDD is applied to the first terminal 112 of the driving circuit 110 through the second control sub-circuit 220 and the voltage transmission circuit 120.

[0096] As Figure 6 and Figure 9 shown, in the light-emitting stage S3, the P-type second switching transistor M2 is turned on by the low level of the light-emitting control signal EM, and the N-type third switching transistor M3 is turned on by the high level of the transfer control signal VT; at the same time, the N-type first switching transistor M1 is cut off by the low level of the reset control signal RS, and the N-type fourth switching transistor M4 is cut off by the low level of the scan signal SN. Correspondingly, the P-type fifth switching transistor M5 is cut off by the high level of the inverted signal SN’ of the scan signal SN; in addition, the driving transistor M0 is turned on by the level of the fourth node N4 (i.e., the data signal DATA stored in the storage capacitor Cst in the data writing stage S2).

[0097] As Figure 9 shown, in the light-emitting stage S3, a light-emitting path can be formed (as shown by the dotted line with arrows in Figure 9 ). The first pole (anode) of the light-emitting element L is connected to the first power supply voltage VDD (high voltage) through the light-emitting path, and the second pole (cathode) of the light-emitting element L is connected to the second power supply voltage VSS (low voltage), so that the light-emitting element L can emit light under the action of the driving current flowing through the driving transistor M0. For example, in some examples, the driving transistor M0 operates in the subthreshold region. It should be noted that in the embodiments of the present disclosure, when the driving transistor M0 operates in the threshold region, the driving transistor M0 is considered to be turned on. The driving current generated by the driving transistor M0 can be obtained according to the following formula:

[0098]

[0099] In the above formula, I L represents the driving current, I0 represents the driving current when Vgs = Vth, Vth represents the threshold voltage of the driving transistor M0, Vgs represents the voltage difference between the gate and the second pole (e.g., the source) of the driving transistor M0, Vs represents the voltage of the second pole of the driving transistor M0, q is the charge of an electron (a constant value), n is the channel doping concentration of the driving transistor M0, k is a constant value, and T is the operating temperature of the driving transistor M0.

[0100] In some embodiments of the present disclosure, the driving transistor M0 operates in the subthreshold region, Vgs < Vth; in an ideal case, there is a linear relationship between the voltage Vs of the second pole of the driving transistor M0 and the voltage DATA of the gate of the driving transistor M0, V s= a·Data+b, where a and b are constants. That is, the voltage driving the second electrode of transistor M0 changes linearly with the voltage of its gate. Therefore, by adjusting the voltage of the gate of transistor M0 (i.e., the voltage of the data signal DATA), the voltage Vs of the second electrode of transistor M0 can be changed, thereby changing the voltage difference between the two electrodes of the light-emitting element L, and thus adjusting the brightness of the light-emitting element L.

[0101] The above driving current I L The light is applied to the light-emitting element L through the light-emitting path, and the light-emitting element L emits light under the action of the driving current flowing through the driving transistor M0. It should be noted that in the display substrate provided in the embodiments of this disclosure, the grayscale of the pixel circuit emission is related not only to the magnitude of the driving current, but also to the duration of the driving current applied to the light-emitting element (i.e., the emission time of the light-emitting element). For example, the relationship between the grayscale of the pixel circuit emission and the magnitude of the driving current and the duration of the emission time can be determined by theoretical calculation, simulation, experimental measurement, etc., and then, according to this relationship, the required grayscale can be displayed by simultaneously controlling the magnitude of the driving current and the duration of the emission time. For example, in some examples, the above driving method can add a non-emission stage S4 after the emission stage S3 to control the duration of the emission time of the light-emitting element.

[0102] During the non-light-emitting stage S4, the input transmission control signal VT is stopped, the voltage transmission circuit 120 is turned off, so that the first power supply voltage VDD cannot be applied to the first terminal 112 of the drive circuit 110, so that the light-emitting element L stops emitting light.

[0103] like Figure 6 and Figure 10 As shown, after the light-emitting stage S3 lasts for a period of time, the input transmission control signal VT can be stopped (other control signals remain in the state of the light-emitting stage S3). For example, the transmission control signal VT changes from high level to low level, causing the third switching transistor M3 to turn off, so that the first power supply voltage VDD cannot be applied to the first terminal of the driving transistor M0. Figure 9 When the light-emitting path is interrupted, the driving transistor M0 cannot generate driving current, and the light-emitting element L stops emitting light, that is, it enters the non-light-emitting stage S4.

[0104] For example, in some examples, after a period of time in the non-light-emitting phase S4, the transmission control signal VT can be input again, causing the light-emitting element L to return to the light-emitting phase S3, that is, the light-emitting phase S3 and the non-light-emitting phase S4 can alternate. For example, PWM dimming can be achieved based on the transition between the light-emitting phase S3 and the non-light-emitting phase S4.

[0105] It should be noted that the transition between the light-emitting stage S3 and the non-light-emitting stage S4 can also be achieved in other ways, not limited to those described above. For example, the transition between the light-emitting stage S3 and the non-light-emitting stage S4 can be achieved by controlling whether the light-emitting control signal EM is input. It is understood that the transition between the light-emitting stage S3 and the non-light-emitting stage S4 can also be achieved by simultaneously controlling whether the light-emitting control signal EM and the transmission control signal VT are input.

[0106] It should be noted that, since the current transmission circuit 140 remains essentially on under the control of the second voltage V2, therefore, Figure 3 The pixel circuit shown (for example, specifically implemented as) Figure 5 The circuit structure shown can also be based on Figure 6 The timing diagrams of the various control signals shown are used for driving. For specific details, please refer to the relevant description of the driving method mentioned above. The details will not be repeated here.

[0107] It should be noted that, Figure 6 The signal timing diagram shown is schematic. For the display substrate provided in the embodiments of this disclosure, the signal timing during operation can be determined according to actual needs, and the embodiments of this disclosure do not impose any restrictions on this.

[0108] Figure 11 This is a schematic diagram illustrating the principle of controlling the display grayscale in a pixel circuit driving method provided in at least one embodiment of the present disclosure. For example, as... Figure 11 As shown, in the driving method provided in the embodiments of this disclosure, each sub-pixel can display the required grayscale by simultaneously controlling the magnitude of the driving current and the length of the light emission time (i.e., the duration of the aforementioned light emission stage).

[0109] For example, the magnitude of the drive current can be controlled by adjusting the value of the data signal DATA, as can be described by referring to the aforementioned formula for the drive current. For example, the duration of the light-emitting phase can be controlled by controlling the duration of the light-emitting phase. This can be achieved by controlling whether to input the light-emitting control signal EM and / or the transmission control signal VT, thereby controlling the duration of the light-emitting phase.

[0110] For example, in some examples, the driving method provided by embodiments of this disclosure may further include controlling the display grayscale of the light-emitting element by adjusting the magnitude of the data signal DATA and the duration of the transmission control signal VT during the light-emitting phase. Specifically, for example, refer to... Figure 11As shown, when the target display grayscale of the light-emitting element is less than the preset value G0 (i.e., the target display grayscale is between Gmin and G0, with Gmin being the lowest grayscale), the magnitude of the data signal DATA remains unchanged (correspondingly, the luminous brightness of the light-emitting element remains unchanged). The display grayscale of the light-emitting element is made to match the target display grayscale by adjusting the duration of the transmission control signal VT during the luminous phase (i.e., the luminous time of the light-emitting element). When the target display grayscale of the light-emitting element is not less than the preset value (i.e., the target display grayscale is between G0 and Gmax, with Gmax being the highest grayscale), the duration of the transmission control signal VT during the luminous phase remains unchanged. The display grayscale of the light-emitting element is made to match the target display grayscale by adjusting the magnitude of the data signal DATA.

[0111] It should be noted that the preset value G0 can be determined according to actual needs, and the embodiments disclosed herein do not impose any limitations on this. It should also be noted that... Figure 14 The correspondence between the data signals and the displayed grayscale (as shown by the solid lines and solid dots in the figure) and the correspondence between the displayed grayscale in the duration domain of the light emission stage (as shown by the dashed lines and hollow circles in the figure) shown are exemplary. Both can be determined according to actual needs, and the embodiments of this disclosure do not limit this.

[0112] The technical effects of the display substrate driving method provided in the embodiments of this disclosure are based on the corresponding descriptions of the display substrate in the foregoing embodiments, and will not be repeated here.

[0113] Figure 12 This is a schematic diagram of a display substrate provided in at least one embodiment of the present disclosure. For example, the display substrate includes the pixel circuitry provided in any of the embodiments of the present disclosure. For example, the display substrate can be a silicon-based substrate, and embodiments of the present disclosure include, but are not limited to, this. For example, the cross-sectional structure of the display substrate can be referenced... Figure 1 The structure of the silicon-based OLED display device shown is, for example, reference. Figure 1 As shown, this pixel circuit (reference) Figure 1 The transistors shown can be at least partially formed in a silicon substrate, and the light-emitting elements can be formed on top of the pixel circuitry. For example, further details of this display substrate can be found in the foregoing. Figure 1 The relevant descriptions of the silicon-based OLED display devices shown will not be repeated here.

[0114] For example, such as Figure 12 As shown, the display substrate includes a display area AA and a non-display area NA. For example, the non-display area NA is the area on the display substrate other than the display area AA. For example, in some examples, the non-display area NA surrounds the display area AA.

[0115] For example, such as Figure 12As shown, the display area AA of the display substrate includes a plurality of sub-pixels 50 arranged in an array. For example, the plurality of sub-pixels 50 may include multiple color sub-pixels, such as red sub-pixels, green sub-pixels, and blue sub-pixels, etc., and the embodiments of this disclosure include, but are not limited to, these. For example, the arrangement of the multiple color sub-pixels can be determined according to actual needs, and the embodiments of this disclosure do not limit this.

[0116] For example, such as Figure 12 As shown, each sub-pixel 50 includes a light-emitting element L and a pixel sub-circuit 100 coupled to the light-emitting element L. The pixel sub-circuit 100 can be used to drive the light-emitting element L to emit light. That is, the pixel sub-circuit 100 in the above-mentioned pixel circuit can be disposed in the display area AA of the display substrate. For example, the light-emitting element L can include an organic light-emitting diode (OLED), and embodiments of this disclosure include, but are not limited to, this; for example, the light-emitting element L can also include a quantum dot light-emitting diode (QLED) or an inorganic light-emitting diode, etc. For example, the light-emitting element L can be a micron-scale light-emitting element, such as Micro-LED, Mini-LED, etc., and embodiments of this disclosure include, but are not limited to, this.

[0117] For example, such as Figure 12 As shown, the non-display area NA includes multiple voltage control circuits 200, each voltage control circuit 200 being coupled to a pixel sub-circuit 100 in at least one row of sub-pixels 50. That is, the voltage driving circuit in the aforementioned pixel circuit can be located in the non-display area NA of the display substrate. For example, after entering the light-emitting stage, the light-emitting time of the light-emitting element L of at least one row (e.g., one or more rows) of sub-pixels coupled to a voltage control circuit 200 can be controlled by controlling whether a light-emitting control signal EM is input.

[0118] For example, such as Figure 12 As shown, the display substrate also includes multiple voltage transmission lines VL, each corresponding to a row of sub-pixels 50. The pixel sub-circuit 100 in each row of sub-pixels 50 is connected to the voltage control circuit 200 through the corresponding voltage transmission line VL. The voltage transmission line VL is configured to transmit the reset voltage Vinit and the first power supply voltage VDD provided by the voltage control circuit 200 to the pixel sub-circuit 100.

[0119] For example, in Figure 12In the display substrate shown, since the voltage control circuit 200 is located in the non-display area NA, the traces for transmitting the first power supply voltage VDD, the reset control signal line for transmitting the reset control signal RS, and the light emission control signal line for transmitting the light emission control signal EM can also be correspondingly located in the non-display area NA. This simplifies the trace layout in the display area AA of the display substrate, allowing the display area AA to accommodate more sub-pixels 50 (i.e., pixel sub-circuits 100 and light-emitting elements L, etc.), which is beneficial for achieving high-resolution (high PPI) display. For example, in some examples, the voltage transmission circuit 120 in the pixel sub-circuit 100 of each row of sub-pixels 50 can be connected to the same transmission control signal line, with the same transmission control signal line providing the transmission control signal VT; thus, after entering the light emission stage, the light emission time of the light-emitting element L of each row of sub-pixels can be controlled by controlling whether the transmission control signal VT is input.

[0120] It should be noted that, in the embodiments of this disclosure, since the voltage transmission circuit 120 is located inside the sub-pixel 50, while the second control sub-circuit 220 is located outside the sub-pixel 50 (located in the non-display area NA), compared with PWM control based on the second control sub-circuit 220 (i.e., controlling whether to input the light emission control signal EM), PWM control based on the voltage transmission circuit 120 (i.e., controlling whether to input the transmission control signal VT) can reduce the influence of wiring load (e.g., parasitic capacitance and parasitic resistance), thereby better ensuring the uniformity of PWM control of the sub-pixel.

[0121] It should be noted that, Figure 12 The illustration only shows the case where each voltage control circuit 200 is coupled to a pixel sub-circuit 100 in a row of sub-pixels 50, and embodiments of this disclosure include, but are not limited to, this. For example, each voltage control circuit 200 may also be coupled to pixel sub-circuits 100 in multiple rows (e.g., two rows, three rows, four rows, etc., such as multiple rows including several adjacent rows) of sub-pixels 50.

[0122] The display substrate provided in the embodiments of this disclosure has a voltage control circuit 200 set in the non-display area NA, which can simplify the structure of the pixel sub-circuit 100 in each sub-pixel 50 and reduce the area occupied by the pixel sub-circuit 100 in each sub-pixel 50. This allows the display area AA to be set with more sub-pixels 50 (i.e., pixel sub-circuit 100 and light-emitting elements L, etc.), which is beneficial to achieving high resolution (high PPI) display.

[0123] Figure 13 This is a signal timing diagram of a driving method for a display substrate provided in at least one embodiment of the present disclosure. For example, Figure 6 The signal timing diagram shown can be used to drive a row of sub-pixels in the display substrate provided in the embodiments of this disclosure, while Figure 13 The signal timing diagram shown can be used to drive the display substrate (i.e., drive all row sub-pixels in the display substrate).

[0124] For example, such as Figure 12 As shown, the signal timing for each row of sub-pixels (i.e., the reset control signal RS, scan signal SN, transmission control signal VT, and emission control signal EM enclosed in a large bracket) is... Figure 6 The signal timing shown is basically the same, that is, the working principle of each row of sub-pixels can be referred to the relevant description of the aforementioned driving method, and will not be repeated here.

[0125] For example, such as Figure 13 As shown, the driving method for this display substrate includes: within one frame of display time, causing all row sub-pixels to sequentially enter a reset phase, a data writing phase, and a light-emitting phase. For example, the signal timing corresponding to the reset phase, data writing phase, and light-emitting phase of each row sub-pixel can be referenced... Figure 6 The signal timing sequence corresponding to the reset phase, data writing phase, and light emission phase is shown.

[0126] For example, during the reset phase of each row of sub-pixels, a reset control signal RS and a transmission control signal VT are input, activating the voltage control circuit 200 and the voltage transmission circuit 120. The reset voltage Vinit is then applied to the first terminal 112 of the driving circuit 110 via the voltage control circuit 200 and the voltage transmission circuit 120 to reset the light-emitting element L of that row of sub-pixels. Specifically, during the reset phase, the voltage control circuit 200 is activated by activating the first control sub-circuit 210, and the reset voltage Vinit is applied to the first terminal 112 of the driving circuit 110 via the first control sub-circuit 210 and the voltage transmission circuit 120. For further details, please refer to the description of the reset phase S1 in the aforementioned pixel circuit driving method; it will not be repeated here.

[0127] For example, during the data writing stage of each row of sub-pixels, a scan signal SN is input to activate the data writing circuit 130. The data writing circuit 130 writes the data signal DATA to the control terminal 111 of the driving circuit 110, and stores the written data signal DATA. For specific details, please refer to the relevant description of the data writing stage S2 in the aforementioned pixel circuit driving method, which will not be repeated here.

[0128] For example, during the light-emitting stage of each row of sub-pixels, a light-emitting control signal EM and a transmission control signal VT are input, activating the voltage control circuit 200, the voltage transmission circuit 120, and the driving circuit 110. The voltage control circuit 200 and the voltage transmission circuit 120 apply a first power supply voltage VDD to the first terminal 112 of the driving circuit 110. This causes the driving circuit 110 to control the voltage Vs of its second terminal 113 based on the data signal DATA at its control terminal 111 and the first power supply voltage VDD at its first terminal 112. A driving current is then generated based on the voltage Vs at the second terminal 113 of the driving circuit 110 to drive the light-emitting element L of that row of sub-pixels to emit light. Specifically, during the light-emitting stage, the voltage control circuit 200 is activated by activating the second control sub-circuit 220, and the first power supply voltage VDD is applied to the first terminal 112 of the driving circuit 110 through the second control sub-circuit 220 and the voltage transmission circuit 120. For further details, please refer to the description of the light-emitting stage S3 in the aforementioned pixel circuit driving method; it will not be repeated here.

[0129] For example, such as Figure 13 As shown, the driving method for this display substrate may further include: during one frame of display time, causing all row sub-pixels to enter the non-light-emitting stage S4 row by row. For example, as... Figure 12 As shown, the light-emitting elements of each row of sub-pixels can be switched from the light-emitting stage to the non-light-emitting stage S4 by stopping the input transmission control signal VT. The embodiments of this disclosure include, but are not limited to, this method of switching between the light-emitting stage and the non-light-emitting stage. For example, other methods can be referred to the relevant description in the aforementioned pixel circuit driving method.

[0130] For example, in the non-light-emitting stage S4 of each row of sub-pixels, the input transmission control signal VT is stopped, the voltage transmission circuit 120 is turned off, and the first power supply voltage VDD cannot be applied to the first terminal 112 of the driving circuit 110, so that the light-emitting element L of that row of sub-pixels stops emitting light. For example, specific details can be found in the relevant description of the non-light-emitting stage S4 in the aforementioned pixel circuit driving method, and will not be repeated here.

[0131] Figure 13 The driving method of the display substrate shown can achieve line-by-line black insertion within one frame display time, thereby effectively controlling the overall screen brightness when the display substrate is displayed.

[0132] Figure 14 This is a signal timing diagram of another driving method for a display substrate provided in at least one embodiment of the present disclosure. For example, with... Figure 13 The signal timing diagrams shown are similar. Figure 14 The signal timing diagram shown can also be used to drive all row sub-pixels on the display substrate.

[0133] For example, such as Figure 14 As shown, the signal timing for each row of sub-pixels (i.e., the reset control signal RS, scan signal SN, transmission control signal VT, and emission control signal EM enclosed in a large bracket) is... Figure 6 The signal timing shown is basically the same, that is, the working principle of each row of sub-pixels can be referred to the relevant description of the aforementioned driving method, and will not be repeated here.

[0134] For example, with Figure 13 The driving method for the display substrate shown is similar. Figure 14 The driving method for the display substrate shown may also include: within one frame of display time, causing all row sub-pixels to sequentially enter a reset phase, a data writing phase, and a light-emitting phase. For example, in Figure 14 The working principles of the reset phase, data writing phase, and light emission phase of each row of sub-pixels in the driving method of the display substrate shown can be found by referring to... Figure 13 The working principles of the reset stage, data writing stage, and light emission stage in the driving method of the display substrate shown will not be elaborated here.

[0135] For example, such as Figure 14 As shown, the driving method for this display substrate may further include: causing all row sub-pixels to simultaneously enter the non-light-emitting stage S4 within one frame display time. For example, as... Figure 14 As shown, by stopping the input transmission control signal VT, the light-emitting elements of each row of sub-pixels can simultaneously enter the non-light-emitting stage S4 from the light-emitting stage. The embodiments of this disclosure include, but are not limited to, this method of realizing the transition between the light-emitting stage and the non-light-emitting stage. For example, other methods can be referred to the relevant description in the foregoing driving method.

[0136] For example, during the non-light-emitting phase S4 of all row sub-pixels, the input transmission control signal VT is simultaneously stopped for all row sub-pixels, and the voltage transmission circuit 120 is turned off, preventing the first power supply voltage VDD from being applied to the first terminal 112 of the driving circuit 110, so that the light-emitting elements L of all row sub-pixels simultaneously stop emitting light. For example, specific details can be found in the relevant description of the non-light-emitting phase S4 in the aforementioned pixel circuit driving method, and will not be repeated here.

[0137] Figure 14 The driving method of the display substrate shown can achieve full-screen black insertion within one frame display time, thereby improving the motion blur problem that exists in high frame rate display.

[0138] It should be noted that, Figure 13 and Figure 14The signal timing diagrams shown are all schematic. For the display substrate provided in the embodiments of this disclosure, the signal timing during operation can be determined according to actual needs, and the embodiments of this disclosure do not impose any restrictions on this.

[0139] At least one embodiment of this disclosure also provides a display device. Figure 15 This is a schematic diagram of a display device provided for at least one embodiment of the present disclosure. Figure 15 As shown, the display device may include the display substrate provided in any of the embodiments of the present disclosure (e.g., Figure 12 The display substrate shown. For example, the display substrate 1 includes a display area AA and a non-display area NA. For example, the display area AA includes a plurality of sub-pixels 50 arranged in an array, and each sub-pixel includes a pixel circuit coupled to a light-emitting element. Figure 15 Not shown in the image, please refer to the following: Figure 12 (as shown); for example, the non-display area NA includes multiple voltage control circuits ( Figure 15 Not shown in the image, please refer to the following: Figure 12 As shown, each voltage control circuit is coupled to a pixel circuit in at least one row of sub-pixels. For example, the light-emitting element may include one of an organic light-emitting diode, a quantum dot light-emitting diode, and an inorganic light-emitting diode. For example, the display device may also include a scan drive circuit 2 and a data drive circuit 3.

[0140] For example, the scan driver circuit 2 can be connected to the data writing circuit in each row of sub-pixels via multiple scan signal lines GL to provide scan signals SN; the scan driver circuit 2 can also be connected to multiple voltage control circuits via multiple reset control signal lines RL and multiple light emission control signal lines EL to provide reset control signals RS and light emission control signals EM. For example, the scan driver circuit can be directly integrated on the display substrate (e.g., a silicon substrate) to form a GOA (Gatedriver On Array). Of course, the scan driver circuit can also be implemented using a bonded integrated circuit driver chip.

[0141] For example, the data driving circuit 3 can be connected to the data writing circuit in each column of sub-pixels via multiple data signal lines DL to provide the data signal DATA. Alternatively, the data driving circuit 3 can be implemented using a bonded integrated circuit driver chip.

[0142] For example, the display device may also include other components, such as a timing controller, a signal decoding circuit, a voltage conversion circuit, etc. These components may use conventional components or structures, which will not be described in detail here.

[0143] For example, refer to Figure 12 or Figure 13The signal timing diagram shown illustrates the line-by-line scanning process of the display device. Each stage of the pixel circuit in each line can be referenced in Figure 12 or... Figure 13 The corresponding description in the illustrated embodiment. It should be noted that during the line-by-line scanning process, control signals such as reset control signals, scan signals, transmission control signals, and light emission control signals are applied line by line according to the timing signals.

[0144] For example, the display device in this embodiment can be any product or component with display function, such as a display panel, monitor, television, electronic paper display device, mobile phone, tablet computer, laptop computer, digital photo frame, navigator, virtual reality device, augmented reality device, etc. It should be noted that the display device may also include other conventional components or structures. For example, to achieve the necessary functions of the display device, those skilled in the art can set other conventional components or structures according to specific application scenarios, and the embodiments disclosed herein do not impose any limitations on this.

[0145] The technical effects of the display device provided in at least one embodiment of this disclosure can be referred to the corresponding description of the display substrate in the above embodiments, and will not be repeated here.

[0146] The following points need to be clarified regarding this disclosure:

[0147] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0148] (2) For clarity, the thickness of layers or regions in the drawings used to describe embodiments of the present disclosure is enlarged or reduced, i.e., these drawings are not drawn to actual scale.

[0149] (3) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0150] The above description is merely an exemplary embodiment of this disclosure and is not intended to limit the scope of protection of this disclosure. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure is determined by the appended claims.

Claims

1. A pixel circuit, comprising: Pixel sub-circuit; wherein, the pixel sub-circuit includes a driving circuit, a voltage transmission circuit, and a data writing circuit; The driving circuit includes a control terminal, a first terminal, and a second terminal; The voltage transmission circuit is configured to apply a reset voltage and a first power supply voltage to a first terminal of the drive circuit in response to a transmission control signal. The data writing circuit is configured to write a data signal to the control terminal of the drive circuit in response to a scan signal and store the written data signal. The driving circuit is configured to control the voltage of the second terminal of the driving circuit according to the data signal of the control terminal of the driving circuit and the voltage of the first terminal of the driving circuit, and to generate a driving current for driving the light-emitting element to emit light based on the voltage of the second terminal of the driving circuit. The data writing circuit includes two switching transistors of different types. The pixel circuit further includes a voltage control circuit; wherein the voltage control circuit is configured to provide the reset voltage to the voltage transmission circuit in response to a reset control signal, and to provide the first power supply voltage to the voltage transmission circuit in response to an emission control signal. The voltage control circuit includes a first control sub-circuit and a second control sub-circuit. The first control sub-circuit is configured to provide the reset voltage to the voltage transmission circuit in response to the reset control signal; The second control sub-circuit is configured to provide the first power supply voltage to the voltage transmission circuit in response to the light emission control signal. The first control sub-circuit includes a first switching transistor, and the second control sub-circuit includes a second switching transistor; The gate of the first switching transistor is connected to the reset control signal terminal to receive the reset control signal, the first terminal of the first switching transistor is connected to the reset voltage terminal to receive the reset voltage, and the second terminal of the first switching transistor is connected to the first node. The gate of the second switching transistor is connected to the light-emitting control signal terminal to receive the light-emitting control signal; the first terminal of the second switching transistor is connected to the first power supply terminal to receive the first power supply voltage; and the second terminal of the second switching transistor is connected to the first node. The voltage transmission circuit includes a third switching transistor; The gate of the third switching transistor is connected to the transmission control signal terminal to receive the transmission control signal. The first terminal of the third switching transistor is connected to the first node, and the second terminal of the third switching transistor is connected to the second node. The type of the second switching transistor is different from that of the third switching transistor.

2. The pixel circuit according to claim 1, wherein, The driving circuit includes a driving transistor; The gate of the driving transistor is connected to the fourth node as the control terminal of the driving circuit, the first terminal of the driving transistor is connected to the second node as the first terminal of the driving circuit, and the second terminal of the driving transistor is connected to the third node as the second terminal of the driving circuit.

3. The pixel circuit according to claim 2, wherein, The two different types of switching transistors in the data writing circuit include a fourth switching transistor and a fifth switching transistor, and the data writing circuit also includes a storage capacitor; The gate of the fourth switching transistor is connected to the scan signal terminal to receive the scan signal, the first terminal of the fourth switching transistor is connected to the data signal terminal to receive the data signal, and the second terminal of the fourth switching transistor is connected to the fourth node. The gate of the fifth switching transistor is used to receive the inverted signal of the scan signal, the first terminal of the fifth switching transistor is connected to the data signal terminal to receive the data signal, and the second terminal of the fifth switching transistor is connected to the fourth node; The first end of the storage capacitor is connected to the fourth node, and the second end of the storage capacitor is connected to the first voltage terminal to receive the first voltage.

4. The pixel circuit according to claim 3, wherein, The first electrode of the light-emitting element is coupled to the third node, and the second electrode of the light-emitting element is connected to the second power supply terminal to receive the second power supply voltage.

5. The pixel circuit according to claim 3, wherein, The pixel sub-circuit further includes: a current transmission circuit; wherein The current transmission circuit is configured to transmit the driving current generated by the driving circuit to the light-emitting element.

6. The pixel circuit according to claim 5, wherein, The current transmission circuit includes a sixth switching transistor; The gate of the sixth switching transistor is connected to the second voltage terminal to receive the second voltage, the first terminal of the sixth switching transistor is connected to the third node, the second terminal of the sixth switching transistor is coupled to the first terminal of the light-emitting element, and the second terminal of the light-emitting element is connected to the second power supply terminal to receive the second power supply voltage. The sixth switching transistor remains in the on state under the control of the second voltage.

7. A display substrate, comprising: The pixel circuit according to claim 1; wherein, The display substrate includes a display area; The display area includes multiple sub-pixels arranged in an array, and each sub-pixel includes the light-emitting element and the pixel sub-circuit coupled to the light-emitting element.

8. The display substrate according to claim 7, wherein, The pixel circuit further includes a voltage control circuit configured to provide the reset voltage to the voltage transmission circuit in response to a reset control signal, and to provide the first power supply voltage to the voltage transmission circuit in response to an emission control signal. The display substrate also includes a non-display area; The non-display area includes a plurality of voltage control circuits, each voltage control circuit being coupled to a pixel sub-circuit in at least one row of sub-pixels.

9. The display substrate according to claim 8, further comprising: Multiple voltage transmission lines correspond one-to-one with each row of sub-pixels; among them, The pixel sub-circuit in each row of sub-pixels is connected to the voltage control circuit via the corresponding voltage transmission line, which is configured to transmit the reset voltage and the first power supply voltage.

10. The display substrate according to any one of claims 7-9, wherein, The display substrate includes a silicon substrate, the pixel circuit is at least partially formed in the silicon substrate, and the light-emitting element is formed on the pixel circuit.

11. The display substrate according to any one of claims 7-9, wherein, The light-emitting element includes one of organic light-emitting diodes, quantum dot light-emitting diodes, and inorganic light-emitting diodes.

12. A display device, comprising: The display substrate according to any one of claims 7-10.

13. A driving method for a pixel circuit according to claim 1, comprising: The process includes a reset phase, a data writing phase, and a light emission phase; among which, During the reset phase, the reset control signal and the transmission control signal are input to activate the voltage control circuit and the voltage transmission circuit. The reset voltage is then applied to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit to reset the light-emitting element. During the data writing stage, the scanning signal is input to activate the data writing circuit. The data signal is written to the control terminal of the driving circuit through the data writing circuit, and the written data signal is stored by the data writing circuit. During the light-emitting stage, the light-emitting control signal and the transmission control signal are input to activate the voltage control circuit, the voltage transmission circuit, and the driving circuit. The first power supply voltage is applied to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit. The driving circuit controls the voltage of the second terminal of the driving circuit according to the data signal at the control terminal of the driving circuit and the first power supply voltage at the first terminal of the driving circuit. The driving current is generated based on the voltage at the second terminal of the driving circuit to drive the light-emitting element to emit light.

14. The driving method according to claim 13, wherein, After the light-emitting phase, the driving method further includes a non-light-emitting phase; During the non-light-emitting phase, the input of the transmission control signal is stopped, the voltage transmission circuit is turned off, so that the first power supply voltage cannot be applied to the first terminal of the driving circuit, thereby causing the light-emitting element to stop emitting light.

15. The driving method according to claim 14, further comprising: The display grayscale of the light-emitting element is controlled by adjusting the magnitude of the data signal and the duration of the transmission control signal during the light-emitting phase.

16. The driving method according to claim 15, wherein, Controlling the display grayscale of the light-emitting element by adjusting the magnitude of the data signal and the duration of the transmission control signal during the light-emitting phase includes: If the target display grayscale of the light-emitting element is less than a preset value, the magnitude of the data signal remains unchanged, and the duration of the transmission control signal during the light-emitting phase is adjusted to make the display grayscale of the light-emitting element conform to the target display grayscale; When the target display grayscale of the light-emitting element is not less than the preset value, the duration of the transmission control signal during the light-emitting stage is kept constant, and the display grayscale of the light-emitting element is made to match the target display grayscale by adjusting the magnitude of the data signal.

17. A driving method for a display substrate according to claim 8, comprising: Within one frame of display time, all row sub-pixels sequentially enter the reset phase, data writing phase, and emission phase; among them, During the reset phase of each row of sub-pixels, the reset control signal and the transmission control signal are input to turn on the voltage control circuit and the voltage transmission circuit. The reset voltage is applied to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit to reset the light-emitting element. During the data writing stage of each row of sub-pixels, the scanning signal is input to activate the data writing circuit. The data signal is written to the control terminal of the driving circuit through the data writing circuit, and the written data signal is stored by the data writing circuit. During the light-emitting stage of each row of sub-pixels, the light-emitting control signal and the transmission control signal are input to activate the voltage control circuit, the voltage transmission circuit, and the driving circuit. The first power supply voltage is applied to the first terminal of the driving circuit through the voltage control circuit and the voltage transmission circuit. The driving circuit controls the voltage of the second terminal of the driving circuit according to the data signal of the control terminal of the driving circuit and the first power supply voltage of the first terminal of the driving circuit, and generates the driving current based on the voltage of the second terminal of the driving circuit to drive the light-emitting element to emit light.

18. The driving method according to claim 17, further comprising: During the display time of one frame, all row sub-pixels are sequentially moved into the non-light-emitting stage; wherein, During the non-light-emitting phase of each row of sub-pixels, the input of the transmission control signal is stopped, the voltage transmission circuit is turned off, so that the first power supply voltage cannot be applied to the first terminal of the driving circuit, so that the light-emitting element of that row of sub-pixels stops emitting light.

19. The driving method according to claim 17, further comprising: During the display time of one frame, all row sub-pixels simultaneously enter the non-illuminating stage; wherein, During the non-light-emitting phase of all row sub-pixels, the input of the transmission control signal is stopped, the voltage transmission circuit is turned off, and the first power supply voltage cannot be applied to the first terminal of the driving circuit, so that the light-emitting elements of all row sub-pixels simultaneously stop emitting light.

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