Manufacturing method of programmable FPGA silicon-based photonic integrated chip
Through technologies such as laser 3D etching and wet etching, the manufacturing process of FPGA chips is simplified, the problems of complex processes, high costs and environmental pollution in the existing technology are solved, and more efficient and flexible chip preparation is achieved.
Patent Information
- Application Number
- CN202211359505.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-01
- Publication Date
- 2025-05-23
- Estimated Expiration
- 2042-11-01
AI Technical Summary
The existing FPGA chip manufacturing process is complex, the equipment costs are high, the production cycle is long, and the environmental pollution is serious.
The laser beam is used to focus on silicon-based semiconductor materials for 3D etching and modification, and combined with wet etching and metal deposition technology, simplifying process steps and reducing equipment use.
The chip manufacturing process is simplified, equipment and process costs are reduced, production cycles are shortened, environmental pollution is reduced, and preparation efficiency and flexibility are improved.
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Figure CN115755274B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of optical computing technology, and in particular to a method for manufacturing a programmable FPGA silicon-based photonic integrated chip. Background Art
[0002] FPGA devices are a kind of semi-customized circuits in application-specific integrated circuits. They not only solve the shortcomings of customized circuits, but also overcome the shortcomings of the limited number of gate circuits of the original programmable devices. They are the main hardware platform for informatization and digitization. Compared with other types of chip designs, FPGA chips can effectively solve the problem of the small number of gate circuits of the original devices. They have flexible design, reconfigurability and unlimited reprogramming. Reconfiguration can reduce hardware costs. When modifying and upgrading, there is no need to change the PCB circuit board additionally. Just modify and update the program on the computer, so that the hardware design work becomes software development work, shortening the system design cycle, improving flexibility and reducing costs. Because FPGA has the above-mentioned series of advantages, it is widely used in communication systems and various electronic devices, such as synchronous communication systems, time digitization systems, etc.
[0003] Whether it is an electronic FPGA chip or a photonic FPGA chip, there are many manufacturing processes, complex processes, and long production cycles. There are many types of chip manufacturing equipment in the entire manufacturing process, and core equipment such as ion implanters, photolithography machines, and coating machines are expensive. The entire production line requires multiple units and multiple models of equipment, and the production cost is high. In the process of development, etching, and coating, a large number of dry etching reagents, wet reagents, etc. will be used, which will cause great environmental pollution and high energy consumption. Summary of the invention
[0004] The programmable FPGA silicon-based photonic integrated chip manufacturing method provided by the present invention can simplify the process steps and reduce equipment costs and process costs.
[0005] The present invention provides a method for manufacturing a programmable FPGA silicon-based photonic integrated chip, comprising:
[0006] Focusing the laser beam inside the first region of the silicon-based semiconductor material, and performing 3D etching on the first region to form a modified structure on the outer contour of the double convex lens, the inside of the cavity, and the inside of the optical fiber fixing hole;
[0007] Wet etching the modified structure to remove the modified structure and complete the preparation of the double convex lens, the cavity and the optical fiber fixing hole;
[0008] Depositing a metal material on the lower surface of the first region to form a heat dissipation layer;
[0009] The laser beam is focused on a second area outside the first area, and the silicon-based semiconductor material is modified according to the optical properties of the silicon-based semiconductor material to form a waveguide structure and a logic device structure to form a photonic integrated chip.
[0010] Optionally, before depositing a metal material on the lower surface of the first region to form a heat dissipation layer, the method further includes:
[0011] The silicon-based semiconductor material with the double convex lens, cavity and optical fiber fixing hole is placed in an ultrasonic cleaning machine for cleaning, and then dried after cleaning.
[0012] Optionally, depositing a metal material on the lower surface of the first region to form a heat dissipation layer includes:
[0013] The silicon-based semiconductor material is placed in an atmosphere furnace and heated to 200-300°C and kept warm for 3-5 minutes;
[0014] Using a mask to cover a second area outside the first area on the lower surface of the silicon-based semiconductor material;
[0015] A metal coating is sprayed on the first area by using a spraying process.
[0016] Optionally, modifying the silicon-based semiconductor material according to the optical properties of the silicon-based semiconductor material to form a waveguide structure and a logic device structure includes:
[0017] When the laser modification increases the refractive index of the silicon-based semiconductor, the target positions of the waveguide structure and the logic device structure are modified;
[0018] When the laser modification reduces the refractive index of the silicon-based semiconductor, the periphery of the target position of the waveguide structure and the logic device structure is modified so that the modified portion wraps the target position of the waveguide structure and the logic device structure.
[0019] Optionally, the logic device structure includes a filter and a phase regulator; the method further includes:
[0020] Resin is coated on at least one arm of the filter and the phase adjuster, and a metal electrode is bonded on the resin to form a phase shifter of the filter and the phase adjuster.
[0021] Optionally, the method further comprises: fixing the heat dissipation layer on the heat dissipation structure by brazing or bonding.
[0022] Optionally, after depositing a metal material on the lower surface of the first region to form a heat dissipation layer, the method further comprises:
[0023] The metal material is ground and polished to achieve planarization of the heat dissipation layer.
[0024] Optionally, the laser beam has a pulse width of femtosecond order and a wavelength of nanometer order.
[0025] Optionally, the metal material includes one or both of aluminum and zinc.
[0026] Optionally, the silicon-based semiconductor material includes one or more of a silicon dioxide-based semiconductor material, a germanium-doped silicon dioxide-based semiconductor material, and a fluorine-doped silicon dioxide-based semiconductor material.
[0027] In the technical solution provided by the present invention, by means of laser modification and wet etching, the preparation of double convex lenses, cavities and optical fiber fixing holes can be achieved without developing exposure, which simplifies the process steps and does not require the use of equipment such as photoresist, developer and photolithography machine, which can greatly improve the preparation efficiency and reduce the equipment cost. The preparation of the heat dissipation layer is achieved by depositing metal, and etching is also not required. For the preparation of logic devices and waveguide layers, it is only necessary to use laser modification to achieve it. In the entire preparation process, the number of equipment used is small, the processing technology is simple, the production cycle is short, and it can be customized and manufactured, which has extremely strong universality. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 The present invention is a flowchart of a method for manufacturing a programmable FPGA silicon-based photonic integrated chip according to an embodiment of the present invention. DETAILED DESCRIPTION
[0029] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0030] The embodiment of the present invention provides a method for manufacturing a programmable FPGA silicon-based photonic integrated chip, such as Figure 1 As shown, including:
[0031] Step 100, focusing a laser beam inside a first region of a silicon-based semiconductor material, and performing 3D etching on the first region to form a modified structure on the outer contour of the double convex lens, the inside of the cavity, and the inside of the optical fiber fixing hole;
[0032] In some embodiments, the cavity is used to accommodate a chip that generates a laser. The chip usually has a pigtail, which is fixed in the light fixing hole. The biconvex lens can focus the optical signal of the pigtail and project it into the waveguide structure, which is then transmitted to the logic device. The biconvex lens can also focus the optical signal of the waveguide structure and project it into the optical fiber. For the cavity and the optical fiber fixing hole, the final structure should be a cavity and a hollow hole. Therefore, it is necessary to modify the inside of the cavity and the optical fiber fixing hole for subsequent etching. For the biconvex lens, its final structure should be to retain a biconvex lens and remove the material on both sides of the biconvex lens. Therefore, it is necessary to modify the outer contour of the biconvex lens in order to etch the biconvex lens.
[0033] Step 200, wet etching the modified structure to remove the modified structure, and complete the preparation of the double convex lens, the cavity and the optical fiber fixing hole;
[0034] In some embodiments, after the modification, the modified structure can have a higher etching selectivity ratio with the original silicon-based semiconductor material, and during the wet etching process, the modified part can be etched away while the unmodified part is retained. In this embodiment, after the wet etching, the cavity, the light fixing hole and the double convex lens are formed.
[0035] Step 300, depositing a metal material on the lower surface of the first region to form a heat dissipation layer;
[0036] In some embodiments, metal material is deposited only on the lower surface of the first region, and metal is not deposited in the second region outside the first region, so that the deposited metal can be prevented from causing reflection and affecting the operation of the logic device. At the same time, after the etching of the cavity, the fixing hole and the double convex lens is completed, the metal material is deposited before the waveguide structure and the logic device structure are modified. At this time, there is no modified part in the entire device, which avoids the ambient temperature in the process of depositing the metal material to form tempering on the modified part and affect the performance of the logic device.
[0037] Step 400, focusing the laser beam on a second area outside the first area, modifying the silicon-based semiconductor material according to the optical properties of the silicon-based semiconductor material, forming a waveguide structure and a logic device structure, so as to form a photonic integrated chip.
[0038] In some embodiments, the waveguide structure is a structure for conducting optical signals, and the logic device structure is a structure for operating optical signals. The logic device is usually also composed of a structure capable of conducting optical signals, and can realize functions such as beam splitting, single pass and coupling of optical signals.
[0039] In the technical solution provided in the embodiment of the present invention, by means of laser modification and wet etching, the preparation of double convex lenses, cavities and optical fiber fixing holes can be achieved without developing exposure, which simplifies the process steps and does not require the use of equipment such as photoresist, developer and photolithography machine, which can greatly improve the preparation efficiency and reduce the equipment cost. The preparation of the heat dissipation layer is achieved by depositing metal, and etching is also not required. For the preparation of logic devices and waveguide layers, it is only necessary to use laser modification to achieve it. In the entire preparation process, a small number of equipment is used, the processing technology is simple, the production cycle is short, and it can be customized and manufactured, which has extremely strong universality.
[0040] As an optional implementation manner, before depositing a metal material on the lower surface of the first region to form a heat dissipation layer, the method further includes:
[0041] The silicon-based semiconductor material with the double convex lens, cavity and optical fiber fixing hole is placed in an ultrasonic cleaning machine for cleaning, and then dried after cleaning.
[0042] In some embodiments, the silicon-based semiconductor material is cleaned using an ultrasonic cleaner, which can effectively remove oil stains on the surface of the silicon-based semiconductor material, allowing the metal material to be smoothly deposited on the surface of the silicon-based semiconductor material.
[0043] As an optional implementation manner, depositing a metal material on the lower surface of the first region to form a heat dissipation layer includes:
[0044] The silicon-based semiconductor material is placed in an atmosphere furnace and heated to 200-300°C and kept warm for 3-5 minutes;
[0045] In some embodiments, placing the silicon-based semiconductor material in an atmosphere furnace for heating and keeping warm can heat the silicon-based semiconductor material to a corresponding temperature, and during the process of depositing the metal material, can effectively enhance the adhesion between the metal material and the silicon-based semiconductor material.
[0046] Using a mask to cover a second area outside the first area on the lower surface of the silicon-based semiconductor material;
[0047] In some embodiments, the first region has a cavity, a double convex lens and an optical fiber fixing hole, and the second region has a logic device. In the second region, if metal material is deposited, the reflection of the metal material may easily interfere with the operation of the logic device. Therefore, in this embodiment, a mask is used to cover the second region, and when the metal layer is deposited, it is only formed in the first region.
[0048] A metal coating is sprayed on the first area by using a spraying process.
[0049] In some embodiments, after the metal coating is sprayed on the first area through a spraying process, the heat can be effectively conducted outwards, and after the metal coating is connected to the heat dissipation device, rapid heat dissipation can be achieved.
[0050] As an optional implementation, modifying the silicon-based semiconductor material according to the optical properties of the silicon-based semiconductor material to form a waveguide structure and a logic device structure includes:
[0051] When the laser modification increases the refractive index of the silicon-based semiconductor, the target positions of the waveguide structure and the logic device structure are modified;
[0052] In some embodiments, when the laser modification increases the refractive index of the silicon-based semiconductor, the refractive index of the modified area will be higher than that of the unmodified area, and the optical signal can be continuously reflected and propagated in the modified area. After the target position of the waveguide structure and the logic device structure is modified, the propagation of the optical signal can be calculated.
[0053] When the laser modification reduces the refractive index of the silicon-based semiconductor, the periphery of the target position of the waveguide structure and the logic device structure is modified so that the modified portion wraps the target position of the waveguide structure and the logic device structure.
[0054] In some embodiments, when the refractive index of the silicon-based semiconductor is reduced by laser modification, by making the modified portion wrap the target position of the waveguide structure and the logic device, a structure with a large internal refractive index and a small external refractive index can be formed locally, so that the optical signal propagates in the area with a large refractive index. In this case, two parallel paths can be modified to form a nano-groove between the two parallel paths. The modified portion can also be formed into a tube.
[0055] As an optional implementation, the logic device structure includes a filter and a phase adjuster; the method further includes:
[0056] Resin is coated on at least one arm of the filter and the phase adjuster, and a metal electrode is bonded on the resin to form a phase shifter of the filter and the phase adjuster.
[0057] In some embodiments, the method of coating resin and bonding metal electrodes can simplify the preparation of the phase shifter, shorten the manufacturing cycle, and effectively reduce the preparation cost and improve the preparation efficiency.
[0058] As an optional implementation, the method further includes: fixing the heat dissipation layer on the heat dissipation structure by brazing or bonding.
[0059] As an optional implementation manner, after depositing a metal material on the lower surface of the first region to form a heat dissipation layer, the method further comprises:
[0060] The metal material is ground and polished to achieve planarization of the heat dissipation layer.
[0061] As an optional implementation, the laser beam has a femtosecond pulse width and a nanometer wavelength.
[0062] As an optional implementation, the metal material includes one or both of aluminum and zinc.
[0063] As an optional implementation, the silicon-based semiconductor material includes one or more of a silicon dioxide-based semiconductor material, a germanium-doped silicon dioxide-based semiconductor material, and a fluorine-doped silicon dioxide-based semiconductor material.
[0064] An exemplary implementation is provided below to specifically illustrate the technical solution provided by the present invention:
[0065] An infrared femtosecond laser with a pulse width of 350fs and a wavelength of 1064nm is used to 3D etch the silicon dioxide. The etched pattern is the outer contour, cavity and optical fiber fixing hole of the short-focus biconvex lens. HF reagent is used for wet etching to etch the short-focus biconvex lens, cavity and optical fiber fixing hole. The manufacturing of the short-focus biconvex lens is completed (the laser in the optical fiber is introduced into the waveguide layer). Then the silicon dioxide-based material is placed in an ultrasonic cleaner for cleaning, degreasing, drying, and then placed in an atmosphere furnace for heating. The temperature is raised to 250℃ and kept warm for 5min. The aluminum coating is sprayed on the heat dissipation area through the mask by a spraying process. The sprayed aluminum layer is ground and polished to complete the deposition of the heat sink metal layer in the heat dissipation area. Then, an infrared femtosecond laser with a pulse width of 350fs and a wavelength of 1064nm is used to photoetch the waveguide layer (type I waveguide) inside the silicon dioxide as a channel for the signal light. The processing area is the waveguide layer. Then, a pulse width of 350fs and a wavelength of 1064nm infrared femtosecond laser are used inside the silicon dioxide to respectively lithography the basic logic devices (1 / 2 beam splitting type) such as the filter (MDR) and the phase regulator (MRR, MZI), and complete the lithography work of the logic unit of the FPGA chip. Then, a layer of resin is applied on the arms of the devices such as the filter (MDR) and the phase regulator (MRR, MZI), and then a metal electrode is bonded to the resin to complete the work of the phase shifter of the devices such as the filter (MDR) and the phase regulator (MRR, MZI). Finally, the end with the heat sink is fixed on the aluminum-based heat sink by soldering, completing the manufacturing and packaging of the entire silicon dioxide-based FPGA. In this embodiment, since the refractive index of the silicon dioxide base increases during the laser modification process, the modified part is used as the channel of the signal light in this embodiment to form an I-type waveguide.
[0066] Another exemplary embodiment is provided below to specifically illustrate the technical solution provided by the present invention:
[0067] A femtosecond green laser with a pulse width of 800fs and a wavelength of 532nm was used to perform 3D etching on the germanium-doped silica base. The etched pattern was the outer contour, cavity and optical fiber fixing hole of the short-focus biconvex lens. HF reagent was used for wet etching to etch the short-focus biconvex lens, cavity and optical fiber fixing hole. The manufacturing of the short-focus biconvex lens was completed (the laser in the optical fiber was introduced into the waveguide layer). Then the silica-based material was placed in an ultrasonic cleaner for cleaning, degreasing, and after drying, it was placed in an atmosphere furnace for heating. The temperature was raised to 250℃ and kept warm for 3min. The zinc coating was sprayed on the heat dissipation area through the mask by a spraying process. The sprayed zinc layer was ground and polished to complete the deposition of the heat sink metal layer in the heat dissipation area. Then, a femtosecond green laser with a pulse width of 800fs and a wavelength of 532nm was used to photoetch the waveguide layer (type I waveguide) inside the germanium-doped silica as the channel for the signal light. The processing area is the waveguide layer. Then, a femtosecond green laser with a pulse width of 800fs and a wavelength of 532nm is used inside the germanium-doped silicon dioxide to respectively lithography basic logic devices (coupled type) such as filters (MDR) and phase regulators (MRR, MZI), and complete the lithography work of the logic unit of the FPGA chip. Then, a layer of resin is applied on the arms of devices such as filters (MDR) and phase regulators (MRR, MZI), and then metal electrodes are bonded to the resin to complete the work of the phase shifters of devices such as filters (MDR) and phase regulators (MRR, MZI). Finally, the end with a heat sink is fixed on a copper-based heat sink by soldering, completing the manufacturing and packaging of the entire germanium-doped silicon dioxide FPGA. In this embodiment, since the refractive index of germanium-doped silicon dioxide increases during the laser modification process, the modified part is used as the channel of the signal light to form an I-type waveguide.
[0068] Another exemplary embodiment is provided below to specifically illustrate the technical solution provided by the present invention:
[0069] A femtosecond ultraviolet laser with a pulse width of 300fs and a wavelength of 355nm was used to perform 3D etching on the fluorine-doped silica substrate. The etched pattern was the outer contour, cavity and optical fiber fixing hole of the short-focus biconvex lens. HF reagent was used for wet etching to etch out the short-focus biconvex lens, cavity and optical fiber fixing hole. The manufacturing of the short-focus biconvex lens was completed (the laser in the optical fiber was introduced into the waveguide layer). Then the silica-based material was placed in an ultrasonic cleaner for cleaning, degreasing, and then placed in an atmosphere furnace for heating after drying. The temperature was raised to 200℃ and kept warm for 3min. The zinc coating was sprayed on the heat dissipation area through a mask using a spraying process. The sprayed zinc layer was ground and polished to complete the deposition of the heat sink metal layer in the heat dissipation area. Then, a femtosecond ultraviolet laser with a pulse width of 300fs and a wavelength of 355nm was used to photoetch the waveguide layer (type III waveguide) inside the fluorine-doped silica substrate as the channel for the signal light. The processed area was the outer cladding of the waveguide layer, and the unprocessed area was the waveguide layer. Then, a femtosecond ultraviolet laser with a pulse width of 300fs and a wavelength of 355nm is used inside the fluorine-doped silicon dioxide to respectively etch basic logic devices (Bar type) such as filters (MDR) and phase regulators (MRR, MZI) (the waveguide structure of the logic unit is a type III waveguide) to complete the lithography work of the logic unit of the FPGA chip. Then, a layer of resin is applied on the arms of devices such as filters (MDR) and phase regulators (MRR, MZI), and then metal electrodes are bonded to the resin to complete the work of the phase shifters of devices such as filters (MDR) and phase regulators (MRR, MZI). Finally, the end with a heat sink is fixed on a copper-based heat sink by bonding with a thermally conductive adhesive, completing the manufacturing and packaging of the entire fluorine-doped silicon dioxide FPGA. In some embodiments, since the refractive index of fluorine-doped silicon dioxide is reduced during the laser modification process, a modified layer is used in this embodiment to surround the waveguide part to form a type III waveguide. Of course, based on the material properties of fluorine-doped silicon dioxide, it is also possible to form parallel modified paths to form nano-light-guiding grooves, namely, type II waveguides.
[0070] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
Claims
1. A method for manufacturing a programmable FPGA silicon-based photonic integrated chip. It is characterized in that include: Focusing the laser beam inside the first region of the silicon-based semiconductor material, and performing 3D etching on the first region to form a modified structure on the outer contour of the double convex lens, the inside of the cavity, and the inside of the optical fiber fixing hole; Wet etching the modified structure to remove the modified structure and complete the preparation of the double convex lens, the cavity and the optical fiber fixing hole; Depositing a metal material on the lower surface of the first region to form a heat dissipation layer; The laser beam is focused on a second area outside the first area, and the silicon-based semiconductor material is modified according to the optical properties of the silicon-based semiconductor material to form a waveguide structure and a logic device structure to form a photonic integrated chip.
2. The method according to claim 1, It is characterized in that Before depositing a metal material on the lower surface of the first region to form a heat dissipation layer, the method further includes: The silicon-based semiconductor material with the double convex lens, cavity and optical fiber fixing hole is placed in an ultrasonic cleaning machine for cleaning, and then dried after cleaning.
3. The method according to claim 1, It is characterized in that Depositing a metal material on the lower surface of the first region to form a heat dissipation layer includes: The silicon-based semiconductor material is placed in an atmosphere furnace and heated to 200-300°C and kept warm for 3-5 minutes; Using a mask to cover a second area outside the first area on the lower surface of the silicon-based semiconductor material; A metal coating is sprayed on the first area by using a spraying process.
4. The method according to claim 1, It is characterized in that Modifying the silicon-based semiconductor material according to the optical properties of the silicon-based semiconductor material to form a waveguide structure and a logic device structure includes: When the laser modification increases the refractive index of the silicon-based semiconductor, the target positions of the waveguide structure and the logic device structure are modified; When the laser modification reduces the refractive index of the silicon-based semiconductor, the periphery of the target position of the waveguide structure and the logic device structure is modified so that the modified portion wraps the target position of the waveguide structure and the logic device structure.
5. The method according to claim 1, It is characterized in that The logic device structure includes a filter and a phase regulator; the method further includes: Resin is coated on at least one arm of the filter and the phase adjuster, and a metal electrode is bonded on the resin to form a phase shifter of the filter and the phase adjuster.
6. The method according to claim 1, It is characterized in that The method further comprises: fixing the heat dissipation layer on the heat dissipation structure by brazing or bonding.
7. The method according to claim 1, It is characterized in that After depositing a metal material on the lower surface of the first region to form a heat dissipation layer, the method comprises: The metal material is ground and polished to achieve planarization of the heat dissipation layer.
8. The method according to claim 1, It is characterized in that The laser beam has a pulse width of femtosecond order and a wavelength of nanometer order.
9. The method according to claim 1, It is characterized in that The metal material includes one or both of aluminum and zinc.
10. The method according to claim 1, It is characterized in that The silicon-based semiconductor material includes one or more of a silicon dioxide-based semiconductor material, a germanium-doped silicon dioxide-based semiconductor material, and a fluorine-doped silicon dioxide-based semiconductor material.
Citation Information
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