GB-level single-write read / write memory

Abstract

This invention discloses a GB-level single-write-read memory, using standard NAND flash memory as the storage medium and standard NAND ONFi as the external interface. On the external interface, it becomes a write-once, read-once NAND memory, where each data page has the function of writing and reading only once. Reading and writing are performed on a page-by-page basis; even if only a portion of a page is read and the remaining portion is not read, the page is still considered read once, and its contents are cleared. This invention uses NAND flash memory as the storage medium and an additional controller with a page read / write permission table to achieve a GB-level write-once, read-only memory with high control efficiency.

Description

Technical Field

[0001] This invention relates to storage components of computer systems, specifically to a GB-level single-write / read-only memory. Background Technology

[0002] Memory is an essential foundation for various digital devices, and common access methods can be divided into two types:

[0003] 1. Can be written to and read from multiple times (RAM, such as DRAM, SRAM, etc.);

[0004] 2. Write once, read multiple times (ROM, such as PROM, EPROM, etc.);

[0005] When memory is restricted to only one valid read after a single write, this access method is called Write-Once, Read-Once memory. The write is performed once, and the written content is destroyed after the read, so it can only be read correctly once. This storage method can be used for program access interlocking (the length of the memory read / write unit is generally 32 bits full word length, see https: / / www.open-std.org / jtc1 / sc22 / wg21 / docs / papers / 2015 / n4444.html, Linux-Kernel Memory Model), system security, and data security (the length of the storage read / write unit is relatively long; read-once memory involving data security can reach more than MB bytes, see reference 1: Method for read once memory, US7107388B2, https: / / patents.google.com / patent / US7107388B2 / en, reference 2: Read-once memory, publication number: US11049567B2, content provided by Intellectual Property Publishing House, https: / / wenku.baidu.com / view / 29d6fcb7f624ccbff121dd36a32d7375a417c6b1.html), etc.

[0006] Write-once-read-once memory has special applications in system security and data security protection. Typically, read-once memory is implemented using volatile memory (SRAM, DRAM, etc.) or specialized storage media. The former's storage capacity is calculated in full word length (32-bit word length), while the latter is too expensive to reach gigabyte-level capacities. This invention uses NAND flash memory as the storage medium and an additional controller with a page read / write permission table to implement a gigabyte-level memory that allows only one write and one read. Summary of the Invention

[0007] To address the shortcomings of existing technologies, the present invention aims to provide a GB-level single-write-read memory. The memory controller uses NAND flash memory as the storage medium and an additional controller with a page read / write permission table to achieve a GB-level memory that allows only one write and one read, resulting in high control efficiency.

[0008] To achieve the above objectives, this invention employs the following technical solution: a GB-level write-once read-once memory, using standard NAND flash memory as the storage medium and standard NAND ONFI as the external interface. On the external interface, it becomes a write-once, read-once NAND memory, where each data page has the function of being written to and read from only once. Reading and writing are performed on a page-by-page basis; even if only a portion of a page is read and the remaining portion is not read, the page is considered to have been read once, and its contents are cleared.

[0009] The standard storage medium is divided into three parts: data blocks, write lock blocks, and read lock blocks. One byte of the write lock block controls the write operation of one page of a data block, and one byte of the read lock block controls the read operation of a data block. A selected page is 512 bytes long, and the space occupied by the write lock block and the read lock block is a very small part (1 / 256) of the data block space.

[0010] The format of the write lock control block control byte is as follows:

[0011] b0: 0 indicates initialized, 1 indicates the original state;

[0012] Bits 1-2: Mode: 00 - Reusable, write-once-read; 01 - Write-once-read; 10, 11 - Reserved;

[0013] bit 3: 0 - Locked state for one-time write, 1 - Permit write;

[0014] Bits 4-7: Reserve additional extended control (aux control), including the number of times to perform a repeat read / write operation.

[0015] The format of the read lock control block control byte is as follows:

[0016] b0: 0 - valid data, 1 - invalid data;

[0017] Bits 1-2: Mode: 00 - Write once, read many times; 01 - Write once, read once; 10, 11 - Reserved;

[0018] bit 3: 0 - Read once, locked status; 1 - Permit read.

[0019] bits 4-7: Extended reservation.

[0020] When the write-read memory is used for the first time, the write lock control block and the read lock control block are initialized, and all write lock control bytes are set to the 1111-1010 state;

[0021] (When reuse is allowed after a read has deleted the data, set to state 1111-1000), write is allowed; all read lock control bytes are set to state 1111-1011, data is invalid. The initialized lock control block is written to the control area of ​​the NAND flash memory.

[0022] During normal use, upon receiving a reset signal, the controller places the read / write lock control block from the flash memory into the controller to control access to the external interface. The write permit map and read permit map placed in the controller are mirror images of the write lock block and read lock block in the flash memory, placed in the controller to improve efficiency.

[0023] When an external interface writes to a data page, the controller checks the third bit of the corresponding write control word in the write permission table. If it is 1, the write operation is performed according to the external interface command; otherwise, the write operation is ignored. During the write operation, the control word in the flash memory is also updated.

[0024] When an external interface reads a data page, the controller completes the read operation when the zeroth bit (data valid bit) and the third bit (read enabled) of the corresponding control word in its read enable table are both 0 and 1. Then, if the read control bit mode is set to read only once (first and second bits 0 and 1), the entire page is set to 0, thus destroying the original content and ensuring a unique, unrecoverable, and correct data read from the medium. Simultaneously, the controller's read control word is written to the flash memory, updating its read control word.

[0025] The beneficial effects of the present invention are as follows: The memory structure of the present invention is reasonably designed. The memory controller uses NAND flash memory as the storage medium and uses an additional controller with a page read / write permission table to realize a GB-level memory that only allows one write and one read, thereby improving control efficiency. Attached Figure Description

[0026] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments;

[0027] Figure 1 This is a schematic diagram of the controller of the present invention;

[0028] Figure 2 This is a flowchart illustrating the write-once-read-once operation of the controller of the present invention.

[0029] Figure 3 This is a flowchart illustrating the specific implementation of the present invention. Detailed Implementation

[0030] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0031] Reference Figure 1-3 This specific implementation adopts the following technical solution: a GB-level write-once read-once memory, using standard NAND flash memory as the storage medium and standard NAND ONFI as the external interface. On the external interface, it becomes a write-once, read-once NAND memory, where each data page has the function of being written to and read from only once. Reading and writing are performed on a per-data-page basis. Even if only a portion of a page is read and the remaining portion is not read, the page is considered to have been read once, and its contents are cleared.

[0032] The standard storage medium is divided into three parts: data blocks, write lock blocks, and read lock blocks. One byte of the write lock block controls the write operation of one page of a data block, and one byte of the read lock block controls the read operation of a data block. A selected page is 512 bytes long, and the space occupied by the write lock block and the read lock block is a very small part (1 / 256) of the data block space.

[0033] The schematic diagram of the controller in this specific embodiment is as follows: Figure 1 As shown in the figure, 101 and 102 are mirror images of the read / write latch control block stored in flash memory to improve control efficiency. The MCU in the figure is used for the initialization and updating of the control block. The internal and external interfaces of the controller are both standard flash memory interfaces. The internal interface connects to standard flash memory, while the host sees a GB-level flash memory that implements the Read Once standard on the external interface.

[0034] The write-once-read-once workflow of the controller in this specific embodiment is as follows: Figure 2 As shown in the diagram, 201 represents the initialization operation of the control block, 202 represents the update operation of writing to the control block, and 203 represents the update operation of reading from the control block. The specific implementation process is as follows: Figure 3 As shown in the figure, 301 is the process selection control (reusable single-write / read and one-time single-write / read memory), and 302 is the update and recovery of the write control block and read control block during reuse.

[0035] Example 1: The control flow of a GB-level single-write / read-only memory is as follows:

[0036] After powering on, if both the write permission table (WRITE PERMIT MAP) and the read permission table (READ PERMIT MAP) are fully enabled (all are one), the controller enters the initialization phase.

[0037] Normal write-read phase (only one write, only one read).

[0038] Recycling and Reuse Phase. In a simple read-once memory, after one valid write and one valid read, there is no other valid content besides indicating that the page has been used; its storage capacity is in a useless state. This controller implementation can adopt a reuse option, that is, after valid content has been validly read and destroyed, it can be reused for the next write-once, read-once operation. A reserved number in the controller indicates that the page has been reused at least once. This improves flash memory utilization.

[0039] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. A GB-level single-write / read-only memory, characterized in that, It uses standard NAND flash memory as the storage medium and standard NAND ON Fi as the external interface. On the external interface, it becomes a write-once, read-once NAND memory, with each data page having the function of writing and reading only once. Reading and writing are done on a page-by-page basis. Even if only a portion of a page is read and the remaining portion is abandoned, the page is still considered read once, and its contents are cleared. During normal use, upon receiving a reset signal, the controller places the read / write lock control block from the flash memory into the controller to control access to the external interface. The read / write enable table placed in the controller is a mirror image of the write lock control block and the read lock control block in the flash memory. When the external interface writes to a data page, the controller checks the third bit of the corresponding write control word in the write permission table. If it is 1, the write is performed according to the external interface command; if it is 0, the write operation is ignored. During writing, the control word in its flash memory is also updated; When an external interface reads a data page, the controller checks that the zeroth bit of the corresponding control word in its read enable table is 0 and the third bit is 1, and then completes the external interface read operation. If the read control bit mode is read once, the entire page is set to 0 to destroy the original content and achieve a unique and unrecoverable correct data read on the storage medium. At the same time, the controller's read control word is written to the flash memory to update its read control word.

2. The GB-level single-write / read-only memory according to claim 1, characterized in that, The storage medium is divided into three parts: data blocks, write lock control blocks, and read lock control blocks. One byte of the write lock control block controls the write operation of one page of a data block, and one byte of the read lock control block controls the read operation of a data block. A selected page is 512 bytes long, and the space occupied by the write lock control block and the read lock control block is 1 / 256 of the data block space.

3. The GB-level single-write / read memory according to claim 2, characterized in that, The format of the write lock control block control byte is as follows: b0: 0 indicates initialized, 1 indicates the original state; Bits 1-2: Mode: 00 - Reusable, write-once-read; 01 - Write-once-read; 10, 11 - Reserved; bit 3: 0 - Write-locked state, 1 - Write allowed; Bits 4-7: Reserve additional extended control, including the number of times to perform a repeat read / write operation.

4. The GB-level single-write / read-only memory according to claim 2, characterized in that, The format of the read lock control block control byte is as follows: b0: 0 - valid data, 1 - invalid data; Bits 1-2: Mode: 00 - Write once, read many times; 01 - Write once, read once; 10, 11 - Reserved; bit 3: 0 - Read-once lock status, 1 - Read allowed; bits 4-7: Extended reservation.

5. The GB-level single-write / read-only memory according to claim 1, characterized in that, All read lock control bytes are set to the 1111-1011 state, and the data is invalid; the initialized lock control block is written to the control area of ​​the NAND flash memory.

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