A digital entropy source integrated circuit based on multi-loop boolean ring oscillator

Abstract

The application discloses a digital entropy source integrated circuit based on a multi-loop Boolean oscillation ring, and the integrated circuit comprises a multi-loop Boolean oscillation ring circuit and an entropy sampling circuit, wherein the multi-loop Boolean oscillation ring circuit is used to generate a random Boolean oscillation output signal and comprises N basic oscillation units; the entropy sampling circuit is used to sample the oscillation signal generated by the multi-loop Boolean oscillation ring circuit to obtain an original random sequence, and comprises N D flip-flops arranged in parallel and a two-input XOR gate chain connected with the output ends of the D flip-flops, wherein the two-input XOR gate chain comprises N-1 two-input XOR gates; wherein the number of the basic oscillation units is consistent with the number of the D flip-flops, and N1. The more the number of the basic oscillation units is, the more the feedback loops are, and the more complex and unpredictable the oscillation behavior is; and in actual application, the number of the basic oscillation units can be adjusted according to specific requirements.

Description

Technical Field

[0001] This invention belongs to the field of entropy source integrated circuit technology, specifically relating to a digital entropy source integrated circuit based on a multi-loop Boolean oscillation ring. Background Technology

[0002] In information security applications, random numbers play a crucial role, being used in key generation, authentication protocols, and as masks to counter side-channel attacks. The unpredictability of keys is key to ensuring the security of cryptographic algorithms; therefore, reliable and unpredictable random numbers are essential in the field of information security.

[0003] Random numbers can be divided into two categories: pseudo-random numbers and true random numbers. Random numbers generated using software algorithms are typical pseudo-random numbers, exhibiting a certain periodicity and being easily predicted by attackers, thus having a low level of security. True random numbers, on the other hand, are generally generated using various unpredictable physical phenomena in nature, such as noise in integrated circuits or the decay of radioactive elements. By amplifying, extracting, and digitizing these physical phenomena, unpredictable true random numbers are generated. The information source capable of generating true random numbers is called a true random number generator.

[0004] A true random number generator mainly consists of an entropy source, an entropy extraction module, and a post-processing module. The unpredictable physical phenomena within the entropy source are the key reason why true random numbers are difficult to predict; therefore, the entropy source is the most important part of a true random number generator. Most mainstream entropy sources are implemented in the form of integrated circuits. Common implementation principles of integrated circuit entropy sources include: direct noise amplification, ring oscillator jitter sampling, integrated circuit metastable states, and chaotic circuits. Among these, the direct noise amplification method typically requires a large-area analog amplifier circuit, and chaotic circuits are also based on analog circuits. This limits the rate at which the entropy source circuit generates random numbers and is not conducive to SoC integration. Ring oscillator jitter sampling and metastable state-based entropy sources are usually implemented using pure digital circuits, which are easy to integrate into SoCs. However, the jitter generated by a single ring oscillator is relatively small, and multiple ring oscillators are usually combined as entropy sources to generate random numbers with sufficient entropy, which greatly increases the circuit area. Metastable circuits are very sensitive to circuit process deviations and operating conditions, and generating metastable states requires relatively stringent conditions. Therefore, current mainstream pure digital entropy sources have many limitations in design and application.

[0005] By introducing an XOR gate into a ring oscillator, the period and amplitude of the output oscillation signal are no longer fixed, thus exhibiting a random or chaotic output state, which is also known as Boolean oscillation. The random numbers obtained by sampling the Boolean oscillation output signal are even more difficult to predict, which has become a new method for designing high-quality entropy sources.

[0006] Therefore, this application utilizes the addition of multiple XOR gate logic circuits to a ring oscillator to generate Boolean oscillations, and designs a novel pure digital entropy source circuit with a simple structure, requiring only standard digital logic units for implementation and possessing strong scalability, which is of great significance. Summary of the Invention

[0007] The purpose of this invention is to provide a digital entropy source integrated circuit based on a multi-loop Boolean oscillation ring, so as to solve the application limitations of pure digital entropy source circuits in the prior art.

[0008] To achieve the above objectives, the specific solution of this application is as follows:

[0009] A digital entropy source integrated circuit based on a multi-loop Boolean oscillator ring, the integrated circuit comprising a multi-loop Boolean oscillator ring circuit and an entropy sampling circuit, wherein,

[0010] The multi-loop Boolean oscillation loop circuit is used to generate irregular Boolean oscillation output signals, including N basic oscillation units;

[0011] The entropy sampling circuit is used to sample the oscillation signal generated by the multi-loop Boolean oscillation loop circuit to obtain the original random sequence. It includes N parallel D flip-flops and a chain of two-input XOR gates connected to the output of the D flip-flops. The chain of two-input XOR gates includes N-1 two-input XOR gates.

[0012] The number of basic oscillating units is the same as the number of D flip-flops, N 1.

[0013] Furthermore, the output terminal out of the i-th basic oscillation unit of the multi-loop Boolean oscillation loop circuit i The input terminal of the (i+1)th basic oscillation unit is in i+1 Connected, the output terminal out of the Nth basic oscillation unit N Connected to the input terminal in1 of the first basic oscillation unit, N basic oscillation units form a ring structure, where i represents the sequence number of the basic oscillation unit. The ring structure formed by this type of basic oscillating unit has many branches and can form a variety of complex oscillating feedbacks.

[0014] Furthermore, the output terminal out of the i-th basic oscillation unit i The input terminal of the (i+1)th basic oscillation unit is in i+1 The i-th delay unit is set between them; the output terminal out of the N-th basic oscillation unit is... NAn Nth delay unit is set between the input terminal in1 of the first basic oscillation unit and the Nth delay unit. The number of delay units is the same as the number of basic oscillation units, and the delay value of the delay unit is basically the same as the delay of the two-input XOR gate in the basic oscillation unit.

[0015] Furthermore, the basic oscillation unit includes XOR gates XOR0, XOR gates XOR1, XOR gates XOR2, and an inverter INV. XOR gates XOR0 and XOR gates XOR1 form a cross-feedback structure. One input of XOR gate XOR0 is the input port in of the basic oscillation unit, and the other input of XOR gate XOR0 is connected to the output of XOR gate XOR1. One input of XOR gate XOR1 is connected to the output of XOR gate XOR0, and the other input of XOR gate XOR1 is connected to the output of inverter INV. The input of inverter INV is connected to the output out of XOR gate XOR2. The output of XOR gate XOR2 is the output port out of the basic oscillation unit, and the outputs of XOR gates XOR0 and XOR gate XOR1 are respectively connected to the two inputs of XOR gate XOR2.

[0016] Furthermore, the input terminal of the i-th D flip-flop in the entropy sampling circuit is connected to the output terminal out of the i-th basic oscillation unit in the multi-loop Boolean oscillation loop circuit. i N D flip-flops are connected to the same clock, driven by the same clock, and sampled at the same clock edge to obtain an N-bit raw random number, where i represents the index of the D flip-flop. .

[0017] Furthermore, the input terminal of the i-th D flip-flop is connected to the output terminal out of the i-th basic oscillation unit in the multi-loop Boolean oscillation loop circuit. i The N D flip-flops are connected and driven by the same clock. The outputs of the N D flip-flops are chained together through two-input XOR gates to obtain the final random number output.

[0018] Furthermore, in the two-input XOR gate chain, the output terminals of the first and second D flip-flops are respectively connected to the two input ports of the first two-input XOR gate; the output terminals of the first and third D flip-flops are respectively connected to the two input ports of the second two-input XOR gate; and so on, the output terminals of the i-th and (i+2)-th D flip-flops are respectively connected to the two input ports of the (i+1)-th two-input XOR gate; the output terminal of the (i+1)-th two-input XOR gate is the output terminal of the entire entropy source circuit.

[0019] Furthermore, the XOR gates XOR0, XOR1, and XOR2 are all two-input XOR gates.

[0020] Compared with the prior art, the present invention has the following advantages:

[0021] (1) The multi-loop Boolean oscillator circuit is composed of multiple basic oscillator units connected together. The ring structure formed by the basic oscillator units has many branches and can form a variety of complex oscillation feedbacks. The more basic oscillator units there are, the more feedback loops there are, and the more complex and unpredictable the oscillation behavior becomes. In practical applications, the number of basic oscillator units can be adjusted according to specific needs.

[0022] (2) The multi-loop Boolean oscillator circuit can make the delay of the connection path between the basic oscillation units different by means of adjusting the wiring delay of the integrated circuit and adding delay units, so that the multi-loop Boolean oscillator can avoid forming a periodically stable oscillation and form an oscillation with an indefinite period, thereby improving the randomness of the entropy source output.

[0023] (3) The present invention constructs a multi-loop oscillation loop circuit with random Boolean oscillation as the output. Compared with the traditional regular oscillation, the randomness of the oscillation is greatly improved. When used as an entropy source, it can still maintain a high output entropy value at a high sampling frequency.

[0024] (4) The entropy source circuit of the present invention consists only of digital standard units, which is simple in structure, greatly reduces the difficulty of design and integration, and has wide applicability;

[0025] (5) The number of basic oscillation units in the multi-loop Boolean oscillation ring circuit described in this invention is adjustable and can be changed according to different processes and device sizes to meet design requirements. The output of each basic oscillation unit is a Boolean oscillation with low correlation between them. Therefore, the output of each basic oscillation unit is sampled to obtain a multi-bit original random number, which greatly improves the output rate of the entropy source. Designers can also choose to perform XOR processing on the multi-bit data or directly output it in parallel according to the output quality of the entropy source. Attached Figure Description

[0026] Figure 1 This is a circuit diagram of Embodiment 1 of the present invention;

[0027] Figure 2 This is a circuit diagram of Embodiment 2 of the present invention. Detailed Implementation

[0028] To better understand the purpose, structure, and function of this invention, the following description, in conjunction with the accompanying drawings, further illustrates a digital entropy source integrated circuit based on a multi-loop Boolean oscillation ring.

[0029] Example 1

[0030] Two basic oscillation units and two entropy sampling circuits (i.e., digital entropy source integrated circuits when N=2):

[0031] like Figure 1 The digital entropy source integrated circuit based on a multi-loop Boolean oscillator ring shown includes a multi-loop Boolean oscillator ring circuit 100 and an entropy sampling circuit 200. The multi-loop Boolean oscillator ring circuit includes two basic oscillation units and two delay units: basic oscillation unit 101-1, basic oscillation unit 101-2, delay unit 102, and delay unit 103, with unequal delays for delay units 102 and 103. The output terminal 'out' of basic oscillation unit 101-1 is connected to the input port of delay unit 102, the output port of 102 is connected to the input terminal 'in' of basic oscillation unit 101-2, the output terminal 'out' of basic oscillation unit 101-2 is connected to the input port of delay unit 103, and the output port of delay unit 103 is connected to the input terminal 'in' of basic oscillation unit 101-1, forming a ring structure with multiple branches and complex oscillation feedback. By adding delay units 102 and 103 to the oscillation loop, the delay differences between the feedback paths in the oscillation loop are increased, and the oscillation behavior tends to be a more disordered Boolean oscillation, resulting in a higher entropy value in the output signal. Specifically, the delay value of the delay unit is basically the same as the delay of the two-input XOR gate in the basic oscillation unit.

[0032] The basic oscillation unit 101-1 includes two-input XOR gates XOR0, XOR1, and XOR2, as well as an inverter INV. XOR0 and XOR1 form a cross-feedback structure. One input of XOR0 is the input port in of the basic oscillation unit, and the other input is connected to the output of XOR1. One input of XOR1 is connected to the output of XOR0, and the other input is connected to the output of INV. The input of INV is connected to the output out of XOR2. The output of XOR2 is the output port out of the basic oscillation unit. The outputs of XOR0 and XOR1 are respectively connected to the two inputs of XOR2. The basic oscillation unit 101-2 is the same as the basic oscillation unit 101-1.

[0033] The entropy sampling circuit includes parallel D flip-flops 201-1 and 201-2, and a two-input XOR gate 202. In the multi-loop Boolean oscillator loop, the out terminal of the basic oscillator unit 101-1 is connected to the input D terminal of D flip-flop 201-1, and the output out terminal of the basic oscillator unit 101-2 is connected to the input D terminal of D flip-flop 201-2. The Q outputs of the two D flip-flops are connected to the two input ports of the two-input XOR gate 202, and the output terminal of 202 is the output OUT terminal of the entire entropy source circuit. The clock inputs of the two D flip-flops are provided by the same external clock source. The purpose of sampling the two outputs of the oscillator loop circuit with D flip-flops first and then XORing them is to reduce the correlation between the outputs of the two basic oscillator units and increase the entropy value of the entropy source output.

[0034] Example 2

[0035] Three basic oscillation units and three entropy sampling circuits (i.e., digital entropy source integrated circuits when N=3):

[0036] like Figure 2 The digital entropy source integrated circuit based on a multi-loop Boolean oscillator ring shown includes a multi-loop Boolean oscillator ring circuit 100 and an entropy sampling circuit 200. The multi-loop Boolean oscillator ring circuit includes three basic oscillation units and three delay units with different delay times: basic oscillation unit 101-1, basic oscillation unit 101-2, and basic oscillation unit 101-3, delay unit 102, delay unit 103, and delay unit 104. The output terminal out of basic oscillation unit 101-1 is connected to the input port of delay unit 102, the output port of delay unit 102 is connected to the input terminal in of basic oscillation unit 101-2, the out terminal of basic oscillation unit 101-2 is connected to the input port of delay unit 103, the output port of 103 is connected to the input terminal in of basic oscillation unit 101-3, the output terminal out of basic oscillation unit 101-3 is connected to the input port of delay unit 104, and the output port of 104 is connected to the input terminal in of basic oscillation unit 101-1, forming a ring structure. By adding three delay units 102, 103 and 104 to the oscillation ring, the delay difference of each feedback path in the oscillation ring is increased, the oscillation behavior tends to be a more disordered Boolean oscillation, and the output signal contains a higher entropy value.

[0037] The basic oscillation units 101-1, 101-2, and 101-3 have the same specific structure, as shown in Figure 101. They all include two-input XOR gates XOR0, XOR1, and XOR2, as well as an inverter INV. The two-input XOR gates XOR0 and XOR1 form a cross-feedback structure. One input of the two-input XOR gate XOR0 is the input port in of the basic oscillation unit, and the other input is connected to the two-input XOR gate XOR1. The output terminals are connected; one input terminal of the two-input XOR gate XOR1 is connected to the output terminal of the two-input XOR gate XOR0, the other input terminal of the two-input XOR gate XOR1 is connected to the output terminal of the inverter INV, and the input terminal of the inverter INV is connected to the output terminal out of the two-input XOR gate XOR2; the output terminal of the two-input XOR gate XOR2 is the output port out of the basic oscillation unit, and the output terminals of the two-input XOR gate XOR0 and the two-input XOR gate XOR1 are respectively connected to the two input terminals of the two-input XOR gate XOR2.

[0038] The entropy sampling circuit includes three parallel D flip-flops (D flip-flop 201-1, D flip-flop 201-2, and D flip-flop 201-3) and two two-input XOR gates (two-input XOR gate 202-1 and two-input XOR gate 202-2). In the multi-loop Boolean oscillation loop, the output terminal OUT of the basic oscillation unit 101-1 is connected to the input D terminal of D flip-flop 201-1, the output terminal OUT of the basic oscillation unit 101-2 is connected to the input D terminal of D flip-flop 201-2, and the output terminal OUT of the basic oscillation unit 101-3 is connected to the input D terminal of D flip-flop 201-3. The Q outputs of D flip-flops 201-1 and 201-2 are connected to the two input ports of the two-input XOR gate 202-1, respectively. The output of the two-input XOR gate 202-1 and the Q output of D flip-flop 201-3 are used as the inputs of the two-input XOR gate 202-2, respectively. The output port of the two-input XOR gate 202-2 is the random bit output of the entire entropy source circuit. The clock inputs of the three D flip-flops are provided by the same external clock source.

[0039] The aforementioned pure digital entropy source integrated circuit, including the two-input XOR gate, inverter, and D flip-flop, is implemented using devices from the ASIC digital standard cell library. The specific circuit technology and device size parameters vary depending on the design. In application, more chaotic Boolean oscillations can be generated by adjusting the delays of each feedback path in the basic oscillation unit. Specific design methods include adjusting the wiring length of the connection paths and adding delay circuits from the digital standard cell library. When a higher quality of random number output from the entropy source is required, the number of basic oscillation units in the multi-loop Boolean oscillation loop can be increased for adjustment.

[0040] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A digital entropy source integrated circuit based on a multi-loop Boolean ring of oscillation, characterized in that, The integrated circuit comprises a multi-loop Boolean oscillation ring circuit and an entropy sampling circuit, wherein The multi-loop Boolean oscillation ring circuit is used to generate a random Boolean oscillation output signal, and comprises N basic oscillation units and N delay units. The entropy sampling circuit is used to sample the oscillation signal generated by the multi-loop Boolean oscillation ring circuit to obtain an original random sequence, and comprises N D flip-flops arranged in parallel, and a two-input XOR gate chain connected to the output ends of the D flip-flops, wherein the two-input XOR gate chain comprises N-1 two-input XOR gates. The number of the basic oscillation units is consistent with the number of the D flip-flops, and N≥1. The output end out of the i-th basic oscillation unit of the multi-loop Boolean oscillation ring circuit i is connected with the input end in of the i+1-th basic oscillation unit i+1 The output end out of the N-th basic oscillation unit is connected with the input end in1 of the 1-th basic oscillation unit N The N basic oscillation units constitute a ring structure with multiple branches and complex oscillation feedback, i represents the serial number of the basic oscillation unit, and 1≤i≤N-1. the output end out of the ith basic oscillation unit i the input end in of the i+1th basic oscillation unit i+1 an ith delay unit is arranged between the input end in of the i+1th basic oscillation unit and the output end out of the ith basic oscillation unit N an Nth delay unit is arranged between the input end in1 of the 1st basic oscillation unit and the output end out of the Nth basic oscillation unit, the number of the delay units is same as the number of the basic oscillation units, and the delay value of the delay unit is same as the delay value of the two input XOR gates in the basic oscillation unit. The basic oscillation unit comprises an XOR gate XOR0, an XOR gate XOR1, an XOR gate XOR2 and an inverter INV, the XOR gate XOR0 and the XOR gate XOR1 form a cross feedback structure, one input end of the XOR gate XOR0 is an input port in of the basic oscillation unit, the other input end of the XOR gate XOR0 is connected to the output end of the XOR gate XOR1, one input end of the XOR gate XOR1 is connected to the output end of the XOR gate XOR0, the other input end of the XOR gate XOR1 is connected to the output end of the inverter INV, the input end of the inverter INV is connected to the output end out of the XOR gate XOR2, and the output end of the XOR gate XOR2 is an output port out of the basic oscillation unit.

2. A digital entropy source integrated circuit based on multiple loop Boolean ring oscillators as claimed in claim 1, wherein, The input end of the i-th D flip-flop of the entropy sampling circuit is connected with the output end out of the i-th basic oscillation unit in the multi-loop Boolean oscillation ring circuit i Connected, N D flip-flops are connected with the same clock, driven by the same clock, and N bits of original random numbers are obtained at the same clock edge, and i represents the serial number of the D flip-flop, 1≤i≤N-1.

3. A digital entropy source integrated circuit based on multiple loop Boolean ring oscillators as claimed in claim 2, wherein, The input end of the ith D flip-flop is connected with the output end out of the ith basic oscillation unit in the multi-loop Boolean oscillation ring circuit i The N D flip-flops are driven by the same clock, and the outputs of the N D flip-flops pass through a two-input XOR gate chain to obtain the final random number output.

4. The digital entropy source integrated circuit based on multiple loop Boolean ring oscillators of claim 3, wherein, The output end of the first D flip-flop and the output end of the second D flip-flop in the two-input XOR gate chain are respectively connected to two input ports of the first two-input XOR gate, the output end of the first two-input XOR gate and the output end of the third D flip-flop are respectively connected to two input ports of the second two-input XOR gate, and so on, the output end of the i-th two-input XOR gate and the output end of the i+2-th D flip-flop are respectively connected to two input ports of the i+1-th two-input XOR gate, and the output end of the i+1-th two-input XOR gate is an output end of the entire entropy source circuit.

5. The digital entropy source integrated circuit based on multi-loop Boolean ring of oscillation of claim 1, wherein, The XOR gate XOR0, the XOR gate XOR1 and the XOR gate XOR2 are all two-input XOR gates.

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