Three-groove thin film package structure for wafer-level optical sensor

Abstract

The application discloses a three-groove thin film packaging structure for a wafer-level optical sensor, which comprises a packaging plate (1), a transmitting end chip (2), a receiving end chip (3), an expansion chip (4), a first packaging body (5), a first thin film barrier (6), a second packaging body (7), a second thin film barrier (8) and a third packaging body (9). The transmitting end chip is packaged on the upper surface of the packaging plate through the first packaging body, and the surface of the first packaging body forms the first thin film barrier connected with the packaging plate. The receiving end chip is packaged on the upper surface of the packaging plate through the second packaging body, the first packaging body is located beside the second packaging body, and the surface of the second packaging body forms the second thin film barrier connected with the packaging plate. The expansion chip is packaged on the lower surface of the packaging plate through the third packaging body, and the expansion chip is electrically connected with the transmitting end chip. The first thin film barrier and the second thin film barrier are formed with light-transmitting parts. The application can solve the problems of large packaging size and poor performance of the optical sensor in the prior art.

Description

Technical Field

[0001] The present invention relates to a chip packaging structure, and in particular to a three-groove thin film packaging structure for a wafer-level optical sensor. Background Art

[0002] The operating principle of an optical sensor is that an optical transmitter chip emits a beam at a specific angle. After diffuse reflection from obstacles and obstructions, the beam is captured by an optical receiver chip. The reflected images, which vary in depth, achieve non-contact and non-destructive measurement. Currently, optical sensors are widely used in motion detection applications in industries such as industry, automotive, electronics, and retail automation.

[0003] In the optical sensor chip packaging of electronic products, the transmitter chip and the receiver chip of the optical sensor need to be separately packaged on the substrate through two independent cavities to prevent the light emitted by the transmitter chip from directly affecting the receiver chip, resulting in a decrease in the optical measurement accuracy of the electronic product. The emission and reception of light beams are achieved between the transmitter chip and the receiver chip through a transparent glass cover.

[0004] Chinese utility model patent CN206134714U discloses an optical sensor packaging structure, and specifically discloses: it includes a first optical chip arranged in a first cavity, and a second optical chip arranged in a second cavity; a first optical window corresponding to the first cavity, and a second optical window corresponding to the second cavity are provided on the shell; a transparent cover plate covering the first optical window and the second optical window is also mounted on the shell; the transparent cover plate has a first convex lens structure and a second convex lens structure formed at the positions of the first optical window and the second optical window, respectively.

[0005] The optical sensor packaging structure of the prior art and the above-mentioned utility model patent both have the following technical problems:

[0006] 1. As electronic products increasingly demand higher performance and volume for their internal components, the package size of optical sensors is shrinking. Existing substrates are relatively thick (approximately 200 μm), making them unable to meet the demands of some products with high package size requirements. Furthermore, as package size shrinks, the window area of ​​the package housing also shrinks, requiring a corresponding reduction in the area of ​​the convex lens glass cover used to cover the window. However, existing glass cover manufacturing processes cannot meet these small size requirements.

[0007] 2. Existing technology uses epoxy glue to secure the middle portion of the housing to the substrate. However, epoxy glue cannot completely block light between the two cavities, affecting the performance of the optical sensor. Furthermore, the epoxy glue connection process is costly and often results in epoxy overflow, which affects the packaging quality of the optical sensor.

[0008] 3. The shell of the prior art is made of opaque material, and there are often burrs on the edges. The burrs are up to 30-100 μm long, which affects the packaging quality of the optical sensor.

[0009] 4. Since the transmitting chip of the optical sensor is usually a component that is prone to heat generation, such as LED, the heat dissipation effect of the cavity formed by the substrate, shell and glass cover is poor, which is not conducive to the continuous and reliable operation of the optical sensor.

[0010] Therefore, it is necessary to provide a three-groove thin film packaging structure for wafer-level optical sensors to solve the above technical problems. Summary of the Invention

[0011] The object of the present invention is to provide a three-groove thin film packaging structure for a wafer-level optical sensor, which can solve the above-mentioned technical problems.

[0012] The present invention is achieved in that:

[0013] A three-groove thin-film packaging structure for a wafer-level optical sensor includes a packaging board, a transmitter chip, a receiver chip, an extension chip, a first packaging body, a first thin-film barrier, a second packaging body, a second thin-film barrier, and a third packaging body; the transmitter chip is packaged on the upper surface of the packaging board via the transparent first packaging body, a film layer is sputtered on the outer surface of the first packaging body to form a first thin-film barrier, and the first thin-film barrier is connected to the packaging board; the receiver chip is packaged on the upper surface of the packaging board via the transparent second packaging body, the first packaging body is located beside the second packaging body, a film layer is sputtered on the outer surface of the second packaging body to form a second thin-film barrier, and the second thin-film barrier is connected to the packaging board; the extension chip is packaged on the lower surface of the packaging board via the opaque third packaging body, and the extension chip is electrically connected to the transmitter chip; both the first and second thin-film barriers are formed with light-transmitting portions, and a light beam passes through the first and second thin-film barriers via the light-transmitting portions.

[0014] The light-transmitting portion of the first film barrier is sunken on the top of the first package body to form a first groove; the light-transmitting portion of the second film barrier is sunken on the top of the second package body to form a second groove; a gap is left between the first film barrier and the second film barrier to form a third groove.

[0015] A first light-transmitting through hole is formed at the bottom of the first groove of the first film barrier, and the light-transmitting glue is covered on the light-transmitting through hole.

[0016] A second light-transmitting through hole is formed at the bottom of the second groove of the second film barrier, and the light-transmitting glue is covered on the light-transmitting through hole.

[0017] A first conductive hole is formed on the packaging board, and the first conductive hole is located next to the transmitter chip; the first wafer is packaged on the upper surface of the packaging board and electrically connected to the top of the first conductive hole, the first wafer is located in the first packaging body, and the transmitter chip is electrically connected to the first wafer.

[0018] A second wafer is packaged on the lower surface of the packaging board, and the second wafer is electrically connected to the bottom of the first conductive hole; an RLC element is packaged in the third packaging body, and the RLC element is electrically connected to the second wafer, so that the RLC element is electrically connected to the transmitter chip.

[0019] The packaging board and the third packaging body are formed with heat dissipation holes, which are located directly below the transmitting end chip, and a heat sink is embedded in the heat dissipation hole. The top surface of the heat sink is attached to the bottom surface of the transmitting end chip, and the bottom surface of the heat sink is flush with the bottom surface of the third packaging body.

[0020] A second conductive hole is formed on the packaging board, and the second conductive hole is located next to the receiving end chip; the third wafer is packaged on the upper surface of the packaging board and electrically connected to the top of the second conductive hole, and the third wafer is located in the second packaging body; the fourth wafer is packaged on the lower surface of the packaging board, and the fourth wafer is located in the third packaging body, one end of the fourth wafer is electrically connected to the bottom of the second conductive hole, and the other end of the fourth wafer is electrically connected to one end of the extended chip.

[0021] A third conductive hole is formed on the third package body, and the third conductive hole is located on one side of the extended chip; the top of the third conductive hole is electrically connected to the fourth wafer, and a fifth wafer is packaged on the lower surface of the third package body, and the fifth wafer is electrically connected to the bottom of the third conductive hole.

[0022] A fourth conductive via is formed on the third package body, and the fourth conductive via is located on the other side of the extended chip; a sixth wafer is packaged on the lower surface of the package board, and the sixth wafer is located in the third package body; one end of the sixth wafer is electrically connected to the other end of the extended chip, and the other end of the sixth wafer is electrically connected to the top of the fourth conductive via; a seventh wafer is packaged on the lower surface of the third package body, and the seventh wafer is electrically connected to the bottom of the fourth conductive via.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1. The present invention adopts a packaging board to package the first wafer, the second wafer, the third wafer, the third wafer and the sixth wafer on the packaging board to form a wafer-level packaging board with a thickness of only 10-20um, which is used to replace the traditional 200um thick substrate. It can not only achieve the function of the traditional substrate, but also greatly reduce the thickness of the substrate, thereby meeting the requirement of reducing the package size.

[0025] 2. The present invention utilizes a sputtered film layer to form the first and second thin film barriers, with first and second grooves formed on the tops of the first and second thin film barriers, respectively, and a third groove formed between the first and second thin film barriers. This three-groove structure forms an effective optical barrier, ensuring the independent packaging and operation of the transmitter and receiver chips. This solves the prior art problem of epoxy resin glue in the middle portion of the cover not providing 100% light shielding, thus affecting optical sensor performance, as well as the problems of glue overflow and high process costs caused by the use of epoxy resin glue to secure the cover. Furthermore, the thin and smooth surface of the sputtered film layer avoids the large package size caused by thick covers and the burrs caused by cutting the cover material in the prior art, thereby improving the packaging quality of the optical sensor and further reducing the package size.

[0026] 3. The present invention adopts light-transmitting glue dispensing, and uses laser or other methods to punch holes at the bottom of the first groove and the second groove of the first film barrier and the second film barrier. The aperture of the light-transmitting hole is small, and the light-transmitting part formed by glue dispensing replaces the traditional 3D light-transmitting glass. The glue dispensing method can meet the covering and light transmission requirements of smaller-sized light-transmitting holes, and can further reduce the package size, avoiding the problem of difficulty in producing light-transmitting glass due to size reduction.

[0027] 4. The present invention uses a heat sink, which is attached to the bottom of the transmitter chip and extends to the bottom of the third package body. It can dissipate the heat of the transmitter chip to ensure the continuous and reliable operation of the transmitter chip, thereby ensuring the performance of the optical sensor.

[0028] 5. The present invention adopts an expansion chip, which is packaged by a third package body and electrically interconnected with the receiving end chip. The expansion chip can be flexibly selected according to the requirements of the expansion function, and can meet the various functional expansion requirements of the optical sensor while ensuring the package size requirements, thereby improving the functionality of the electronic product. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a cross-sectional view of the three-groove thin film packaging structure for wafer-level optical sensors of the present invention.

[0030] In the figure, 1 is a packaging board, 101 is a first conductive hole, 102 is a second conductive hole, 2 is a transmitting end chip, 3 is a receiving end chip, 4 is an expansion chip, 5 is a first packaging body, 6 is a first film barrier, 7 is a second packaging body, 8 is a second film barrier, 9 is a third packaging body, 901 is a third conductive hole, 902 is a fourth conductive hole, 10 is a light-transmitting point glue, 11 is a first wafer, 12 is a second wafer, 13 is an RLC element, 14 is a heat sink, 15 is a third wafer, 16 is a fourth wafer, 17 is a fifth wafer, 18 is a sixth wafer, and 19 is a seventh wafer. DETAILED DESCRIPTION

[0031] The application will be further described below in combination with the drawings and specific embodiments.

[0032] Please refer to the accompanying drawings Figure 1 A three-groove film packaging structure for a wafer-level optical sensor includes a packaging board 1, a transmitting end chip 2, a receiving end chip 3, an expansion chip 4, a first packaging body 5, a first film barrier 6, a second packaging body 7, a second film barrier 8, and a third packaging body 9. The transmitting end chip 2 is packaged on the upper surface of the packaging board 1 through the transparent first packaging body 5. A sputtered film layer is formed on the outer surface of the first packaging body 5 to form the first film barrier 6, which is connected to the packaging board 1. The receiving end chip 3 is packaged on the upper surface of the packaging board 1 through the transparent second packaging body 7. The first packaging body 5 is located beside the second packaging body 7. A sputtered film layer is formed on the outer surface of the second packaging body 7 to form the second film barrier 8, which is connected to the packaging board 1. The expansion chip 4 is packaged on the lower surface of the packaging board 1 through the non-light-transmitting third packaging body 9. The expansion chip 4 is electrically connected to the transmitting end chip 2. The first film barrier 6 and the second film barrier 8 each have a light-transmitting part. A light beam penetrates the first film barrier 6 and the second film barrier 8 through the light-transmitting part.

[0033] The transmitting end chip 2 and the receiving end chip 3 are independently packaged through the first packaging body 5 and the second packaging body 7, respectively. The first packaging body 5 and the second packaging body 7 can be formed by transparent plastic encapsulation glue injection molding to ensure that the light beam can penetrate the first packaging body 5 and the second packaging body 7. A sputtered film layer of aluminum or stainless steel is formed on the outer surface of the first packaging body 5 and the second packaging body 7 to form the first film barrier 6 and the second film barrier 8, which form an optical barrier. The first film barrier 6 and the second film barrier 8 are connected to the packaging board 1, ensuring 100% light shielding effect of the optical barrier, thereby avoiding the light beam of the transmitting end chip 2 directly penetrating the receiving end chip 3 and solving the problem of poor light shielding performance of the epoxy resin glue in the prior art. The light beam of the transmitting end chip 2 is emitted through the light-transmitting part, and the receiving end chip 3 receives the light beam through the light-transmitting part. The expansion chip 4 can select a power chip, a USB driving chip, a switch chip, etc. according to actual needs, ensuring the performance of the optical sensor and the application of its expansion function.

[0034] The package board 1 can be made of a material such as PI (polyimide) and is only 10-20 μm thick. This significantly reduces the chip package size compared to the 200 μm thick substrates used in existing technologies. The package board 1 and the third package body 9 are opaque, providing effective light shielding. The third package body 9 can be injection-molded with black plastic to encapsulate the expansion chip 4.

[0035] The first thin film barrier 6 and the second thin film barrier 8 are formed by sputtering a film layer using PVD (physical vapor deposition). The coating is thin and has a smooth surface, which is conducive to further reducing the package size of the chip and also avoids the lid burr problem in the prior art.

[0036] The light-transmitting portion of the first thin film barrier 6 is sunken at the top of the first packaging body 5 to form a first groove; the light-transmitting portion of the second thin film barrier 8 is sunken at the top of the second packaging body 7 to form a second groove; a gap is left between the first thin film barrier 6 and the second thin film barrier 8 to form a third groove.

[0037] The first and second grooves are used to house light-transmitting portions. Their sunken structure ensures the two light-transmitting portions remain independent of each other, thus ensuring the independent operation of transmitter chip 2 and receiver chip 3. The third groove further forms an optical barrier between first film barrier 6 and second film barrier 8, preventing the light beam from transmitter chip 2 from laterally penetrating into receiver chip 3. This eliminates the need for a central portion of the conventional cover, thus avoiding the problems of poor light-shielding epoxy adhesive in the central portion of the cover, high epoxy adhesive bonding process costs, and epoxy adhesive overflow.

[0038] A first light-transmitting through hole (not shown in the figure) is formed at the bottom of the first groove of the first film barrier 6 , and the light-transmitting adhesive 10 covers the light-transmitting through hole.

[0039] A first light-transmitting through hole can be formed by punching a hole on the first film barrier 6 by means of laser or other methods. The size of the first light-transmitting through hole is small. By using a dispensing method, a 2D light-transmitting dispensing 10 is formed to replace the traditional 3D light-transmitting glass, thereby solving the problem of difficulty in producing small-sized light-transmitting glass in the existing technology, reducing production costs, and shortening the process cycle.

[0040] A second light-transmitting through hole (not shown in the figure) is formed at the bottom of the second groove of the second film barrier 8 , and the light-transmitting adhesive 10 covers the light-transmitting through hole.

[0041] A second light-transmitting through hole can be formed by punching a hole on the second film barrier 8 by means of laser or other methods. The size of the second light-transmitting through hole is small. By using the dispensing method, a 2D light-transmitting dispensing 10 is formed to replace the traditional 3D light-transmitting glass, thereby solving the problem of difficulty in producing small-sized light-transmitting glass in the existing technology, and can reduce production costs and shorten the process cycle.

[0042] A first conductive hole 101 is formed on the packaging board 1, and the first conductive hole 101 is located next to the transmitter chip 2; the first wafer 11 is packaged on the upper surface of the packaging board 1 and electrically connected to the top of the first conductive hole 101, the first wafer 11 is located in the first packaging body 5, and the transmitter chip 2 is electrically connected to the first wafer 8 through wire bonding.

[0043] A second wafer 12 is packaged on the lower surface of the package board 1 and electrically connected to the bottom of the first conductive via 101. An RLC element 13 (where R represents resistance, L represents inductance, and C represents capacitance) is packaged within the third package body 9 and electrically connected to the second wafer 12, thereby electrically connecting the RLC element 13 to the transmitter chip 2. Both the second wafer 12 and the RLC element 13 are located within the third package body 9, ensuring a stable operating current for the transmitter chip 2.

[0044] The packaging board 1 and the third packaging body 9 are formed with heat dissipation holes (not shown in the figure), the heat dissipation holes are located directly below the transmitter chip 2, and a heat sink 14 is embedded in the heat dissipation holes. The top surface of the heat sink 14 is attached to the bottom surface of the transmitter chip 2, and the bottom surface of the heat sink 14 is flush with the bottom surface of the third packaging body 9.

[0045] Preferably, the heat sink 14 can be made of copper sheet, which has good heat dissipation performance. The size of the heat sink 14 can be made according to the size of the transmitter chip 2. The thickness of the heat sink 14 is consistent with the total thickness of the packaging board 1 and the third packaging body 9. It can improve the heat dissipation effect of the transmitter chip 2 while reducing the package size, thereby ensuring long-term continuous operation of the transmitter chip 2.

[0046] A second conductive hole 102 is formed on the packaging board 1, and the second conductive hole 102 is located next to the receiving end chip 3; the third wafer 15 is packaged on the upper surface of the packaging board 1 and electrically connected to the top of the second conductive hole 102, and the third wafer 15 is located in the second packaging body 7; the fourth wafer 16 is packaged on the lower surface of the packaging board 1, and the fourth wafer 16 is located in the third packaging body 9, one end of the fourth wafer 16 is electrically connected to the bottom of the second conductive hole 102, and the other end of the fourth wafer 16 is electrically connected to one end of the extension chip 4.

[0047] The third package body 9 is formed with a third conductive via 901, located on one side of the extended chip 4. The top of the third conductive via 901 is electrically connected to the fourth wafer 16. A fifth wafer 17 is encapsulated on the lower surface of the third package body 9 and electrically connected to the bottom of the third conductive via 901. The fifth wafer 17 is used to electrically connect to other components of the electronic product.

[0048] The third package body 9 is formed with a fourth conductive via 902, located on the other side of the extended chip 4. A sixth wafer 18 is packaged on the lower surface of the package board 1 and located within the third package body 9. One end of the sixth wafer 18 is electrically connected to the other end of the extended chip 4, and the other end of the sixth wafer 18 is electrically connected to the top of the fourth conductive via 902. A seventh wafer 19 is packaged on the lower surface of the third package body 9 and electrically connected to the bottom of the fourth conductive via 902. The seventh wafer 19 is used to electrically connect to other components of the electronic product.

[0049] The first wafer 11, second wafer 12, third wafer 15, third wafer 16, and sixth wafer 18 are packaged on a package board 1 to form a wafer-level package board. This replaces a traditional substrate, achieving the same functionality as a traditional substrate while significantly reducing the substrate's thickness to meet package size requirements. The fourth wafer 17 and seventh wafer 19 are packaged on a third package body 19 and electrically connected to the third wafer 16 and sixth wafer 18 via third conductive vias 901 and fourth conductive vias 902. This reduces the chip package size while ensuring interconnection and functional control between the extended chip 4 and the receiving chip 3.

[0050] In the description of the present invention, "upper" and "lower" are based on the attached Figure 1 The upper and lower position relationships shown.

[0051] Please see the attached Figure 1 , the production process of the present invention is:

[0052] 1. A polyimide plate with a thickness of 10-20 μm is used as the packaging plate 1. The packaging plate 1 is placed upside down on the glass slide, that is, the lower surface of the packaging plate 1 faces upward, and the upper surface of the packaging plate 1 is attached to the glass slide. Holes are punched on the packaging plate 1 by laser to form a first conductive hole 101 and a second conductive hole 102.

[0053] 2. Sixth wafer 18, fourth wafer 16, and second wafer 12 are packaged on the bottom of package board 1. Fourth wafer 16 is electrically connected to second conductive via 102 via a conductive material, and second wafer 12 is electrically connected to first conductive via 101 via a conductive material. Heat dissipation vias are formed in package board 1 by laser drilling.

[0054] 3. Electrically connect the two ends of the extended chip 4 to the sixth wafer 18 and the fourth wafer 16 , electrically connect the RLC element 13 to the second wafer 12 , and embed the heat sink 14 in the heat dissipation through hole.

[0055] 4. The expansion chip 4 and the RLC element 13 are encapsulated in a light-proof third package 9. The bottom surface of the third package 9 is flush with the bottom surface of the heat sink 14. Laser drilling is performed in the third package 9 to form third conductive vias 901 and fourth conductive vias 902. The first conductive via 901 is electrically connected to the fourth wafer 16 via a conductive material, and the fourth conductive via 902 is electrically connected to the sixth wafer 18 via a conductive material.

[0056] 5. The seventh wafer 19 and the fifth wafer 17 are packaged on the bottom surface of the third package body 9. The seventh wafer 19 is electrically connected to the fourth conductive via 902 through a conductive material, and the fifth wafer 17 is electrically connected to the third conductive via 901 through a conductive material.

[0057] 6. Remove the glass slide and turn the chip over as a whole, that is, place the upper surface of the packaging plate 1 upward.

[0058] 7. Package the first wafer 11 and the third wafer 15 on the top surface of the package board 1. The first wafer 11 is electrically connected to the first conductive via 101 via a conductive material, and the third wafer 15 is electrically connected to the second conductive via 102 via a conductive material. The transmitter chip 2 is electrically connected to the first wafer 11 via wire bonding, and the receiver chip 3 is electrically connected to the third wafer 15 via wire bonding.

[0059] 8. The transmitter chip 2 and the first wafer 11 are encapsulated in a transparent first encapsulation body 5, and a first groove is formed on the top of the first encapsulation body 5, directly above the transmitter chip 2. The receiver chip 3 and the third wafer 15 are encapsulated in a second encapsulation body 7, and a second groove is formed on the top of the second encapsulation body 7, directly above the receiver chip 3. A third groove is formed between the first encapsulation body 5 and the second encapsulation body 7.

[0060] 9. Sputter a film layer on the outer surfaces of the first package body 5 and the second package body 7 to form a first thin film barrier 6 and a second thin film barrier 8. The first thin film barrier 6 and the second thin film barrier 8 are connected to the package board 1.

[0061] 10. Use laser to drill holes at the bottom of the first groove of the first film barrier 6 and the bottom of the second groove of the second film barrier 8 to form a first light-transmitting through hole and a second light-transmitting through hole.

[0062] 11. Apply glue at the first light-transmitting through hole and the second light-transmitting through hole to form light-transmitting glue dots 10.

[0063] The above are only preferred embodiments of the present invention and are not intended to limit the scope of protection of the invention. Therefore, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A three-groove thin film packaging structure for a wafer-level optical sensor, characterized by: The invention comprises a packaging board (1), a transmitting end chip (2), a receiving end chip (3), an extension chip (4), a first packaging body (5), a first thin film barrier (6), a second packaging body (7), a third thin film barrier (8) and a third packaging body (9); the transmitting end chip (2) is packaged on the upper surface of the packaging board (1) through the transparent first packaging body (5); a first thin film barrier (6) is formed by sputtering a film layer on the outer surface of the first packaging body (5); and the first thin film barrier (6) is connected to the packaging board (1); the receiving end chip (3) is packaged on the packaging board through the transparent second packaging body (7). On the upper surface of the package board (1), the first package body (5) is located beside the second package body (7), a sputtered film layer is formed on the outer surface of the second package body (7) to form a second thin film barrier (8), and the second thin film barrier (8) is connected to the package board (1); the extended chip (4) is encapsulated on the lower surface of the package board (1) through the opaque third package body (9), and the extended chip (4) is electrically connected to the transmitting end chip (2); a light-transmitting portion is formed on both the first thin film barrier (6) and the second thin film barrier (8), and a light beam passes through the first thin film barrier (6) and the second thin film barrier (8); The light-transmitting portion of the first thin film barrier (6) is sunken and arranged on the top of the first package body (5), forming a first groove; the light-transmitting portion of the second thin film barrier (8) is sunken and arranged on the top of the second package body (7), forming a second groove; a gap is left between the first thin film barrier (6) and the second thin film barrier (8), forming a third groove; A first conductive hole (101) is formed on the packaging board (1), and the first conductive hole (101) is located next to the transmitter chip (2); a first wafer (11) is packaged on the upper surface of the packaging board (1) and electrically connected to the top of the first conductive hole (101); the first wafer (11) is located in the first packaging body (5), and the transmitter chip (2) is electrically connected to the first wafer (11); A second wafer (12) is packaged on the lower surface of the packaging board (1), and the second wafer (12) is electrically connected to the bottom of the first conductive hole (101); an RLC element (13) is packaged in the third packaging body (9), and the RLC element (13) is electrically connected to the second wafer (12), so that the RLC element (13) is electrically connected to the transmitter chip (2).

2. The three-groove thin film packaging structure for wafer-level optical sensors according to claim 1, wherein: A first light-transmitting through hole is formed at the bottom of the first groove of the first film barrier (6), and the light-transmitting glue (10) covers the light-transmitting through hole.

3. The three-groove thin film packaging structure for wafer-level optical sensors according to claim 1, wherein: A second light-transmitting through hole is formed at the bottom of the second groove of the second film barrier (8), and the light-transmitting glue (10) covers the light-transmitting through hole.

4. The three-groove thin film packaging structure for wafer-level optical sensors according to claim 1, wherein: The packaging board (1) and the third packaging body (9) are formed with heat dissipation holes, the heat dissipation holes are located directly below the transmitting end chip (2), and a heat sink (14) is embedded in the heat dissipation holes, the top surface of the heat sink (14) is attached to the bottom surface of the transmitting end chip (2), and the bottom surface of the heat sink (14) is flush with the bottom surface of the third packaging body (9).

5. The three-groove thin film packaging structure for wafer-level optical sensors according to claim 1 or 4, characterized in that: A second conductive hole (102) is formed on the packaging board (1), and the second conductive hole (102) is located next to the receiving end chip (3); a third wafer (15) is packaged on the upper surface of the packaging board (1) and electrically connected to the top of the second conductive hole (102), and the third wafer (15) is located in the second packaging body (7); a fourth wafer (16) is packaged on the lower surface of the packaging board (1), and the fourth wafer (16) is located in the third packaging body (9), one end of the fourth wafer (16) is electrically connected to the bottom of the second conductive hole (102), and the other end of the fourth wafer (16) is electrically connected to one end of the extension chip (4).

6. The three-groove thin film packaging structure for wafer-level optical sensors according to claim 5, wherein: A third conductive hole (901) is formed on the third package body (9), and the third conductive hole (901) is located on one side of the extended chip (4); the top of the third conductive hole (901) is electrically connected to the fourth wafer (16), and a fifth wafer (17) is packaged on the lower surface of the third package body (9), and the fifth wafer (17) is electrically connected to the bottom of the third conductive hole (901).

7. The three-groove thin film packaging structure for wafer-level optical sensors according to claim 6, wherein: A fourth conductive hole (902) is formed on the third package body (9), and the fourth conductive hole (902) is located on the other side of the extended chip (4); a sixth wafer (18) is packaged on the lower surface of the package board (1), and the sixth wafer (18) is located in the third package body (9); one end of the sixth wafer (18) is electrically connected to the other end of the extended chip (4), and the other end of the sixth wafer (18) is electrically connected to the top of the fourth conductive hole (902); a seventh wafer (19) is packaged on the lower surface of the third package body (9), and the seventh wafer (19) is electrically connected to the bottom of the fourth conductive hole (902).

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