Manufacturing method of glass substrate with conductive through hole and chip packaging structure

Abstract

The invention provides a manufacturing method of a glass substrate with a conductive through hole and a chip packaging structure, and the method comprises the steps: providing a glass substrate which comprises a first surface and a second surface which are opposite to each other; forming a first through hole through which the first surface of the glass substrate penetrates to the second surface; forming a conductive column in the first through hole, wherein a gap is formed between the conductive column and the first through hole; and forming a buffer layer between the conductive column and the inner wall of the first through hole, wherein the buffer layer at least covers the inner wall of the first through hole and the side wall of the conductive column. According to the invention, through the method of firstly manufacturing the conductive column and then forming the buffer layer, the step of directly depositing a high-quality insulating film in the first through hole with relatively high difficulty and cost is avoided, the demand on deposition equipment is reduced, the material and time cost is saved, and the production yield is improved. Meanwhile, the buffer layer is actively filled between the conductive column and the glass substrate, so that the thermal mechanical stress is more effectively absorbed and released, and the product quality of the glass substrate with the conductive through hole is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a method for fabricating a glass substrate with conductive vias and a chip packaging structure. Background Technology

[0002] In related technologies, the processing of glass substrates with conductive vias mainly involves the following steps: First, multiple through-holes are formed on the glass substrate using laser etching; then, a buffer layer is formed on the inner wall of the through-holes; finally, a conductive filling layer is formed inside the glass through-holes using electroplating.

[0003] However, this method makes it difficult to achieve defect-free buffer layer film deposition within vias with high aspect ratios. In addition, the film deposition equipment is expensive and the deposition process is time-consuming. Furthermore, voids are easily generated in the subsequent electroplating filling steps due to the deep hole effect, which increases the complexity of the manufacturing process and the overall manufacturing cost, ultimately affecting the product quality of glass substrates with conductive vias. Summary of the Invention

[0004] In order to at least overcome the above-mentioned deficiencies in the prior art, the purpose of this application is to provide a method for manufacturing a glass substrate with conductive vias, the method comprising: A glass substrate is provided, the glass substrate including a first side and a second side opposite thereto; A first through hole is formed on the first surface of the glass substrate, extending to the second surface; A conductive post is formed within the first through hole; wherein, there is a gap between the conductive post and the inner wall of the first through hole; A buffer layer is formed between the conductive post and the inner wall of the first through hole; wherein the buffer layer at least covers the inner wall of the first through hole and the side wall of the conductive post.

[0005] In one possible implementation, the step of forming a conductive post within the first through-hole includes: Provide vehicles; A conductive substrate is provided; wherein the material of the conductive substrate includes a material that is conductive; The conductive substrate is adhered to one side of the carrier; The glass substrate is adhered to the conductive substrate on the side away from the carrier; A photoresist layer is uniformly coated inside the first through hole, at least covering the inner wall of the first through hole; The photoresist layer is photolithographically etched and developed using a mask with the conductive pillar pattern to form a second via on the photoresist layer; wherein the second via exposes a portion of the conductive substrate; The conductive pillar is formed in the second through hole by electroplating, at least covering the inner wall of the second through hole; After the step of forming a buffer layer between the conductive post and the inner wall of the first through hole, the method further includes: Debond the carrier and the conductive substrate; The conductive substrate is ground so that the edge of the conductive post exposed on the glass substrate is flush with the first and second surfaces of the glass substrate.

[0006] In one possible implementation, the step of forming a buffer layer between the conductive post and the inner wall of the first through hole includes: Remove the photoresist layer to form a third through hole between the conductive pillar and the inner wall of the first through hole; For the third through hole, the buffer layer is formed by filling it with the material of the buffer layer and curing it.

[0007] In one possible implementation, the step of forming a conductive post within the first through-hole includes: Multiple spaced conductive pillars are formed within the first through hole; The step of forming a buffer layer between the conductive post and the inner wall of the first through hole includes: A buffer layer is formed between the conductive post and the inner wall of the first through hole, and between two adjacent conductive posts; wherein the buffer layer at least covers the inner wall of the first through hole and the side wall of the conductive post.

[0008] In one possible implementation, the step of forming the first through-hole extending from the first surface of the glass substrate to the second surface includes: For the glass substrate, the area corresponding to the first through hole is modified by laser induction; The glass substrate is immersed in an etching solution to form the first through hole; The etching solution on the surface of the glass substrate was cleaned with deionized water.

[0009] In one possible implementation, the step of adhering the conductive substrate to one side of the carrier includes: A release layer is deposited on one side of the vehicle; An adhesive layer is bonded to one side of the conductive substrate, the material of the adhesive layer including a photosensitive material; The release layer and the adhesive layer are bonded together to connect the conductive substrate to the carrier; The step of unbonding the carrier and the conductive substrate includes: The carrier is separated from the conductive substrate by irradiating the adhesion layer with a laser.

[0010] In one possible implementation, the material of the conductive pillar includes copper.

[0011] In one possible implementation, the material of the buffer layer includes polyimide.

[0012] Based on the same inventive concept, this application also provides a chip packaging structure, the chip packaging structure comprising a glass substrate with conductive vias made by any of the aforementioned methods for manufacturing a glass substrate with conductive vias; the chip packaging structure further comprising a chip disposed on the glass substrate with conductive vias.

[0013] Based on the same inventive concept, this application also provides an electronic device, including the aforementioned chip packaging structure.

[0014] Compared with the prior art, this application has the following beneficial effects: This application avoids the difficult and costly step of directly depositing a high-quality insulating film inside the first via by first fabricating the conductive pillars and then forming the buffer layer. This reduces the need for deposition equipment, saves material and time costs, and improves production yield. Simultaneously, this application allows the buffer layer to actively fill the space between the conductive pillars and the glass substrate, thereby more effectively absorbing and releasing thermomechanical stress and improving the product quality of glass substrates with conductive vias. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram illustrating the steps of the method for fabricating a glass substrate with conductive vias provided in this embodiment. Figure 2 This is one of the flowcharts illustrating the method for fabricating a glass substrate with conductive vias provided in this embodiment; Figure 3 This is a schematic diagram of a glass substrate with conductive vias provided in this embodiment; Figures 4(a) and 4(b) are the second flow diagram of the method for manufacturing a glass substrate with conductive vias provided in this embodiment; Figure 5 This is the third flowchart illustrating the method for fabricating a glass substrate with conductive vias provided in this embodiment. Figure 6 This is the fourth flowchart illustrating the method for fabricating a glass substrate with conductive vias provided in this embodiment. Figure 7 This is the fifth flowchart illustrating the method for fabricating a glass substrate with conductive vias provided in this embodiment.

[0017] Icons: Glass substrate-100; First side-101; Second side-102; First through-hole-110; Conductive pillar-200; Buffer layer-300; Carrier-400; Conductive substrate-410; Photoresist layer-120; Second through-hole-121; Third through-hole-122; Release layer-420; Adhesive layer-430; Bonding layer-440; Glass substrate with conductive through-hole-10. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0019] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0020] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0021] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0022] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0023] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0024] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0025] The inventors discovered that the processing of glass substrates with conductive vias in related technologies mainly involves the following steps: First, multiple through-holes are formed on the glass substrate using laser etching; then, a buffer layer is formed on the inner wall of the through-holes; finally, a conductive filling layer is formed inside the glass through-holes using electroplating.

[0026] However, this method makes it difficult to achieve defect-free buffer layer film deposition within vias with high aspect ratios. In addition, the film deposition equipment is expensive and the deposition process is time-consuming. Furthermore, voids are easily generated in the subsequent electroplating filling steps due to the deep hole effect, which increases the complexity of the manufacturing process and the overall manufacturing cost, ultimately affecting the product quality of glass substrates with conductive vias.

[0027] In view of this, this embodiment provides a solution that can reduce the risks of the above-mentioned problems. The solution provided in this embodiment will be described in detail below.

[0028] This application provides a method for fabricating a glass substrate with conductive vias. Please refer to [link / reference]. Figure 1 and Figure 2 The method includes the following steps.

[0029] Step S11: Provide a glass substrate 100, the glass substrate 100 including a first surface 101 and a second surface 102 opposite thereto.

[0030] Step S12, forming a first through hole 110 through the first surface 101 of the glass substrate 100 to the second surface 102.

[0031] In this embodiment, the first through-hole 110 is used to accommodate the conductive post 200. For example, in a chip packaging structure, the glass substrate 10 with conductive through-holes manufactured by the method of this application can serve as a conductive transport structure between chips.

[0032] Step S13: A conductive post 200 is formed in the first through hole 110; wherein, there is a gap between the conductive post 200 and the inner wall of the first through hole 110.

[0033] It should be noted that, since the conductive post 200 is used to realize the electrical connection between the chips or other structures on both sides of the glass substrate 100, the material of the conductive post 200 includes a conductive material.

[0034] In this embodiment, the gap between the conductive post 200 and the inner wall of the first through hole 110 is used to form a buffer layer 300, which can alleviate and release the stress caused by the difference in thermal expansion coefficients between the conductive post 200 and the glass substrate 100.

[0035] Step S14: A buffer layer 300 is formed between the conductive post 200 and the inner wall of the first through hole 110; wherein the buffer layer 300 at least covers the inner wall of the first through hole 110 and the side wall of the conductive post 200.

[0036] Please refer to Figure 3 Thus, a glass substrate 10 with conductive vias is formed.

[0037] In this embodiment, by first fabricating the conductive pillar 200 and then forming the buffer layer 300, the difficult and costly step of directly depositing an insulating film within the first via 110 is avoided. This reduces the need for deposition equipment, saves material and time costs, and improves production yield. Simultaneously, this application enables the buffer layer 300 to actively fill the space between the conductive pillar 200 and the glass substrate 100, reducing potential voids between the multiple interfaces of the glass substrate 100, the conductive pillar 200, and the buffer layer 300. This more effectively absorbs and releases thermomechanical stress, improving the product quality of the glass substrate 10 with conductive vias.

[0038] In one possible implementation, referring to Figures 4(a)-4(b), step S13 includes the following sub-steps.

[0039] 400 vehicles are provided.

[0040] Optionally, in this embodiment, the material of the carrier 400 includes glass.

[0041] A conductive substrate 410 is provided; wherein the material of the conductive substrate 410 includes a conductive material.

[0042] Optionally, the conductive pillar 200 may be made of copper; the conductive substrate 410 may also be made of copper. The conductive substrate 410 and the conductive pillar 200 may be made of the same conductive material.

[0043] The conductive substrate 410 is adhered to one side of the carrier 400.

[0044] The glass substrate 100 is adhered to the conductive substrate 410 on the side away from the carrier 400.

[0045] Optionally, the glass substrate 100 can be bonded to the conductive substrate 410 via an adhesive layer 440. The orthographic projection of the adhesive layer 440 on the carrier 400 coincides with the orthographic projection of the glass substrate 100 having the first through hole 110 on the carrier 400.

[0046] A photoresist layer 120 is uniformly coated within the first through hole 110, at least covering the inner wall of the first through hole 110.

[0047] The photoresist layer 120 is photolithographically lithographically and developed using a mask with the pattern of the conductive pillars 200 to form a second via 121 on the photoresist layer 120; wherein the second via 121 exposes a portion of the conductive substrate 410.

[0048] In this step, the mask pattern with the conductive pillar 200 pattern is the cross-sectional shape of the conductive pillar 200 in a direction parallel to the glass substrate 100.

[0049] The conductive pillar 200 is formed in the second through hole 121 by electroplating, at least covering the inner wall of the second through hole 121.

[0050] Specifically, during electroplating, an electrolyte is first prepared according to the appropriate formula selected based on the metal to be plated. Then, the conductive substrate 410 is connected to the negative terminal of the power supply as the cathode, and the anode material is connected to the positive terminal. Next, the glass substrate 100 and the conductive substrate 410 on the glass substrate 100 are vertically immersed in the electrolyte. The magnetic stirrer is turned on, and parameters such as temperature and current density are set so that conductive pillars 200 covering at least the inner wall are formed in the second through hole 121.

[0051] Since the conductive post 200 formed at the end away from the conductive substrate 410 will remain outside the second through hole 121, it can be removed by chemical mechanical polishing.

[0052] In this embodiment, since the conductive pillar 200 is formed in the second through hole 121 formed in the photoresist layer 120, the photoresist layer 120 also serves as a buffer material between the conductive pillar 200 and the glass substrate 100 while the conductive pillar 200 is formed by electroplating, preventing the conductive pillar 200 from directly contacting the glass substrate 100 and generating large stress.

[0053] After step S14, please refer to Figure 5 The method further includes the following steps.

[0054] The bond between the carrier 400 and the conductive substrate 410 is released.

[0055] The conductive substrate 410 is ground so that the edge of the conductive post 200 exposed on the glass substrate 100 is flush with the first surface 101 and the second surface 102 of the glass substrate 100.

[0056] In this embodiment, since the formed conductive pillars 200 adhere to the conductive substrate 410, the conductive substrate 410 needs to be ground away so that both ends of the conductive pillars 200 are flush with both sides of the glass substrate 100. In this way, a glass substrate 10 with conductive through holes is formed.

[0057] In another possible implementation, the bond between the carrier 400 and the conductive substrate 410 may be released before the buffer layer 300 is formed. Then, the buffer layer 300 is formed between the conductive post 200 and the inner wall of the first through hole 110. After the buffer layer 300 is formed, the conductive substrate 410 is ground so that the edge of the conductive post 200 exposed on the glass substrate 100 is flush with the first surface 101 and the second surface 102 of the glass substrate 100.

[0058] In one possible implementation, please refer to Figure 6 Step S14 includes the following sub-steps.

[0059] Remove the photoresist layer 120 to form a third through hole 122 between the conductive post 200 and the inner wall of the first through hole 110.

[0060] Specifically, a wet chemical stripping method can be used to remove the photoresist layer 120. Through the swelling and chemical reaction of the stripping solution, the adhesion between the photoresist layer 120 and the surface of the glass substrate 100 is reduced, thereby separating the photoresist layer 120 and the glass substrate 100.

[0061] For the third through hole 122, the buffer layer 300 is formed by filling it with the material of the buffer layer 300 and curing it.

[0062] Specifically, a liquid buffer layer 300 precursor, such as a polyimide prepolymer, can be drop-coated onto one side of the glass substrate 100. Then, under high-speed rotation and centrifugal force, the liquid buffer layer 300 precursor is evenly spread and flows into the third through-hole 122. Since the other side of the glass substrate 100 has a conductive substrate 410 connected to the conductive pillars 200 of the glass substrate 100, the liquid buffer layer 300 precursor fills the third through-hole 122 without flowing out. Next, the liquid buffer layer 300 precursor is cured at high temperature to achieve the required mechanical strength, chemical stability, and electrical insulation properties for the final buffer layer 300.

[0063] In addition, the cured buffer layer 300 material may remain outside the third through hole 122, forming an uneven surface, which can be removed by chemical mechanical polishing.

[0064] In one possible implementation, please refer to Figure 7 Step S13 includes: forming a plurality of spaced conductive pillars 200 within the first through hole 110.

[0065] In this embodiment, multiple electrically isolated conductive pillars 200 can be formed in a single first through hole 110 through photolithography and electroplating processes. In the chip packaging structure formed using this glass substrate 100, these conductive pillars 200 can be connected to different signal lines or chips respectively.

[0066] In this way, multiple independent electrical paths are integrated within a first via 110, which improves the wiring density and integration of the glass substrate 100 and makes the design of the chip packaging structure more flexible.

[0067] Step S14 includes: forming a buffer layer 300 between the conductive post 200 and the inner wall of the first through hole 110 and between two adjacent conductive posts 200; wherein the buffer layer 300 at least covers the inner wall of the first through hole 110 and the side wall of the conductive post 200.

[0068] In this embodiment, the liquid polyimide precursor can be injected into the gap between the inner wall of the conductive pillar 200 and the first through hole 110 and between two adjacent conductive pillars 200 by vacuum pressure filling, and then cured.

[0069] Thus, the buffer layer 300 can block electrical short circuits between multiple spaced conductive pillars 200, and can also absorb and dissipate stress caused by the mismatch of thermal expansion coefficients of different materials, preventing the glass substrate 100 from cracking or delaminating at the interface, while enhancing the mechanical strength and reliability of the entire glass substrate 100 structure.

[0070] In one possible implementation, step S12 may employ laser-induced deep etching (LIDE) to form a first through-hole 110 on the glass substrate 100, extending from the first surface 101 to the second surface 102, including the following sub-steps.

[0071] For the glass substrate 100, the area corresponding to the first through hole 110 is modified by laser induction.

[0072] Specifically, the target pattern is first designed on the glass substrate 100 according to the design requirements of the first through hole 110, and the area is selectively modified by laser radiation.

[0073] The glass substrate 100 is immersed in an etching solution to form the first through hole 110.

[0074] Specifically, a suitable etching solution can be selected, and the laser-modified glass substrate 100 can be placed in the etching solution so that the modified areas are etched while the unmodified areas are basically unaffected. In order to ensure that the shape of the first through hole 110 meets the structural dimensions required by the design, the etching time of the glass substrate 100 in the etching tank needs to be preset. The etching solution on the surface of the glass substrate 100 is cleaned with deionized water. In this way, a glass substrate 100 having at least one first through-hole 110 with an arbitrary aspect ratio can be obtained.

[0075] In one possible implementation, the step of attaching the conductive substrate 410 to one side of the carrier 400 includes the following sub-steps.

[0076] A release layer 420 is deposited on one side of the carrier 400.

[0077] An adhesive layer 430 is bonded to one side of the conductive substrate 410. The material of the adhesive layer 430 includes a photosensitive material. The adhesive layer 430, made of a photosensitive material, can maintain its adhesiveness when bonding is required and lose its adhesiveness when debonded by light of a specific wavelength.

[0078] It should be noted that the material of the adhesive layer 430 may also include other types of materials, such as heat-sensitive materials, as long as they remain sticky during the formation of the conductive pillar 200 and lose their stickiness during debonding.

[0079] The release layer 420 and the adhesion layer 430 are bonded together to connect the conductive substrate 410 to the carrier 400.

[0080] Specifically, after the adhesion layer 430 on the conductive substrate 410 is aligned with the release layer 420 on the carrier 400, it is placed in a vacuum bonding machine to form a firm bond, ensuring that the conductive substrate 410 and the carrier 400 do not separate during the manufacturing process.

[0081] The step of releasing the bond between the carrier 400 and the conductive substrate 410 includes: irradiating the adhesion layer 430 with a laser to separate the carrier 400 from the conductive substrate 410.

[0082] Specifically, when debonding the carrier 400 and the conductive substrate 410, the carrier 400 and the conductive substrate 410 can be fixed in a laser release device. The laser release device releases a laser, which penetrates the carrier 400 and is absorbed by the adhesion layer 430 or the release layer 420, forming a tiny gap at the interface of the adhesion layer 430 to remove or reduce the adhesion between it and the conductive substrate 410. Finally, a vacuum chuck can be used to peel the conductive substrate 410 off the carrier 400.

[0083] In one possible implementation, the conductive post 200 is made of copper.

[0084] Copper has extremely low resistivity, ensuring minimal signal loss and maximum speed during transmission through the conductive pillar 200. Copper also has high thermal conductivity, providing an efficient vertical heat dissipation channel for the chip packaging structure composed of the glass substrate 100 in this application, preventing performance degradation or failure due to overheating and thus improving reliability. Furthermore, copper's mechanical ductility can, to some extent, buffer some of the stress caused by the mismatch in thermal expansion coefficients at the interface with other materials through deformation, enhancing structural reliability. Therefore, the conductive pillar 200 in this embodiment is made of copper.

[0085] It should be noted that, in addition to copper, the conductive post 200 can also be made of other materials, without specific limitations here.

[0086] In one possible implementation, the material of the buffer layer 300 includes polyimide.

[0087] Polyimide can buffer and release thermal stress caused by the difference in thermal expansion coefficients between the metal conductive pillar 200 and the glass substrate 100, thereby suppressing the risk of interface delamination or glass cracking and greatly improving the long-term reliability and yield of the corresponding chip packaging structure. Therefore, in this embodiment, the material of the buffer layer 300 includes polyimide.

[0088] It should be noted that, in addition to copper, the buffer layer 300 can also be made of other materials, which are not specifically limited here.

[0089] Based on the same inventive concept, this application also provides a chip packaging structure, the chip packaging structure including a glass substrate 10 with conductive vias made by any of the aforementioned methods for manufacturing glass substrates with conductive vias; the chip packaging structure also includes a chip disposed on the glass substrate 10 with conductive vias.

[0090] Because the aforementioned method for fabricating a glass substrate with conductive vias avoids the difficult and costly step of directly depositing a high-quality insulating film within the first via 110, it reduces the need for deposition equipment, saves material and time costs, and improves production yield. Furthermore, it allows the buffer layer 300 to actively fill the space between the conductive pillar 200 and the glass substrate 100, more effectively absorbing and releasing thermomechanical stress, thereby improving the product quality of the glass substrate 10 with conductive vias. Consequently, it also enhances the thermal fatigue resistance and long-term reliability of the chip packaging structure in this embodiment.

[0091] Based on the same inventive concept, this application also provides an electronic device, including the aforementioned chip packaging structure.

[0092] Because the aforementioned chip packaging structure has good product quality, the electronic device in this embodiment has high reliability.

[0093] In summary, this application provides a method for fabricating a glass substrate with conductive vias and a chip packaging structure. The method includes: providing a glass substrate 100, the glass substrate 100 including a first surface 101 and a second surface 102 opposite to each other; forming a first via 110 extending from the first surface 101 to the second surface 102 of the glass substrate 100; forming a conductive post 200 within the first via 110, with a gap between the conductive post 200 and the first via 110; and forming a buffer layer 300 between the conductive post 200 and the inner wall of the first via 110, the buffer layer 300 at least covering the inner wall of the first via 110 and the sidewall of the conductive post 200. This application, by fabricating the conductive post 200 first and then forming the buffer layer 300, avoids the difficult and costly step of directly depositing a high-quality insulating film within the first via 110, reduces the need for deposition equipment, saves material and time costs, and improves production yield. Meanwhile, this application enables the buffer layer 300 to actively fill the space between the conductive pillar 200 and the glass substrate 100, thereby more effectively absorbing and releasing thermomechanical stress and improving the product quality of the glass substrate 10 with conductive vias.

[0094] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0095] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for manufacturing a glass substrate with conductive through-holes, characterized in that, The method includes: A glass substrate is provided, the glass substrate including a first side and a second side opposite thereto; A first through hole is formed on the first surface of the glass substrate, extending to the second surface; A conductive post is formed within the first through hole; wherein, there is a gap between the conductive post and the inner wall of the first through hole; A buffer layer is formed between the conductive post and the inner wall of the first through hole; wherein the buffer layer at least covers the inner wall of the first through hole and the side wall of the conductive post.

2. The method according to claim 1, characterized in that, The step of forming a conductive pillar in the first through hole includes: Provide vehicles; A conductive substrate is provided; wherein the material of the conductive substrate includes a material that is conductive; The conductive substrate is adhered to one side of the carrier; The glass substrate is adhered to the conductive substrate on the side away from the carrier; A photoresist layer is uniformly coated inside the first through hole, at least covering the inner wall of the first through hole; The photoresist layer is photolithographically etched and developed using a mask with the conductive pillar pattern to form a second via on the photoresist layer; wherein the second via exposes a portion of the conductive substrate; The conductive pillar is formed in the second through hole by electroplating, at least covering the inner wall of the second through hole; After the step of forming a buffer layer between the conductive post and the inner wall of the first through hole, the method further includes: Debond the carrier and the conductive substrate; The conductive substrate is ground so that the edge of the conductive post exposed on the glass substrate is flush with the first and second surfaces of the glass substrate.

3. The method according to claim 2, characterized in that, The step of forming a buffer layer between the conductive post and the inner wall of the first through hole includes: Remove the photoresist layer to form a third through hole between the conductive pillar and the inner wall of the first through hole; For the third through hole, the buffer layer is formed by filling it with the material of the buffer layer and curing it.

4. The method according to claim 1, characterized in that, The step of forming a conductive pillar in the first through hole includes: Multiple spaced conductive pillars are formed within the first through hole; The step of forming a buffer layer between the conductive post and the inner wall of the first through hole includes: A buffer layer is formed between the conductive post and the inner wall of the first through hole, and between two adjacent conductive posts; wherein the buffer layer at least covers the inner wall of the first through hole and the side wall of the conductive post.

5. The method according to claim 1, characterized in that, The step of forming the first through hole extending from the first surface of the glass substrate to the second surface includes: For the glass substrate, the area corresponding to the first through hole is modified by laser induction; The glass substrate is immersed in an etching solution to form the first through hole; The etching solution on the surface of the glass substrate was cleaned with deionized water.

6. The method according to claim 2, characterized in that, The step of adhering the conductive substrate to one side of the carrier includes: A release layer is deposited on one side of the vehicle; An adhesive layer is bonded to one side of the conductive substrate, the material of the adhesive layer including a photosensitive material; The release layer and the adhesive layer are bonded together to connect the conductive substrate to the carrier; The step of unbonding the carrier and the conductive substrate includes: The carrier is separated from the conductive substrate by irradiating the adhesion layer with a laser.

7. The method according to claim 1, characterized in that, The conductive pillar is made of copper.

8. The method according to claim 1, characterized in that, The material of the buffer layer includes polyimide.

9. A chip packaging structure, characterized in that, The chip packaging structure includes a glass substrate with conductive vias manufactured by the method for manufacturing a glass substrate with conductive vias as described in any one of claims 1-8; the chip packaging structure also includes a chip disposed on the glass substrate with conductive vias.

10. An electronic device, characterized in that, Includes the chip packaging structure described in claim 9.

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