Heterojunction bipolar transistor structure and method of forming the same

Abstract

A heterojunction bipolar transistor structure and a forming method thereof, the method comprising: providing a substrate; forming a collector layer on the substrate, the collector layer comprising a first region and a second region; performing a first ion implantation on the first region to form a first ionized region, the ion concentration of the first ionized region being greater than that of the second region; forming a base layer and a collector electrode on the collector layer, the base layer being located above the second region of the collector layer, and the collector electrode being located above the first ionized region and electrically connected thereto; forming an emitter layer and a base electrode on the base layer, the emitter layer comprising a third region and a fourth region, and the base electrode being electrically connected to the base layer; performing a second ion implantation on the third region to form a second ionized region, the ion concentration of the second ionized region being greater than that of the fourth region; and forming an emitter electrode on the emitter layer, the emitter electrode being located above the second ionized region and electrically connected thereto. The above scheme can reduce the cost of the HBT epitaxial layer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a heterojunction bipolar transistor structure and a method for forming the same. Background Technology

[0002] A heterojunction bipolar transistor (HBT) is a type of bipolar transistor. Its emitter and base regions use different semiconductor materials, and the emitter junction (the PN junction between the emitter and base regions) forms a heterojunction. HBTs offer better high-frequency signal characteristics and base region emitter efficiency than conventional bipolar transistors, and can operate at signals up to hundreds of GHz. Therefore, HBTs are widely used in modern high-speed circuits, radio frequency systems, and mobile phones.

[0003] When a semiconductor comes into contact with a metal, a potential barrier layer is usually formed. However, when the semiconductor doping concentration is very high, electrons can tunnel through the barrier (also called a potential barrier, which is a blocking layer formed by the diffusion of electrons and holes in a PN junction; the potential energy difference on both sides is called the barrier) to form a low-resistance ohmic contact. Ohmic contacts are very important for semiconductor devices; forming a good ohmic contact is beneficial for current input and output.

[0004] In existing technologies, to form a good ohmic contact between the metal electrode and the semiconductor (specifically, between the collector and the collector layer, and between the emitter and the emitter layer), allowing electrons to more easily penetrate the potential barrier, the collector and the emitter are not in direct contact. Instead, one or more transition layers are typically formed between the collector and the collector layer, and between the emitter and the emitter layer. Taking the emitter electrode as an example, electrons from the emitter electrode are buffered by a transition layer with a gradually decreasing ion concentration before flowing to the emitter layer. This allows for the formation of a low-resistance ohmic contact between the emitter electrode and the emitter layer, maintaining good conductivity.

[0005] However, the above method requires the formation of multiple additional transition layers in the epitaxial layer, which increases the cost of the epitaxial layer. Summary of the Invention

[0006] The technical problem solved by the embodiments of the present invention is how to reduce the epitaxial layer cost of HBT while forming a low-resistance ohmic contact between the metal electrode and the semiconductor material.

[0007] To address the aforementioned technical problems, embodiments of the present invention provide a method for forming a heterojunction bipolar transistor structure, specifically comprising: providing a substrate; forming a collector layer on the substrate, the collector layer including a first region and a second region; performing a first ion implantation in the first region to form a first ionization region, the ion concentration of the first ionization region being greater than the ion concentration of the second region; forming a base layer and a collector electrode on the collector layer, the base layer being located above the second region of the collector layer, the collector electrode being located above the first ionization region and electrically connected to the first ionization region; forming an emitter layer and a base electrode on the base layer, the emitter layer including a third region and a fourth region, the base electrode being electrically connected to the base layer; performing a second ion implantation in the third region to form a second ionization region, the ion concentration of the second ionization region being greater than the ion concentration of the fourth region; and forming an emitter electrode on the emitter layer, the emitter electrode being located above the second ionization region and electrically connected to the second ionization region.

[0008] Optionally, the current collector layer further includes a fifth region located between the first ionization region and the second region; the method further includes performing a third ion implantation in the fifth region to form a third ionization region, wherein the ion concentrations of the first ionization region, the third ionization region, and the second region decrease sequentially.

[0009] Optionally, the emission layer further includes a sixth region located between the second ionization region and the fourth region; the method further includes: performing a fourth ion implantation in the sixth region to form a fourth ionization region, wherein the ion concentrations of the second ionization region, the fourth ionization region, and the fourth region decrease sequentially.

[0010] Optionally, the width of the collector electrode is smaller than the width of the first ionization region, and the difference between the width of the first ionization region and the width of the collector electrode is within a first preset range.

[0011] Optionally, the first preset range is 2 micrometers to 4 micrometers.

[0012] Optionally, the collector electrode is located within the surface region of the first ionization region.

[0013] Optionally, the width of the emitting electrode is smaller than the width of the second ionization region, and the difference between the width of the second ionization region and the width of the emitting electrode is within a second preset range.

[0014] Optionally, the second preset range is 2 micrometers to 4 micrometers.

[0015] Optionally, the emitting electrode is located within the surface region of the second ionization region.

[0016] This invention also provides a heterojunction bipolar transistor structure, comprising: a substrate; a collector layer located on the substrate, the collector layer including a first ionization region and a second region, the ion concentration of the first ionization region being greater than the ion concentration of the second region; a collector electrode located above the first ionization region and electrically connected to the first ionization region; a base layer located above the second region of the collector layer; a base electrode located on the base layer; an emitter layer located on the base layer, the emitter layer including a second ionization region and a fourth region, the ion concentration of the second ionization region being greater than the ion concentration of the fourth region; and an emitter electrode located above the second ionization region and electrically connected to the second ionization region.

[0017] Optionally, the heterojunction bipolar transistor structure further includes: a third ionization region located between the first ionization region and the second region, wherein the ion concentrations of the first ionization region, the third ionization region, and the second region decrease in that order.

[0018] Optionally, the heterojunction bipolar transistor structure further includes: a fourth ionization region located between the second ionization region and the fourth region, wherein the ion concentrations of the second ionization region, the fourth ionization region, and the fourth region decrease in that order.

[0019] Optionally, the width of the collector electrode is smaller than the width of the first ionization region, and the difference between the width of the first ionization region and the width of the collector electrode is within a first preset range.

[0020] Optionally, the width of the emitting electrode is smaller than the width of the second ionization region, and the difference between the width of the second ionization region and the width of the emitting electrode is within a second preset range.

[0021] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0022] This invention provides a method for forming a heterojunction bipolar transistor structure. The collector layer is divided into a first region and a second region, and the emitter layer is divided into a third region and a fourth region. A first ion implantation is performed in the first region (the region electrically connected to the collector electrode) to form a first ionized region, where the ion concentration is greater than that in the second region. A second ion implantation is then performed in the third region (the region electrically connected to the emitter electrode) to form a second ionized region, where the ion concentration is greater than that in the fourth region. By increasing the ion concentration in the electrically connected region between the emitter electrode and the emitter layer to form the second ionized region, and by increasing the ion concentration in the electrically connected region between the collector electrode and the collector layer to form the first ionized region, good ohmic contacts can be formed between the collector electrode and the first ionized region, and between the emitter electrode and the second ionized region. Since no additional transition layer is added, and the ion concentration is directly increased in the existing collector and emitter layers through ion implantation, the cost of the epitaxial layer can be reduced.

[0023] Furthermore, in this embodiment of the invention, a third ion implantation can be performed in a fifth region located between the first ionization region and the second region in the current collector layer to form a third ionization region, wherein the ion concentrations of the first ionization region, the third ionization region, and the second region decrease in that order. Additionally, a fourth ion implantation can be performed in a sixth region located between the second ionization region and the fourth region in the emitter layer to form a fourth ionization region, wherein the ion concentrations of the second ionization region, the fourth ionization region, and the fourth region decrease in that order. Thus, by forming two ionization regions with decreasing concentrations in the current collector layer and the emitter layer respectively, the epitaxial cost can be reduced while simultaneously enabling the formation of lower-resistance ohmic contacts between the current collector layer and the current collector electrode, and between the emitter layer and the emitter electrode, further improving conductivity.

[0024] Furthermore, in this embodiment of the invention, the width of the collector electrode can be controlled to be smaller than the width of the first ionization region, and the difference between the width of the first ionization region and the width of the collector electrode is within a first preset range. Similarly, the width of the emitter electrode can also be controlled to be smaller than the width of the second ionization region, and the difference between the width of the second ionization region and the width of the emitter electrode is within a second preset range. This allows for more sufficient electrical contact between the collector electrode and the first ionization region, and between the emitter electrode and the second ionization region, thereby improving conductivity efficiency.

[0025] Furthermore, in this embodiment of the invention, the collector electrode can be located within the surface region of the first ionization region, and the emitter electrode can be located within the surface region of the second ionization region. This allows the emitter electrode to be in complete electrical contact with the second ionization region and the collector electrode to be in complete electrical contact with the first ionization region, further improving conductivity efficiency. Attached Figure Description

[0026] Figure 1 This is a cross-sectional schematic diagram of a heterojunction bipolar transistor structure in the prior art;

[0027] Figure 2 This is a flowchart of a method for forming a heterojunction bipolar transistor structure according to an embodiment of the present invention;

[0028] Figures 3 to 8 This is a schematic diagram of the device cross-section corresponding to each step in the method for forming a heterojunction bipolar transistor structure in an embodiment of the present invention. Detailed Implementation

[0029] As mentioned earlier, ohmic contacts are crucial for semiconductor devices, and forming good ohmic contacts facilitates current input and output. Generally speaking, the lower the resistance of an ohmic contact, the better its conductivity.

[0030] In the prior art, in order to form a good ohmic contact between the metal electrode and the semiconductor (specifically, between the collector and the collector layer, and between the emitter and the emitter layer), so that electrons can more easily penetrate the potential barrier, the following methods are usually used:

[0031] One or more collector transition layers are formed between the collector electrode and the collector layer, with the ion concentration decreasing from the collector transition layer to the collector layer, and the collector transition layer is electrically connected to the collector electrode; one or more emitter transition layers are also formed between the emitter electrode and the emitter layer, with the ion concentration decreasing from the emitter transition layer to the emitter layer, and the emitter electrode is electrically connected to the emitter transition layer.

[0032] Reference Figure 1 , Figure 1 This is a cross-sectional schematic diagram of a heterojunction bipolar transistor structure in the prior art.

[0033] exist Figure 1 In the above, the heterojunction bipolar transistor structure (hereinafter referred to as HBT) may include a substrate 10, a first collector transition layer 11, a second collector transition layer 12, a collector layer 13, a collector C, a base layer 14, a base electrode B, an emitter layer 15, a first emitter transition layer 16, a second emitter transition layer 17, and an emitter A.

[0034] The first collector transition layer 11 is located on the substrate 10, the second collector transition layer 12 is located on the first collector transition layer 11, the collector layer 13 is located on the second collector transition layer 12, the base layer 14 is located on the collector layer 13, the emitter layer 15 is located on the base layer 14, the first emitter transition layer 16 is located on the emitter layer 15, and the second emitter transition layer 17 is located on the first emitter transition layer 16.

[0035] Collector C is embedded in collector layer 13, second collector transition layer 12 and first collector transition layer 11, and is electrically connected to first collector transition layer 11; base electrode B is embedded in base layer 14 and is electrically connected to base layer 14; emitter A is located on second emitter transition layer 17 and is electrically connected to second emitter transition layer 17.

[0036] The ion concentration of the first collector transition layer 11 is greater than that of the second collector transition layer 12, and the ion concentration of the second collector transition layer 12 is greater than that of the collector layer 13. That is, the ion concentrations of the first collector transition layer 11, the second collector transition layer 12, and the collector layer 13 decrease in that order.

[0037] The ion concentration of the second emission electrode transition layer 17 is greater than that of the first emission electrode transition layer 16, and the ion concentration of the first emission electrode transition layer 16 is greater than that of the emission layer 15. That is, the ion concentrations of the second emission electrode transition layer 17, the first emission electrode transition layer 16, and the emission layer 15 decrease in that order.

[0038] Therefore, in the existing HBT structure, the emitter electrode A is not directly electrically contacted with the emitter layer 15. Instead, two transition layers, a second emitter electrode transition layer 17 and a first emitter electrode transition layer 16, are added, with emitter electrode A electrically contacting the second emitter electrode transition layer 17. Similarly, the collector electrode C is not directly electrically contacted with the collector layer 13. Instead, two transition layers, a second collector electrode transition layer 12 and a first collector electrode transition layer 11, are added, with collector electrode C electrically contacting the first collector electrode transition layer 11. After the HBT is energized, electrons from the emitter electrode A flow towards the emitter layer 15 after passing through the buffer of the second emitter electrode transition layer 17 and the first emitter electrode transition layer 16, where the ion concentration gradually decreases. Likewise, electrons flowing out of the collector layer 13 flow towards the collector electrode C after passing through the buffer of the second collector electrode transition layer 12 and the first collector electrode transition layer 11, where the ion concentration gradually increases (electron flow direction is as follows). Figure 1 (Direction indicated by the middle arrow).

[0039] It is understandable that when the emitter electrode A contacts the second emitter electrode transition layer 17, a potential barrier is usually formed. However, because the ion doping concentration of the second emitter electrode transition layer 17 is high, electrons can tunnel through the barrier, thus allowing a low-resistance ohmic contact to be formed between the emitter electrode A and the second emitter electrode transition layer 17. Similarly, when the collector electrode C contacts the first collector electrode transition layer 11, a potential barrier is usually formed as well. However, because the ion doping concentration of the first collector electrode transition layer 11 is high, electrons can tunnel through the barrier, thus allowing a low-resistance ohmic contact to be formed between the collector electrode C and the first collector electrode transition layer 11.

[0040] However, the above method requires the formation of multiple additional transition layers in the epitaxial layer, which increases the cost of the epitaxial layer.

[0041] To address the aforementioned technical problems, embodiments of the present invention provide a method for forming a heterojunction bipolar transistor structure, specifically comprising: providing a substrate; forming a collector layer on the substrate, the collector layer including a first region and a second region; performing a first ion implantation in the first region to form a first ionization region, the ion concentration of the first ionization region being greater than the ion concentration of the second region; forming a base layer and a collector electrode on the collector layer, the base layer being located above the second region of the collector layer, the collector electrode being located above the first ionization region and electrically connected to the first ionization region; forming an emitter layer and a base electrode on the base layer, the emitter layer including a third region and a fourth region, the base electrode being electrically connected to the base layer; performing a second ion implantation in the third region to form a second ionization region, the ion concentration of the second ionization region being greater than the ion concentration of the fourth region; and forming an emitter electrode on the emitter layer, the emitter electrode being located above the second ionization region and electrically connected to the second ionization region.

[0042] Therefore, in this embodiment of the invention, by increasing the ion concentration in the electrical connection region between the emitter electrode and the emitter layer to form the first ionization region, and by increasing the ion concentration in the electrical connection region between the collector electrode and the collector layer to form the second ionization region, good ohmic contacts can be formed between the collector electrode and the first ionization region, and between the emitter electrode and the second ionization region. Since no additional transition layer is added, but the ion concentration is directly increased in the existing collector layer and emitter layer by ion implantation, the cost of the epitaxial layer can be reduced.

[0043] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0044] Reference Figure 2This is a flowchart illustrating a method for forming a heterojunction bipolar transistor structure according to an embodiment of the present invention. The method may include steps S21 to S27:

[0045] Step S21: Provide a substrate;

[0046] Step S22: A current collector layer is formed on the substrate, the current collector layer including a first region and a second region;

[0047] Step S23: Perform first ion implantation in the first region to form a first ionization region, wherein the ion concentration in the first ionization region is greater than the ion concentration in the second region;

[0048] Step S24: A base layer and a collector electrode are formed on the current collector layer, wherein the base layer is located above the second region of the current collector layer, and the collector electrode is located above the first ionization region and is electrically connected to the first ionization region;

[0049] Step S25: An emitter layer and a base electrode are formed on the base layer, the emitter layer including a third region and a fourth region, and the base electrode and the base layer are electrically connected;

[0050] Step S26: Perform a second ion implantation in the third region to form a second ionization region, wherein the ion concentration in the second ionization region is greater than the ion concentration in the fourth region;

[0051] Step S27: An emission electrode is formed on the emission layer, the emission electrode being located above the second ionization region and electrically connected to the second ionization region.

[0052] The following is combined Figures 3 to 8 The above steps are explained in detail.

[0053] Reference Figure 3 A substrate 200 is provided, and a current collector layer 300 is formed on the substrate 200. The current collector layer 300 includes a first region 301 and a second region 302. A first ion implantation is performed in the first region 301 to form a first ionization region 301'. The ion concentration of the first ionization region 301' is greater than the ion concentration of the second region 302.

[0054] The substrate 200 can be a gallium arsenide substrate, or it can be formed using other conventional materials, such as silicon, germanium, silicon germanide, silicon carbide, or indium gallium ionide. Furthermore, a substrate transition layer (not shown in the figure) may be included between the substrate 200 and the current collector layer 300. This embodiment of the invention does not limit the materials used to form the substrate 200 and the substrate transition layer.

[0055] The method of performing the first ion implantation in the first region 301 can be a conventional process in the prior art of performing ion implantation in the current collector layer to increase the ion concentration, and the embodiments of the present invention do not limit this.

[0056] Reference Figure 4 A base layer 400 and a collector C are formed on the current collector layer 300. The base layer 400 is located above the second region 302 of the current collector layer 300, and the collector C is located above the first ionization region 301' and is electrically connected to the first ionization region 301'.

[0057] In specific implementations, the method for forming the base layer 400 and the collector C on the current collector layer 300 can be, for example, forming the base layer 400 on the current collector layer 300 first, then etching away the base layer region above the first ionization region 301' of the current collector layer 300, and then depositing the collector C. Alternatively, the collector C can be deposited above the first ionization region 301' of the current collector layer 300 first, and then the base layer 400 can be formed above the second region 302 of the current collector layer 300. Or, other methods can be used to form the base layer 400 and the collector C. This embodiment of the invention does not limit this approach.

[0058] Furthermore, the width of the collector C is smaller than the width of the first ionization region 301', and the difference between the width of the first ionization region 301' and the width of the collector C is within a first preset range.

[0059] The width direction of the collector C and the width direction of the first ionization region 301' can be parallel to the surface of the substrate 200.

[0060] In some non-limiting embodiments, the first preset interval is 2 μm to 4 μm.

[0061] In this embodiment of the invention, by controlling the width of the collector C to be smaller than the width of the first ionization region 301', and ensuring that the difference between the width of the first ionization region 301' and the width of the collector C is within a reasonable range, the electrical contact between the collector C and the first ionization region 301' can be made more sufficient, thereby improving the efficiency of the conductor.

[0062] Furthermore, the collector C can be located within the surface region of the first ionization region 301'. This allows the collector C to maintain complete electrical contact with the first ionization region 301', further improving conductivity.

[0063] Reference Figure 5An emitter layer 500 and a base electrode B are formed on the base layer 400. The emitter layer 500 includes a third region 501 and a fourth region 502. The base electrode B is electrically connected to the base layer 400. A second ion implantation is performed in the third region 501 to form a second ionization region 501'. The ion concentration of the second ionization region 501' is greater than the ion concentration of the fourth region 502.

[0064] The second ion implantation in the third region 501 can be performed using conventional techniques such as ion implantation in the emitter layer to increase ion concentration. This embodiment of the invention does not limit this process.

[0065] In specific implementations, the method for forming the emitter layer 500 and the base electrode B on the base layer 400 can be, for example, forming the emitter layer 500 on the base layer 400 first, then etching away a portion of the emitter layer 500, and finally depositing the base electrode B. Alternatively, the base electrode B can be deposited at a predetermined location on the base layer 400 first, and then the emitter layer 500 can be formed at other locations on the base layer 400. Other methods can also be used to form the emitter layer 500 and the base electrode B. This embodiment of the invention does not limit this approach.

[0066] The ions injected in the third region 501 of the emitter layer 500 and the ions injected in the first region 301 of the collector layer 300 may be the same or different.

[0067] Reference Figure 6 An emission electrode A is formed on the emission layer 500. The emission electrode A is located above the second ionization region 501' and is electrically connected to the second ionization region 501'.

[0068] Furthermore, the width of the emitting electrode A is smaller than the width of the second ionization region 501', and the difference between the width of the second ionization region 501' and the width of the emitting electrode A is within a second preset range.

[0069] The width direction of the emitting electrode A and the width direction of the second ionization region 501' can be parallel to the surface of the substrate 200.

[0070] In some non-limiting embodiments, the second preset range is 2 μm to 4 μm.

[0071] In this embodiment of the invention, by controlling the width of the emitting electrode A to be smaller than the width of the second ionization region 501', and ensuring that the difference between the width of the second ionization region 501' and the width of the emitting electrode A is within a reasonable range, the electrical contact between the emitting electrode A and the second ionization region 501' can be made more sufficient, thereby improving the efficiency of the conductor.

[0072] Furthermore, the emitting electrode A is located within the surface region of the second ionization region 501'. This allows the emitting electrode A to maintain complete electrical contact with the second ionization region 501', further improving conductivity.

[0073] Reference Figure 7 The current collector layer 300 may further include a fifth region 303 located between the first ionization region 301' and the second region 302; the method of forming the HBT may further include: performing a third ion implantation in the fifth region 303 to form a third ionization region 303', wherein the ion concentrations of the first ionization region 301', the third ionization region 303', and the second region 302 decrease sequentially.

[0074] In some embodiments, it is possible to Figure 3 After the current collector layer 300 is formed on the substrate 200, and before or after the first ion implantation is performed in the first region 301 of the current collector layer 300 to form the first ionization region 301', a third ion implantation is performed in the fifth region 303 of the current collector layer 300 to form the third ionization region 303'.

[0075] In this embodiment of the invention, by forming two ionization regions with different ion concentrations in the current collector layer 300, namely, the first ionization region 301' and the third ionization region 303', with the first ionization region 301' having the highest ion concentration and being electrically in contact with the collector electrode C, electrons flowing out of the base layer 400 sequentially pass through the second region 302, the third ionization region 303', and the first ionization region 301' of the current collector layer 300, which have increasing ion concentrations, before flowing to the collector electrode C. Thus, by directly performing ion implantation in the original structure to form multiple transition regions for buffering, it is possible to reduce epitaxial costs while simultaneously creating a lower-resistance ohmic contact between the current collector layer 300 and the collector electrode C, further improving conductivity.

[0076] Reference Figure 8 The emitter layer 500 may further include a sixth region 503 located between the second ionization region 501' and the fourth region 502; the method of forming the HBT may further include: performing a fourth ion implantation in the sixth region 503 to form a fourth ionization region 503', wherein the ion concentrations of the second ionization region 501', the fourth ionization region 503', and the fourth region 502 decrease sequentially.

[0077] In some embodiments, it is possible to Figure 5After the base layer 500 is formed on the base layer 400, and before or after the second ion implantation is performed in the third region 501 of the emitter layer 500 to form the second ionization region 501', a fourth ion implantation is performed in the sixth region 503 of the emitter layer 500 to form the fourth ionization region 503'.

[0078] In this embodiment of the invention, by forming two ionization regions with different ion concentrations in the emitter layer 500, namely, the second ionization region 501' and the fourth ionization region 503', and the second ionization region 501', which is electrically in contact with the emitter electrode A, has the highest ion concentration, so that the electrons flowing out of the emitter electrode A do not flow directly to the base layer 400, but instead pass sequentially through the second ionization region 501', the fourth ionization region 503', and the fourth region 502 of the emitter layer with decreasing ion concentrations, and then flow to the base layer 400 (electron flow direction as follows). Figure 8 (Indicated by the direction of the middle arrow). Thus, by directly implanting ions into the existing structure to form multiple transition regions for buffering, it is possible to reduce epitaxial costs while simultaneously creating a lower-resistance ohmic contact between the emitter layer 500 and the emitter electrode A, thereby further improving conductivity.

[0079] This invention also discloses a heterojunction bipolar transistor structure, referring to... Figure 8 The device may include: a substrate 200; a current collector layer 300 located on the substrate 200, the current collector layer 300 including a first ionization region 301' and a second region 302, the ion concentration of the first ionization region 301' being greater than the ion concentration of the second region 302; a current collector C located on the current collector layer 300, above the first ionization region 301', and electrically connected to the first ionization region 301'; a base layer 400 located above the second region 302 of the current collector layer 300; a base electrode B located on the base layer 400; an emitter layer 500 located on the base layer 400, the emitter layer 500 including a second ionization region 501' and a fourth region 502, the ion concentration of the second ionization region 501' being greater than the ion concentration of the fourth region 502; and an emitter A located on the emitter layer 500, above the second ionization region 501', and electrically connected to the second ionization region 501'.

[0080] In this embodiment of the invention, by increasing the ion concentration in the electrical connection region between the emitter electrode A and the emitter layer 500, the second ionization region 501' is formed; and by increasing the ion concentration in the electrical connection region between the collector electrode C and the collector layer 300, the first ionization region 301' is formed. This allows for the formation of good ohmic contacts between the collector electrode C and the first ionization region 301', and between the emitter electrode A and the second ionization region 501'. Since no additional transition layer is added, and the ion concentration is directly increased in the existing collector and emitter layers via ion implantation, the cost of the epitaxial layer can be reduced.

[0081] Furthermore, the heterojunction bipolar transistor structure further includes a third ionization region 303' located between the first ionization region 301' and the second region 302, wherein the ion concentrations of the first ionization region 301', the third ionization region 303', and the second region 302 decrease sequentially.

[0082] Furthermore, the heterojunction bipolar transistor structure further includes a fourth ionization region 503' located between the second ionization region 501' and the fourth region 502, wherein the ion concentrations of the second ionization region 501', the fourth ionization region 503', and the fourth region 502 decrease sequentially.

[0083] Furthermore, the width of the collector C is smaller than the width of the first ionization region 301', and the difference between the width of the first ionization region 301' and the width of the collector C is within a first preset range.

[0084] Furthermore, the width of the emitting electrode A is smaller than the width of the second ionization region 501', and the difference between the width of the second ionization region 501' and the width of the emitting electrode A is within a second preset range.

[0085] For the principles, specific implementation, and beneficial effects of this heterojunction bipolar transistor structure, please refer to the previous description of the formation method of the heterojunction bipolar transistor structure; it will not be repeated here.

[0086] It should be noted that, in the embodiments of the present invention, Figure 2 The sequence numbers of each step and the above appendix Figures 3 to 8 The order of description does not imply a limitation on the fabrication process of the heterojunction bipolar transistor structure. In practice, those skilled in the art can use other appropriate methods to form the epitaxial layers, metal electrodes, and ionization regions of the heterojunction bipolar transistor structure according to actual needs. For example, the heterojunction bipolar transistor structure can be formed using the following steps:

[0087] (1) Provide a substrate 200, and form the current collector layer 300, base layer 400 and emitter layer 500 on the substrate 200 layer by layer.

[0088] (2) Forming the second ionization region 501' and the emission electrode A may specifically include: first implanting ions into the third region 501 of the emission layer 500 to form the second ionization region 501', and depositing the emission electrode A on the second ionization region 501'; etching away the other regions of the emission layer 500 (i.e., the regions in the emission layer 500 other than the second ionization region 501' and the fourth region 502), and depositing a layer of silicon nitride.

[0089] (3) Forming base electrode B: The position of base electrode B is exposed and etched in the emitter layer 500, and base electrode B is deposited, and then a layer of silicon nitride is deposited.

[0090] (4) Etch away the silicon nitride on the first region 301 of the collector layer 300, implant ions into the first region 301 to form the first ionization region 301', then deposit the collector electrode C on the first ionization region 301', and then deposit another layer of silicon nitride.

[0091] (5) Finally, the silicon nitride on the three metal electrodes, namely emitter electrode A, base electrode B and collector electrode C, can be etched away to expose each metal electrode.

[0092] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article indicates that the preceding and following related objects have an "or" relationship.

[0093] In the embodiments of this application, "multiple" refers to two or more.

[0094] The descriptions of "first," "second," etc., appearing in the embodiments of this application are for illustrative purposes and to distinguish the objects being described. They have no order and do not indicate any special limitation on the number of devices in the embodiments of this application, nor do they constitute any limitation on the embodiments of this application.

[0095] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method of forming a heterojunction bipolar transistor structure, comprising: The method comprises: providing a substrate; forming a collector layer on the substrate, the collector layer comprising a first region and a second region; performing a first ion implantation on the first region to form a first ionized region, the ion concentration of the first ionized region being greater than that of the second region; forming a base layer and a collector electrode on the collector layer, the base layer being located above the second region of the collector layer, and the collector electrode being located above the first ionized region and electrically connected to the first ionized region; forming an emitter layer and a base electrode on the base layer, the emitter layer comprising a third region and a fourth region, the base electrode being electrically connected to the base layer; performing a second ion implantation on the third region to form a second ionized region, the ion concentration of the second ionized region being greater than that of the fourth region; forming an emitter electrode on the emitter layer, the emitter electrode being located above the second ionized region and electrically connected to the second ionized region.

2. The method of claim 1, wherein, The collector layer further comprises: a fifth region located between the first ionized region and the second region; The method further comprises: performing a third ion implantation on the fifth region to form a third ionized region, the ion concentrations of the first ionized region, the third ionized region, and the second region decreasing in order.

3. The method of claim 1 or 2, wherein, The emitter layer further comprises: a sixth region located between the second ionized region and the fourth region; The method further comprises: performing a fourth ion implantation on the sixth region to form a fourth ionized region, the ion concentrations of the second ionized region, the fourth ionized region, and the fourth region decreasing in order.

4. The method of claim 1, wherein, The width of the collector electrode is less than the width of the first ionized region, and the difference between the width of the first ionized region and the width of the collector electrode is within a first preset interval.

5. The method of claim 4, wherein, The first preset interval is 2-4 microns.

6. The method of claim 4, wherein, The collector electrode is located within a surface region of the first ionized region.

7. The method of claim 1, wherein, The width of the emitter electrode is less than the width of the second ionized region, and the difference between the width of the second ionized region and the width of the emitter electrode is within a second preset interval.

8. The method of claim 7, wherein, The second preset interval is 2-4 microns.

9. The method of claim 7, wherein, The emitter electrode is located within a surface region of the second ionized region.

10. A heterojunction bipolar transistor structure, characterized by The method comprises: a substrate; a collector layer located on the substrate, the collector layer comprising a first ionized region and a second region, the first ionized region and the second region being located in the same layer, the ion concentration of the first ionized region being greater than that of the second region; a collector electrode located above the first ionized region and electrically connected to the first ionized region; a base layer located above the second region of the collector layer; a base electrode located on the base layer; an emitter layer located on the base layer, the emitter layer comprising a second ionized region and a fourth region, the second ionized region and the fourth region being located in the same layer, the ion concentration of the second ionized region being greater than that of the fourth region; an emitter electrode located above the second ionized region and electrically connected to the second ionized region.

11. The heterojunction bipolar transistor structure of claim 10, wherein the base region is formed of a material having a bandgap that is less than the bandgap of the collector region. The heterojunction bipolar transistor structure further comprises: A third ionized region is located between the first ionized region and the second region, and ion concentrations of the first ionized region, the third ionized region, and the second region decrease in turn.

12. The heterojunction bipolar transistor structure of claim 10 or 11, wherein the base region is formed of a material having a bandgap that is smaller than the bandgap of the emitter region. The heterojunction bipolar transistor structure further comprises: A fourth ionized region is located between the second ionized region and the fourth region, and ion concentrations of the second ionized region, the fourth ionized region, and the fourth region decrease in turn.

13. The heterojunction bipolar transistor structure of claim 10, wherein the base region is formed of a material having a bandgap that is less than the bandgap of the collector region. The width of the collector electrode is less than the width of the first ionized region, and a difference between the width of the first ionized region and the width of the collector electrode is within a first preset interval.

14. The heterojunction bipolar transistor structure of claim 10, wherein the base region is formed of a material having a bandgap that is less than the bandgap of the collector region. The width of the emitter electrode is less than the width of the second ionized region, and a difference between the width of the second ionized region and the width of the emitter electrode is within a second preset interval.

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