A Low-Complexity Time Mismatch Error Calibration Method for TIADC

Abstract

This invention provides a low-complexity TIADC time mismatch error calibration method, belonging to the fields of digital signal processing and high-speed, high-precision TIADC technology. It solves the most difficult problem in TIADC systems: estimating and calibrating time mismatch. The technical solution includes the following steps: S1: Converting a continuous external input analog signal into M channels of digital signals; S2: Combining them into a single signal y[n]; S3: Obtaining the calibrated output signals of each ADC channel; S4: Estimating the residual time mismatch error of each ADC channel; S5: Feeding the estimated time mismatch error signal back to the serial improved Taylor compensation calibration module as input. The beneficial effects of this invention are: when the 16-bit TIADC input signal frequency is within the entire Nyquist band, after third-order calibration, the average SFDR of the TIADC system is improved by 56.2 dB, and the average SNR is improved by 55.6 dB.

Description

Technical Field

[0001] This invention relates to the fields of digital signal processing and high-speed, high-precision TIADC technology, and in particular to a low-complexity TIADC time mismatch error calibration method. Background Technology

[0002] With the widespread application of digital signal processing technology in digital receivers, military radar, and test instrument acquisition, analog-to-digital converters (ADCs), serving as a bridge between analog and digital signals, are becoming increasingly important. However, due to limitations in semiconductor materials and manufacturing processes, it is difficult for a single ADC to simultaneously achieve high speed and high accuracy. The advent of the time-alternating analog-to-digital converter (TIADC) has made high-speed and high-precision implementation possible. Its principle involves using several identical, low-speed, high-precision ADCs to alternately sample the same analog input signal x(t). Ideally, this method can not only maintain the original ADC accuracy but also significantly increase the sampling rate.

[0003] However, due to the non-ideal characteristics of the circuit and the mismatch between different channels of the TIADC, many mismatch errors exist within the channels of the assembled TIADC system. If these mismatch errors are not calibrated, they will severely impact the dynamic performance of the entire TIADC system. Current calibration methods show that time mismatch is more difficult to detect and calibrate than gain mismatch and bias mismatch. Therefore, eliminating time mismatch errors in TIADC has become a hot research topic both domestically and internationally.

[0004] Currently, for the estimation and calibration of time mismatch error in TIADCs, the literature WANG CY, WU J T. A Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detection[J]. Circuits and Systems I: Regular Papers, IEEE Transactions on, 2009, 56(6): 1102-1114. proposes an error estimation algorithm based on zero-crossing statistics. However, this method increases hardware costs and introduces new circuit errors due to the addition of extra comparator circuits. In the literature YUE XZ, SHANG LZ, YONGC L, et al. Timing Mismatch Compensation in Time-Interleaved ADCs Based on Multichannel Lagrange Polynomial Interpolation[J]. IEEE Transactions on Instrumentation & Measurement, 2011, 60(4): 1123-1131. Digital interpolation filters are used to compensate for the mismatch error. However, once the mismatch error parameters change, the filter parameters must also be changed. This method is obviously not conducive to real-time calibration of the mismatch error. The literature CHEN S, WANG L, ZHANG H, et al. All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters[J]. IEEE Transactions on Very Large Scale Integration Systems, 2017, 25(9): 2552-2560 proposes a Farrow structure filter to calibrate the mismatch error. Although this method reduces hardware consumption to some extent, the calibration effect usually becomes unsatisfactory when the system input signal is at a high frequency.In the literature: JAMAL SM, FU D, SINGH MP, et al. Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter[J]. Circuits and Systems I: Regular Papers, IEEE Transactions on, 2004, 51(1):130-139., a calibration method for the Hilbert filter is proposed, but this method is only applicable to 2 channels and cannot be extended to arbitrary channels, which to some extent limits the sampling rate of the entire system. In the literature: ELBORNSSON J, GUSTAFSSON F, EKLUND J E. Blind equalization of time errors in a time-interleaved ADC system[J]. IEEE Transactions on Signal Processing, 2005, 53(4):1413-1424., a blind estimation algorithm is proposed. Its significant advantage is that it does not require knowledge of the relevant information of the input signal, but it requires that the spectrum of the input signal has sparse characteristics, and the calculation process is cumbersome, which is generally not conducive to engineering implementation. The literature, Wang Yajun, Li Ming. Adaptive Correction Method for TIADC Channel Error [J]. Journal of Xi'an University of Electronic Science and Technology, 2013, 40(03):27-35, proposes a calibration method that introduces a reference channel. This method not only requires an extra ADC reference channel, but also the convergence speed is related to the ADC accuracy of the reference channel, and the calibration effect is generally poor. In addition, most existing TIADC channel mismatch calibration methods are only applicable to TIADC systems with an accuracy of less than 14 bits. For higher-precision TIADC systems (16 bits and above), the application is rare, and the applicability has not yet been verified.

[0005] How to solve the above problems is the subject of this invention. Summary of the Invention

[0006] The purpose of this invention is to provide a low-complexity time mismatch error calibration method for TIADCs; it solves the most difficult problem in estimating and calibrating time mismatch in TIADC systems; when the 16-bit TIADC input signal frequency is within the entire Nyquist band, after third-order calibration, the average SFDR of the TIADC system is improved by 56.2 dB, and the average SNR is improved by 55.6 dB. Compared with the traditional Taylor compensation method, it further reduces the hardware implementation scale.

[0007] To achieve the above-mentioned objectives, the present invention employs the following technical solution: a low-complexity TIADC time mismatch error calibration method, comprising the following components:

[0008] The clock divider module is used to generate the sampling clock signal for each sub-ADC channel in TIADC;

[0009] The analog-to-digital converter module is used to convert continuous analog signals input from the outside into digital signals via an ADC.

[0010] The data merging module is used to output multiple signals as a single signal.

[0011] The error estimation module uses linear approximation and statistical methods to extract the time mismatch error of each ADC channel;

[0012] The error calibration module uses a serial improved Taylor compensation method to calibrate the time mismatch error of each channel ADC.

[0013] A low-complexity TIADC time mismatch error calibration method includes the following steps:

[0014] S1: Under the control of the clock divider module, the analog-to-digital converter module converts the continuously input analog signal x(t) into M channels of digital signals y1[n], y2[n], ..., y... m [n],…y M [n], and pass it to the data composite module; m = 1, 2, ..., M;

[0015] Where: y m [n] represents the actual sampled value of the m-th ADC channel, where m = 1, 2, ..., M;

[0016] S2: Use a data composite module to process the digital signals y1[n], y2[n], ..., y of the M channels of the TIADC system. m [n],…y M [n] are combined into a single signal y[n], and the combined y[n] is then transmitted to the error calibration module;

[0017] Where: m = 1, 2, ..., M;

[0018] S3: The TIADC combined signal y[n] is calibrated using an error calibration module based on serial improved Taylor compensation. The calibrated combined signal is then... After a certain delay and M-fold downsampling, the calibrated output signals of each ADC are obtained respectively. And pass it to the error estimation module;

[0019] in: This represents the calibrated digital signal of the m-th ADC channel, where m = 1, 2, ..., M;

[0020] S4: An error estimation module based on linear approximation and statistics is used to estimate the residual time mismatch error of each ADC channel. Channel ADC1 is used as the reference channel, and it is assumed that channel ADC1 has no time mismatch error. M-1 time mismatch errors Δt2, Δt3, ..., Δt are obtained. m , …, Δt M The obtained M-1 time mismatch errors are transmitted together with data 0 to the data compositing module;

[0021] Where: Δt m This represents the time mismatch error of the m-th channel ADC, where m = 2, 3, ..., M;

[0022] S5: Use the data compositing module to combine 0, Δt2, Δt3, ..., Δt m , …, Δt M Combined into a single signal, and the combined [0, Δt2, Δt3, ..., Δt] is then used to generate a single signal. m , …, Δt M The signal is fed back to the serial improved Taylor compensation calibration module as input.

[0023] Step S3 specifically includes the following steps:

[0024] S3.1: For the actual sampled value y of the m-th channel ADC m Expanded using Taylor series, it is:

[0025]

[0026] Where: x m (t) represents the ideal sampled value of the m-th channel ADC. Δt represents the l-th derivative of the ideal sampled value of the m-th ADC channel. m Let l represent the time mismatch error of the m-th ADC channel; l is the order of the time mismatch error expansion.

[0027] S3.2: Based on step S3.1, the actual sampled value y of the m-th channel ADC m Expanded into ideal sampled value x m (t) and the time mismatch error polynomial The sum is in the form of a sum; generally speaking, the error energy contained in higher-order error terms is smaller, or even negligible.

[0028] Ignoring polynomials with time mismatch errors of order higher than 4, the expression in step S3.1 can be rewritten as follows:

[0029]

[0030] Where: x m (t) represents the ideal sampled value of the m-th ADC channel, x′ m (t), x″ m (t), x″′ m (t), These are the 1st, 2nd, 3rd, and 4th derivatives of the ideal sampled value of the m-th ADC channel, respectively.

[0031] Because during error calibration, the ideal sampled value x of the m-th channel... m (t) is unknown, therefore it cannot be obtained. The actual sampled value y of the m-th channel ADC can be used. m to replace x m (t), thus approximately obtaining

[0032] S3.3: Eliminate the first-order error term by subtracting the estimated value Δt of the first-order error term from the expression in step S3.2. m y′ m The output of the m-th channel ADC after first-order error compensation is obtained. for:

[0033]

[0034] S3.4: Eliminate the second-order error term for Δt m y′ m Find the first derivative and multiply by get:

[0035]

[0036] S3.5: The output after first-order error compensation Subtracting the expression from step S3.4 yields the output after second-order error compensation. for:

[0037]

[0038] S3.6: Eliminate the third-order error term, for Find the first derivative and multiply by get:

[0039]

[0040] S3.7: The output after second-order error compensation Subtracting the expression from step 3.6 yields the output after third-order error compensation. for:

[0041]

[0042] Step S4 specifically includes the following steps:

[0043] S4.1: Let the actual sampled values ​​of the m-th and m+1-th channels of the TIADC system be y respectively. m [n] and y m+1 [n];

[0044] Based on the principle of linear approximation, the actual difference D between adjacent sub-ADC channels is... m Approximately the actual sampling time interval T between adjacent sub-ADC channels s +ΔT m+1 -ΔT m Multiply by the derivative y′ of the sub-ADC channel output m [n]; m = 1, 2, ..., M;

[0045] For a 4-channel TIADC, the following approximate formula exists:

[0046]

[0047] Wherein: T s y′ represents the sampling period of TIADC. m [n] represents the derivative of the actual sampled value of the m-th channel ADC.

[0048] Where ΔT m (ΔT m =Δt m T s ) and ΔT m+1 (ΔT m+1 =Δt m+1 T s ) represent the time mismatch error of the m-th and m+1-th channels, respectively;

[0049] S4.2: The difference D between the expression in step S4.1 and the expression in step S4.1. m Given m = 1, 2, 3, 4; taking the absolute value and calculating the expected value, we get:

[0050]

[0051] Where: E represents the expected value;

[0052] S4.3: For a generalized stationary signal, the expected value of its own derivatives and other derivatives is a constant and time-invariant. In this experiment, each sub-ADC in the TIADC samples the same analog input sinusoidal signal x(t). Therefore, it is assumed that the expected value of the derivative output by each sub-ADC is the same as the expected value of the derivative of the original input signal x(t), i.e.:

[0053] E(|y′ m[n]|)=E(|x′(t)D=δ

[0054] Where: E(|y′) m [n]|) represents the expectation of the absolute value of the derivative of the m-th channel ADC output, E(|x′(t)|) represents the expectation of the absolute value of the derivative of the input signal, and δ represents a constant;

[0055] S4.4: Substituting the expression from step 4.3 into the expression from step 4.2, we get:

[0056]

[0057] S4.5: Based on the expression in step S4.4, A m , m = 1, 2, 3, 4; is an approximate function of the actual sampling time interval between adjacent sub-ADC channels;

[0058] Considering that the sum of the time intervals of all adjacent sub-ADC channels is a constant MT s ;

[0059] Where: M is the number of sub-ADC channels in TIADC;

[0060] Each A m By adding the values ​​together and averaging them, we get the following formula:

[0061]

[0062] S4.6: Based on the expression in step S4.5, It is related to the entire system sampling period T s Proportional, but mismatched with time ΔT m Irrelevant; subtracting the expression in step 4.4 from the expression in step 4.5 yields the quantity related to time mismatch error:

[0063]

[0064] S4.7: Use the Least Mean Square (LMS) method to analyze Δt m The iteration is performed, and the iteration formula is as follows:

[0065] Δt m (n+1)=Δt m (n)+μ×B m

[0066] Where: Δt m (n) The time mismatch error value at the previous moment; Δt m (n+1) is the time mismatch error value at the next time step; μ is the iteration step size of the algorithm.

[0067] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0068] (1) The time mismatch error calibration scheme of TIADC proposed in this invention is completed entirely in the digital domain, while most traditional calibration schemes are completed in the mixed digital-analog domain or analog domain, which are easily affected by external environmental factors such as temperature.

[0069] (2) When the input signal is at a low frequency, f in / f s =0.11, f s =500MHz. Before calibration, there were many spurious spectra, with a spurious-free dynamic range (SFDR) of 46.2dB, a signal-to-noise ratio (SNR) of 42.2dB, and an effective number of bits (ENOB) of 6.72. After third-order calibration, most of the spurious spectra were suppressed, with a spurious-free dynamic range (SFDR) of 104.1dB, an SNR of 96.3dB, and an effective number of bits (ENOB) of 15.7. When the input signal is at a higher frequency, f in / fs = 0.347, f s =500MHz. Before calibration, there were many spurious spectra, with a spurious-free dynamic range (SFDR) of 36.1dB, a signal-to-noise ratio (SNR) of 32.3dB, and an effective number of bits (ENOB) of 5.07. After third-order calibration, most of the spurious spectra were suppressed, with a spurious-free dynamic range (SFDR) of 97.1dB, an SNR of 93.5dB, and an effective number of bits (ENOB) of 15.23. When the input signal spanned the entire Nyquist band, the average SFDR improved by 58.4dB and the average SNR improved by 55.7dB after third-order calibration. Finally, when the input signal had multiple frequencies, f in / fs = 0.147, 0.247, 0.347, f in =500MHz, after third-order calibration, most of the spurious spectrum was suppressed.

[0070] (3) The error estimation module proposed in this invention adopts linear approximation and statistical methods. This method only contains addition and subtraction operations and does not involve multiplication operations, which reduces hardware resource consumption and algorithm complexity to a certain extent.

[0071] (4) The error calibration module proposed in this invention adopts a serial improved Taylor compensation structure, which uses fewer adders, multipliers, and differentiators compared to the traditional Taylor compensation structure. For example, for a four-channel TIADC, the improved Taylor compensation structure uses 15 fewer differentiators, 31 fewer multipliers, and 15 fewer adders than the traditional Taylor compensation structure. Similarly, if the number of TIADC channels continues to increase, resource consumption will be reduced even more.

[0072] (5) In the calibration scheme proposed in this invention, the estimation module and the calibration module together constitute a feedback calibration structure, which can realize real-time estimation and calibration of mismatch error.

[0073] (6) The calibration scheme proposed in this invention can be extended to any M-channel TIADC system, which is very suitable for engineering applications. Attached Figure Description

[0074] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof.

[0075] Figure 1 This is a schematic diagram of the system structure of the present invention;

[0076] Figure 2 The following is a structural diagram of the TIADC system of the present invention: (a) is the schematic diagram of TIADC, and (b) is the timing diagram of TIADC.

[0077] Figure 3 This is a waveform diagram of adjacent sub-channel ADC sampling in the TIADC of the present invention;

[0078] Figure 4 This is a schematic diagram illustrating the principle of time mismatch error extraction using a four-channel TIADC according to the present invention.

[0079] Figure 5 This is a diagram of the improved three-stage cascaded Taylor compensation structure of the present invention;

[0080] Figure 6 This is an overall block diagram of the four-channel TIADC time mismatch error calibration algorithm of the present invention;

[0081] Figure 7 This is the output spectrum diagram of the four-channel TIADC of the present invention before and after third-order correction at low-frequency input.

[0082] (a) is the plot before calibration, (b) is the first-order calibration plot, (c) is the second-order calibration plot, and (d) is the third-order calibration plot.

[0083] Figure 8 This is the output spectrum diagram of the four-channel TIADC of the present invention before and after third-order correction at high-frequency input.

[0084] (a) is the plot before calibration, (b) is the first-order calibration plot, (c) is the second-order calibration plot, and (d) is the third-order calibration plot.

[0085] Figure 9 This invention describes the changes in SFDR and SNR of the four-channel TIADC before and after third-order calibration at different input frequencies.

[0086] Figure 10 The output spectrum diagrams of the four-channel TIADC of the present invention before and after third-order correction under multi-frequency input are shown below.

[0087] (a) is the image before calibration, (b) is the first-order calibration image, (c) is the second-order calibration image, and (d) is the third-order calibration image. Detailed Implementation

[0088] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. Of course, the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0089] Example 1

[0090] See Figure 1 The present invention provides a technical solution for a low-complexity TIADC time mismatch error calibration method, comprising the following components:

[0091] The clock divider module is used to generate the sampling clock signal for each sub-ADC channel in TIADC;

[0092] The analog-to-digital converter module is used to convert continuous analog signals input from the outside into digital signals via an ADC.

[0093] The data merging module is used to output multiple signals as a single signal.

[0094] The error estimation module uses linear approximation and statistical methods to extract the time mismatch error of each ADC channel;

[0095] The error calibration module uses a serial improved Taylor compensation method to calibrate the time mismatch error of each channel ADC.

[0096] A low-complexity TIADC time mismatch error calibration method includes the following steps:

[0097] S1: Under the control of the clock divider module, the analog-to-digital converter module converts the continuously input analog signal x(t) into M channels of digital signals y1[n], y2[n], ..., y... m [n],…y M [n], and pass it to the data composite module; m = 1, 2, ..., M;

[0098] Where: y m [n] represents the actual sampled value of the m-th ADC channel, where m = 1, 2, ..., M;

[0099] S2: Use a data composite module to process the digital signals y1[n], y2[n], ..., y of the M channels of the TIADC system. m[n],…y M [n] are combined into a single signal y[n], and the combined y[n] is then transmitted to the error calibration module;

[0100] Where: m = 1, 2, ..., M;

[0101] S3: The TIADC combined signal y[n] is calibrated using an error calibration module based on serial improved Taylor compensation. The calibrated combined signal is then... After a certain delay and M-fold downsampling, the calibrated output signals of each ADC are obtained respectively. And pass it to the error estimation module;

[0102] in: This represents the calibrated digital signal of the m-th ADC channel, where m = 1, 2, ..., M;

[0103] S4: An error estimation module based on linear approximation and statistics is used to estimate the residual time mismatch error of each ADC channel. Channel ADC1 is taken as the reference channel and is assumed to have no time mismatch error. M-1 time mismatch error quantities Δt2, Δt3, ..., Δt are obtained. m , …, Δt M The obtained M-1 time mismatch error values ​​are transmitted together with data 0 to the data compositing module;

[0104] Where: Δt m This represents the time mismatch error of the m-th channel ADC, where m = 2, 3, ..., M;

[0105] S5: Use the data compositing module to combine 0, Δt2, Δt3, ..., Δt m , …, Δt M Combined into a single signal, and the combined [0, Δt2, Δt3, ..., Δt] m , …, Δt M The signal is fed back to the serial improved Taylor compensation calibration module as input.

[0106] Step S3 specifically includes the following steps:

[0107] S3.1: For the actual sampled value y of the m-th channel ADC m Expanded using Taylor series, it is:

[0108]

[0109] Where: x m (t) represents the ideal sampled value of the m-th channel ADC. Δt represents the l-th derivative of the ideal sampled value of the m-th ADC channel. mLet l represent the time mismatch error of the m-th ADC channel; l is the order of the time mismatch error expansion.

[0110] S3.2: Based on step S3.1, the actual sampled value y of the m-th channel ADC m Expanded into ideal sampled value x m (t) and the time mismatch error polynomial The sum is in the form of a sum; generally speaking, the error energy contained in higher-order error terms is smaller, or even negligible.

[0111] Ignoring polynomials with time mismatch errors of order higher than 4, the expression in step S3.1 can be rewritten as follows:

[0112]

[0113] Where: x m (t) represents the ideal sampled value of the m-th ADC channel, x′ m (t), x″ m (t), x″′ m (t), These are the 1st, 2nd, 3rd, and 4th derivatives of the ideal sampled value of the m-th ADC channel, respectively.

[0114] Because during error calibration, the ideal sampled value x of the m-th channel... m (t) is unknown, therefore it cannot be obtained. The actual sampled value y of the m-th channel ADC can be used. m to replace x m (t), thus approximately obtaining

[0115] S3.3: Eliminate the first-order error term by subtracting the estimated value Δt of the first-order error term from the expression in step S3.2. m y′ m The output of the m-th channel ADC after first-order error compensation is obtained. for:

[0116]

[0117] S3.4: Eliminate the second-order error term for Δt m y′ m Find the first derivative and multiply by get:

[0118]

[0119] S3.5: The output after first-order error compensation Subtracting the expression from step S3.4 yields the output after second-order error compensation. for:

[0120]

[0121] S3.6: Eliminate the third-order error term, for Find the first derivative and multiply by get:

[0122]

[0123] S3.7: The output after second-order error compensation Subtracting the expression from step 3.6 yields the output after third-order error compensation. for:

[0124]

[0125] Step S4 specifically includes the following steps:

[0126] S4.1: Let the actual sampled values ​​of the m-th and m+1-th channels of the TIADC system be y respectively. m [n] and y m+1 [n];

[0127] Based on the principle of linear approximation, the actual difference D between adjacent sub-ADC channels is... m Approximately the actual sampling time interval T between adjacent sub-ADC channels s +ΔT m+1 -ΔT m Multiply by the derivative y′ of the sub-ADC channel output m [n]; m = 1, 2, ..., M;

[0128] For a 4-channel TIADC, the following approximate formula exists:

[0129]

[0130] Wherein: T s y′ represents the sampling period of TIADC. m [n] represents the derivative of the actual sampled value of the m-th channel ADC, ΔT m (ΔT m =Δt m T s ) and ΔT m+1 (ΔT m+1 =Δt m+1 T s ) represent the time mismatch error of the m-th and m+1-th channels, respectively;

[0131] S4.2: The difference D between the expression in step S4.1 and the expression in step S4.1. m Given m = 1, 2, 3, 4; taking the absolute value and calculating the expected value, we get:

[0132]

[0133] Where: E represents the expected value;

[0134] S4.3: For a generalized stationary signal, the expected value of its own derivatives and other derivatives is a constant and time-invariant. In this experiment, each sub-ADC in the TIADC samples the same analog input sinusoidal signal x(t). Therefore, it is assumed that the expected value of the derivative output by each sub-ADC is the same as the expected value of the derivative of the original input signal x(t), i.e.:

[0135] E(|y′ m [n]|)=E(|x'(t)|)=δ

[0136] Where: E(|y′) m [n]|) represents the expectation of the absolute value of the derivative of the m-th channel ADC output, E(|x′(t)|) represents the expectation of the absolute value of the derivative of the input signal, and δ represents a constant;

[0137] S4.4: Substituting the expression from step 4.3 into the expression from step 4.2, we get:

[0138]

[0139] S4.5: Based on the expression in step S4.4, A m , m = 1, 2, 3, 4; is an approximate function of the actual sampling time interval between adjacent sub-ADC channels;

[0140] Considering that the sum of the time intervals of all adjacent sub-ADC channels is a constant MT s ;

[0141] Where: M is the number of sub-ADC channels in TIADC;

[0142] Each A m By adding the values ​​together and averaging them, we get the following formula:

[0143]

[0144] S4.6: Based on the expression in step S4.5, It is related to the entire system sampling period T s Proportional, but mismatched with time ΔT m Irrelevant; subtracting the expression in step 4.4 from the expression in step 4.5 yields the quantity related to time mismatch error:

[0145]

[0146] S4.7: Use the Least Mean Square (LMS) method to analyze Δtm The iteration is performed, and the iteration formula is as follows:

[0147] Δt m (n+1)=Δt m (n)+μxB m

[0148] Where: Δt m (n) The time mismatch error value at the previous moment; Δt m (n+1) is the time mismatch error value at the next time step; μ is the iteration step size of the algorithm.

[0149] Example 2

[0150] Based on Example 1, the four-channel TIADC system of the present invention will first be described. The sampling rate of the four-channel TIADC system is set to 500MHz, that is, the sampling rate of each internal ADC is set to 250MHz, the resolution is set to 16 bits, and the range is ±1V. Gaussian white noise is added during the simulation to simulate various inherent noises such as quantization error and random noise in the actual system. At the same time, channel ADC1 is regarded as the reference channel, and [0.01, 0.02, 0.03]T is sequentially added to channels ADC2, ADC3, and ADC4. S Time mismatch error.

[0151] Figure 2 a and Figure 2 b shows the schematic diagram and timing diagram of the M-channel TIADC system. T s f represents the TIADC sampling interval. s This indicates the TIADC sampling frequency.

[0152] Figure 3 This is a waveform diagram of adjacent sub-channel ADC sampling in the TIADC of this invention. The black and white dots represent the ideal and actual sampled values, respectively. As can be seen from the diagram, based on the linear approximation principle, the actual difference D between adjacent sub-ADC channels is... m It can be approximated as the actual sampling time interval T between adjacent sub-ADC channels. s +ΔT m+1 -ΔT m Multiply by the derivative y′ of the sub-ADC channel output m [n].

[0153] Figure 4 This is a schematic diagram illustrating the time mismatch error extraction principle of the four-channel TIADC of this invention. As can be seen from the diagram, the estimation module only contains addition and subtraction operations, without involving relatively complex multiplication operations, which reduces hardware resource consumption and algorithm complexity to a certain extent.

[0154] Figure 5 This is a diagram of the improved three-stage cascaded Taylor compensation structure of the present invention. As can be seen from the diagram, the number of differentiators, multipliers, and adders used is relatively small.

[0155] Table 1 compares the resource consumption of the improved four-channel TIADC of this invention with that of the traditional three-stage cascaded Taylor compensation structure. As can be seen from the table, taking the four-channel TIADC as an example, the improved Taylor compensation structure requires 15 fewer differentiators, 31 fewer multipliers, and 15 fewer adders than the traditional Taylor compensation structure. Similarly, if the number of TIADC channels continues to increase, the resource consumption will be reduced even further.

[0156]

[0157] Table 1: Comparison of power consumption between the improved four-channel TIADC and the traditional three-stage Taylor compensation structure.

[0158] Figure 6 This is a block diagram of the four-channel TIADC time mismatch error calibration algorithm of the present invention. As can be seen from the figure, the error compensation module and the error estimation module together constitute a feedback calibration structure, which enables real-time estimation and calibration of time mismatch errors.

[0159] Figure 7 For the four-channel TIADC of this invention at low frequency input (f in / f s =0.11, f s =500MHz), output spectrum before calibration and after each calibration order. From Figure 7 As can be seen in (a), when the input signal is at a low frequency, there are many spurious spectra before calibration, with spurious-free dynamic range (SFDR) = 46.2 dB, signal-to-noise ratio (SNR) = 42.2 dB, and effective number of bits (ENOB) = 6.72. Figure 7 As can be seen from (b), after first-order calibration, the spurious spectrum is suppressed, with a spurious-free dynamic range (SFDR) of 77.9 dB, a signal-to-noise ratio (SNR) of 75.2 dB, and an effective number of bits (ENOB) of 12.2. Figure 7 As can be seen in (c), after second-order calibration, the spurious spectrum was also suppressed, with the spurious-free dynamic range (SFDR) = 100.2 dB, the signal-to-noise ratio (SNR) = 95.5 dB, and the effective number of bits (ENOB) = 15.57. Figure 7 As can be seen in (d), after the third-order calibration, the spurious spectrum was also suppressed, with the spurious-free dynamic range SFDR = 104.1 dB, the signal-to-noise ratio SNR = 96.3 dB, and the effective number of bits ENOB = 15.7.

[0160] Figure 8 For the four-channel TIADC of this invention, at high frequency input (fin / f s =0.347, f s =500MHz), output spectrum before calibration and after each calibration order. From Figure 8 As can be seen in (a), when the input signal is at a higher frequency, there are many spurious spectra before calibration, including a spurious-free dynamic range (SFDR) of 36.1 dB, a signal-to-noise ratio (SNR) of 32.3 dB, and an effective number of bits (ENOB) of 5.07. Figure 8 As can be seen from (b), after first-order calibration, the spurious spectrum is suppressed, with a spurious-free dynamic range (SFDR) of 63.1 dB, a signal-to-noise ratio (SNR) of 62.7 dB, and an effective number of bits (ENOB) of 10.12. Figure 8 As can be seen in (c), after second-order calibration, the spurious spectrum was also suppressed, with the spurious-free dynamic range (SFDR) = 94.1 dB, signal-to-noise ratio (SNR) = 90.7 dB, and effective number of bits (ENOB) = 14.77. Figure 8 As can be seen in (d), after the third-order calibration, the spurious spectrum was also suppressed, with the spurious-free dynamic range SFDR = 97.1dB, the signal-to-noise ratio SNR = 93.5dB, and the effective number of bits ENOB = 15.23.

[0161] Table 2 shows the effects of improved Taylor compensation at different orders for the four-channel TIADC of this invention. As can be seen from the table, when the cascaded Taylor compensation reaches the fourth and fifth order, compared to the three-stage cascaded calibration, the dynamic performance indicators of the TIADC show only slight changes. This is because, assuming the time mismatch error is on the order of 10... -2 Then the orders of magnitude of the fourth and fifth order error terms reach 10. -8 and 10 -10 Therefore, compensation for higher-order error terms can be ignored. Thus, considering both calibration performance and resource consumption, calibration is generally sufficient using third-order cascaded Taylor compensation.

[0162]

[0163] Table 2: Effects of Improved Taylor Compensation at Different Orders for Four-Channel TIADCs

[0164] Figure 9 The figure shows the changes in SFDR and SNR of the four-channel TIADC input signal of this invention before and after third-order calibration throughout the entire Nyquist band. It is clear from the figure that the input signal of this invention is applicable throughout the entire Nyquist band, with an average SFDR improvement of 58.4 dB and an average SNR improvement of 55.7 dB.

[0165] Figure 10 For the four-channel TIADC of the present invention, when there are multiple frequency inputs (f in / fs =0.147, 0.247, 0.347, f in =500MHz), output spectrum before calibration and after each calibration order. From Figure 10 As can be seen from (a), when the input signal has multiple frequencies, there are many spurious spectra before calibration; from Figure 10 As can be seen from (b), the stray spectrum is suppressed after the first-order calibration; from Figure 10 As can be seen from (c), after the second-order calibration, the stray spectrum is suppressed compared to the first-order calibration; from Figure 10 As can be seen in (d), the spurious spectrum suppression is more obvious after the third-order calibration.

[0166] By adopting the above technical solution, this invention proposes a low-complexity TIADC time mismatch error calibration scheme. It uses linear approximation and statistical principles to perform correlation operations on the output signals between adjacent channels to estimate the time mismatch error, and then uses an improved high-order error correction method based on Taylor series expansion to perform error compensation, thereby further reducing the hardware implementation scale.

[0167] The low-complexity TIADC time mismatch error calibration method proposed in this invention is applicable to high-precision TIADC systems. The error compensation module and error estimation module together form a feedback calibration structure, enabling real-time estimation and calibration of time mismatch errors. Compared to other methods, this invention can complete the calibration of any channel TIADC system with lower complexity, and it exhibits good calibration performance across the entire Nyquist sampling frequency range, regardless of whether the input signal is single-frequency or multi-frequency.

[0168] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A low-complexity TIADC time mismatch error calibration method, characterized in that, Includes the following steps: S1: The analog-to-digital converter module, under the control of the clock divider module, converts the continuously input analog signal from the outside into a digital signal. Converted into M-channel digital signals And pass it to the data compositing module; ; in: This represents the actual sampled value of the m-th ADC channel. ; S2: Use a data compositing module to process the digital signals of the M channels of the TIADC system. Combined signal and the merged route Passed to the error calibration module; in: ; S3: An error calibration module based on serial improved Taylor compensation is used to calibrate the TIADC combined signal. Perform calibration, and then perform calibration on the combined signal. After a certain delay and M-fold downsampling, the calibrated output signals of each ADC are obtained respectively. And pass it to the error estimation module; in: This represents the digital signal after calibration of the m-th channel ADC. ; Step S3 specifically includes the following steps: S3.1: For the actual sampled value of the m-th channel ADC Expanded using Taylor series, it is: ； in: This represents the ideal sampled value of the m-th ADC channel. Represents the ideal sampled value of the m-th channel ADC First derivative, This represents the time mismatch error of the m-th ADC channel; Let be the order of the time mismatch error expansion; S3.2: Based on step S3.1, the actual sampled value of the m-th channel ADC Expand into ideal sample values time mismatch error polynomial The form of the sum; Ignoring polynomials with time mismatch errors of order higher than 4, the expression in step S3.1 can be rewritten as follows: ; in: This represents the ideal sampled value of the m-th ADC channel. , , , These are the 1st, 2nd, 3rd, and 4th derivatives of the ideal sampled value of the m-th ADC channel, respectively. S3.3: Eliminate the first-order error term by subtracting the estimated value of the first-order error term from the expression in step S3.

2. The output of the m-th channel ADC after first-order error compensation is obtained. for: ； S3.4: Eliminate the second-order error term, for Find the first derivative and multiply by ,get: ； S3.5: The output after first-order error compensation Subtracting the expression from step S3.4 yields the output after second-order error compensation. for: ； S3.6: Eliminate the third-order error term, for Find the first derivative and multiply by ,get: ； S3.7: The output after second-order error compensation Subtracting the expression from step 3.6 yields the output after third-order error compensation. for: ； S4: An error estimation module based on linear approximation and statistics is used to estimate the residual time mismatch error of each ADC channel, resulting in M-1 time mismatch errors. The obtained M-1 time mismatch errors are transmitted together with data 0 to the data compositing module; in: This represents the time mismatch error of the m-th channel ADC. ; Step S4 specifically includes the following steps: S4.1: Let the actual sampled values ​​of the m-th and m+1-th channels of the TIADC system be respectively and ; Based on the principle of linear approximation, the actual difference between adjacent sub-ADC channels Approximately the actual sampling time interval between adjacent sub-ADC channels Multiply by the derivative of the sub-ADC channel output ; ; For a 4-channel TIADC, the following approximate formula exists: ； in: This indicates the sampling period of TIADC. This represents the derivative of the actual sampled value of the m-th channel ADC; and These represent the time mismatch error amounts of the m-th and m+1-th channels, respectively; S4.2: Difference of the expression in step S4.1 Given m = 1, 2, 3, 4; taking the absolute value and calculating the expected value, we get: ； Where: E represents the expected value; S4.3: The expected value of the derivative of each sub-ADC output compared to the original input signal. The expected value of the derivative is the same, that is: ； in: This represents the expectation of the absolute value of the derivative of the m-th channel ADC output. This represents the expectation of the absolute value of the derivative of the input signal. Represents a constant; S4.4: Substituting the expression from step 4.3 into the expression from step 4.2, we get: ； S4.5: Based on the expression in step S4.4, , m=1,2,3,4; is an approximate function of the actual sampling time interval between adjacent sub-ADC channels; Considering that the sum of the time intervals of all adjacent sub-ADC channels is a constant. ; in: This refers to the number of sub-ADC channels in TIADC; Each By adding the values ​​together and averaging them, we get the following formula: ； S4.6: Based on the expression in step S4.5, It is related to the entire system sampling period Proportional, but mismatched with time. Irrelevant; subtracting the expression in step 4.4 from the expression in step 4.5 yields the quantity related to time mismatch error: ； S4.7: Use the Least Mean Square (LMS) method to... The iteration is performed, and the iteration formula is as follows: ； in: The time mismatch error value at the previous moment; The time mismatch error value at the next moment; This represents the iteration step size of the algorithm; S5: Use the data compositing module to... Combine the signals into one signal and then combine the combined signals. The signal is fed back to the serial improved Taylor compensation calibration module as input.

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