A method and device for adjusting a throttle function of a graphics processor, an electronic device and a readable medium
By using a complex programmable logic device (CPLD) in an ARM server to determine the presence of the central processing unit and adjust the throttling function of the graphics processor, the problem of the graphics processor being unable to be stress-tested under a single CPU was solved, ensuring the normal operation of the server.
Patent Information
- Application Number
- CN202211336889.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-28
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2042-10-28
AI Technical Summary
When using a single CPU in an ARM server, the graphics processor cannot be subjected to stress testing, which affects the normal operation of actual business processes.
The presence of the central processing unit (CPU) is determined by a complex programmable logic device (CPLD), and the throttling function of the graphics processing unit (GPU) is turned off at startup to ensure that the GPU can be stress tested even if only one CPU is present.
This technology enables the graphics processor to perform stress tests even when only one central processing unit (CPU) is present in an ARM server, ensuring the normal operation of the server.
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Figure CN115797145B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of image processors, and in particular to a graphics processor throttling function adjustment method, a graphics processor throttling function adjustment device, an electronic device and a computer readable medium. BACKGROUND
[0002] With the rapid development of society, people have increasingly high demands for GPUs with high network performance, fast storage, large memory and super high computing power. As an important component of servers, the stability of GPUs is directly related to whether the servers can work stably, so stress testing of GPUs is very important in the regular testing items of servers. ARM servers are by default supported by dual CPUs, but some users choose to use single CPUs to save costs. In the case of using single CPUs, it is found that the GPU cannot be tested under pressure, which will affect the normal operation of actual business. SUMMARY
[0003] In view of the above problems, the embodiments of the present application are proposed to provide a graphics processor throttling function adjustment method, a graphics processor throttling function adjustment device, an electronic device and a computer readable medium which overcome the above problems or at least partially solve the above problems.
[0004] The embodiments of the present application disclose a graphics processor throttling function adjustment method applied to an ARM server, the ARM server comprising at least one central processor, at least one graphics processor and a complex programmable logic device, comprising:
[0005] When a basic input and output system is started, the complex programmable logic device receives a first in-place signal sent by a first central processor or a second in-place signal sent by a second central processor;
[0006] The complex programmable logic device determines whether the first central processor is started according to the first in-place signal, or determines whether the second central processor is started according to the second in-place signal;
[0007] If it is determined that the first central processor is in a started state, the complex programmable logic device adjusts the throttling function of a first graphics processor connected with the first central processor to a closed state, or if it is determined that the second central processor is in a started state, the complex programmable logic device adjusts the throttling function of a second graphics processor connected with the second central processor to a closed state.
[0008] Optionally, the complex programmable logic device determines whether the first central processing unit is started according to the first in-place signal, or determines whether the second central processing unit is started according to the second in-place signal, comprising:
[0009] If the first in-place signal is in a high level state, it is determined that the first central processing unit is in a started state, or if the second in-place signal is in a high level state, it is determined that the second central processing unit is in a started state.
[0010] Optionally, if it is determined that the first central processing unit is in a started state, the complex programmable logic device adjusts the throttling function of the first graphics processing unit connected with the first central processing unit to a closed state, or if it is determined that the second central processing unit is in a started state, the complex programmable logic device adjusts the throttling function of the second graphics processing unit connected with the second central processing unit to a closed state, comprising:
[0011] If it is determined that the first central processing unit is in a started state, the complex programmable logic device adjusts the state value of the throttling control signal of the first PCI link of the first central processing unit to a high level, or if it is determined that the second central processing unit is in a started state, the complex programmable logic device adjusts the state value of the throttling control signal of the second PCI link of the second central processing unit to a high level.
[0012] Optionally, the method further comprises:
[0013] The complex programmable logic device receives a first high temperature alarm signal sent by the first central processing unit or a second high temperature alarm signal sent by the second central processing unit;
[0014] If the first high temperature alarm signal is in a high level state, the first central processing unit is closed, or if the second high temperature alarm signal is in a high level state, the second central processing unit is closed.
[0015] Optionally, the method further comprises:
[0016] When the basic input and output system is started, the complex programmable logic device receives the first in-place signal sent by the first central processing unit and the second in-place signal sent by the second central processing unit;
[0017] The complex programmable logic device determines whether the first central processing unit is started according to the first in-place signal, and determines whether the second central processing unit is started according to the second in-place signal;
[0018] If it is determined that the first central processor is in the start state, the complex programmable logic device adjusts a throttle function of the first graphics processor connected with the first central processor to the closed state, and if it is determined that the second central processor is in the start state, adjusts a throttle function of the second graphics processor connected with the second central processor to the closed state.
[0019] Optionally, the method further comprises:
[0020] The complex programmable logic device receives the first high-temperature alarm signal sent by the first central processor and the second high-temperature alarm signal sent by the second central processor;
[0021] If the first high-temperature alarm signal is in the high level state, the first central processor is closed, and if the second high-temperature alarm signal is in the high level state, the second central processor is closed;
[0022] If the first high-temperature alarm signal is in the high level state and the second high-temperature alarm signal is in the low level state, the first central processor is closed, or if the second high-temperature alarm signal is in the high level state and the first high-temperature alarm signal is in the low level state, the second central processor is closed.
[0023] Optionally, the method further comprises:
[0024] If it is determined that the first central processor or the second central processor is in the start state, the complex programmable logic device adjusts a throttle function of a third graphics processor connected with the first central processor and the second central processor to the closed state.
[0025] The embodiment of the application further discloses an adjustment device of a throttle function of a graphics processor, applied to an ARM server, the ARM server comprising at least one central processor, at least one graphics processor and a complex programmable logic device, and comprising:
[0026] The first receiving module is used for, when a basic input output system is started, the complex programmable logic device receiving a first in-place signal sent by a first central processor or a second in-place signal sent by a second central processor;
[0027] The first judging module is used for the complex programmable logic device judging whether the first central processor is started according to the first in-place signal or judging whether the second central processor is started according to the second in-place signal;
[0028] The first adjusting module is configured to adjust a throttle function of a first graphic processor connected with the first central processor to a closed state if the first central processor is determined to be in the start state, or adjust a throttle function of a second graphic processor connected with the second central processor to a closed state if the second central processor is determined to be in the start state.
[0029] Optionally, the judging module comprises:
[0030] The determining sub-module is configured to determine that the first central processor is in the start state if the first in-place signal is in a high level state, or determine that the second central processor is in the start state if the second in-place signal is in a high level state.
[0031] Optionally, the adjusting module comprises:
[0032] The adjusting sub-module is configured to adjust a throttle control signal state value of a first PCI link of the first central processor to a high level if the first central processor is determined to be in the start state, or adjust a throttle control signal state value of a second PCI link of the second central processor to a high level if the second central processor is determined to be in the start state.
[0033] Optionally, the device further comprises:
[0034] The second receiving module is configured to receive a first high-temperature alarm signal sent by the first central processor or a second high-temperature alarm signal sent by the second central processor by the complex programmable logic device.
[0035] The first closing module is configured to close the first central processor if the first high-temperature alarm signal is in a high level state, or close the second central processor if the second high-temperature alarm signal is in a high level state.
[0036] Optionally, the device further comprises:
[0037] The third receiving module is configured to receive the first in-place signal sent by the first central processor and the second in-place signal sent by the second central processor by the complex programmable logic device when the basic input and output system is started.
[0038] The second judging module is configured to judge whether the first central processor is started according to the first in-place signal, and judge whether the second central processor is started according to the second in-place signal by the complex programmable logic device.
[0039] The second adjusting module is configured to adjust the throttle function of the first graphic processor connected with the first central processor to be in a closed state if the first central processor is determined to be in a starting state, and adjust the throttle function of the second graphic processor connected with the second central processor to be in a closed state if the second central processor is determined to be in a starting state.
[0040] Optionally, the apparatus further comprises:
[0041] The fourth receiving module is configured to receive the first high-temperature alarm signal sent by the first central processor and the second high-temperature alarm signal sent by the second central processor.
[0042] The second closing module is configured to close the first central processor if the first high-temperature alarm signal is in a high-level state, and close the second central processor if the second high-temperature alarm signal is in a high-level state.
[0043] The third closing module is configured to close the first central processor if the first high-temperature alarm signal is in a high-level state and the second high-temperature alarm signal is in a low-level state, or close the second central processor if the second high-temperature alarm signal is in a high-level state and the first high-temperature alarm signal is in a low-level state.
[0044] Optionally, the apparatus further comprises:
[0045] The third adjusting module is configured to adjust the throttle function of a third graphic processor connected with the first central processor and the second central processor to be in a closed state if the first central processor or the second central processor is determined to be in a starting state.
[0046] The embodiment of the present application further discloses an electronic device, comprising a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory complete mutual communication through the communication bus.
[0047] The memory is used for storing a computer program.
[0048] The processor is used for executing the program stored on the memory, and realizes the graphic processor throttle function adjusting method as described in the embodiment of the present application.
[0049] The embodiment of the present application further discloses one or more computer readable media, which store instructions, when executed by one or more processors, cause the processor to execute the graphic processor throttle function adjusting method as described in the embodiment of the present application.
[0050] Embodiments of the present application include the following advantages:
[0051] In the embodiments of the present application, when the basic input / output system is started, the complex programmable logic device receives the first in-place signal sent by the first central processing unit or the second in-place signal sent by the second central processing unit, determines whether the first central processing unit is started according to the first in-place signal, or determines whether the second central processing unit is started according to the second in-place signal, adjusts the throttling function of the first graphics processor connected with the first central processing unit to the closed state in the case of determining that the first central processing unit is in the started state, or adjusts the throttling function of the second graphics processor connected with the second central processing unit to the closed state in the case of determining that the second central processing unit is in the started state, so that even if only one central processing unit in the server is in place, the graphics processor can support the stress test. BRIEF DESCRIPTION OF DRAWINGS
[0052] Figure 1 is a step flow chart of a graphics processor throttling function adjustment method provided in the embodiments of the present application;
[0053] Figure 2 is a step flow chart of another graphics processor throttling function adjustment method provided in the embodiments of the present application;
[0054] Figure 3 is a flowchart of a graphics processor throttling function adjustment method provided in the embodiments of the present application;
[0055] Figure 4 is a structural block diagram of a graphics processor throttling function adjustment device provided in the embodiments of the present application;
[0056] Figure 5 is a block diagram of an electronic device provided in the embodiments of the present application;
[0057] Figure 6 is a schematic diagram of a computer readable medium provided in the embodiments of the present application. DETAILED DESCRIPTION
[0058] In order to make the above-mentioned objects, features and advantages of the present application more apparent and easy to understand, the present application will be further described in detail below with reference to the drawings and specific embodiments.
[0059] The ARM server supports dual CPU by default, but some users choose single CPU for cost saving. In the case of using single CPU, it is found that the GPU cannot be tested under pressure, which will affect the normal operation of the actual business. After comparison and analysis, it is found that the GPU enters the throttle mode, which causes the GPU to be unable to be tested under pressure. Further measurement of EE waveform and actual test shows that the throttle control signal B30 signal state value of the PCI link is not correct. When the dual CPU is used, the signal is pulled high, and it is verified that the GPU can be tested under pressure in the case of dual CPU. When the single CPU is used, the GPU cannot be tested under pressure, which is because the signal is at low level.
[0060] Therefore, the application adopts a complex programmable logic device (CPLD) to judge the in-place situation of the first central processor and the second central processor. When the first central processor or the second central processor is turned on, the B30 state value of the PCI link connected with the first central processor or the second central processor is adjusted to high level, i.e. the throttle function of the first graphics processor or the second graphics processor is closed, so that even if a single CPU is used, the first graphics processor or the second graphics processor can be tested under pressure.
[0061] Reference Figure 1 , a step flow chart of a graphics processor throttle function adjustment method provided in an embodiment of the application is shown, which can specifically include the following steps:
[0062] Step 101, when the basic input and output system is started, the complex programmable logic device receives the first in-place signal sent by the first central processor or the second in-place signal sent by the second central processor;
[0063] The method of the embodiment of the application can be applied to an ARM server, and the ARM server can include at least one central processor, at least one graphics processor and a complex programmable logic device. The central processor can be connected with the graphics processor through a PCI link. In the case that the central processor is turned off, the graphics processor is in the off state. In the case that only one central processor is started, the graphics processor can be in the throttle mode, so that the graphics processor cannot be tested under pressure.
[0064] In order to make the graphics processor also be able to be tested under pressure in the case that only one central processor is started, the throttle function of the graphics processor in the case that one central processor is started can be closed, so that the graphics processor can be supported to be tested under pressure.
[0065] Specifically, by default, the ARM server can include two central processors, i.e., a first central processor and a second central processor, the first central processor can be connected with the first graphics processor through a first PCI link, and the second central processor can be connected with the second graphics processor through a second PCI link.
[0066] In the case of starting the basic input output system, the central processor is also started to interpret instructions and process data, at this time, the central processor sends a present signal to the complex programmable logic device so that the complex programmable logic device knows the present information of the central processor. Specifically, when only one central processor is present, the complex programmable logic device can only receive the first present signal sent by the first central processor or the second present signal sent by the second central processor.
[0067] Step 102, the complex programmable logic device determines whether the first central processor is started according to the first present signal, or determines whether the second central processor is started according to the second present signal;
[0068] The present signal sent by the central processor to the complex programmable logic device can include two cases, the first case is that the central processor is in a starting state, and the second case is that the central processor is about to be closed, so the complex programmable logic device can determine the present state of the first central processor or the second central processor according to the present signal after receiving the present signal. Specifically, the first central processor can be determined to be in a starting state according to the first present signal, or the second central processor can be determined to be in a starting state according to the second present signal.
[0069] Step 103, if it is determined that the first central processor is in a starting state, the complex programmable logic device adjusts the throttling function of the first graphics processor connected with the first central processor to a closed state, or if it is determined that the second central processor is in a starting state, the complex programmable logic device adjusts the throttling function of the second graphics processor connected with the second central processor to a closed state.
[0070] If the meaning represented by the first present signal is starting, the complex programmable logic device can determine that the first central processor is in a starting state, at this time, the throttling function of the first graphics processor connected with the first central processor can be adjusted to a closed state, so that the first graphics processor can perform a stress test; if the meaning represented by the second present signal is starting, the complex programmable logic device can determine that the second central processor is in a starting state, at this time, the throttling function of the second graphics processor connected with the second central processor can be adjusted to a closed state, so that the second graphics processor can perform a stress test.
[0071] The adjustment method of the throttling function of the graphic processor provided by the embodiment of the application can support the graphic processor to perform stress testing even if only one central processor is in place.
[0072] Referring to Figure 2 The step flow chart of another adjustment method of the throttling function of the graphic processor provided by the embodiment of the application is shown, and the method can specifically include the following steps:
[0073] In step 201, when the basic input and output system is started, the complex programmable logic device receives a first in-place signal sent by a first central processor or a second in-place signal sent by a second central processor.
[0074] The method of the embodiment of the application can be applied to an ARM server, and the ARM server can include at least one central processor, at least one graphic processor and a complex programmable logic device.
[0075] In order to enable the graphic processor to perform stress testing even if only one central processor is started, the throttling function of the graphic processor in the case of one central processor being started can be closed, so that the graphic processor can perform stress testing.
[0076] Specifically, by default, the ARM server can include two central processors, i.e., a first central processor and a second central processor.
[0077] In the case of the basic input output system starting, the central processor also starts to interpret instructions and process data, at this time, the central processor sends the on signal to the complex programmable logic device, so that the complex programmable logic device knows the on information of the central processor. Specifically, when only one central processor is on, the complex programmable logic device can only receive the first on signal sent by the first central processor or the second on signal sent by the second central processor.
[0078] In step 202, the complex programmable logic device judges whether the first central processor starts according to the first on signal, or judges whether the second central processor starts according to the second on signal.
[0079] The on signal sent by the central processor to the complex programmable logic device can include two cases, the first case is that the central processor is in the starting state, and the second case is that the central processor is about to be closed, so the complex programmable logic device can judge the on state of the first central processor or the second central processor according to the on signal after receiving the on signal. Specifically, the first central processor can be judged to start according to the first on signal, or the second central processor can be judged to start according to the second on signal.
[0080] In an embodiment of the present application, the complex programmable logic device judges whether the first central processor starts according to the first on signal, or judges whether the second central processor starts according to the second on signal, including:
[0081] In step S11, if the first on signal is in a high level state, it is determined that the first central processor is in a starting state, or if the second on signal is in a high level state, it is determined that the second central processor is in a starting state.
[0082] The on signal can include two cases, the first case is that the on signal is in a high level state, indicating that the central processor is in a starting state, and the second case is that the on signal is in a low level state, indicating that the central processor is about to be closed, so the complex programmable logic device can judge the on state of the first central processor or the second central processor according to the on signal after receiving the on signal. Specifically, if the first on signal is in a high level state, it can be determined that the first central processor is in a starting state; if the second on signal is in a high level state, it can be determined that the second central processor is in a starting state.
[0083] Step 203, if it is determined that the first central processor is in the start state, the complex programmable logic device adjusts the throttle control signal state value of the first PCI link of the first central processor to high level, or if it is determined that the second central processor is in the start state, the complex programmable logic device adjusts the throttle control signal state value of the second PCI link of the second central processor to high level.
[0084] The central processor is connected with the graphic processor through the PCI link, and the opening or closing of the throttle function of the graphic processor is controlled by the throttle control signal of the PCI link. The complex programmable logic device can close the throttle function of the graphic processor by adjusting the throttle control signal of the PCI link to high level, and can open the throttle function of the graphic processor by adjusting the throttle control signal of the PCI link to low level.
[0085] Specifically, if the first in-place signal is in a high level state, the complex programmable logic device can determine that the first central processor is in the start state, at this time, the throttle control signal state value of the first PCI link of the first central processor can be adjusted to high level, so that the first graphic processor can perform the stress test; if the second in-place signal is in a high level state, the complex programmable logic device can determine that the second central processor is in the start state, at this time, the throttle control signal state value of the second PCI link of the second central processor can be adjusted to high level, so that the second graphic processor can perform the stress test.
[0086] In an embodiment of the present application, the method further comprises:
[0087] S21, if it is determined that the first central processor or the second central processor is in the start state, the complex programmable logic device adjusts the throttle function of the third graphic processor connected with the first central processor and the second central processor to the closed state.
[0088] One graphic processor can be connected with one central processor alone, or can be connected with two central processors, for example, the third graphic processor can be connected with the first central processor and the second central processor.
[0089] Thus, if the meaning represented by the first in-place signal is start, the complex programmable logic device can determine that the first central processing unit is in a start state, at which time, the throttling function of the third graphics processing unit connected with the first central processing unit and the second central processing unit can be adjusted to a closed state, so that the third graphics processing unit can perform a stress test; if the meaning represented by the second in-place signal is start, the complex programmable logic device can determine that the second central processing unit is in a start state, at which time, the throttling function of the third graphics processing unit connected with the first central processing unit and the second central processing unit can be adjusted to a closed state, so that the third graphics processing unit can perform a stress test.
[0090] In an embodiment of the present application, the method further comprises:
[0091] S31, the complex programmable logic device receives the first high temperature alarm signal sent by the first central processing unit or the second high temperature alarm signal sent by the second central processing unit;
[0092] In the process of running the central processing unit, the central processing unit can send a high temperature alarm signal to the complex programmable logic device, and the high temperature alarm signal can include two cases of low level and high level, when the high temperature alarm signal is low level, it indicates that the temperature of the central processing unit does not reach the preset threshold, and the central processing unit can continue to run normally; when the high temperature alarm signal is high level, it indicates that the temperature of the central processing unit is too high, and the complex programmable logic device can control the central processing unit to execute the shutdown code logic program, so as to avoid physical burnout of the CPU.
[0093] Specifically, the complex programmable logic device can receive the first high temperature alarm signal sent by the first central processing unit, or the second high temperature alarm signal sent by the second central processing unit, and the complex programmable logic device can judge the state of the high temperature alarm signal after receiving the high temperature alarm signal, and control the central processing unit to execute the corresponding code logic program according to the state of the high temperature alarm signal.
[0094] S32, if the first high temperature alarm signal is high level, the first central processing unit is closed, or if the second high temperature alarm signal is high level, the second central processing unit is closed.
[0095] After the complex programmable logic device receives the first high temperature alarm signal, if it is determined that the first high temperature alarm signal is high level, it indicates that the temperature of the first central processing unit is too high, and the first central processing unit can be closed to avoid being burned out; after the complex programmable logic device receives the second high temperature alarm signal, if it is determined that the second high temperature alarm signal is high level, it indicates that the temperature of the second central processing unit is too high, and the second central processing unit can be closed to avoid being burned out.
[0096] In an embodiment of the present application, the method further comprises:
[0097] S41, when the basic input output system is started, the complex programmable logic device receives the first in-place signal sent by the first central processing unit and the second in-place signal sent by the second central processing unit;
[0098] In the case that both CPUs of the ARM server are in the starting state, if the graphic processors connected with the two CPUs are both in the throttling state, the graphic processors cannot perform the stress test at this time, so in the case that both CPUs of the ARM server are in the starting state, the stress test of the graphic processors can be supported by closing the throttling functions of the two graphic processors.
[0099] Specifically, in the case that the basic input output system is started, the first central processing unit and the second central processing unit can send in-place signals to the complex programmable logic device, so that the complex programmable logic device can learn the in-place information of the central processing unit according to the received in-place signals.
[0100] S42, the complex programmable logic device determines whether the first central processing unit is started according to the first in-place signal, and determines whether the second central processing unit is started according to the second in-place signal;
[0101] After receiving the in-place signals, the complex programmable logic device can determine the in-place state of the first central processing unit or the second central processing unit according to the in-place signals, specifically, it can determine whether the first central processing unit is started according to the first in-place signal, and determine whether the second central processing unit is started according to the second in-place signal.
[0102] S43, if it is determined that the first central processing unit is in the starting state, the complex programmable logic device adjusts the throttling function of the first graphic processor connected with the first central processing unit to the closed state, and if it is determined that the second central processing unit is in the starting state, adjusts the throttling function of the second graphic processor connected with the second central processing unit to the closed state.
[0103] If the first in-place signal is in a high level state, the complex programmable logic device can determine that the first central processor is in a start state, at this time, the throttling function of the first graphics processor connected with the first central processor can be adjusted to a closed state, so that the first graphics processor can perform a stress test; if the second in-place signal is in a high level state, the complex programmable logic device can determine that the second central processor is in a start state, at this time, the throttling function of the second graphics processor connected with the second central processor can be adjusted to a closed state, so that the second graphics processor can perform a stress test. Thus, in the case that both CPUs in the ARM server are started, the graphics processor can also support stress testing.
[0104] In an embodiment of the present application, the method further comprises:
[0105] S51, the complex programmable logic device receives the first high temperature alarm signal sent by the first central processor and the second high temperature alarm signal sent by the second central processor;
[0106] In the case that both CPUs in the ARM server are started, the complex programmable logic device can receive the first high temperature alarm signal sent by the first central processor and the second high temperature alarm signal sent by the second central processor, and after receiving the high temperature alarm signal, the complex programmable logic device can judge the state of the high temperature alarm signal and control the central processor to execute the corresponding code logic program according to the state of the high temperature alarm signal.
[0107] S52, if the first high temperature alarm signal is in a high level state, the first central processor is closed, and if the second high temperature alarm signal is in a high level state, the second central processor is closed;
[0108] After the complex programmable logic device receives the first high temperature alarm signal, if it is determined that the first high temperature alarm signal is in a high level state, it means that the temperature of the first central processor is too high, so the first central processor can be closed to avoid being burned out. After the complex programmable logic device receives the second high temperature alarm signal, if it is determined that the second high temperature alarm signal is in a high level state, it means that the temperature of the second central processor is too high, so the second central processor can be closed to avoid being burned out. Thus, in the case that the temperature of both CPUs in the ARM server is too high, both CPUs can be closed to avoid burning out the central processor.
[0109] S53, if the first high temperature alarm signal is in a high level state and the second high temperature alarm signal is in a low level state, the first central processor is closed, or if the second high temperature alarm signal is in a high level state and the first high temperature alarm signal is in a low level state, the second central processor is closed.
[0110] After receiving the high temperature alarm signals sent by the two central processors, if the temperature of one central processor is too high and the temperature of the other central processor is within the normal temperature range, only the central processor with the too high temperature can be turned off, and the central processor with the temperature within the normal temperature range can be normally operated.
[0111] Specifically, if the first high temperature alarm signal is in the high level state and the second high temperature alarm signal is in the low level state, only the first central processor can be turned off; if the second high temperature alarm signal is in the high level state and the first high temperature alarm signal is in the low level state, only the second central processor can be turned off. Thus, the central processor with the too high temperature can be prevented from being burned out, the ARM server can continue to operate by using the central processor with the temperature within the normal temperature range, the user can be prevented from delaying the processing of the business, and the graphics processor connected to the central processor with the temperature within the normal temperature range can be subjected to the pressure test.
[0112] Referring to Figure 3 , a flowchart for adjusting the throttle function of the graphics processor is shown. The specific process is as follows:
[0113] 1. In the case of starting the basic input and output system, the complex programmable logic device adjusts the throttle control signal of the first PCI link of the first central processor and / or the throttle control signal of the second PCI link of the second central processor according to the first in-place signal sent by the first central processor and / or the second in-place signal sent by the second central processor, to determine the starting state of the first central processor and / or the second central processor;
[0114] 2. If the first central processor and the second central processor are both in the starting state, the complex programmable logic device adjusts the throttle control signal of the first PCI link of the first central processor to the high level state and adjusts the throttle control signal of the second PCI link of the second central processor to the high level state, so that the first graphics processor and the second graphics processor can both be subjected to the pressure test;
[0115] If the first central processor or the second central processor is in the starting state, the complex programmable logic device adjusts the throttle control signal of the first PCI link of the first central processor to the high level state, or adjusts the throttle control signal of the second PCI link of the second central processor to the high level state, so that the first graphics processor or the second graphics processor can be subjected to the pressure test.
[0116] The adjustment method of the throttle function of the graphic processor provided by the embodiment of the application can adjust the throttle function of the first graphic processor connected with the first central processor to the closed state when the first central processor is determined to be in the started state, or adjust the throttle function of the second graphic processor connected with the second central processor to the closed state when the second central processor is determined to be in the started state, so that the graphic processor can be supported to perform the stress test even if only one central processor is in the server.
[0117] It should be noted that, for the method embodiments, in order to simply describe, they are all expressed as a series of action combinations, but those skilled in the art should know that the embodiments of the application are not limited to the action sequence described, because according to the embodiments of the application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the actions involved are not necessarily necessary for the embodiments of the application.
[0118] Referring to Figure 4 , a structural block diagram of an adjustment device for a throttle function of a graphic processor is shown, which can specifically include the following modules:
[0119] The first receiving module 401 is configured to receive, when the basic input / output system is started, a first in-signal sent by a first central processor or a second in-signal sent by a second central processor by the complex programmable logic device;
[0120] The first judging module 402 is configured to judge, by the complex programmable logic device, whether the first central processor is started according to the first in-signal, or whether the second central processor is started according to the second in-signal;
[0121] The first adjusting module 403 is configured to adjust, by the complex programmable logic device, the throttle function of the first graphic processor connected with the first central processor to the closed state if the first central processor is determined to be in the started state, or adjust the throttle function of the second graphic processor connected with the second central processor to the closed state if the second central processor is determined to be in the started state.
[0122] In an embodiment of the application, the judging module includes:
[0123] A determining sub-module is configured to determine that the first central processor is in a start state if the first in-place signal is in a high level state, or determine that the second central processor is in a start state if the second in-place signal is in a high level state.
[0124] In an embodiment of the present application, the adjusting module comprises:
[0125] An adjusting sub-module is configured to adjust a throttle control signal state value of a first PCI link of the first central processor to a high level if it is determined that the first central processor is in a start state, or adjust a throttle control signal state value of a second PCI link of the second central processor to a high level if it is determined that the second central processor is in a start state.
[0126] In an embodiment of the present application, the device further comprises:
[0127] A second receiving module is configured to receive a first high-temperature alarm signal sent by the first central processor or a second high-temperature alarm signal sent by the second central processor.
[0128] A first closing module is configured to close the first central processor if the first high-temperature alarm signal is in a high level state, or close the second central processor if the second high-temperature alarm signal is in a high level state.
[0129] In an embodiment of the present application, the device further comprises:
[0130] A third receiving module is configured to receive the first in-place signal sent by the first central processor and the second in-place signal sent by the second central processor when the basic input output system is started.
[0131] A second judging module is configured to judge whether the first central processor is started according to the first in-place signal, and judge whether the second central processor is started according to the second in-place signal.
[0132] A second adjusting module is configured to adjust a throttle function of the first graphic processor connected with the first central processor to a closed state if it is determined that the first central processor is in a start state, and adjust a throttle function of the second graphic processor connected with the second central processor to a closed state if it is determined that the second central processor is in a start state.
[0133] In an embodiment of the present application, the device further comprises:
[0134] a fourth receiving module, configured to receive the first high-temperature alarm signal sent by the first central processing unit and the second high-temperature alarm signal sent by the second central processing unit by the complex programmable logic device;
[0135] a second closing module, configured to close the first central processing unit if the first high-temperature alarm signal is in a high level state, and close the second central processing unit if the second high-temperature alarm signal is in a high level state;
[0136] a third closing module, configured to close the first central processing unit if the first high-temperature alarm signal is in a high level state and the second high-temperature alarm signal is in a low level state, or close the second central processing unit if the second high-temperature alarm signal is in a high level state and the first high-temperature alarm signal is in a low level state.
[0137] In an embodiment of the present application, the device further comprises:
[0138] a third adjusting module, configured to adjust a throttling function of a third graphic processing unit connected with the first central processing unit and the second central processing unit to a closed state if it is determined that the first central processing unit or the second central processing unit is in a starting state.
[0139] By the adjusting device for the throttling function of the graphic processing unit in the embodiment of the present application, when the basic input output system starts, the complex programmable logic device receives the first in-position signal sent by the first central processing unit or the second in-position signal sent by the second central processing unit, determines whether the first central processing unit is in a starting state according to the first in-position signal, or determines whether the second central processing unit is in a starting state according to the second in-position signal, adjusts the throttling function of the first graphic processing unit connected with the first central processing unit to a closed state if it is determined that the first central processing unit is in a starting state, or adjusts the throttling function of the second graphic processing unit connected with the second central processing unit to a closed state if it is determined that the second central processing unit is in a starting state, so that even if only one central processing unit is in position in the server, the graphic processing unit can also support the pressurized test.
[0140] For the device embodiment, it is basically similar to the method embodiment, so the description is relatively simple, and the related parts can be referred to the part of the method embodiment.
[0141] In addition, the embodiment of the present application also provides an electronic device, such as Figure 5 As shown in the figure, the electronic device comprises a processor 501, a communication interface 502, a memory 503 and a communication bus 504, wherein the processor 501, the communication interface 502 and the memory 503 complete mutual communication through the communication bus 504,
[0142] a memory 503 for storing a computer program;
[0143] a processor 501 for executing the program stored in the memory 503 to implement the following steps:
[0144] when the basic input output system is started, the complex programmable logic device receives a first in-signal sent by the first central processing unit or a second in-signal sent by the second central processing unit;
[0145] the complex programmable logic device judges whether the first central processing unit is started according to the first in-signal, or judges whether the second central processing unit is started according to the second in-signal;
[0146] if it is determined that the first central processing unit is in a started state, the complex programmable logic device adjusts a throttling function of a first graphics processing unit connected with the first central processing unit to a closed state, or if it is determined that the second central processing unit is in a started state, the complex programmable logic device adjusts a throttling function of a second graphics processing unit connected with the second central processing unit to a closed state.
[0147] Optionally, the complex programmable logic device judges whether the first central processing unit is started according to the first in-signal, or judges whether the second central processing unit is started according to the second in-signal, including:
[0148] if the first in-signal is in a high level state, it is determined that the first central processing unit is in a started state, or if the second in-signal is in a high level state, it is determined that the second central processing unit is in a started state.
[0149] Optionally, if it is determined that the first central processing unit is in a started state, the complex programmable logic device adjusts a throttling function of a first graphics processing unit connected with the first central processing unit to a closed state, or if it is determined that the second central processing unit is in a started state, the complex programmable logic device adjusts a throttling function of a second graphics processing unit connected with the second central processing unit to a closed state, including:
[0150] if it is determined that the first central processing unit is in a started state, the complex programmable logic device adjusts a throttling control signal state value of a first PCI link of the first central processing unit to a high level, or if it is determined that the second central processing unit is in a started state, the complex programmable logic device adjusts a throttling control signal state value of a second PCI link of the second central processing unit to a high level.
[0151] Optionally, the method further includes:
[0152] The complex programmable logic device receives the first high temperature alarm signal sent by the first central processing unit or the second high temperature alarm signal sent by the second central processing unit;
[0153] If the first high temperature alarm signal is in high level state, the first central processing unit is closed, or if the second high temperature alarm signal is in high level state, the second central processing unit is closed.
[0154] Optionally, the method further comprises:
[0155] When the basic input and output system is started, the complex programmable logic device receives the first in-place signal sent by the first central processing unit and the second in-place signal sent by the second central processing unit;
[0156] The complex programmable logic device determines whether the first central processing unit is started according to the first in-place signal, and determines whether the second central processing unit is started according to the second in-place signal;
[0157] If it is determined that the first central processing unit is in started state, the complex programmable logic device adjusts the throttling function of the first graphics processor connected with the first central processing unit to closed state, and if it is determined that the second central processing unit is in started state, adjusts the throttling function of the second graphics processor connected with the second central processing unit to closed state.
[0158] Optionally, the method further comprises:
[0159] The complex programmable logic device receives the first high temperature alarm signal sent by the first central processing unit and the second high temperature alarm signal sent by the second central processing unit;
[0160] If the first high temperature alarm signal is in high level state, the first central processing unit is closed, and if the second high temperature alarm signal is in high level state, the second central processing unit is closed;
[0161] If the first high temperature alarm signal is in high level state and the second high temperature alarm signal is in low level state, the first central processing unit is closed, or if the second high temperature alarm signal is in high level state and the first high temperature alarm signal is in low level state, the second central processing unit is closed.
[0162] Optionally, the method further comprises:
[0163] If the first central processing unit or the second central processing unit is determined to be in the startup state, the complex programmable logic device will adjust the throttling function of the third graphics processor, which is connected to both the first and second central processing units, to the off state.
[0164] The communication bus mentioned above can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used to represent it in the diagram, but this does not mean that there is only one bus or one type of bus.
[0165] The communication interface is used for communication between the aforementioned terminal and other devices.
[0166] The memory may include random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.
[0167] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.
[0168] like Figure 6 As shown, in another embodiment of the present invention, a computer-readable storage medium 601 is also provided, which stores instructions that, when executed on a computer, cause the computer to perform the graphics processor throttling function adjustment method described in the above embodiment.
[0169] In yet another embodiment of the present disclosure, a computer program product including instructions, which when executed on a computer, cause the computer to perform the method of adjusting the throttling function of the graphics processor as described in the above embodiments.
[0170] In the above embodiments, the whole or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, the whole or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the whole or part of the processes or functions described in the embodiments of the present disclosure are generated. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) manner. The computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available media can be magnetic media (for example, floppy disk, hard disk, magnetic tape), optical media (for example, DVD), or semiconductor media (for example, solid state disk (SSD)) and the like.
[0171] It should be noted that, in this document, the terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the processes, methods, articles or devices including a series of elements not only include those elements, but also include other elements not explicitly listed or inherent to such processes, methods, articles or devices. Without more limitations, the element defined by the statement "including a" does not exclude the presence of other identical elements in the process, method, article or device including the element.
[0172] The various embodiments in the specification are described in a related manner, and the same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on the difference from other embodiments. In particular, for the system embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the part of the method embodiments.
[0173] The above only describes the preferred embodiments of the present application, and is not used to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A method for adjusting a graphics processor throttling function, the method comprising: The application is applied to an ARM server, and the ARM server comprises at least one central processor, at least one graphic processor and a complex programmable logic device, comprising: When a basic input output system is started, the complex programmable logic device receives a first in-position signal sent by the first central processor or a second in-position signal sent by the second central processor; The complex programmable logic device judges whether the first central processor is started according to the first in-position signal or judges whether the second central processor is started according to the second in-position signal; If it is determined that the first central processor is in a starting state, the complex programmable logic device adjusts a throttling function of a first graphic processor connected with the first central processor to a closed state, or if it is determined that the second central processor is in a starting state, the complex programmable logic device adjusts a throttling function of a second graphic processor connected with the second central processor to a closed state; wherein the closed state means that the complex programmable logic device adjusts a throttling control signal state value of a PCI link of the central processor to a high level.
2. The method of claim 1, wherein, The complex programmable logic device judges whether the first central processor is started according to the first in-position signal or judges whether the second central processor is started according to the second in-position signal, comprising: If the first in-position signal is in a high level state, it is determined that the first central processor is in a starting state, or if the second in-position signal is in a high level state, it is determined that the second central processor is in a starting state.
3. The method of claim 1, wherein, If it is determined that the first central processor is in a starting state, the complex programmable logic device adjusts a throttling function of a first graphic processor connected with the first central processor to a closed state, or if it is determined that the second central processor is in a starting state, the complex programmable logic device adjusts a throttling function of a second graphic processor connected with the second central processor to a closed state, comprising: If it is determined that the first central processor is in a starting state, the complex programmable logic device adjusts a throttling control signal state value of a first PCI link of the first central processor to a high level, or if it is determined that the second central processor is in a starting state, the complex programmable logic device adjusts a throttling control signal state value of a second PCI link of the second central processor to a high level.
4. The method of claim 1, wherein, The method further comprises: The complex programmable logic device receives a first high temperature alarm signal sent by the first central processor or a second high temperature alarm signal sent by the second central processor; If the first high temperature alarm signal is in a high level state, the first central processor is closed, or if the second high temperature alarm signal is in a high level state, the second central processor is closed.
5. The method of claim 1, wherein, The method further comprises: When the basic input output system is started, the complex programmable logic device receives the first in-position signal sent by the first central processor and the second in-position signal sent by the second central processor; The complex programmable logic device judges whether the first central processing unit is started according to the first in-place signal, and judges whether the second central processing unit is started according to the second in-place signal; If it is determined that the first central processing unit is in the started state, the complex programmable logic device adjusts the throttling function of the first graphics processor connected with the first central processing unit to the closed state, and if it is determined that the second central processing unit is in the started state, the complex programmable logic device adjusts the throttling function of the second graphics processor connected with the second central processing unit to the closed state.
6. The method of claim 5, wherein, The method further comprises: The complex programmable logic device receives the first high-temperature alarm signal sent by the first central processing unit and the second high-temperature alarm signal sent by the second central processing unit; If the first high-temperature alarm signal is in the high-level state, the first central processing unit is closed, and if the second high-temperature alarm signal is in the high-level state, the second central processing unit is closed; If the first high-temperature alarm signal is in the high-level state and the second high-temperature alarm signal is in the low-level state, the first central processing unit is closed, or if the second high-temperature alarm signal is in the high-level state and the first high-temperature alarm signal is in the low-level state, the second central processing unit is closed.
7. The method of claim 1, wherein, The method further comprises: If it is determined that the first central processing unit or the second central processing unit is in the started state, the complex programmable logic device adjusts the throttling function of the third graphics processor connected with the first central processing unit and the second central processing unit to the closed state.
8. A device for adjusting the throttling function of a graphics processor, characterized in that, The application is applied to an ARM server, and the ARM server comprises at least one central processing unit, at least one graphics processing unit, and a complex programmable logic device, and comprises: A first receiving module is configured to, when a basic input output system is started, the complex programmable logic device receives a first in-place signal sent by a first central processing unit or a second in-place signal sent by a second central processing unit; A first judging module is configured to, the complex programmable logic device judges whether the first central processing unit is started according to the first in-place signal, or judges whether the second central processing unit is started according to the second in-place signal; A first adjusting module is configured to, if it is determined that the first central processing unit is in the started state, the complex programmable logic device adjusts the throttling function of the first graphics processor connected with the first central processing unit to the closed state, or if it is determined that the second central processing unit is in the started state, the complex programmable logic device adjusts the throttling function of the second graphics processor connected with the second central processing unit to the closed state; wherein the closed state means that the complex programmable logic device adjusts the state value of the throttling control signal of the PCI link of the central processing unit to the high level.
9. An electronic device, comprising: The application comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory complete communication with each other through the communication bus; The memory is configured to store a computer program. The processor is configured to implement the method of any one of claims 1-7 when executing the program stored in the memory.
10. One or more computer-readable media having instructions stored thereon that, when executed by one or more processors, cause the processors to perform the method of any one of claims 1-7.
Citation Information
Patent Citations
Method for entering and exiting sleep mode in a graphics subsystem
CN102902345A
Throttling integrated link
CN103119572A