Wafer offset correction device and control method thereof

Abstract

The embodiment of the present disclosure provides a wafer offset correction device and a control method thereof, which comprises: a wafer bearing platform, a movable component, a plurality of first signaler groups, wherein each of the plurality of first signaler groups comprises a first signal transmitter and a first signal receiver, the first signal transmitter is used for transmitting a signal, the first signal receiver is used for receiving a signal and converting the received signal into a first electric signal and then outputting the first electric signal; a processing control circuit is used for acquiring the first electric signal output by the first signal receiver in each of the first signaler groups, and after determining the wafer offset according to the acquired first electric signal output by the first signal receiver in each of the first signaler groups, the processing control circuit controls the movable component to move the wafer in a direction opposite to the offset direction of the wafer. The device can effectively improve the position of the wafer, reduce the risk of wafer slip and wafer drop, and thus improve the yield of the wafer.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor technology, and in particular to a wafer offset correction device and a control method thereof. BACKGROUND

[0002] A wafer is a carrier for semiconductor devices. In the process of manufacturing semiconductor devices, the single-chip semiconductor device process has a relatively high requirement for the position of the wafer. When the wafer position is offset, it will affect the accuracy and uniformity of the prepared semiconductor devices, and even cause the risk of wafer slip and wafer drop, thereby reducing the yield. SUMMARY

[0003] According to some embodiments, the first aspect of the present disclosure provides a wafer offset correction device, comprising:

[0004] a wafer carrying platform configured to carry a wafer;

[0005] a movable component configured to move the wafer, and disposed inside the wafer carrying platform;

[0006] a plurality of first signaler groups disposed around the periphery of the wafer carried by the wafer carrying platform; each of the plurality of first signaler groups comprises a first signal transmitter and a first signal receiver, the first signal transmitter is configured to emit a signal, and the first signal receiver is configured to receive the signal emitted by the first signal transmitter and output a first electrical signal converted from the received signal;

[0007] a processing control circuit configured to acquire the first electrical signal output by the first signal receiver in each of the plurality of first signaler groups, and control the movable component to move the wafer in a direction opposite to the offset direction of the wafer after determining the offset of the wafer according to the acquired first electrical signal output by the first signal receiver in each of the plurality of first signaler groups.

[0008] The beneficial effects of the embodiments of the present disclosure are as follows: the position of the wafer before the process can be effectively improved, thereby improving the accuracy and uniformity of the process, reducing the risk of wafer slip and wafer drop, and improving the yield of the wafer.

[0009] In some possible implementations, the movable component comprises a liftable platform and a rotating array; the rotating array is located on the top of the liftable platform.

[0010] The processing control circuit is further configured to send a first instruction to the liftable platform and a second instruction to the rotating array after determining the offset of the wafer.

[0011] The liftable platform is configured to be raised after receiving the first instruction, and the rotating array is configured to contact the wafer after being raised.

[0012] The rotating array is configured to move the wafer in a direction opposite to the offset direction after receiving the second instruction.

[0013] In some possible embodiments, the processing control circuit is further configured to control a height of the liftable platform.

[0014] In some possible embodiments, the rotating array comprises a plurality of balls arranged in an array; the balls are rotatable by 360 degrees and have friction.

[0015] In some possible embodiments, the processing control circuit is further configured to control a rotation speed of the plurality of balls.

[0016] In some possible embodiments, a second signaler group is further included, and the second signaler group comprises a second signal transmitter and a second signal receiver.

[0017] The second signal transmitter is arranged inside the wafer supporting platform, the wafer supporting platform has a first opening, and the second signal transmitter is configured to transmit a signal, and the transmitted signal passes through the first opening.

[0018] The second signal receiver is arranged on a side of the wafer supporting platform away from the movable component, and the second signal receiver is configured to receive the signal transmitted by the second signal transmitter and convert the received signal into a second electric signal.

[0019] The processing control circuit is further configured to acquire the second electric signal output by the second signal receiver before acquiring the first electric signal output by the first signal receiver in each of the first signaler groups, and determine that the wafer is placed on the wafer supporting platform when the second electric signal is less than a first threshold value. In some possible embodiments, the movable component is arranged between the second signal transmitter and the wafer, the movable component has a second opening, and the signal transmitted by the second signal transmitter further passes through the second opening.

[0020] In some possible embodiments, the liftable platform has a first sub-opening, and the rotating array has a second sub-opening; the first sub-opening and the second sub-opening are arranged to overlap on a projection of the wafer surface, and the first sub-opening and the second sub-opening constitute the second opening.

[0021] In some possible embodiments, the first signal transmitter is arranged below a side of the wafer facing the wafer carrying platform; and the first signal receiver is arranged above a side of the wafer facing away from the wafer carrying platform.

[0022] In some possible embodiments, the processing control circuit is further configured to control the plurality of first signaler groups to move along a radius direction of a set circle, and the center of the set circle is the center of the wafer carrying platform.

[0023] In some possible embodiments, the first signaler groups are at least eight.

[0024] In some possible embodiments, the processing control circuit is further configured to determine that the wafer is offset when the first electrical signal output by the first signal receiver of each of the first signaler groups is less than the second threshold value, and determine the offset direction and the offset amount of the wafer according to the first electrical signal less than the second threshold value and the serial number of the first signal receiver corresponding to the first electrical signal less than the second threshold value pre-stored, and control the movable component to move the wafer in a direction opposite to the offset direction of the wafer according to the determined offset direction and the offset amount; and determine that the wafer is not offset when the first electrical signal output by the first signal receiver of each of the first signaler groups is not less than the second threshold value.

[0025] In some possible embodiments, the processing control circuit is further configured to, after controlling the movable component to move the wafer in a direction opposite to the offset direction of the wafer, acquire again the first electrical signal output by the first signal receiver of each of the first signaler groups until it is determined that the wafer is not offset.

[0026] In some possible embodiments, the processing control circuit is further configured to, after controlling the movable component to move the wafer in a direction opposite to the offset direction of the wafer, acquire again the first electrical signal output by the first signal receiver of each of the first signaler groups, and determine the offset amount of the wafer when the first electrical signal output by the first signal receiver of each of the first signaler groups is less than the second threshold value, and alarm when the offset amount is greater than a third threshold value.

[0027] According to some embodiments, the second aspect of the present disclosure provides a control method of a wafer offset correction device, comprising: acquiring a first electric signal output by a first signal receiver in each of the first signaler groups; and after determining the wafer offset according to the acquired first electric signal output by the first signal receiver in each of the first signaler groups, controlling the movable component to move the wafer in a direction opposite to the offset direction of the wafer.

[0028] The wafer offset correction device provided by the embodiments of the present disclosure has the following beneficial effects: the position of the wafer before processing can be effectively improved, thereby improving the accuracy and uniformity of processing, reducing the risk of wafer slip and wafer drop, and improving the yield of wafers.

[0029] In some possible implementation manners, the wafer offset correction device further comprises a second signaler group, the second signaler group comprising: a second signal transmitter and a second signal receiver; the second signal transmitter is arranged inside the wafer supporting platform, the wafer supporting platform has a first opening, and the second signal transmitter is configured to emit a signal, and the emitted signal passes through the first opening; the second signal receiver is arranged on a side of the wafer supporting platform away from the movable component, and the second signal receiver is configured to receive the signal emitted by the second signal transmitter and convert the received signal into a second electric signal; before the acquiring of the first electric signal output by the first signal receiver in each of the first signaler groups, the method further comprises: acquiring a second electric signal output by the second signal receiver, and determining that the wafer is placed on the wafer supporting platform when the second electric signal is less than a first threshold value. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 Some front view structural schematic diagrams of wafer offset correction devices provided by the embodiments of the present disclosure are shown in the following figures:

[0031] Figure 2 Some top view structural schematic diagrams of wafer offset correction devices provided by the embodiments of the present disclosure are shown in the following figures:

[0032] Figure 3 Some internal structural schematic diagrams of wafer offset correction devices provided by the embodiments of the present disclosure are shown in the following figures:

[0033] Figure 4 Some front view structural schematic diagrams of wafer offset correction devices provided by the embodiments of the present disclosure are shown in the following figures:

[0034] Figure 5 Some internal structural schematic diagrams of wafer offset correction devices provided by the embodiments of the present disclosure are shown in the following figures:

[0035] Figure 6A front view structural schematic diagram of still another wafer offset correction device provided by the embodiments of the present disclosure is shown in FIG. 6;

[0036] Figure 7 A front view structural schematic diagram of still another wafer offset correction device provided by the embodiments of the present disclosure is shown in FIG. 6;

[0037] Figure 8 A front view structural schematic diagram of still another wafer offset correction device provided by the embodiments of the present disclosure is shown in FIG. 6. DETAILED DESCRIPTION

[0038] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure. And the embodiments in the present disclosure and the features in the embodiments can be combined with each other without conflict. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present disclosure.

[0039] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood as the common meanings thereof by those of ordinary skill in the art to which the present disclosure belongs. The terms "first", "second" and similar words used in the present disclosure do not represent any order, number or importance, but are only used to distinguish different constituent parts. The terms "comprise", "include" and similar words mean that the elements or objects before the words encompass the elements or objects listed after the words and their equivalents, without excluding other elements or objects. The terms "connect" or "connected" and similar words do not mean physical or mechanical connection, but can include electrical connection, whether direct or indirect.

[0040] It should be noted that the sizes and shapes of the figures in the drawings do not reflect the true proportions, but only serve to illustrate the present disclosure. And the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout.

[0041] The embodiments of the present disclosure provide a wafer offset correction device, as shown in FIG. 1, comprising: Figure 1 and Figure 2 as shown, comprising:

[0042] a wafer carrying platform 10 for carrying a wafer W;

[0043] a movable component 11 for moving the wafer W, arranged inside the wafer carrying platform 10;

[0044] Multiple first signal unit groups 12 are arranged around the periphery of the wafer W supported by the wafer carrier platform 10; each of the multiple first signal unit groups 12 includes a first signal transmitter and a first signal receiver. For example, taking eight first signal unit groups as an example, the first first signal unit group 12 of these eight first signal unit groups includes a first signal transmitter 121-1 and a first signal receiver 122-1, the second first signal unit group 12 includes a first signal transmitter 121-2 and a first signal receiver 122-2, the third first signal unit group 12 includes a first signal transmitter 121-3 and a first signal receiver 122-3, ... the seventh first signal unit group 12 includes a first signal transmitter 121-7 and a first signal receiver 122-7, and the eighth first signal unit group 12 includes a first signal transmitter 121-8 and a first signal receiver 122-8. Furthermore, the first signal transmitter (e.g. Figure 2 The numbers 121-1, 121-2, 121-3, 121-4, 121-5, 121-6, 121-7, and 121-8 are used to transmit signals, and the first signal receiver (e.g., Figure 2 The 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8 are used to receive the first signal transmitter (e.g., Figure 2 The signals transmitted by 121-1, 121-2, 121-3, 121-4, 121-5, 121-6, 121-7, and 121-8 are converted into a first electrical signal and then output.

[0045] Processing control circuitry is used to acquire the first signal receiver (e.g., in each of the first signal receiver groups 12) Figure 2 The first electrical signal output from 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8 in the first signal receiver group 12 is used to determine the first signal receiver (e.g., ...) in each first signal receiver group 12. Figure 2 After determining the offset of wafer W by the first electrical signal output by 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, 122-8, the movable component 11 is controlled to move wafer W in a direction opposite to the offset direction of wafer W.

[0046] The processing control circuitry in the embodiments of this disclosure may take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects.

[0047] The wafer offset correction device provided by the embodiments of the present disclosure can effectively improve the position of the wafer before processing, thereby improving the accuracy and uniformity of the processing, reducing the risk of wafer slip and wafer drop, and improving the yield of the wafer.

[0048] The present disclosure does not limit the material of the wafer. For example, the material of the wafer is a semiconductor material, for example, the wafer can be a silicon wafer.

[0049] The present disclosure does not limit the diameter of the wafer. For example, the diameter of the wafer includes but is not limited to 4 inches, 5 inches, 6 inches, 8 inches, 12 inches, 14 inches, 15 inches, 16 inches, and 20 inches.

[0050] For example, in the embodiments of the present disclosure, the size of the surface of the wafer carrying platform 10 in contact with the wafer W is smaller than the size of the wafer. Of course, the size of the surface of the wafer carrying platform in contact with the wafer can also be equal to the size of the wafer. In actual application, the size of the surface of the wafer carrying platform 10 in contact with the wafer can be determined according to the actual application requirements, and the present disclosure does not limit this.

[0051] In the embodiments of the present disclosure, as shown in Figure 1 and Figure 2 , the first signal transmitter (such as 121-1, 121-2, 121-3, 121-4, 121-5, 121-6, 121-7, and 121-8 in Figure 2 is arranged below the side of the wafer W facing the wafer carrying platform 10. As shown in Figure 2 , the height of the wafer W is taken as the reference height, and the position below the height of the wafer W is the below position.

[0052] In some examples, the signal transmitted by the first signal transmitter (such as 121-1, 121-2, 121-3, 121-4, 121-5, 121-6, 121-7, and 121-8 in Figure 2 may be a laser signal. Alternatively, the signal sent by the first signal transmitter (such as 121-1, 121-2, 121-3, 121-4, 121-5, 121-6, 121-7, and 121-8 in Figure 2 may also be an ultraviolet light signal, an infrared light signal, and a visible light signal. The present disclosure does not limit this.

[0053] First signal receiver (e.g.) Figure 2 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8 are positioned above the side of wafer W facing away from wafer carrier platform 10. For example, Figure 2 As shown, with the height of wafer W as the reference height, the position higher than the height of wafer W is the upper position.

[0054] In some examples, the first signal receiver (e.g.) Figure 2 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8 in the above can be photoelectric conversion devices that can convert optical signals into electrical signals. For example, the converted electrical signals can be current signals and / or voltage signals. That is, the first electrical signal can be a current signal and / or a voltage signal.

[0055] In this embodiment of the disclosure, the first signal transmitter (such as...) Figure 2 (121-1, 121-2, 121-3, 121-4, 121-5, 121-6, 121-7, 121-8) and the first signal receiver (e.g. Figure 2 The elements 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8 are movable. For example, the processing control circuit is also used to control the plurality of first signaler groups 12 to move along the radius of a predetermined circle. The center of the predetermined circle is the center of the wafer carrier platform 10. For example, the center of the wafer carrier platform 10 can be the center of the wafer carrier platform 10 covered by the center of the wafer W when the wafer W is not offset.

[0056] In embodiments of this disclosure, the processing control circuit is further configured to control the intermittent operation of the first signal receiver and the first signal transmitter. For example, the processing control circuit is further configured to control each of the first signal receivers to periodically transmit signals, and to control the first signal transmitter to periodically output the converted first electrical signal. Exemplarily, the processing control circuit is further configured to simultaneously or time-divisionally control each of the first signal receivers to transmit signals, and simultaneously or time-divisionally control the first signal transmitter to output the converted first electrical signal.

[0057] In the embodiments disclosed herein, such as Figure 2 As shown, the first signal unit group has at least 8 units, that is, at least 8 first signal transmitters (such as...). Figure 1 The numbers 121-1, 121-2, 121-3, 121-4, 121-5, 121-6, 121-7, and 121-8 in the series) and the eight first signal receivers (such as...) Figure 2(122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, 122-8). Of course, the more first signal groups there are, the higher the accuracy will be when adjusting the position of wafer W. Therefore, in this disclosure, the first signal group can be set to 9, 10, 11, 12, 13 or more, which is not limited here.

[0058] In the embodiments disclosed herein, such as Figure 2 and Figure 3 As shown, it also includes a second signal unit group 13, which includes a second signal transmitter 131-1 and a second signal receiver 132-1. The second signal transmitter 131-1 is disposed inside the wafer carrier platform 10, which has a first opening. The second signal transmitter 131-1 is used to transmit signals, and the transmitted signals pass through the first opening. The second signal receiver 132-1 is disposed on the side of the wafer carrier platform 10 opposite to the movable part 11, and is used to receive the signals transmitted by the second signal transmitter 131-1 and convert the received signals into a second electrical signal. The processing control circuit is also used to acquire the first signal receiver (e.g., ...) in each first signal unit group 12. Figure 4 Before the first electrical signal output by the receivers 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8, the second electrical signal output by the second signal receiver 132-1 is acquired. When the second electrical signal is less than the first threshold, it is determined that the wafer W is placed on the wafer carrier platform 10. This configuration ensures that the processing control circuit can quickly and accurately determine whether the wafer is placed on the wafer carrier platform.

[0059] In some examples, the signal transmitted by the second signal transmitter 131-1 may be a laser signal. Alternatively, the signal transmitted by the second signal transmitter 131-1 may also be an ultraviolet light signal, an infrared light signal, or a visible light signal. This disclosure does not limit this.

[0060] In some examples, the second signal receiver 132-1 can be a photoelectric conversion device that can convert optical signals into electrical signals. Exemplarily, the converted electrical signals can be current signals and / or voltage signals. That is, the second electrical signal can be a current signal and / or a voltage signal.

[0061] This disclosure does not limit the specific value of the first threshold. For example, the first threshold can be determined according to the needs of actual application, and is not limited thereto.

[0062] In the embodiments disclosed herein, such as Figure 5As shown, the movable component 11 includes a liftable platform 111 and a rotating array 112; wherein the rotating array 112 is on top of the liftable platform 111. As shown Figure 1 As shown, the processing control circuit is further configured to, after determining the wafer W is offset, send a first instruction to the liftable platform 111 and a second instruction to the rotating array 112; the liftable platform 111 is configured to, after receiving the first instruction, lift up and, after lifting up, make the rotating array 112 contact the wafer W. The rotating array 112 is configured to, after receiving the second instruction, move the wafer W in a direction opposite to the offset direction.

[0063] In the embodiments of the present disclosure, the processing control circuit is further configured to control the height of the liftable platform 111.

[0064] In the embodiments of the present disclosure, the processing control circuit is further configured to control the height of the liftable platform 111. Figure 2 As shown, the rotating array 112 includes a plurality of balls arranged in an array, the balls can rotate 360 degrees and have friction, so as to ensure that the wafer W can be moved more easily.

[0065] In the embodiments of the present disclosure, the processing control circuit is further configured to control the rotating speed of the plurality of balls.

[0066] In the embodiments of the present disclosure, the processing control circuit is further configured to control the rotating speed of the plurality of balls. Figure 2 As shown, the movable component 11 is arranged between the second signal transmitter 131-1 and the wafer W, and the movable component 11 has a second opening; the signal transmitted by the second signal transmitter 131-1 also passes through the second opening. As an example, the liftable platform 111 has a first sub-opening, and the rotating array 112 has a second sub-opening; wherein the orthographic projection of the first sub-opening on the surface of the wafer W overlaps with the orthographic projection of the second sub-opening on the surface of the wafer W; the first sub-opening and the second sub-opening constitute the second opening.

[0067] In the embodiments of the present disclosure, the processing control circuit is further configured to, when the first electrical signal output by each of the first signal receivers (such as 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, 122-8 in each of the first signaler groups 12) is less than the second threshold value, determine that the wafer W is offset, and determine the offset direction and the offset amount of the wafer W according to the first electrical signal less than the second threshold value and the serial number of the first signal receiver corresponding to the first electrical signal less than the second threshold value pre-stored, and control the movable component 11 to move the wafer W in a direction opposite to the offset direction of the wafer W according to the determined offset direction and the offset amount. Figure 2 Figure 2 ​determining that the wafer W is not offset.

[0068] The present disclosure does not limit the specific value of the second threshold. Illustratively, the second threshold can be determined according to the requirements in the actual application, which is not limited herein.

[0069] Illustratively, the processing control circuit pre-stores the serial number of each first signal transmitter and the serial number of each first signal receiver. For example, the processing control circuit stores the serial number of the first signal transmitter 121-1 as A1, the serial number of the first signal transmitter 121-2 as A2, the serial number of the first signal transmitter 121-3 as A3, and the serial number of the first signal transmitter 121-8 as A8. In addition, the processing control circuit stores the serial number of the first signal receiver 122-1 as B1, the serial number of the first signal receiver 122-2 as B2, the serial number of the first signal receiver 122-3 as B3, and the serial number of the first signal receiver 122-8 as B8.

[0070] In the embodiments of the present disclosure, illustratively, the processing control circuit is further configured to determine the serial number of the first signal receiver in each first signal transmitter group 12 (e.g. Figure 2 determining that the wafer W is not offset. Figure 2 determining that the wafer W is not offset.

[0071] In the embodiments of the present disclosure, illustratively, the processing control circuit is further configured to, after controlling the movable component 11 to move the wafer W in the direction opposite to the offset direction of the wafer W, again acquire the first electrical signal output by the first signal receiver (e.g. Figure 2the first signal output by the first signal receiver in each first signaler group 12, until it is determined that the wafer W is not offset. In this way, the wafer W can be repeatedly moved until the wafer W is not offset, improving the accuracy of the movement.

[0072] In the embodiments of the present disclosure, by way of example, the processing control circuit is further configured to, after controlling the movable component 11 to move the wafer W in a direction opposite to the direction of the wafer W offset, again acquire the first signal output by the first signal receiver in each first signaler group 12, such as 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8. Figures 6 to 8 Figure 6 In the embodiments of the present disclosure, by way of example, the processing control circuit is further configured to, after controlling the movable component 11 to move the wafer W in a direction opposite to the direction of the wafer W offset, again acquire the first signal output by the first signal receiver in each first signaler group 12, such as 122-1, 122-2, 122-3, 122-4, 122-5, 122-6, 122-7, and 122-8.

[0073] In the embodiments of the present disclosure, the specific value of the third threshold is not limited. By way of example, the third threshold can be determined according to the requirements in actual applications, which is not limited herein.

[0074] The embodiments of the present disclosure also provide a control method of a wafer offset correction device, comprising:

[0075] Acquiring the first signal output by the first signal receiver in each first signaler group.

[0076] After determining the wafer offset according to the first signal output by the first signal receiver in each first signaler group, controlling the movable component to move the wafer in a direction opposite to the direction of the wafer offset.

[0077] In the embodiments of the present disclosure, by way of example, before acquiring the first signal output by the first signal receiver in each first signaler group, the method further comprises: acquiring the second signal output by the second signal receiver, and determining that the wafer is placed on the wafer support platform when the second signal is less than a first threshold.

[0078] The working process of the wafer offset correction device provided by the embodiments of the present disclosure will be described below in combination with Figure 7

[0079] As Figure 8 ​​As shown, the wafer W is placed on the wafer supporting platform 10, the processing control circuit controls the second signal transmitter 131-1 to emit a signal, which is incident on the wafer W through the first opening and the second opening. Due to the shielding of the wafer W, the signal received by the second signal receiver 132-1 is weak. After the second signal receiver 132-1 receives the signal, it is converted into a second electric signal and output. The processing control circuit obtains the second electric signal output by the second signal receiver 132-1, and determines that the wafer W is placed on the wafer supporting platform 10 when the second electric signal is less than the first threshold value. If the wafer W is not placed on the wafer supporting platform 10, the processing control circuit controls the second signal transmitter 131-1 to emit a signal, which is incident on the second signal receiver 132-1 through the first opening and the second opening. Due to the absence of the wafer W, the signal received by the second signal receiver 132-1 is strong. After the second signal receiver 132-1 receives the signal, it is converted into a second electric signal and output. The processing control circuit obtains the second electric signal output by the second signal receiver 132-1, and determines that the wafer W is not placed on the wafer supporting platform 10 when the second electric signal is not less than the first threshold value.

[0080] After the second signal receiver 132-1 receives the signal emitted by the second signal transmitter 131-1 and converts the signal into a second electric signal and outputs, the processing control circuit receives the second electric signal and determines that the wafer W reaches the wafer supporting platform 10, and then controls the first signal transmitter group to start working. That is, the processing control circuit controls each first signal transmitter (for example, 121-1 to 121-8 in the figure) to emit a signal, and the first signal receiver (for example, 122-1 to 122-8 in the figure) receives the signal and converts the received signal into a first electric signal V1-1 to V1-8 and outputs. The processing control circuit obtains the first electric signal V1-1 to V1-8 from each first signal receiver (for example, 122-1 to 122-8 in the figure), and determines whether there is a first electric signal less than the second threshold value among the obtained first electric signals V1-1 to V1-8. Among them, the first signal receiver 122-1 corresponds to the first electric signal V1-1, the first signal receiver 122-2 corresponds to the first electric signal V1-2, the first signal receiver 122-3 corresponds to the first electric signal V1-3, …, the first signal receiver 122-7 corresponds to the first electric signal V1-7, and the first signal receiver 122-8 corresponds to the first electric signal V1-8.

[0081] For example, when the wafer W does not block the first signal transmitters 121-1~121-8, since the first signal transmitters 121-1~121-8 are not blocked by the wafer W, the signals emitted by the first signal transmitters 121-1~121-8 can completely enter the corresponding first signal receivers 122-1~122-8, so that the first electric signals V1-1~V1-8 are all not less than the second threshold. Therefore, it can be determined that the position of the wafer W does not deviate.

[0082] For example, when the wafer W blocks the first signal transmitters 121-1, 121-2 and 121-8, and does not block the first signal transmitters 121-3~121-7, since the first signal transmitters 121-3~121-7 are not blocked by the wafer W, the signals emitted by the first signal transmitters 121-3~121-7 can completely enter the corresponding first signal receivers 122-3~122-7, so that the first electric signals V1-3~V1-7 are not less than the second threshold. After the wafer W is blocked, the signals emitted by the first signal transmitters 121-1, 121-2 and 121-8 are blocked by the wafer W, so they cannot completely enter the corresponding first signal receivers 122-1, 122-2 and 122-8, so that the first electric signals V1-1, V1-2 and V1-8 are less than the second threshold. Therefore, it can be determined that the position of the wafer W deviates.

[0083] After it is determined that the position of the wafer W deviates, the processing control circuit determines the deviation direction of the wafer W according to the first electric signals V1-1, V1-2 and V1-8 and the sequence numbers of the first signal receivers 122-1, 122-2 and 122-8 corresponding to the first electric signals V1-1, V1-2 and V1-8 stored in advance.

[0084] For example, when the wafer W does not block the first signal transmitters 121-1~121-8, since the first signal transmitters 121-1~121-8 are not blocked by the wafer W, the signals emitted by the first signal transmitters 121-1~121-8 can completely enter the corresponding first signal receivers 122-1~122-8, so that the first electric signals V1-1~V1-8 are all not less than the second threshold. Therefore, it can be determined that the position of the wafer W does not deviate. Figure One and Figure OneAs shown, after determining the offset of the wafer W, the processing control circuit determines the offset of the wafer W by comprehensively calculating the received first electric signals, and sends a first instruction to the liftable platform 111 and a second instruction to the rotating array 112. After receiving the first instruction, the liftable platform 111 is lifted, and after being lifted, the balls in the rotating array 112 contact the wafer W. After receiving the second instruction, the rotating array 112 controls the balls to move the wafer W in a direction opposite to the offset direction. After the movement is completed, the processing control circuit controls each first signal transmitter (e.g., 121-1 to 121-8 in the figure) to emit signals, and the first signal receiver (e.g., 122-1 to 122-8 in the figure) receives the signals and outputs the received signals after converting them into first electric signals V2-1 to V2-8. The processing control circuit obtains the first electric signals V2-1 to V2-8 from each first signal receiver (e.g., 122-1 to 122-8 in the figure), and determines whether there is a first electric signal smaller than the second threshold value among the obtained first electric signals V2-1 to V2-8. Among them, the first signal receiver 122-1 corresponds to the first electric signal V2-1, the first signal receiver 122-2 corresponds to the first electric signal V2-2, the first signal receiver 122-3 corresponds to the first electric signal V2-3, the first signal receiver 122-7 corresponds to the first electric signal V2-7, and the first signal receiver 122-8 corresponds to the first electric signal V2-8.

[0085] If none of the first electric signals V2-1 to V2-8 is smaller than the second threshold value, it can be determined that the wafer W does not appear offset again, that is, the position of the wafer W has been corrected.

[0086] If there is a first electric signal smaller than the second threshold value among the first electric signals V2-1 to V2-8, it can be determined that the wafer W appears offset again, that is, the position of the wafer W has not been corrected. The processing control circuit determines that the first electric signals smaller than the second threshold value are V2-4 to V2-6, and determines the offset direction of the wafer W according to the first electric signals V2-4 to V2-6 and the serial numbers of the first signal receivers 122-4 to 122-6 stored in advance. After sending a second instruction to the rotating array 112, the balls in the rotating array 112 are controlled to move the wafer W in a direction opposite to the offset direction. Then the above operation is repeated until it is determined that the wafer W does not appear offset, that is, the position of the wafer W has been corrected.

[0087] In addition, the processing control circuit acquires the first electrical signals V3-1 to V3-8 output by the first signal receivers (e.g., 122-1 to 122-8 in the figure) in each first signaler group again when controlling the rotating array 112 to move the wafer W in a direction opposite to the wafer W offset direction, determines the wafer W offset amount multiple times when determining that each of the acquired first electrical signals V3-1 to V3-8 output by the first signal receivers (e.g., 122-1 to 122-8 in the figure) in each first signaler group has a first electrical signal less than the second threshold value, and performs an alarm when determining that the wafer W offset amount is greater than a third threshold value. The first signal receiver 122-1 corresponds to the first electrical signal V3-1, the first signal receiver 122-2 corresponds to the first electrical signal V3-2, the first signal receiver 122-3 corresponds to the first electrical signal V3-3, the first signal receiver 122-7 corresponds to the first electrical signal V3-7, and the first signal receiver 122-8 corresponds to the first electrical signal V3-8.

[0088] After the position of the wafer W has been corrected, the processing control circuit controls the lift platform 111 and the rotating array 112 to return to the original position.

[0089] Those skilled in the art will understand that the embodiments of the present disclosure can be provided as methods, systems, or computer program products. Therefore, the present disclosure can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present disclosure can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage, etc.) containing computer usable program code.

[0090] The present disclosure is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present disclosure. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and combinations of flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus generate an apparatus that implements the functions specified in the flowcharts and / or block diagrams. Figure One The functions specified in a flow or multiple flows and / or blocks Figure One The functions specified in a flow or multiple flows and / or blocks

[0091] These computer program instructions can also be stored in a computer-readable memory that can direct the computer or other programmable data processing apparatus to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including instruction apparatus, which implements the functions specified in the flowcharts and / or block diagrams. Figure Oneone or more processes and / or blocks Figure One the function specified in the one or more blocks.

[0092] These computer program instructions can also be loaded into computer or other programmable data processing devices, so that a series of operation steps are performed on the computer or other programmable data processing devices to generate computer-implemented processes, thus the instructions executed on the computer or other programmable data processing devices provide processes for implementing the flow ​ one or more processes and / or blocks ​ the function specified in the one or more blocks.

[0093] Although the preferred embodiments of the disclosure have been described, those skilled in the art who understand the inventive concept after getting the basic creative concept can make additional changes and modifications to the embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the disclosure.

[0094] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the disclosure without departing from the spirit and scope of the embodiments of the disclosure. Thus, if these modifications and variations of the embodiments of the disclosure fall within the scope of the claims of the disclosure and their equivalent technologies, the disclosure also intends to include these modifications and variations.

Claims

1. A wafer offset correction device, characterized by, The application relates to a wafer carrying platform, a movable component for moving the wafer, a plurality of first signaler groups, a processing control circuit, and a rotating array. The wafer carrying platform is used for carrying a wafer. The movable component is arranged inside the wafer carrying platform and is used for moving the wafer. Each of the plurality of first signaler groups comprises a first signal transmitter and a first signal receiver. The first signal transmitter is used for transmitting signals. The first signal receiver is used for receiving the signals transmitted by the first signal transmitter and outputting the received signals after conversion into first electric signals.

2. The wafer offset correction apparatus of claim 1, wherein The processing control circuit is used for acquiring the first electric signals output by the first signal receivers in each of the first signaler groups. After determining the wafer offset according to the acquired first electric signals output by the first signal receivers in each of the first signaler groups, the processing control circuit controls the movable component to move the wafer in a direction opposite to the offset direction of the wafer. When the processing control circuit determines that the acquired first electric signals output by the first signal receivers in each of the first signaler groups have a first electric signal smaller than a second threshold value, the processing control circuit determines that the wafer is offset. According to the first electric signal smaller than the second threshold value and the serial number of the first signal receiver corresponding to the first electric signal smaller than the second threshold value stored in advance, the processing control circuit determines the offset direction and the offset amount of the wafer.

3. The wafer offset correction apparatus of claim 2, wherein According to the determined offset direction and offset amount, the processing control circuit controls the movable component to move the wafer in a direction opposite to the offset direction of the wafer.

4. The wafer offset correction apparatus of claim 2, wherein When the processing control circuit determines that the acquired first electric signals output by the first signal receivers in each of the first signaler groups do not have a first electric signal smaller than the second threshold value, the processing control circuit determines that the wafer is not offset.

5. The wafer offset correction apparatus of claim 4, wherein The movable component comprises a liftable platform and a rotating array.

6. The wafer offset correction apparatus of claim 2, wherein The rotating array is located on the top of the liftable platform. The processing control circuit is further used for sending a first instruction to the liftable platform and a second instruction to the rotating array after determining that the wafer is offset. The liftable platform is used for lifting after receiving the first instruction and making the rotating array contact the wafer after lifting. The rotating array is used for moving the wafer in a direction opposite to the offset direction after receiving the second instruction. The processing control circuit is further used for controlling the lifting height of the liftable platform. The rotating array comprises a plurality of circular balls arranged in an array. The circular balls can rotate by 360 degrees and have friction. The processing control circuit is further used for controlling the rotating speed of the circular balls. The application further comprises a second signaler group. The second signal transmitter is arranged inside the wafer carrying platform. The wafer carrying platform has a first opening. The second signal transmitter is used for transmitting signals. The transmitted signals pass through the first opening. The second signal receiver is arranged on a side of the wafer carrier platform facing away from the movable component, and is configured to receive the signal transmitted by the second signal transmitter and convert the received signal into a second electrical signal. The processing control circuit is further configured to acquire the second electrical signal output by the second signal receiver before acquiring the first electrical signal output by the first signal receiver in each of the first signal transmitter groups, and determine that the wafer is placed on the wafer carrier platform when the second electrical signal is less than a first threshold value.

7. The wafer offset correction apparatus of claim 6, wherein The movable component is arranged between the second signal transmitter and the wafer, and has a second opening; the signal transmitted by the second signal transmitter also passes through the second opening.

8. The wafer offset correction apparatus of claim 7, wherein The liftable platform has a first sub-opening; the rotating array has a second sub-opening; The first sub-opening and the second sub-opening overlap on the wafer surface. The first sub-opening and the second sub-opening constitute the second opening.

9. The wafer offset correction device according to any one of claims 1-5, wherein: The first signal transmitter is arranged below a side of the wafer facing the wafer carrier platform; The first signal receiver is arranged above a side of the wafer facing away from the wafer carrier platform.

10. The wafer offset correction apparatus according to any one of claims 1 to 5, wherein The processing control circuit is further configured to control the first signal transmitter groups to move along the radius direction of a set circle according to the set circle; The center of the set circle is the center of the wafer carrier platform.

11. The wafer offset correction apparatus of claim 10, wherein The first signal transmitter groups are at least eight.

12. The wafer offset correction apparatus of claim 1, wherein The processing control circuit is further configured to, after controlling the movable component to move the wafer in a direction opposite to the wafer offset direction, acquire the first electrical signal output by the first signal receiver in each of the first signal transmitter groups again until it is determined that the wafer is not offset.

13. The wafer offset correction apparatus of claim 1, wherein The processing control circuit is further configured to, after controlling the movable component to move the wafer in a direction opposite to the wafer offset direction, acquire the first electrical signal output by the first signal receiver in each of the first signal transmitter groups again, and determine the wafer offset when it is determined that the first electrical signal output by the first signal receiver in each of the first signal transmitter groups has a first electrical signal less than the second threshold value, and alarm when the offset is greater than a third threshold value.

14. A control method of a wafer offset correction device according to any one of claims 1 to 13, characterized by, The processing control circuit is further configured to: Acquire the first electrical signal output by the first signal receiver in each of the first signal transmitter groups; After determining that the wafer is offset according to the acquired first electrical signal output by the first signal receiver in each of the first signal transmitter groups, control the movable component to move the wafer in a direction opposite to the wafer offset direction.

15. The control method of the wafer offset correction device according to claim 14, wherein The wafer offset correction device further comprises a second signaler group, which comprises a second signal transmitter and a second signal receiver; the second signal transmitter is arranged inside the wafer supporting platform, the wafer supporting platform has a first opening, the second signal transmitter is used for transmitting signals, and the transmitted signals pass through the first opening; the second signal receiver is arranged on the side of the wafer supporting platform away from the movable component, and the second signal receiver is used for receiving the signals transmitted by the second signal transmitter and converting the received signals into a second electric signal; Before the first electric signal output by the first signal receiver in each of the first signaler groups is acquired, the method further comprises: acquiring a second electric signal output by the second signal receiver, and determining that the wafer is placed on the wafer supporting platform when the second electric signal is less than a first threshold value.

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