power detector

Abstract

In certain aspects, a method for measuring power using a resistive element coupled between a power amplifier and an antenna is provided. The method includes squaring a voltage from a first terminal of the resistive element to obtain a first signal, squaring a voltage from a second terminal of the resistive element to obtain a second signal, and generating a measurement signal based on a difference between the first signal and the second signal. In some implementations, the resistive element is implemented with a power switch.

Description

[0001] CLAIM

[0002] This patent application claims priority to U.S. Nonprovisional Application No. 16 / 932,589, filed July 17, 2020, entitled “POWER DETECTOR,” which is assigned to the assignee of the present application and hereby expressly incorporated by reference herein. TECHNICAL FIELD

[0003] Aspects of the present disclosure generally relate to wireless communication, and more particularly to a power detector for measuring power. BACKGROUND

[0004] A wireless transmitter can include a power amplifier and an antenna for transmitting a radio frequency (RF) signal. The transmitter can also include a power detector for measuring power delivered from the power amplifier to the antenna. The measured power can be input to a power control circuit configured to control an output power of the power amplifier based on the measured power. SUMMARY

[0005] The following presents a simplified summary of one or more implementations in order to provide a basic understanding of such implementations. This summary is not an extensive overview of all contemplated implementations, and is intended to neither identify key or critical elements of all implementations nor delineate the scope of any or all implementations. Its sole purpose is to present some concepts of one or more implementations in a simplified form as a prelude to the more detailed description that is presented later.

[0006] Certain aspects relate to an apparatus. The apparatus includes a resistive element including a first terminal and a second terminal, where the resistive element is coupled between a power amplifier and an antenna. The apparatus also includes a first squaring circuit including an input and an output, where the input of the first squaring circuit is coupled to the first terminal of the resistive element. The apparatus also includes a second squaring circuit including an input and an output, where the input of the second squaring circuit is coupled to the second terminal of the resistive element. The apparatus also includes a differencing circuit coupled to the output of the first squaring circuit and the output of the second squaring circuit.

[0007] A second aspect relates to an apparatus. The apparatus includes a power amplifier, and a power switch including a first terminal and a second terminal, where the power switch is coupled between the power amplifier and an antenna. The apparatus also includes a first squaring circuit including an input and an output, where the input of the first squaring circuit is coupled to the first terminal of the power switch. The apparatus also includes a second squaring circuit including an input and an output, where the input of the second squaring circuit is coupled to the second terminal of the power switch. The apparatus also includes a differencing circuit coupled to the output of the first squaring circuit and the output of the second squaring circuit. The apparatus also includes a low noise amplifier coupled to the antenna.

[0008] A third aspect relates to an apparatus. The apparatus includes a resistive element including a first terminal and a second terminal, where the resistive element is coupled between a power amplifier and an antenna. The apparatus also includes a multiplexer including a first input, a second input, and an output, where the first input of the multiplexer is coupled to the first terminal of the resistive element and the second input of the multiplexer is coupled to the second terminal of the resistive element. The apparatus also includes a squaring circuit including an input and an output, where the input of the first squaring circuit is coupled to the output of the multiplexer. The apparatus also includes a low pass filter including an input and an output, where the input of the low pass filter is coupled to the output of the squaring circuit. The apparatus also includes an analog-to-digital converter (ADC) including an input and an output, where the input of the ADC is coupled to the output of the low pass filter. The apparatus also includes a differential circuit coupled to the output of the ADC.

[0009] A fourth aspect relates to a method for measuring power using a resistive element coupled between a power amplifier and an antenna. The method includes squaring a voltage from a first terminal of the resistive element to obtain a first signal, squaring a voltage from a second terminal of the resistive element to obtain a second signal, and generating a measurement signal based on a difference between the first signal and the second signal. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 An example of a transmitter including a power amplifier, a power detector, and an antenna is shown in accordance with certain aspects of the present disclosure.

[0011] Figure 2 An example of a squaring circuit is shown in accordance with certain aspects of the present disclosure.

[0012] Figure 3 An example implementation of a power measurement circuit is shown in accordance with certain aspects of the present disclosure.

[0013] Figure 4 Another example implementation of a power measurement circuit is shown in accordance with certain aspects of the present disclosure.

[0014] Figure 5 An example power detector is shown in accordance with certain aspects of the present disclosure, where a power switch is used as a power sensor.

[0015] Figure 6 An example of a transformer coupled between a power amplifier and a power switch is shown in accordance with certain aspects of the present disclosure.

[0016] Figure 7 An example of a shunt inductor coupled in parallel with a power switch is shown in accordance with certain aspects of the present disclosure.

[0017] Figure 8 An example of a square circuit implemented with transistors is shown in accordance with certain aspects of the present disclosure.

[0018] Figure 9 An example of a transformer coupled between a power switch and a square circuit is shown in accordance with certain aspects of the present disclosure.

[0019] Figure 10 An example of a power detector including an attenuator is shown in accordance with certain aspects of the present disclosure.

[0020] Figure 11 An example of an attenuator implemented with a capacitive voltage divider is shown in accordance with certain aspects of the present disclosure.

[0021] Figure 12 An example of a power detector including a multiplexer is shown in accordance with certain aspects of the present disclosure.

[0022] Figure 13 Another example of a power detector including a multiplexer is shown in accordance with certain aspects of the present disclosure.

[0023] Figure 14 Yet another example of a power detector including a multiplexer is shown in accordance with certain aspects of the present disclosure.

[0024] Figure 15 Another example implementation of a power measurement circuit is shown in accordance with certain aspects of the present disclosure.

[0025] Figure 16A An example of a power control circuit coupled to a power detector is shown in accordance with certain aspects of the present disclosure.

[0026] Figure 16B An example in which a power control circuit controls the output power of a power amplifier using an adjustable voltage source is shown in accordance with certain aspects of the present disclosure.

[0027] Figure 16C An example in which a power control circuit controls the output power of a power amplifier using an amplitude adjuster is shown in accordance with certain aspects of the present disclosure.

[0028] Figure 17 An example of a phased antenna array that can be used with aspects of the present disclosure is shown in accordance with certain aspects of the present disclosure.

[0029] Figure 18 An example environment including an electronic device including a transceiver is shown in accordance with certain aspects of the present disclosure.

[0030] Figure 19 is a flow diagram illustrating a method for measuring power in accordance with certain aspects of the present disclosure. DETAILED DESCRIPTION

[0031] The detailed description set forth below, in connection with the appended drawings, is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein can be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. However, it will be apparent to those skilled in the art that these concepts can be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring the concepts.

[0032] A wireless transmitter can include a power amplifier and an antenna for transmitting a radio frequency (RF) signal. The transmitter can also include a power detector for measuring the power delivered from the power amplifier to the antenna. In this regard, Figure 1 An example of a transmitter 105 including a power amplifier 110, an antenna 130, and a power detector 120 for measuring the power delivered to the antenna 130 is shown. The transmitter 105 can be incorporated into a wireless device (e.g., a mobile wireless device). Although one power amplifier 110, one antenna 130, and one power detector 120 are shown in Figure 1 It should be appreciated that a wireless device can include multiple power amplifiers, multiple antennas (e.g., arranged in an array), and multiple power detectors, where each of the power detectors measures the power delivered to a respective one of the antennas.

[0033] The power amplifier 110 is configured to receive a radio frequency (RF) signal at an input 112 of the power amplifier 110, amplify the received RF signal, and output the amplified RF signal at an output 114 of the power amplifier 110 for wireless transmission via the antenna 130. The power detector 120 is configured to measure the power (e.g., average power) delivered from the power amplifier 110 to the antenna 130.

[0034] The measured power can be input to a power control circuit 150 that is configured to control the output power of the power amplifier 110 based on the measured power. For example, the power control circuit 150 can adjust the output power of the power amplifier 110 based on the measured power to maintain or maintain close to a target transmit power the power delivered to the antenna 130, as discussed further below. In another example, the measured power can be used to detect a failure of the power amplifier 110 and / or the antenna 130. The power control circuit 150 can adjust the output power of the power amplifier 110 by adjusting a voltage supplied to the power amplifier 110, adjusting an amplitude of the RF signal input to the power amplifier 110, or another technique.

[0035] In one approach, the power detector 120 includes a voltage sensor (not shown) configured to sense the voltage across the antenna 130 and a current sensor configured to sense the current flowing through the antenna 130, where the current sensor is implemented as a current sense coil. In this approach, the power detector 120 measures the power by multiplying the sensed voltage from the voltage sensor with the sensed current from the current sensor (e.g., using a mixer). One drawback of this approach is that there is a phase offset between the voltage sensor and the current sensor, which varies depending on process, frequency, and temperature (PVT) and can be more pronounced at millimeter wave (mmWave) frequencies used in fifth generation (5G) communications and other technologies. The phase offset introduces an error in the power measurement. To address this issue, the power detector 120 can include a phase shifter to offset the phase offset between the voltage sensor and the current sensor. However, calibrating the phase shifter over PVT is challenging, especially at mmWave frequencies. Moreover, the sense coil used in the current sensor to sense the current is bulky and sensitive to impedance termination, leading to inaccurate power measurements.

[0036] Aspects of the present disclosure provide a power detector that measures the power delivered to an antenna using a resistive element coupled between a power amplifier and the antenna as a power sensor. In certain aspects, the power detector senses the voltage at both ends (i.e., terminals) of the resistive element, squares each of the sensed voltages, and calculates the difference between the squared voltages to measure the power delivered to the antenna. Thus, aspects of the present disclosure measure the power delivered to the antenna by sensing the voltage across the resistive element. As a result, aspects of the present disclosure avoid the need for a phase shifter to offset the phase offset between a voltage sensor and a current sensor (e.g., a current sense coil), which can be challenging over PVT, especially at mmWave frequencies. Moreover, aspects of the present disclosure avoid the need to use a current sense coil to sense the current, which can be bulky and sensitive to impedance termination leading to inaccurate power measurements.

[0037] Figure 2 An exemplary implementation of the power detector 120 is shown in accordance with aspects of the present disclosure. The power detector 120 can be configured to measure the instantaneous power and / or the average power delivered to the antenna 130. The power delivered to the antenna 130 is given by the product of the voltage and the current across the antenna 130 as follows:

[0038] P(t) = v(t) - i(t) (1)

[0039] where P(t) is the power delivered to the antenna 130, v(t) is the voltage across the antenna 130, and i(t) is the current flowing through the antenna 130. The average power delivered to the antenna 130 is given by:

[0040]

[0041] where P avg is the average power, and the top bar represents a time average.

[0042] For the case where the voltage v(t) is sinusoidal, the voltage (t) can be given by:

[0043] v(t) = V cos(ω RF t) (3)

[0044] where V is the amplitude of the voltage v(t), and ω RF is the angular frequency of the voltage v(t). In this example, the current i(t) flowing through the antenna 130 is given by:

[0045] i(t) = I cos(ω RF t + θ) (4)

[0046] where I is the amplitude of the current i(t), and θ is the phase angle between the voltage v(t) and the current i(t). The phase angle θ comes from the fact that the impedance of the antenna 130 can be complex. For the case of a purely resistive load, the phase angle θ is zero. In this example, the instantaneous power can be determined by substituting the expressions for the voltage v(t) and the current i(t) given in equations (3) and (4), respectively, into equation (1), which results in:

[0047]

[0048] As shown in equation (5), the instantaneous power includes a first term and a second term, where the first term is given by and the second term is a second harmonic term given by The first term provides the average power delivered to the antenna 130. Thus, the average power delivered to the antenna 130 can be determined by using a low-pass filter to remove the second harmonic term in equation (5), which results in the following expression for the average power:

[0049]

[0050] In Figure 2In the example of FIG. 1, the power detector 120 includes a resistive element 210, a first squaring circuit 215, a second squaring circuit 220, and a power measurement circuit 230. The resistive element 210 (also referred to as a lossy element) is coupled between the power amplifier 110 and the antenna 130. The resistive element 210 is coupled in series with the antenna 130 such that current flowing through the antenna 130 also flows through the resistive element 210. In certain aspects, the resistive element 210 has a very low resistance (e.g., a few ohms) such that power loss from the resistive element 210 is very small. The resistive element 210 can be implemented with a low resistance resistor (e.g., a wirewound resistor). In some implementations, the resistive element 210 can be implemented with a power switch, where the on-resistance of the power switch provides the resistance of the resistive element 210, as discussed further below.

[0051] The resistive element 210 has a first terminal 212 coupled to the power amplifier 110 and a second terminal 214 coupled to the antenna 130. The first and second terminals 212 and 214 can also be referred to as two ends of the resistive element 210. The voltage at the first terminal 212 is labeled as v A (t) and the voltage at the second terminal 214 is labeled as v B (t). As discussed further below, in some implementations, the first terminal 212 of the resistive element 210 can be coupled to the power amplifier 110 via a transformer (e.g., an unbalanced transformer). Further, in some implementations, the second terminal 214 of the resistive element 210 can be coupled to the antenna 130 via a transmission line.

[0052] The first terminal 212 of the resistive element 210 is coupled to an input 216 of the first squaring circuit 215 and the second terminal 214 of the resistive element 210 is coupled to an input 222 of the second squaring circuit 220. The first squaring circuit 215 is configured to generate a first signal at an output 218 of the first squaring circuit 215 that is proportional to the square of the voltage at the input 216 of the first squaring circuit 215. Since the input 216 of the first squaring circuit 215 is coupled to the first terminal 212 of the resistive element 210, the first signal is proportional to the square of the voltage at the first terminal 212. The second squaring circuit 220 is configured to generate a second signal at an output 224 of the second squaring that is proportional to the square of the voltage at the input 222 of the second squaring circuit 220. Since the input 222 of the second squaring circuit 220 is coupled to the second terminal 214 of the resistive element 210, the second signal is proportional to the square of the voltage at the second terminal 214. Each of the first and second signals can be a voltage or a current. The output 218 of the first squaring circuit 215 is coupled to a first input 232 of the power measurement circuit 230 and the output 224 of the second squaring circuit 220 is coupled to a second input 234 of the power measurement circuit 230.

[0053] The power measurement circuit 230 is configured to generate a power measurement signal based on a difference between the first signal and the second signal, as discussed further below. As discussed above, the power measurement signal can be input to the power control circuit 150 (shown in FIG. 1) to control the output power of the power amplifier 110 based on the measured power. Figure 1

[0054] Assuming that the current through the resistive element 210 is equal to or sufficiently close to the current flowing through the antenna 130, and assuming that the voltage at the second terminal 214 of the resistive element 210 is equal to the voltage across the antenna 130, the current flowing through the antenna 130 can be given by:

[0055]

[0056] where R is the resistance of the resistive element 210. Since the resistive element 210 is in series with the antenna 130, Equation (7) also gives the current flowing through the resistive element 210. In this example, the voltage at the first terminal 212 of the resistive element 210 is related to the current through the antenna 130 and the voltage across the antenna 130 by:

[0057] v A (t) = i(t) · R + v(t) (8)

[0058] where i(t) · R is the voltage drop across the resistive element 210 due to the current flowing through the resistive element 210. The square of the voltage at the first terminal 212 of the resistive element 210 is given by:

[0059] v A 2 (t) = i 2 (t) · R 2 + 2v(t)i(t)R + v 2 (t) (9)

[0060] This is obtained by squaring Equation (8).

[0061] Assuming that the voltage at the second terminal 214 of the resistive element 210 is equal to the voltage across the antenna 130, the difference between the square of the voltage at the first terminal 212 and the square of the voltage at the second terminal 214 is given by:

[0062] v A 2 (t) - v B 2 (t) = i 2 (t) · R 2 + 2v(t)i(t)R (10). ​

[0063] Because the resistance of the resistive element 210 is very low, the resistance squared term in equation (10) is very small and, therefore, can be neglected, with the result as follows:

[0064] v A 2 (t)-v B 2 (t) = 2v(t)i(t)R (11).

[0065] As shown in equation (11), the difference between the square of the voltage at the first terminal 212 and the square of the voltage at the second terminal 214 is proportional to the power delivered to the antenna 130 (i.e., v(t)-i(t)) with a proportionality factor of 2R. Thus, the difference between the square of the voltage at the first terminal 212 and the square of the voltage at the second terminal 214 can be used to provide a measure of the power delivered to the antenna 130, as discussed further below.

[0066] As discussed above, the first squaring circuit 215 outputs a first signal proportional to the square of the voltage at the first terminal 212, and the second squaring circuit 220 outputs a second signal proportional to the square of the voltage at the second terminal 214. The power measurement circuit 230 can generate a power measurement signal proportional to the difference between the first signal from the first squaring circuit 215 and the second signal from the second squaring circuit 220. Because the first signal is proportional to the square of the voltage at the first terminal 212 (i.e., V A 2 (t)), and the second signal is proportional to the square of the voltage at the second terminal 214 (i.e., V B 2 (t)), the power measurement signal, which is proportional to the difference between the first signal and the second signal, is proportional to the difference between the square of the voltage at the first terminal 212 and the square of the voltage at the second terminal 214. Because the difference between the square of the voltage at the first terminal 212 and the square of the voltage at the second terminal 214 is proportional to the power delivered to the antenna 130 (e.g., based on equation (11) above), the power measurement signal is also proportional to the power delivered to the antenna 130, and thus provides a measure of the power delivered to the antenna 130.

[0067] The power measurement circuit 230 can output the power measurement signal at an output 236, or perform additional processing on the power measurement signal (e.g., low pass filtering for measuring average power) before outputting the power measurement signal at the output 236. The output 236 can be coupled to the power control circuit 150 Figure 1 to provide the power measurement signal to the power control circuit 150.

[0068] In one example, the first signal is a first current proportional to the square of the voltage at the input 216 of the first squaring circuit 215, and the second signal is a second current proportional to the square of the voltage at the input 222 of the second squaring circuit 220. In this example, each of the squaring circuits 215 and 220 can be implemented with a respective transistor configured to generate a respective current based on a square law relationship between the current (e.g., drain current) of the transistor and the gate voltage of the transistor, as further discussed below.

[0069] In one example, the first signal is a first current proportional to the square of the voltage at the input 216 of the first squaring circuit 215, and the second signal is a second current proportional to the square of the voltage at the input 222 of the second squaring circuit 220. In this example, each of the squaring circuits 215 and 220 can be implemented with a respective transistor configured to generate a respective current based on a square law relationship between the current (e.g., drain current) of the transistor and the gate voltage of the transistor, as further discussed below.

[0070] Figure 3 An example implementation of the power measurement circuit 230 is shown in accordance with certain aspects. In this example, the power measurement circuit 230 includes a difference circuit 330 and a low pass filter 340. The difference circuit 330 has a first input 322 coupled to the output 218 of the first squaring circuit 215 and a second input 324 coupled to the output 224 of the second squaring circuit 220. The low pass filter 340 is coupled to the output of the difference circuit 330.

[0071] In this example, the difference circuit 330 receives the first signal from the first squaring circuit 215 and the second signal from the second squaring circuit 220, and generates an output signal based on the difference between the first signal and the second signal. Since the difference between the first signal and the second signal is proportional to the power delivered to the antenna 130 (e.g., based on equation (11)), the output signal of the difference circuit 330 provides a measure of the power delivered to the antenna 130. In one example, the output signal of the difference circuit 330 is proportional to the difference between the first signal and the second signal, and thus proportional to the power delivered to the antenna 130. In this example, the difference circuit 330 can be implemented with a differential amplifier, where the output signal is proportional to the difference between the first signal and the second signal by the gain of the differential amplifier.

[0072] The output signal of the difference circuit 330 is then time-averaged by a low-pass filter 340 to generate a filtered output signal that is proportional to the average power delivered to the antenna 130, and thus provides a measure of the average power delivered to the antenna 130. For example, the low-pass filter 340 can be configured to filter out the second harmonic term shown in equation (5) from the output signal, such that the filtered output signal provides a measure of the average power delivered to the antenna 130. The low-pass filter 340 can be configured to filter out the second harmonic term by setting the cutoff frequency of the low-pass filter 340 to be lower than the second harmonic frequency.

[0073] Thus, in this example, the filtered output signal provides a measure of the average power delivered to the antenna 130, and is output at the output 236 of the power measurement circuit 230 as a power measurement signal. The low-pass filter 340 can be implemented with a resistive-capacitive (RC) low-pass filter or another type of low-pass filter.

[0074] Figure 4 Another example implementation of the power measurement circuit 230 is shown, in accordance with certain aspects. In this example, the power measurement circuit 230 includes a first low-pass filter 410, a second low-pass filter 420, and a difference circuit 430. The first low-pass filter 410 is coupled between the output 218 of the first squaring circuit 215 and a first input 422 of the difference circuit 430, and the second low-pass filter 420 is coupled between the output 224 of the second squaring circuit 220 and a second input 424 of the difference circuit 430.

[0075] In this example, the first squaring circuit 215 generates a first signal that is proportional to the square of the voltage at the first terminal 212 of the resistive element 210. The first low-pass filter 410 time-averages the first signal to generate a filtered first signal that is proportional to the time-average of the square of the voltage at the first terminal 212 of the resistive element 210 (e.g., the square of the root-mean-square of the voltage at the first terminal 212). In one example, the first signal includes a first term that is proportional to the time-average of the square of the voltage at the first terminal 212 of the resistive element 210 and a second harmonic term that is generated by the squaring operation of the first squaring circuit 215. In this example, the first low-pass filter 410 can be configured to filter out the second harmonic, such that the filtered first signal is proportional to the time-average of the square of the voltage at the first terminal 212 of the resistive element 210.

[0076] The second squaring circuit 220 generates a second signal proportional to the square of the voltage at the second terminal 214 of the resistive element 210. The second low pass filter 420 time-averages the second signal to generate a filtered second signal proportional to the time-averaged square of the voltage at the second terminal 214 of the resistive element 210 (e.g., the square of the root mean square of the voltage at the second terminal 214). In one example, the second signal includes a first term proportional to the time-averaged square of the voltage at the second terminal 214 of the resistive element 210 and a second harmonic term generated by the squaring operation of the second squaring circuit 220. In this example, the second low pass filter 420 can be configured to filter out the second harmonic term so that the filtered second signal is proportional to the time-averaged square of the voltage at the second terminal 214 of the resistive element 210.

[0077] In this example, the difference circuit 430 receives the filtered first signal from the first low pass filter 410 and the filtered second signal from the second low pass filter 420 and generates a measurement signal based on the difference between the filtered first signal and the filtered second signal. Since the filtered first signal is proportional to the time-averaged square of the voltage at the first terminal 212 and the filtered second signal is proportional to the time-averaged square of the voltage at the second terminal 214, the measurement signal provides a measure of the average power delivered to the antenna 130. The difference circuit 430 can output the measurement signal at the output 236 of the power measurement circuit.

[0078] In one example, the difference circuit 430 is implemented with digital circuitry that computes the difference between the filtered first signal and the filtered second signal in the digital domain to generate the measurement signal. In this example, the filtered first signal and the filtered second signal can be digitized by one or more analog-to-digital converters (not shown) before being input to the difference circuit 430. Figure 4

[0079] Figure 5 An example in which the resistive element 210 is implemented using a power switch 510 is shown in accordance with certain aspects. In this example, the power switch 510 is coupled between the power amplifier 110 and the antenna 130, and the on-resistance of the power switch 510 provides the resistance of the resistive element 210 to measure the power delivered to the antenna 130. The on-resistance is the resistance of the power switch 510 when the power switch 510 is on. One advantage of using the power switch 510 for the resistive element 210 is that the power switch 510 can already be in the transmit path between the power amplifier 110 and the antenna 130, so there is no need to place an additional resistive element in the transmit path to measure the power. Furthermore, the power switch 510 has a well-defined on-resistance, making it suitable for power measurement. ​

[0080] In this example, the antenna 130 is shared by a transmitter and a receiver that use time division duplexing (TDD), where signals are transmitted and received via the antenna 130 in different time slots. The receiver includes a low noise amplifier (LNA) 540 configured to amplify RF signals received at an input 542 via the antenna 130 and output the amplified RF signals at an output 544 for further processing (e.g., down-conversion).

[0081] The transmitter and the receiver can be coupled to the antenna 130 via an output pin 520. In Figure 5 In the example of FIG. 5, the power switch 510 is coupled between the power amplifier 110 and the output pin 520, and the input 542 of the LNA 540 is coupled to the output pin 520. The output pin 520 can be coupled to the antenna 130 via a transmission line.

[0082] In certain aspects, the transmitter, the receiver, and the output pin 520 can be integrated on a chip 522, and the antenna 130 can be external to the chip 522 (i.e., the antenna 130 can be off-chip). In these aspects, the chip 522 and the antenna 130 can be mounted on a substrate 524 (e.g., a printed circuit board), where the output pin 520 is coupled to the antenna 130 via a transmission line 526 (e.g., one or more metal lines) on the substrate 524.

[0083] In this example, the on / off state of the power switch 510 is controlled by a switch controller 550. In a transmit mode, the switch controller 550 turns on (i.e., closes) the power switch 510 to couple the power amplifier 110 to the antenna 130 via the power switch 510. In this mode, the on-resistance of the power switch 510 provides the resistance of the resistive element 210 for measuring the power delivered to the antenna 130, as discussed above.

[0084] In a receive mode, the switch controller 550 turns off (i.e., opens) the power switch 510, which decouples the power amplifier 110 from the antenna 130. This is done to isolate the LNA 540 from the load from the power amplifier 110.

[0085] In Figure 5In the example of FIG. 5, the power switch 510 is implemented with an n-type field effect transistor (NFET). In this example, the switch controller 550 controls the on / off state of the power switch 510 by controlling the gate voltage (labeled as “Vg”) of the NFET. In the receive mode, the switch controller 550 can apply approximately zero volts to the gate of the NFET to turn off the power switch 510. In the transmit mode, the switch controller 550 can apply a high voltage to the gate of the NFET to turn on the power switch 510. In this mode, the switch controller 550 can adjust the gate voltage to maintain a substantially constant resistance of the on-resistance of the power switch 510 across PVT.

[0086] Figure 6 An example is shown in which the power amplifier 110 is coupled to the resistive element 210 via a transformer 620. In this example, the power amplifier 110 is a differential power amplifier 110 that is configured to output a differential RF signal at a differential output that includes a first output 616 and a second output 618. The transformer 620 includes a first inductor 622 (e.g., a primary inductor) and a second inductor 624 (e.g., a secondary inductor), where the second inductor 624 is magnetically coupled to the first inductor 622. Each of the inductors 622 and 624 can be implemented with a coil inductor, a spiral inductor, a plate inductor, or other type of inductor.

[0087] In this example, the first inductor 622 of the transformer 620 is coupled between the first output 616 and the second output 618 of the power amplifier 110. More specifically, a first terminal 632 of the first inductor 622 is coupled to the output 616 of the first power amplifier 110, and a second terminal 634 of the first inductor 622 is coupled to the second output 618 of the power amplifier 110. The second inductor 624 of the transformer 610 is coupled between the resistive element 210 (e.g., the power switch 510) and ground. More specifically, a first terminal 636 of the second inductor 624 is coupled to the first terminal 212 of the resistive element 210 (e.g., the power switch 510), and a second terminal 638 of the second inductor 624 is coupled to ground.

[0088] In this example, the transformer 620 is configured to convert the differential RF signal from the power amplifier 110 at the first inductor 622 to a single-ended RF signal at the second inductor 624 that is output through the resistive element 210 (e.g., the power switch 510) to the antenna 130 (as shown in FIG. 1). In this example, the transformer 610 can also be referred to as an unbalanced transformer. The transformer 610 can also be used to provide impedance matching between the antenna 130 and the differential output of the power amplifier 110, as discussed further below. Figure 5

[0089] ​The receiver includes an inductor 640 coupled between the output pin 520 and an input 542 of the LNA 540. A first terminal 642 of the inductor 640 is coupled to the output pin 520 and a second terminal 644 of the inductor 640 is coupled to the input 542 of the LNA 540. The inductor 640 is used to provide impedance matching between the antenna 130 Figure 5 shown in FIG. 6B. The receiver also includes a pull-down switch 650 coupled between the input 542 of the LNA 540 and ground. The pull-down switch 650 is also coupled between the second terminal 644 of the inductor 640 and ground. Figure 6 In the example shown in FIG. 6B, the pull-down switch 650 is implemented with an NFET. However, it should be appreciated that the pull-down switch 650 can be implemented with a different type of transistor. The switch controller 550 Figure 5 shown in FIG. 6B) can control the on / off state of the pull-down switch 650, as discussed further below.

[0090] For examples in which the resistive element 210 is implemented with the power switch 510, the switch controller 550 turns on the power switch 510 and turns on the pull-down switch 650 in the transmit mode. In this mode, the power switch 510 couples the transformer 620 to the antenna 130 Figure 5 shown in FIG. 6B). In addition, the pull-down switch 650 couples the input 542 of the LNA 540 to ground. This protects the input 542 of the LNA 540 from potential damage due to large transmit RF signals in the transmit mode. The pull-down switch 650 also couples the second terminal 644 of the inductor 640 to ground. Thus, in the transmit mode, the inductor 640 is coupled between the output pin 520 and ground. In this example, the transformer 620 in combination with the inductor 640 provides impedance matching between the antenna 130 and the differential output of the power amplifier 110.

[0091] In the transmit mode, the power amplifier 110 outputs a differential RF signal to the transformer 620. The transformer 620 converts the differential RF signal to a single-ended RF signal that is output to the antenna 130 via the power switch 510. In addition, as discussed above, the power switch 510 is used as a power sensor in the power detector 120 for measuring the power delivered to the antenna 130.

[0092] In the receive mode, the switch controller 550 turns off the power switch 510 and turns off the pull-down switch 650. In this mode, the power switch 510 decouples the transformer 620 from the antenna 130, which isolates the input 542 of the LNA 540 from the load from the transformer 620. This isolation prevents a situation in which the load from the transformer 620 reduces the noise figure of the LNA 540.

[0093] In receive mode, the antenna 130 receives an RF signal from another wireless device (not shown). The received RF signal is sent to the input 542 of the LNA 540 via the inductor 640. The LNA 540 amplifies the received RF signal and outputs the amplified RF signal at the output 544 for further processing. For example, the output 544 can be coupled to a frequency downconverter (not shown) that is configured to downconvert the frequency of the amplified RF signal from RF to baseband or an intermediate frequency.

[0094] In certain aspects, it can be desirable to provide electrostatic discharge (ESD) protection for the transmitter and receiver. An ESD event can occur when an electrical charge is accidentally deposited on the output pin 520. The electrical charge can build up on the output pin 520, causing a large potential to appear on the output pin 520, which can damage the LNA 540 and / or other devices (not shown) coupled to the output pin 520. To prevent ESD events, it is desirable to provide a discharge path from the output pin 520 to ground to safely discharge the electrical charge from the output pin 520.

[0095] To provide a discharge path from the output pin 520 to ground to provide ESD protection, a shunt inductor 710 can be coupled in parallel with the power switch 510, an example of which is shown in Figure 7 In this example, the shunt inductor 710 is coupled in series with the second inductor 624 of the transformer 620. During an ESD event, the shunt inductor 710 and the second inductor 624 of the transformer 620 provide a discharge path from the output pin 520 to ground to safely discharge the electrical charge on the output pin 520.

[0096] When the power switch 510 is off, the shunt inductor 710 is coupled in parallel with the off-capacitance of the power switch 510, forming an LC network. In one example, the inductance of the shunt inductor 710 can be chosen such that the LC network resonates at the frequency (e.g., center frequency) of the RF signal received by the LNA 540 in receive mode. As a result, the LC network appears as an open circuit in receive mode, which helps to isolate the input 542 of the LNA 540 from the load from the transformer 620. As discussed above, if the LNA 540 is not isolated from the transformer 620 in receive mode, the load from the transformer 620 can degrade the noise figure of the LNA 540.

[0097] Figure 8 A wireless device 700 according to certain aspects is shown Figure 3An exemplary implementation of the first square circuit 215 and the second square circuit 220, the differential circuit 330, and the low-pass filter 340 is provided. In this example, the first square circuit 215 includes a first transistor 815, wherein the gate of the first transistor 815 is coupled to a first terminal 212 of a resistive element 210 (e.g., a power switch 510). The first transistor 815 is configured to generate a first current (denoted as "i") proportional to the square of the voltage at the gate of the first transistor 815, based on a square-law relationship between the current (e.g., drain current) of the first transistor 815 and the gate voltage of the first transistor 815. sqA (t)”). Since the gate of the first transistor 815 is coupled to the first terminal 212 of the resistor element 210, the first current is proportional to the square of the voltage at the first terminal 212 of the resistor element 210. In some implementations, the resistor element 210 can be implemented using a power switch 510.

[0098] The second square circuit 220 includes a second transistor 820, wherein the gate of the second transistor 820 is coupled to a second terminal 214 of a resistive element 210 (e.g., a power switch 510). The second transistor 820 is configured to generate a second current (denoted as "i") proportional to the square of the voltage at the gate of the second transistor 820, based on a square-law relationship between the current (e.g., drain current) of the second transistor 820 and the gate voltage of the second transistor 820. sqB (t)”). Since the gate of the second transistor 820 is coupled to the second terminal 214 of the resistor element 210, the second current is proportional to the square of the voltage at the second terminal 214 of the resistor element 210.

[0099] It should be understood that the power detector 210 may also include biasing circuitry (not shown) for biasing the gates of the first and second transistors 815 and 820. Figure 8 In the example, the first transistor 815 is implemented using a first NFET having a drain coupled to a first input 232 of the power measurement circuit 230 and a source coupled to ground, and the second transistor 820 is implemented using a second NFET having a drain coupled to a second input 234 of the power measurement circuit 230 and a source coupled to ground. However, it should be understood that the first and second transistors 815 and 820 can be implemented using other types of transistors.

[0100] In this example, the difference circuit 330 includes a differential amplifier 830 having a first input 822 coupled to the drain of the first transistor 815, a second input 824 coupled to the drain of the second transistor 820, and an output coupled to the low pass filter 340. The differential amplifier 830 is configured to generate an output signal proportional to a difference between a first current from the first transistor 815 and a second current from the second transistor 820. Since the first current is proportional to the square of the voltage at the first terminal 212 of the resistive element 210 and the second current is proportional to the square of the voltage at the second terminal 214 of the resistive element 210, the output signal of the amplifier 830 is proportional to the power delivered to the antenna 130. In one example, the differential amplifier 830 is implemented with a transimpedance differential amplifier, where the output signal 830 of the amplifier is a voltage.

[0101] The output signal of the amplifier 830 is time-averaged by the low pass filter 340 to generate a filtered output signal proportional to the average power delivered to the antenna 130. For example, the low pass filter 340 can be configured to filter out the second harmonic term in equation (5) discussed above, such that the filtered output signal is proportional to the average power delivered to the antenna 130. In this example, the filtered output signal provides a measure of the average power delivered to the antenna 130 and is output as a power measurement signal at the output 236 of the power measurement circuit 230. In Figure 8 In the example shown in FIG. 3, the low pass filter 340 is implemented with a resistive-capacitive (RC) low pass filter including a resistor 850 coupled between the output of the amplifier 830 and the output 236 of the power measurement circuit 230, and a capacitor 860 coupled between the output 236 of the power measurement circuit 230 and ground. It should be appreciated that the low pass filter 340 is not limited to an RC filter and can be implemented with another type of low pass filter.

[0102] It should be appreciated that the differential amplifier 830 is not limited to the example where the first and second signals are currents. The differential amplifier 830 can also be used in implementations where the first and second signals are voltages. In general, the first input 822 of the differential amplifier 830 is coupled to the output 218 of the first squaring circuit 215, the second input 824 of the differential amplifier 830 is coupled to the output 224 of the second squaring circuit 220, and the differential amplifier 830 generates an output signal proportional to a difference between the first and second signals. The output signal can be a voltage or a current.

[0103] The voltage at the first terminal 212 of the resistive element 210 (i.e., v A (t)) is proportional to the square of the voltage at the second terminal 214 of the resistive element 210 (i.e., v BThe difference between (t) can be called the differential mode voltage, which is related to the current flowing through antenna 130. A (t) and v B The average value of (t) can be called the common-mode voltage, and can be given by the following formula:

[0104]

[0105] The common-mode voltage is related to the voltage across antenna 130. Both differential-mode and common-mode voltages may be needed to accurately measure the power delivered to antenna 130.

[0106] During transmission, the voltage at the first terminal 212 (i.e., v) A (t)) and the voltage at the second terminal 214 (i.e., v) B (t) can be relatively large (e.g., one volt or more), while the difference between these voltages (i.e., v) is small due to the small resistance of the resistive element 210. A (t)-v B The differential-mode voltage (t) may be very small. As a result, the differential-mode voltage may be much smaller than the common-mode voltage, which may make it difficult for the square circuits 215 and 220 to sense the differential-mode voltage, thus reducing the accuracy of power measurements. For example, the differential-mode voltage can be on the order of tens of millivolts, while the common-mode voltage can be one volt or more. To mitigate this situation, the common-mode voltage can be reduced relative to the differential-mode voltage to improve the sensitivity to the differential-mode voltage at the square circuits 215 and 220. This can be achieved using a transformer configured to maintain the differential-mode voltage while reducing the common-mode voltage, as discussed further below.

[0107] Figure 9 An example of a transformer 905 coupled between a resistive element 210 (e.g., power switch 510) and square circuits 215 and 220 is shown, depending on certain aspects. The transformer 905 is configured to maintain the differential-mode voltage across the resistive element 210 while reducing the common-mode voltage to improve sensitivity to the differential-mode voltage at the square circuits 215 and 220.

[0108] Transformer 905 includes a first inductor 910 (e.g., a primary inductor) and a second inductor 920 (e.g., a secondary inductor), wherein the second inductor 920 is magnetically coupled to the first inductor 910. Each of the inductors 910 and 920 may be implemented using a coil inductor, a helical inductor, a planar inductor, or other types of inductors.

[0109] In this example, the first inductor 910 of the transformer 905 is coupled in parallel with the resistive element 210 (e.g., the power switch 510). More specifically, the first terminal 912 of the first inductor 910 is coupled to the first terminal 212 of the resistive element 210, and the second terminal 914 of the first inductor 910 is coupled to the second terminal 214 of the resistive element 210. For examples in which the resistive element 210 is implemented with the power switch 510, the first inductor 910 of the transformer 905 can also function as a shunt inductor to provide ESD protection since the first inductor 910 is coupled in parallel with the power switch 510 in this example. In this case, the first inductor 910 can replace the shunt inductor 710 in FIG. 7. Figure 7

[0110] The second inductor 920 is coupled between the inputs of the squaring circuits 215 and 220. More specifically, the first terminal 922 of the second inductor 920 is coupled to the input 216 of the first squaring circuit 215, and the second terminal 924 of the second inductor 920 is coupled to the input 222 of the second squaring circuit 220. For examples in which the first squaring circuit 215 includes the first transistor 815 and the second squaring circuit 220 includes the second transistor 820, the first terminal 922 of the second inductor 920 is coupled to the gate of the first transistor 815, and the second terminal 924 of the second inductor 920 is coupled to the gate of the second transistor 820.

[0111] In this example, the transformer 905 maintains the differential-mode voltage across the resistive element 210. As a result, the differential-mode voltage applied to the inputs of the squaring circuits 215 and 220 is approximately the same as the differential-mode voltage across the resistive element 210. The transformer 905 reduces the common-mode voltage such that the common-mode voltage at the squaring circuits 215 and 220 is related to the common-mode voltage at the resistive element 210 by:

[0112]

[0113] where v A (t) is the voltage at the input 216 of the first squaring circuit 215, v B (t) is the voltage at the input 222 of the second squaring circuit 220, C T is the capacitance between the first inductor 910 and the second inductor 920, and C M is the capacitance at the inputs 216 and 222 of the squaring circuits 215 and 220. As shown in equation (13), the transformer 905 reduces the common-mode voltage by a ratio of C T / C M . Thus, by designing the capacitance C T ​The reduction in common-mode voltage can be set to a desired amount. The design parameters for setting the capacitance C T may include the spacing between inductors 910 and 920, the dielectric material between inductors 910 and 920, the overlap between inductors 910 and 920, and / or one or more other parameters. In some implementations, the capacitance C T may be designed to reduce the common-mode voltage by a factor of two or ten or more (i.e., to reduce the common-mode voltage at squaring circuits 215 and 220 to one-tenth or less of the common-mode voltage at resistive element 210).

[0114] Reducing the common-mode voltage relative to the differential-mode voltage advantageously increases the sensitivity of squaring circuits 215 and 220 to the differential-mode voltage, which improves the accuracy of the power measurement. Reducing the common-mode voltage also allows squaring circuits 215 and 220 to be implemented with lower voltage devices (e.g., low voltage transistors), which can reduce the power and / or size of squaring circuits 215 and 220.

[0115] During transmission, the voltage at first terminal 212 of resistive element 210 (i.e., v A (t)) and the voltage at second terminal 214 of resistive element 210 (i.e., v B (t)) can be relatively large (e.g., one or more volts). In this case, the voltages at terminals 212 and 214 of resistive element 210 can be scaled down before inputting the voltages to squaring circuits 215 and 220. Scaling down the voltages allows squaring circuits 215 and 220 to be implemented with low voltage devices (e.g., low voltage transistors) to reduce the power and / or size of squaring circuits 215 and 220.

[0116] In this regard, Figure 10 An example is shown in which power detector 120 includes a first attenuator 1030 coupled between first terminal 212 of resistive element 210 and input 216 of first squaring circuit 215, and a second attenuator 1035 coupled between second terminal 214 of resistive element 210 and input 222 of second squaring circuit 220. First attenuator 1030 is configured to scale down the voltage at first terminal 212 by an attenuation factor a and output the attenuated voltage to input 216 of first squaring circuit 215. Similarly, second attenuator 1035 is configured to scale down the voltage at second terminal 214 by an attenuation factor a and output the attenuated voltage to input 222 of second squaring circuit 220. In this example, first attenuator 1030 inputs a v A (t) to input 216 of first squaring circuit 215, and second attenuator 1035 inputs a v B (t) to input 222 of second squaring circuit 220.

[0117] Figure 11 An exemplary implementation of the first and second attenuators 1030 and 1035 according to certain aspects is shown. Note that the power measurement circuit 230 is not shown in Figure 11 this example. In this example, the first attenuator 1030 includes a first capacitive voltage divider 1115, and the second attenuator 1035 includes a second capacitive voltage divider 1125. Each of the capacitive voltage dividers 1115 and 1125 includes a first capacitor CI and a second capacitor C2 coupled in series between a respective terminal of the resistive element 210 and ground. The output 1118 of the first attenuator 1030 is taken at a node between the respective first capacitor CI and the respective second capacitor C2, and the output 1128 of the second attenuator 1035 is taken at a node between the respective first capacitor CI and the respective second capacitor C2, as shown in Figure 11 this example. In this example, the attenuation factor a of each of the attenuators 1030 and 1035 is given by:

[0118]

[0119] where CI in equation (14) is the capacitance of the respective first capacitor CI, C2 in equation (14) is the capacitance of the respective second capacitor C2, and Cin is the input capacitance of the input of the respective one of the square circuits 215 and 220. The advantage of implementing the first and second attenuators 1030 and 1035 with the first and second capacitive voltage dividers 1115 and 1125, respectively, is that the capacitive voltage dividers 1115 and 1125 can have a small load (e.g., by making the capacitance CI small), and thus help to reduce the load on the terminals 212 and 214 of the resistive element 210 (e.g., the power switch 510).

[0120] In certain aspects, the first capacitor CI and / or the second capacitor C2 in each of the attenuators 1030 and 1035 can have a programmable capacitance. This enables the attenuation factor a of each of the attenuators 1030 and 1035 to be programmed by programming the capacitance of the respective first capacitor CI and / or the capacitance of the respective second capacitor C2 according to a desired attenuation factor (e.g., based on equation (14)). In one example, the programmable attenuation factor a can be used to extend the dynamic power range of the power detector 120. In this example, the attenuation factor a can be increased for larger voltages at the terminals 212 and 214 of the resistive element 210 to provide greater attenuation for the larger voltages, and the attenuation factor a can be decreased for smaller voltages at the terminals 212 and 214 of the resistive element 210 to provide less attenuation for the smaller voltages.

[0121] Figure 12An exemplary implementation of the power measurement circuit 230 is shown in accordance with certain aspects. In this example, the power measurement circuit 230 includes the first low pass filter 410, the second low pass filter 420, and the difference circuit 430 discussed above with reference to Figure 4 The first low pass filter 410, the second low pass filter 420, and the difference circuit 430 discussed above. The power measurement circuit 230 also includes a multiplexer 1210 and an analog-to-digital converter (ADC) 1220. Also, in this example, the power detector 120 includes the first attenuator 1030 and the second attenuator 1035 discussed above.

[0122] The multiplexer 1210 includes a first input 1212 coupled to an output of the first low pass filter 410, a second input 1214 coupled to an output of the second low pass filter 420, and an output 1216 coupled to an input of the ADC 1220. An output of the ADC 1220 is coupled to the difference circuit 430. The multiplexer 1210 is configured to couple the outputs of the low pass filters 410 and 420 to the input of the ADC 1220 one at a time, as discussed further below.

[0123] In this example, the first attenuator 1030 attenuates the voltage at the first terminal 212 of the resistive element 210 by an attenuation factor a and outputs the attenuated voltage to the first squaring circuit 215. The first squaring circuit 215 then generates a square of the voltage at the first terminal 212 of the resistive element 210 scaled by the attenuation factor a 2 G, where G is a gain of the first squaring circuit 215. The first low pass filter 410 generates a filtered first signal proportional to a square of a root mean square of the voltage at the first terminal 212 (e.g., by filtering out the second harmonic discussed above). The filtered first signal can be given by a 2 Gv A_rms 2 Gv A_rms is a root mean square of the voltage at the first terminal 212. The filtered first signal is input to the first input 1212 of the multiplexer 1210.

[0124] The second attenuator 1035 attenuates the voltage at the second terminal 214 of the resistive element 210 by an attenuation factor a and outputs the attenuated voltage to the second squaring circuit 220. The second squaring circuit 220 then generates a square of the voltage at the second terminal 214 of the resistive element 210 scaled by the attenuation factor a 2 G, where G is a gain of the second squaring circuit 220. The second low pass filter 420 generates a filtered second signal proportional to a square of a root mean square of the voltage at the second terminal 214 (e.g., by filtering out the second harmonic discussed above). The filtered second signal can be given by a 2 Gv B_rms 2where v B_rms is the root mean square of the voltage at the second terminal 214. The filtered second signal is input to a second input 1214 of the multiplexer 1210.

[0125] The multiplexer 1210 inputs the filtered first signal and the filtered second signal one at a time to an ADC 1220. The ADC 1220 digitizes each of the filtered first signal and the filtered second signal one at a time and outputs a digital version of the filtered first signal (i.e., a first digital signal) and a digital version of the filtered second signal (i.e., a second digital signal) to the difference circuit 430. The difference circuit 430 can then compute, in the digital domain, a difference between the filtered first signal and the filtered second signal, where the difference provides a measure of the average power delivered to the antenna 130. The difference circuit 430 can output the computed difference at the output 236 as a digital power measurement signal.

[0126] Figure 13 An example is shown in which the multiplexer 1210 in the power detector 120 is moved closer to the resistive element 210 relative to the position of the multiplexer 1210 in Figure 12 In this example, the power detector 120 can include one squaring circuit 1315 (rather than two squaring circuits) and one low pass filter 1320 (rather than two low pass filters).

[0127] An output of the first attenuator 1030 is coupled to a first input 1212 of the multiplexer 1210, and an output of the second attenuator 1035 is coupled to a second input 1214 of the multiplexer 1210. An output 1216 of the multiplexer 1210 is coupled to an input of the squaring circuit 1315. An output of the squaring circuit 1315 is coupled to an input of the low pass filter 1320, and an output of the low pass filter 1320 is coupled to an input of the ADC 1220. An output of the ADC 1220 is coupled to an input of the difference circuit 430.

[0128] In this example, the first attenuator 1030 attenuates the voltage at the first terminal 212 of the resistive element 210 by the attenuation factor a and outputs the attenuated voltage to the first input 1212 of the multiplexer 1210. The second attenuator 1035 attenuates the voltage at the second terminal 214 of the resistive element 210 by the attenuation factor a and outputs the attenuated voltage to the second input 1214 of the multiplexer 1210. The multiplexer 1210 outputs the attenuated voltage from the first attenuator 1030 and the attenuated voltage from the second attenuator 1035 one at a time to the squaring circuit 1315.

[0129] When the multiplexer 1210 outputs the attenuated voltage from the first attenuator 1030 to the squaring circuit 1315, the squaring circuit 1315 generates a first signal proportional to the square of the voltage at the first terminal 212 of the resistive element 210 with a proportional factor a 2 G, where G is the gain of the squaring circuit 1315. The low pass filter 1320 then generates a filtered first signal proportional to the square of the root mean square of the voltage at the first terminal 212. The ADC 1220 digitizes the filtered first signal and outputs a digital version of the filtered first signal (i.e., a first digital signal) to the differencing circuit 430.

[0130] When the multiplexer 1210 outputs the attenuated voltage from the second attenuator 1035 to the squaring circuit 1315, the squaring circuit 1315 generates a second signal proportional to the square of the voltage at the second terminal 214 of the resistive element 210 with a proportional factor a 2 G. The low pass filter 1320 generates a filtered second signal proportional to the square of the root mean square of the voltage at the second terminal 214. The ADC 1220 digitizes the filtered second signal and outputs a digital version of the filtered second signal (i.e., a second digital signal) to the differencing circuit 430.

[0131] The differencing circuit 430 can then compute, in the digital domain, a difference between the filtered first signal and the filtered second signal, where the difference provides a measure of the average power delivered to the antenna 130. The differencing circuit 430 can output the computed difference at the output 236 as a digital power measurement signal.

[0132] Thus, in this example, one squaring circuit 1315 and one low pass filter 1320 (rather than two squaring circuits and two low pass filters) are used to measure the power. An advantage of this implementation is that using one squaring circuit 1315 and one low pass filter 1320 can help reduce errors in the power measurement due to mismatches between the two squaring circuits and mismatches between the two low pass filters.

[0133] Figure 14 An example is shown in which the multiplexer 1210 in the power detector 120 is moved closer to the resistive element 210 according to certain aspects. Figure 13 In this example, the power detector 120 includes one attenuator 1410, one squaring circuit 1315, and one low pass filter 1320.

[0134] In this example, the first terminal 212 of the resistive element 210 is coupled to a first input 1212 of a multiplexer 1210, and the second terminal 214 of the resistive element 210 is coupled to a second input 1214 of the multiplexer 1210. An output 1216 of the multiplexer 1210 is coupled to an input of an attenuator 1410. An output of the attenuator 1410 is coupled to an input of a squaring circuit 1315, and an output of the squaring circuit 1315 is coupled to an input of a low-pass filter 1320. An output of the low-pass filter 1320 is coupled to an input of an ADC 1220, and an output of the ADC 1220 is coupled to an input of the difference circuit 430.

[0135] In this example, the multiplexer 1210 outputs the voltage at the first terminal 212 of the resistive element 210 and the voltage at the second terminal 214 of the resistive element 210 to the input of the attenuator 1410 one at a time.

[0136] When the multiplexer 1210 outputs the voltage at the first terminal 212 of the resistive element 210 to the attenuator 1410, the attenuator 1410 attenuates the voltage at the first terminal 212 by an attenuation factor a and outputs the attenuated voltage to the squaring circuit 1315. The squaring circuit 1315 generates a first signal proportional to the square of the voltage at the first terminal 212 by a scale factor a 2 G, where G is the gain of the squaring circuit 1315. The low-pass filter 1320 generates a filtered first signal proportional to the square of the root-mean-square of the voltage at the first terminal 212. The ADC 1220 digitizes the filtered first signal and outputs a digital version of the filtered first signal (i.e., a first digital signal) to the difference circuit 430.

[0137] When the multiplexer 1210 outputs the voltage at the second terminal 214 of the resistive element 210 to the attenuator 1410, the attenuator 1410 attenuates the voltage at the second terminal 214 by an attenuation factor a and outputs the attenuated voltage to the squaring circuit 1315. The squaring circuit 1315 generates a second signal proportional to the square of the voltage at the second terminal 214 by a scale factor a 2 G. The low-pass filter 1320 generates a filtered second signal proportional to the square of the root-mean-square of the voltage at the second terminal 214. The ADC 1220 digitizes the filtered second signal and outputs a digital version of the filtered second signal (i.e., a second digital signal) to the difference circuit 430.

[0138] The difference circuit 430 can then compute, in the digital domain, a difference between the filtered first signal and the filtered second signal, where the difference provides a measure of the average power delivered to the antenna 130. The difference circuit 430 can output the computed difference at the output 236 as a digital power measurement signal.

[0139] Thus, in this example, one attenuator (rather than two attenuators) is used to attenuate the voltage at the first terminal 212 of the resistive element 210 and the voltage at the second terminal 214 of the resistive element 210. One advantage of this implementation is that using one attenuator can help reduce power measurement errors due to mismatch between two attenuators.

[0140] Figure 15 Another example implementation of the power measurement circuit 230 is shown in accordance with certain aspects. In this example, the power measurement circuit 230 includes the first low pass filter 410, the second low pass filter 420, and the difference circuit 430 discussed above with reference to Figure 4 In this example, the difference circuit 430 is implemented with a differential amplifier 830, where a first input 822 of the differential amplifier 830 is coupled to the output of the first low pass filter 410 and a second input 824 of the differential amplifier 830 is coupled to the output of the second low pass filter 420.

[0141] In this example, the first attenuator 1030 attenuates the voltage at the first terminal 212 of the resistive element 210 by the attenuation factor a and outputs the attenuated voltage to the first squaring circuit 215. The first squaring circuit 215 then generates a first signal proportional to the square of the voltage at the first terminal 212 of the resistive element 210 by the attenuation factor a 2 G, where G is the gain of the first squaring circuit 215. The first low pass filter 410 generates a filtered first signal proportional to the square of the root mean square of the voltage at the first terminal 212. The filtered first signal is input to the first input 822 of the differential amplifier 830.

[0142] The second attenuator 1035 attenuates the voltage at the second terminal 214 of the resistive element 210 by the attenuation factor a and outputs the attenuated voltage to the second squaring circuit 220. The second squaring circuit 220 then generates a second signal proportional to the square of the voltage at the second terminal 214 of the resistive element 210 by the attenuation factor a 2 G, where G is the gain of the second squaring circuit 220. The second low pass filter 420 generates a filtered second signal proportional to the square of the root mean square of the voltage at the second terminal 214. The filtered second signal is input to the second input 824 of the differential amplifier 830.

[0143] The difference amplifier 830 generates an output signal proportional to a difference between the filtered first signal and the filtered second signal, and outputs the output signal at an output 236 as a power measurement signal. In this example, the output signal provides a measure of average power delivered to the antenna 130.

[0144] As discussed above, Figure 1 The power control circuit 150, shown in FIGS. 1-2, is configured to control the output power of the power amplifier 110 based on the power measurement from the power detector 120. In this regard, Figure 16A An example is shown in which the output 236 of the power measurement circuit 230 is coupled to an input 152 of the power control circuit 150. The power measurement circuit 230 can use any of the example implementations shown in FIGS. 3-5. The output 154 of the power control circuit 150 is coupled to the power amplifier 110 to control the output power of the power amplifier 110. Figure 2 to Figure 10 and Figure 12 to Figure 15 The output 154 of the power control circuit 150 is coupled to the power amplifier 110 to control the output power of the power amplifier 110.

[0145] In operation, the power detector 120 outputs a power measurement signal to the power control circuit 150, where the power measurement signal indicates a measured power (e.g., average power) delivered to the antenna 130, as discussed above. The power control circuit 150 then adjusts the output power of the power amplifier 110 based on the power measurement signal. For example, the power control circuit 150 can adjust the output power of the power amplifier 110 based on the measured power to maintain the power delivered to the antenna 130 at or near a target transmit power.

[0146] For example, the target transmit power can be set by a power control loop (not shown) based on a distance between the transmitter and a wireless device (not shown) receiving the RF signal and / or channel conditions. The power control loop can be an open power control loop or a closed power control loop. For cases in which the antenna 130 is part of an antenna array that employs beamforming, the target transmit power can be set by a beamformer based on corresponding beamforming weights. The beamforming weights can correspond to a desired beam direction of the antenna array. The target transmit power can also be set based on one or more other parameters.

[0147] The power control circuit 150 can also adjust the output power of the power amplifier 110 based on the measured power to prevent the transmit power from exceeding a power limit set by a regulatory agency. In another example, the measured power can be used to detect a fault of the power amplifier 110 and / or the antenna 130. For example, if the measured power is outside a normal power range, a fault can be detected.

[0148] In certain aspects, the power control circuit 150 can adjust the output power of the power amplifier 110 by adjusting the supply voltage of the power amplifier 110. In this regard, Figure 16B An example is shown in which the transmitter includes an adjustable voltage source 1610 configured to provide a supply voltage having an adjustable voltage level to the power amplifier 110. In some implementations, the adjustable voltage source 1610 can be implemented with a voltage regulator.

[0149] In Figure 16B In an example, the adjustable voltage source 1610 has a control input 1615 coupled to the output 154 of the power control circuit 150 and a voltage supply output 1620 coupled to the voltage supply input 116 of the power amplifier 110. In this example, the power control circuit 150 controls the output power of the power amplifier 110 by controlling the voltage level of the supply voltage provided by the adjustable voltage source 1610 to the power amplifier 110. For example, the power control circuit 150 can increase the output power by causing the adjustable voltage 1610 to increase the supply voltage, and can decrease the output power by causing the adjustable voltage source 1610 to decrease the supply voltage.

[0150] In certain aspects, the power control circuit 150 can adjust the output power of the power amplifier 110 by adjusting the amplitude of the RF signal input into the power amplifier 110. In this regard, Figure 16C An example is shown in which the transmitter includes an amplitude adjuster 1650 configured to adjust the amplitude of the RF signal input to the input 112 of the power amplifier 110. In some implementations, the amplitude adjuster 1650 includes a variable gain amplifier, where the amplitude of the RF signal is adjusted by adjusting the gain of the variable gain amplifier. In other implementations, the amplitude adjuster 1650 includes an attenuator, where the amplitude of the RF signal is adjusted by adjusting the attenuation factor of the attenuator.

[0151] In Figure 16C In an example, the amplitude adjuster 1650 has an input 1652 configured to receive the RF signal, an output 1654 coupled to the input 112 of the power amplifier 110, and a control input 1656 coupled to the output 154 of the power control circuit 150. In this example, the power control circuit 150 controls the output power of the power amplifier 110 by controlling the amplitude adjustment of the RF signal by the amplitude adjuster 1650. For example, the power control circuit 150 can increase the output power by causing the amplitude adjuster 1650 to increase the amplitude of the RF signal, and can decrease the output power by causing the amplitude adjuster 1650 to decrease the amplitude of the RF signal.

[0152] It should be appreciated that the present disclosure is not limited to the above-described examples for controlling the output power of the power amplifier 110, and that the power control circuit 150 can use other techniques to control the output power of the power amplifier 110.

[0153] In certain aspects, the antennas 130 can be part of a phased antenna array, which allows the wireless device to transmit and / or receive signals with high directivity. In this regard, Figure 17 An example of a phased antenna array including multiple antennas 130-1 through 130-n is shown. In this example, the transmitter includes a distributor 1720 and multiple transmit chains 1705-1 through 1705-n. The distributor 1720 has an input 1722 and multiple outputs 1724-1 through 1724-n. The distributor 1720 is configured to receive an RF signal at the input 1722 (e.g., from an upconverter), split the RF signal into multiple output RF signals, and output each of the multiple RF signals at a respective one of the multiple outputs 1724-1 through 1724-n.

[0154] Each of the transmit chains 1705-1 through 1705-n is coupled between a respective one of the outputs 1724-1 through 1724-n of the distributor 1720 and a respective one of the antennas 130-1 through 130-n of the antenna array. Each of the transmit chains 1705-1 through 1705-n includes a respective phase shifter 1710-1 through 1710-n, a respective power amplifier 110-1 through 110-n, and a respective power detector 120-1 through 120-n. Each of the power detectors 120-1 through 120-n can be implemented with any of the example power detectors 120 shown in FIG. 1. Figure 2 to Figure 15

[0155] The transmitter can also include multiple power control circuits 150-1 through 150-n, with each power control circuit 150-1 through 150-n corresponding to a respective one of the transmit chains 1710-1 through 1710-n. In this example, the inputs 152-1 through 152-n of each of the power control circuits 150-1 through 150-n are coupled to the power detectors 120-1 through 120-n in the respective transmit chains 1705-1 through 1705-n to receive the respective power measurement signals. The outputs 154-1 through 154-n of each of the power control circuits 150-1 through 150-n can be coupled to the power amplifiers 110-1 through 110-n in the respective transmit chains 1705-1 through 1705-n.

[0156] ​The transmitter also includes a beamformer 1760 configured to apply beamforming weights to the signals in the transmit chains 1705-1 through 1705-n based on a desired transmit beam direction for the antenna array. In certain aspects, each beamforming weight corresponds to a respective one of the transmit chains 1705-1 through 1705-n, and each beamforming weight can be a complex number including a phase shift and an amplitude. In these aspects, the beamformer 1760 can control the phase shift of the phase shifters 1710-1 through 1710-n in each of the transmit chains 1705-1 through 1705-n based on the phase shift of the respective beamforming weight. For ease of illustration, the individual connections between the beamformer 1760 and the phase shifters 1710-1 through 1710-n are not explicitly shown in Figure 17 .

[0157] The beamformer 1760 can also set a target transmit power for each of the power control circuits 150-1 through 150-n based on the amplitude of the respective beamforming weight. In this example, each of the power control circuits 150-1 through 150-n can adjust the output power of the respective power amplifier 110-1 through 110-n based on the measured power from the respective power detector 120-1 through 120-n in order to maintain the power delivered to the respective antenna 130-1 through 130-n at or near the target transmit power. Each of the power control circuits 150-1 through 150-n can use any of the techniques discussed above to adjust the output power of the respective power amplifier 110-1 through 110-n. For ease of illustration, the individual connections between the beamformer 1760 and the power control circuits 150-1 through 150-n are not explicitly shown in Figure 17 . It will be appreciated that the target transmit power for each of the power control circuits 150-1 through 150-n can also be set based on one or more other parameters in addition to the amplitude of the respective beamforming weight.

[0158] Figure 18 is a diagram of an environment 1800 including an electronic device 1802 that includes a wireless transceiver 1896. The transceiver 1896 can include any of the transceivers shown in Figure 2 to Figure 17 . In the environment 1800, the electronic device 1802 communicates with a base station 1804 over a wireless link 1806. As shown, the electronic device 1802 is depicted as a smartphone. However, the electronic device 1802 can be implemented as any suitable computing or other electronic device, such as a cellular base station, a broadband router, an access point, a cellular or mobile phone, a gaming device, a navigation device, a media device, a laptop computer, a desktop computer, a tablet computer, a server computer, a network-attached storage (NAS) device, a smart appliance, a vehicle-based communication system, an Internet of Things (IoT) device, a sensor or security device, an asset tracker, etc.

[0159] The base station 1804 communicates with the electronic device 1802 via a wireless link 1806, which can be implemented as any suitable type of wireless link. Although depicted as a base station tower of a cellular radio network, the base station 1804 can represent or be implemented as another device, such as a satellite, a terrestrial broadcast tower, an access point, an end-to-end device, a mesh network node, a fiber line, another electronic device as generally described above, and so on. Thus, the electronic device 1802 can communicate with the base station 1804 or another device via a wired connection, a wireless connection, or a combination thereof. The wireless link 1806 can include a downlink of data or control information communicated from the base station 1804 to the electronic device 1802 and an uplink of other data or control information communicated from the electronic device 1802 to the base station 1804. The wireless link 1806 can be implemented using any suitable communication protocol or standard, such as Third Generation Partnership Project Long Term Evolution (3GPP LTE, 3GPP NR 5G), IEEE 802.11, IEEE 802.16, Bluetooth TM and so on.

[0160] The electronic device 1802 includes a processor 1880 and a memory 1882. The memory 1882 can be or form part of a computer-readable storage medium. The processor 1880 can include any type of processor, such as an application processor or a multi-core processor, configured to execute processor-executable instructions (e.g., code) stored by the memory 1882. The memory 1882 can include any suitable type of data storage media, such as volatile memory (e.g., random access memory (RAM)), non-volatile memory (e.g., flash memory), optical media, magnetic media (e.g., disk or tape), and so on. In the context of the present disclosure, the memory 1882 is implemented to store instructions 1884, data 1886, and other information of the electronic device 1802, and thus the memory 1882 does not include transitory propagating signals or carrier waves when configured as or part of a computer-readable storage medium.

[0161] The electronic device 1802 can also include an input / output port 1890. The I / O port 1890 enables data exchange or interaction with other devices, networks, or users, or data exchange or interaction between components of the device.

[0162] The electronic device 1802 can also include a signal processor (SP) 1892 (e.g., such as a digital signal processor (DSP)). The signal processor 1892 can operate similarly to the processor and can be capable of executing instructions and / or processing information in conjunction with the memory 1882.

[0163] For communication purposes, the electronic device 1802 also includes a modem 1894, a wireless transceiver 1896, and one or more antennas (not shown). The wireless transceiver 1896 uses RF wireless signals to provide connectivity to respective networks and other electronic devices connected thereto. The wireless transceiver 1896 can facilitate communication over any suitable type of wireless network, such as a wireless local area network (WLAN), a peer-to-peer (P2P) network, a mesh network, a cellular network, a wireless wide area network (WW AN), a navigation network (e.g., the Global Positioning System (GPS) of North America or another global navigation satellite system (GNSS)), and / or a wireless personal area network (WPAN).

[0164] Figure 19 An exemplary method 1900 for measuring power using a resistive element coupled between a power amplifier and an antenna is illustrated in accordance with certain aspects. The resistive element can correspond to the resistive element 210, the power amplifier can correspond to the power amplifier 110, and the antenna can correspond to the antenna 130. In some implementations, the resistive element is implemented with a power switch (e.g., the power switch 510).

[0165] At block 1910, a voltage from a first terminal of the resistive element is squared to obtain a first signal. For example, the voltage from the first terminal (e.g., the first terminal 212) can be squared by the first squaring circuit 215. The first squaring circuit 215 can be implemented with a transistor (e.g., the first transistor 815), a multiplier, or another type of squaring circuit. In certain aspects, the voltage from the first terminal can be attenuated by an attenuator (e.g., the attenuator 1030) prior to being squared.

[0166] At block 1920, a voltage from a second terminal of the resistive element is squared to obtain a second signal. For example, the voltage from the second terminal (e.g., the second terminal 214) can be squared by the second squaring circuit 220. The second squaring circuit 215 can be implemented with a transistor (e.g., the second transistor 820), a multiplier, or another type of squaring circuit. In certain aspects, the voltage from the second terminal can be attenuated by an attenuator (e.g., the attenuator 1035) prior to being squared. In certain aspects, the voltage from the first terminal and the voltage from the second terminal can be squared one at a time by the same squaring circuit (e.g., the squaring circuit 1315) using a multiplexer (e.g., the multiplexer 1210).

[0167] At block 1930, a measurement signal is generated based on a difference between the first signal and the second signal. The measurement signal can be generated by a difference circuit (e.g., difference circuit 330 or 430). In one example, the difference circuit can be implemented with a differential amplifier (e.g., differential amplifier 830). In this example, the measurement signal can be proportional to the difference between the first signal and the second signal. In another example, the difference circuit can be implemented with digital circuitry that calculates the difference between the first signal and the second signal in the digital domain to generate the measurement signal.

[0168] In certain aspects, the method 1900 can further include low pass filtering the measurement signal. In another aspect, the method can further include low pass filtering the first signal to obtain a filtered first signal and low pass filtering the second signal to obtain a filtered second signal, wherein the measurement signal is based on a difference between the filtered first signal and the filtered second signal.

[0169] It should be appreciated that the present disclosure is not limited to the exemplary terminology used above to describe aspects of the present disclosure, and that the present disclosure encompasses equivalent terminology. For example, the terminals of the resistive element 210 can also be referred to as ports, inputs and outputs of the resistive element 210, two ends of the resistive element 210, or other terminology. The difference circuit can also be referred to as a subtraction circuit or other terminology. The squaring circuit can also be referred to as a square law device, a square law detector, a squaring device, or other terminology. The inductor of the transformer can also be referred to as a winding of the transformer or a side of the transformer (e.g., a primary side and a secondary side).

[0170] As used herein, a squaring circuit is a circuit configured to generate, at its output, a signal (e.g., a voltage or a current) that is proportional to the square of a voltage or a current at its input.

[0171] It should be appreciated that, as used herein, the term “proportional” encompasses the possibility of a proportionality factor of one. For example, a signal that is proportional to the square of a voltage encompasses the possibility that the signal is equal to the square of the voltage, in which case the proportionality factor is 1.

[0172] The switching controller 550, the power measurement circuit 230, and the power control circuit 150 discussed above can each be implemented with a general purpose processor, a digital signal processor (DSP), a state machine, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete hardware components (e.g., logic gates), or any combination thereof, designed to perform the functions described herein. The processor can perform the functions described herein by executing software comprising code for performing the functions. This software can be stored on a computer readable storage medium such as a RAM, a ROM, an EEPROM, an optical disk, and / or a magnetic disk.

[0173] In this disclosure, the word "exemplary" is used to mean "serving as an example, instance, or illustration." Any implementation or aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects of the disclosure. Likewise, the term "aspects" does not require that all aspects of the disclosure include the discussed feature, advantage or mode of operation. The term "coupled" is used herein to refer to the direct or indirect coupling between two structures.

[0174] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An apparatus comprising: A resistive element, including a first terminal and a second terminal, wherein the resistive element is coupled between a power amplifier and an antenna; The first square circuit includes input and output; A first attenuator is coupled between the first terminal of the resistive element and the input of the first square circuit; The second square circuit includes input and output; The second attenuator is coupled between the second terminal of the resistive element and the input of the second square circuit; as well as The differential circuit is coupled to the output of the first square circuit and the output of the second square circuit.

2. The apparatus according to claim 1, wherein: The first square circuit includes a first transistor; and The second square circuit includes a second transistor.

3. The apparatus according to claim 2, wherein: The gate of the first transistor is coupled to the first terminal of the resistive element; The drain of the first transistor is coupled to the differential circuit; The gate of the second transistor is coupled to the second terminal of the resistive element; as well as The drain of the second transistor is coupled to the differential circuit.

4. The apparatus according to claim 1, wherein: The differential circuit includes a differential amplifier comprising a first input, a second input, and an output; The first input of the differential amplifier is coupled to the output of the first square circuit; as well as The second input of the differential amplifier is coupled to the output of the second square circuit.

5. The apparatus according to claim 4, further comprising: A low-pass filter is coupled to the output of the differential amplifier.

6. The apparatus of claim 1, further comprising a transformer, wherein the transformer comprises: A first inductor is coupled between the first terminal of the resistive element and the second terminal of the resistive element; as well as A second inductor is coupled between the input of the first square circuit and the input of the second square circuit, wherein the second inductor is magnetically coupled to the first inductor.

7. The apparatus according to claim 6, wherein: The first square circuit includes a first transistor; The gate of the first transistor is coupled to the first terminal of the second inductor; The drain of the first transistor is coupled to the differential circuit; The second square circuit includes a second transistor; The gate of the second transistor is coupled to the second terminal of the second inductor; as well as The drain of the second transistor is coupled to the differential circuit.

8. The apparatus according to claim 7, wherein: The differential circuit includes a differential amplifier comprising a first input, a second input, and an output; The first input of the differential amplifier is coupled to the drain of the first transistor; as well as The second input of the differential amplifier is coupled to the drain of the second transistor.

9. The apparatus according to claim 8, further comprising: A low-pass filter is coupled to the output of the differential amplifier.

10. The apparatus of claim 1, wherein the resistive element comprises a power switch.

11. The apparatus of claim 10, further comprising: An inductor is coupled between the first terminal and the second terminal of the resistive element.

12. The apparatus of claim 10, further comprising: A low-noise amplifier is coupled to the antenna.

13. The apparatus according to claim 1, wherein: The first attenuator includes a first capacitive voltage divider; and The second attenuator includes a second capacitive voltage divider.

14. The apparatus according to claim 1, further comprising: A first low-pass filter is coupled between the output of the first square circuit and the differential circuit; as well as A second low-pass filter is coupled between the output of the second square circuit and the differential circuit.

15. The apparatus of claim 14, further comprising: A multiplexer includes a first input, a second input, and an output, wherein the first input of the multiplexer is coupled to a first low-pass filter, and the second input of the multiplexer is coupled to a second low-pass filter; as well as An analog-to-digital converter is coupled between the output of the multiplexer and the differential circuit.

16. The apparatus according to claim 1, further comprising: A power control circuit is coupled to the differential circuit, wherein the power control circuit is configured to receive an output signal from the differential circuit and control the output power of the power amplifier based on the output signal.

17. The apparatus of claim 1, wherein the antenna is one of a plurality of antennas in a phased antenna array.

18. An apparatus comprising: Power amplifier; A power switch, including a first terminal and a second terminal, wherein the power switch is coupled between the power amplifier and the antenna; The first square circuit includes input and output; A first attenuator is coupled between the first terminal of the power switch and the input of the first square circuit. The second square circuit includes input and output; The second attenuator is coupled between the second terminal of the power switch and the input of the second square circuit; A differential circuit is coupled to the output of the first square circuit and the output of the second square circuit; as well as A low-noise amplifier is coupled to the antenna.

19. An apparatus comprising: A resistive element, including a first terminal and a second terminal, wherein the resistive element is coupled between a power amplifier and an antenna; A multiplexer, comprising a first input, a second input, and an output; A first attenuator is coupled between the first terminal of the resistive element and the first input of the multiplexer; A second attenuator is coupled between the second terminal of the resistive element and the second input of the multiplexer; A square circuit, including an input and an output, wherein the input of the square circuit is coupled to the output of the multiplexer; A low-pass filter, including an input and an output, wherein the input of the low-pass filter is coupled to the output of the square circuit; An analog-to-digital converter (ADC) includes an input and an output, wherein the input of the ADC is coupled to the output of the low-pass filter; as well as A differential circuit is coupled to the output of the ADC.

20. The apparatus of claim 19, further comprising: An attenuator is coupled between the output of the multiplexer and the input of the square circuit.

21. The apparatus according to claim 19, wherein: The first attenuator includes a first capacitive voltage divider; and The second attenuator includes a second capacitive voltage divider.

22. The apparatus of claim 19, wherein the resistive element comprises a power switch.

23. The apparatus of claim 19, wherein the differential circuit is configured as follows: Receive a first digital signal from the ADC; Receive a second digital signal from the ADC; and Calculate the difference between the first digital signal and the second digital signal.

24. A method for measuring power using a resistive element coupled between a power amplifier and an antenna, the method comprising: The voltage at the first terminal of the resistive element is attenuated to obtain a first attenuated voltage; The first signal is obtained by squaring the first attenuated voltage; The voltage at the second terminal of the resistive element is attenuated to obtain a second attenuated voltage; The second attenuated voltage is squared to obtain the second signal; as well as A measurement signal is generated based on the difference between the first signal and the second signal.

25. The method of claim 24, wherein generating the measurement signal comprises: The first signal is input to the first input of the differential amplifier; The second signal is input to the second input of the differential amplifier; as well as The measurement signal is obtained at the output of the differential amplifier.

26. The method of claim 25, further comprising: The measurement signal is low-pass filtered.

27. The method of claim 24, further comprising: The first signal is low-pass filtered to obtain the filtered first signal; as well as The second signal is low-pass filtered to obtain a filtered second signal, wherein the measurement signal is based on the difference between the filtered first signal and the filtered second signal.

28. The method of claim 27, wherein generating the measurement signal comprises: The filtered first signal is digitized into a first digital signal; The filtered second signal is digitized into a second digital signal; as well as Calculate the difference between the first digital signal and the second digital signal.

Images