A data encoding method and system for prolonging phase change memory life

Abstract

The application discloses a data encoding method and system for prolonging the service life of a phase change memory, and two methods of a repetition method and a statistical method are used to calculate similar units of data characteristics, data in a cache block is expressed by the similar units, and data encoding is realized; when the calculation results of the statistical method and the repetition method are the same, one similar unit is set to encode data through an XOR operation; when the calculation results of the statistical method and the repetition method are different, two similar units are simultaneously used to encode data. Whether the encoded data is too long is judged, and finally, a form in which the number of bit updates of the storage unit is the least is selected as the final data form to be written into the phase change memory. By fully utilizing the similar characteristics of the data in the cache block, the similar units are used as the data characteristics to express other data in the cache block, the number of storage units that need to be updated in the write operation is reduced, and the defects of the short service life of the phase change memory and the high energy consumption caused by the write operation can be significantly overcome.

Description

Technical Field

[0001] This invention belongs to the field of novel non-volatile memory technology, specifically relating to a data encoding method and system for extending the lifespan of phase-change memory. Background Technology

[0002] Today's society has entered the era of big data, with data generated in diverse forms and its volume growing exponentially. To meet the ever-increasing demands of data-intensive applications, storage systems must be upgraded in terms of capacity, performance, energy consumption, and efficiency. Memory, as a major component of storage systems, also faces significant challenges in terms of capacity and energy consumption. To address these issues, researchers have conducted a series of studies, gradually promoting the transformation of memory technology from electrically volatile storage, primarily Dynamic Random Access Memory (DRAM), to novel non-volatile memory (NVM), represented by Phase Change Memory (PCM).

[0003] Novel NVM (Non-Virtual Machine) technologies, characterized by high integration density and no need for refresh operations, are gradually evolving into memory technologies with larger capacities and lower power consumption. These technologies typically utilize the resistance and magnetic properties of materials at different temperatures to store data, generally achieving high storage density. Furthermore, since they do not use capacitors for data storage, there is no static power consumption overhead, achieving data non-volatility. Therefore, various novel NVM technologies have attracted widespread attention from academia and industry. PCM (Polymerase Conversion Model) is a typical representative of novel NVM technologies. Its data storage principle is based on the phase transition properties of reversible phase change materials (such as chalcogenide glasses). In crystalline and amorphous states, phase change materials exhibit low and high resistance characteristics, respectively, and the transition between these two states can be achieved by applying pulses to change the temperature. Because PCM's performance is close to that of DRAM and it can address data byte-by-byte, it holds promise as a next-generation memory technology. However, the following two issues still restrict its further application:

[0004] (1) PCM storage cells have poor durability. Data writing in PCM is achieved by applying pulses to the storage cells to cause a state transition in the phase change material, which is somewhat destructive to PCM storage. It is generally believed that PCM storage cells can withstand 10 8 The storage unit will fail if the number of writes to it exceeds the maximum allowable limit.

[0005] (2) PCM has higher write power consumption. Although PCM has no static power consumption due to refresh operation, the write operation of PCM requires applying pulses to the memory cell to change the state of the phase change material, resulting in higher write power consumption compared to DRAM. Furthermore, the high heat generated by high power writing will negatively affect the lifespan of the memory cell. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a data encoding method and system for extending the life of phase change memory in view of the shortcomings of the prior art, so as to solve the technical problems of poor durability and short life of existing memory cells.

[0007] The present invention adopts the following technical solution:

[0008] A data encoding method for extending the lifespan of a phase-change memory includes the following steps:

[0009] S1. In the write operation, for each data in the last level cache, the data characteristics of the data in the cache block are extracted by the repetition method and the statistical method, and the similar units simiunit0 and simiunit1 in the cache block are calculated. The number of storage units written before data encoding is denoted as N0.

[0010] S2. Determine whether simiunit0 obtained in step S1 is equal to simiunit1;

[0011] S3. When simiunit0 equals simiunit1 in step S2, a similar unit is used for encoding. The standard is that the encoded data can be written to the fewest storage units. One of simiunit0 and simiunit1 is selected. At the same time, the number of storage units written to the encoded data is denoted as N1.

[0012] S4. When simiunit0 is not equal to simiunit1 in step S2, two similar units are used for encoding, and the number of data written to the storage unit after encoding is denoted as N2.

[0013] S5. Check the data length of N1 and N2 after encoding in steps S3 and S4. If the data length exceeds 512 bits, update the number of storage units written to the corresponding form to 512; if the data length does not exceed 512 bits, the corresponding encoding result is valid.

[0014] S6. Compare N0 obtained in step S1 with N1 and N2 obtained in step S5, and select the data format corresponding to the minimum value as the final writing format to complete the data encoding.

[0015] Specifically, in step S1, each cache block is 512 bits long, and the alternative lengths for similar units are 16 bits, 32 bits, 64 bits, and 128 bits.

[0016] Furthermore, when calculating similar units using the statistical method, an array A of the same length as the similar units is set as the statistical array. The cache block is then segmented at a granularity of L bits to obtain... Each sub-cache block;

[0017] Iterate through each cache block and record the content of each bit in each sub-cache block in the statistics array A. If the content of a bit in the sub-cache block is 1, increment the content of the corresponding position in the statistics array by 1; if the content of a bit in the sub-cache block is 0, increment the content of the corresponding position in the statistics array by 0.

[0018] After completing the traversal, process the statistical array A. If any element in A is greater than or equal to... If at least half of the sub-cache blocks contain 1 at this location, then the element in A will be reset to 1; otherwise, if an element is less than 1... Then the corresponding element will be reset to 0;

[0019] The result of the statistical method when the contents of the statistical array A after being sorted are used as similarity units of length L bits.

[0020] Furthermore, when calculating similar units using the repetition method, the cache block is segmented with a similar unit length of L bits as the granularity. The number of times each sub-cache block appears is counted, and the sub-cache block with the most repetitions is taken as the calculation result of the repetition method when the similar unit length is L bits.

[0021] Specifically, in step S3, the cache block is segmented according to the length of the similar unit, and each sub-cache block is XORed with the similar unit. If the XOR result is 0, the corresponding sub-block and the content of the similar unit are the same, and the corresponding flag bit is set to 0; if the XOR result is not 0, the corresponding sub-block and the content of the similar unit are different, and the corresponding flag bit is set to 1; the result that requires the least amount of writing to the storage unit after encoding is selected as the final result of encoding with a similar unit.

[0022] Furthermore, there are four alternative lengths for similar units. After data encoding, they are organized into the form of: prefix + similar unit + flag bit + non-zero content of XOR result, where the prefix indicates the length of the similar unit.

[0023] Furthermore, if simiunit0 is equal to simiunit1, simiunit0 is directly used as the result.

[0024] Specifically, in step S4, the cache block is segmented according to the length of the similarity unit. The result of the repetition method, simiunit0, is used as the main similarity unit. For the remaining sub-cache blocks that are not equal to simiunit0, a new simiunit1 is calculated using a statistical method and used as the auxiliary similarity unit. Sub-blocks that are the same as simiunit0 are obtained by XORing simiunit0 with each sub-cache block, and their corresponding flag bits are set to 0 in tag0. For sub-blocks that are not equal to simiunit0, XOR operations are performed with simiunit1 obtained by the statistical method to mark the sub-blocks that are equal to simiunit1, and their corresponding flag bits are set to 0 in tag1. The one that has the fewest writes to the storage unit after encoding is selected as the final result of encoding with two similarity units.

[0025] Furthermore, there are four alternative lengths for similarity units. After data encoding, they will be organized in the form of: prefix + main similarity unit + tag0 + secondary similarity unit + tag1 + content that is not zero when XORed with the secondary similarity unit. The prefix indicates the length of the similarity unit.

[0026] In a second aspect, embodiments of the present invention provide a data encoding system for extending the lifespan of a phase-change memory, comprising:

[0027] In the write operation, the extraction module uses the repetition method and the statistical method to extract the data characteristics of the data in each cache block in the last level cache, and calculates the similar units simiunit0 and simiunit1 in the cache block. The number of storage units written before data encoding is denoted as N0.

[0028] The judgment module determines whether simiunit0 obtained from the extraction module is equal to simiunit1;

[0029] In the first encoding module, when simiunit0 equals simiunit1 in the judgment module, a similar unit is used for encoding. The standard is that the encoded data can be written to the fewest storage units. One of simiunit0 and simiunit1 is selected, and the number of storage units written to the encoded data is denoted as N1.

[0030] In the second encoding module, when simiunit0 is not equal to simiunit1 in the judgment module, two similar units are used for encoding, and the number of data written to the storage unit after encoding is denoted as N2.

[0031] The verification module checks the data lengths of N1 and N2 after encoding by the first and second encoding modules. If the data length exceeds 512 bits, the corresponding number of entries written to the storage unit is updated to 512. If the data length does not exceed 512 bits, the corresponding encoding result is valid.

[0032] The output module compares N0 obtained from the extraction module with N1 and N2 obtained from the verification module, selects the data format corresponding to the minimum value as the final write format, and completes the data encoding.

[0033] Compared with the prior art, the present invention has at least the following beneficial effects:

[0034] This invention discloses a data encoding method for extending the lifespan of phase-change memory (PCM). It extracts features from the data in the cache block of the last-level cache in the memory system and designs two methods—repetition and statistical methods—to calculate representative data features—similar units. These similar units represent the data within the cache block, thus achieving data encoding. When the calculation results of the statistical and repetition methods are the same, one similar unit is used for data encoding via an XOR operation; when the calculation results of the statistical and repetition methods are different, two similar units are considered for data encoding simultaneously. The encoded data is checked for excessive length; if the length exceeds 512 bits, the encoding is invalid. Finally, the form requiring the fewest bit-by-bit updates to the storage cells is selected as the final data form and written into the PCM. By fully utilizing the similarity characteristics of data within the cache block and using similar units to represent other data within the cache block, the number of storage cells that need to be updated during write operations is reduced, significantly overcoming the shortcomings of short PCM lifespan and high power consumption caused by write operations.

[0035] Furthermore, the current standard size of the last-level cache block is 64 bytes (512 bits). Existing methods for optimizing the lifespan and energy consumption of phase-change memory, such as FPC (Frequent Pattern Compression) and SimiEncode, all use 64-byte cache blocks to verify the optimization effect. Therefore, the cache block size in this invention is 64 bytes, which is close to reality and convenient for comparison with other methods.

[0036] The alternative lengths for similar units are derived from experiments. This invention uses GEM5 and NVMain, widely used and recognized in domestic and international research, to analyze the workload in SPEC CPU 2006. A statistical array of length 128 is used to analyze the last-level cache. Each element in the statistical array corresponds to 4 consecutive bits within the cache block, recording the proportion of write operations in real-world scenarios where 4 consecutive bits are 0. The statistical results are as follows: Figure 6As shown, data within cache blocks exhibits certain similarities and patterns in some operating scenarios, with varying granularity of these patterns across different scenarios. Based on experimental results, this paper sets the similarity unit to 16 bits, 32 bits, 64 bits, and 128 bits. The aim is to extract the similarity characteristics of the data within the cache block, i.e., the similarity unit, and use this similarity unit to represent the data within the cache block, thereby reducing writes to the phase-change memory and extending device lifespan.

[0037] Furthermore, similar units must reflect the data characteristics of their respective cache blocks to better reflect the characteristics of each sub-cache block segmented with the similar unit length as the granularity. To make the similar units more comprehensively representative, the statistical method proposed in this invention sets up an array A of the same length as the similar units as the statistical array, and applies this array to the segmented cache blocks. The content of each bit in each sub-cache block is statistically analyzed.

[0038] Furthermore, the statistical method uses bits as the statistical granularity to perform statistics on each bit of the sub-cache block, extracting similar units from the statistical results. However, when the similar units extracted by the statistical method are not equal to any one sub-cache block, the data length will exceed the length of the entire cache block after encoding according to the encoding method involved in this invention. In this case, the encoding strategy must be abandoned, and the data must be written in its original form. If, at this time, there are repeated sub-cache blocks after the cache block is divided into 16-bit, 32-bit, 64-bit, and 128-bit segments, the repeated sub-cache blocks are selected as similar units, and the encoding process can continue.

[0039] The sub-cache block that appears most frequently can also reflect the data characteristics of the cache block it belongs to. Although it is not as comprehensive or granular as the statistical method, it is simple and can continue to encode when the statistical method cannot be implemented.

[0040] Furthermore, the cache block is segmented with the length of the similar unit as the granularity. Each sub-cache block is XORed with the similar unit. If the XOR result is 0, it means that the corresponding sub-cache block is exactly the same as the similar unit, and therefore can be directly represented by the similar unit without repeated writing; the corresponding flag is set to 0. If the XOR result is not 0, it means that the corresponding sub-cache block differs from the similar unit and cannot be directly represented by the similar unit; the corresponding flag is set to 1. The flag will be used to restore the data during subsequent read operations.

[0041] Furthermore, since data exhibits varying similarity under different workloads, this invention designs four alternative lengths for similarity units. Since each write operation may be suitable for different similarity unit lengths, each write operation selects the most appropriate content from the four alternative lengths. One bit of the 3-bit prefix indicates that a similarity unit is used for encoding this data entry, and the remaining two bits indicate the length of the similarity unit used for the encoded data, thus obtaining the content of the similarity unit. The flag bit length represents the number of sub-cache blocks after the cache block is divided into sub-cache blocks with the similarity unit length as the granularity. Its content indicates whether the corresponding sub-cache block is completely equal to the similarity unit. If the flag bit is '0', it means the corresponding sub-cache block is equal to the similarity unit, and the content of this cache block is the content of the similarity unit during data restoration. If the flag bit is '1', it means the corresponding sub-cache block is not equal to the similarity unit, and it is necessary to sequentially combine the non-zero XOR result of the content, and then XOR the similarity unit with the corresponding non-zero XOR result again to restore the content of the corresponding sub-cache block.

[0042] Furthermore, simiunit0 and simiunit1 are similarity units obtained using the repetition method and the statistical method, respectively, with different computational granularities. When they are equal, it indicates that simiunit0 (simiunit1) can serve as a feature of the cache block content at both computational granularities, so this similarity unit can be directly used for encoding.

[0043] Furthermore, consider the following scenario: when sub-cache blocks are duplicated, and the number of each type is very similar, the similarity unit will be more closely matched to the sub-cache block with the largest number of duplicates. When the similarity unit equals the sub-cache block with the highest number of duplicates, it will also result in nearly half of the sub-cache blocks having a non-zero XOR result with the similarity unit, affecting the statistical validity of the similarity unit. When the similarity unit is affected by other factors and is not equal to the sub-cache block with the highest number of duplicates, it may lead to all sub-cache blocks being different from the similarity unit, resulting in an excessively long encoded result, forcing the encoding to be abandoned. Figure 7 As shown, there are three types of sub-cache blocks. If only one similar unit is used, only the result of the repetition method, 11000010, can be selected as the similar unit to continue encoding. In this case, half of the sub-cache blocks cannot be represented by similar units, and the similarity between 11000010 and this half of the sub-cache blocks is only 62.5% (the 4th one) at most and 25% (the 5th to 7th one) at least. In this case, it would be more reasonable to introduce two similar units as representatives of the cache block features.

[0044] Furthermore, when two similarity units are used, the main and auxiliary similarity units have the same length. Therefore, a 3-bit prefix is ​​set, where 1 bit is used to indicate that the data encoding uses two similarity units, and the remaining 2 bits of the prefix can indicate the length of the similarity units used in the encoded data. The length of tag0 is fixed, which is the number of sub-cache blocks divided into the cache block with the similarity unit length as the granularity, indicating which sub-cache blocks are completely equal to the main similarity unit; the length of tag1 is variable, starting from the first sub-cache block that is not equal to the main similarity unit, indicating whether the sub-cache block is equal to the auxiliary similarity unit when it is not equal to the main similarity unit. Combining the non-zero content of the XOR result of tag0, tag1 and the auxiliary similarity unit, as well as the two similarity units, the encoded data can be restored.

[0045] It is understandable that the beneficial effects of the second aspect mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0046] In summary, this invention analyzes data from real workloads, designs an encoding method that fits the characteristics of the data, and proposes two calculation methods for similar units and a method that uses two similar units for encoding simultaneously. The aim is to maximize the representation of the data content of the cache block through similar units, reduce unnecessary data writing, reduce the write power consumption of phase-change memory, and extend the device lifespan.

[0047] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0048] Figure 1 This is a flowchart of the present invention;

[0049] Figure 2 This is a diagram of the memory system architecture of the present invention;

[0050] Figure 3 This is a schematic diagram of two similar unit calculation methods in this invention;

[0051] Figure 4 This is a schematic diagram of the encoding in this invention;

[0052] Figure 5 This is a schematic diagram of the data organization format after encoding with two similar units in this invention;

[0053] Figure 6 This diagram illustrates the statistical results of the proportion of 0s appearing in the bzip2 and leslie3d cache blocks when the instruction count is 200 million.

[0054] Figure 7 This is a schematic diagram that requires two similar units. Detailed Implementation

[0055] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0056] In the description of this invention, it should be understood that the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0057] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0058] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Additionally, the character " / " in this document generally indicates that the preceding and following objects have an "or" relationship.

[0059] It should be understood that although terms such as first, second, third, etc., may be used in the embodiments of the present invention to describe the preset range, these preset ranges should not be limited to these terms. These terms are only used to distinguish the preset ranges from one another. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0060] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0061] The accompanying drawings illustrate various structural schematic diagrams according to embodiments disclosed in this invention. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0062] This invention provides a data encoding method to extend the lifespan of a phase-change memory (PCM). It utilizes the similarity and regularity of data within cache blocks in the last-level cache to encode data by calculating similar cells and using these similar cells to represent the data in their respective cache blocks. This reduces the number of writes to memory cells, thereby extending the PCM's lifespan and reducing the energy consumption required for write operations.

[0063] Please see Figure 2 The architecture used in the data encoding method for extending the lifespan of a phase-change memory according to the present invention includes an LLC resonant circuit, a memory controller, and a PCN array. The memory controller is provided with a similarity unit calculation module, an encoding module, and a decoding module. The PCN array is provided with a write buffer and a read buffer. The output of the LLC resonant circuit enters the PCN array through the similarity unit calculation module, the encoding module, and the write buffer. The PCN array returns to the input of the LLC resonant circuit through the read buffer and the decoding module. The encoding module and the decoding module are respectively connected to a feedforward table.

[0064] Please see Figure 1 The present invention provides a data encoding method for extending the lifespan of a phase-change memory, comprising the following steps:

[0065] S1. For each cache block in the last-level cache, the data characteristics are extracted using both the repetition method and the statistical method to calculate the similar units within the cache block. Each cache block is 512 bits long, and the candidate lengths for similar units are 16 bits, 32 bits, 64 bits, and 128 bits. The similar units obtained by the two calculation methods are denoted as simiunit0 and simiunit1, respectively. The number of storage units that need to be written before data encoding is denoted as N0.

[0066] Please see Figure 3 In the write operation, the corresponding cache block content in the last level cache is operated on. Let N0 be the number of storage units that need to be updated bit by bit before writing the data. The similar units of the cache block are calculated by the repetition method and the statistical method.

[0067] The calculation of similar units using statistical and repetition methods is as follows:

[0068] (1) When calculating similar units using the repetition method, the cache block is segmented with the similar unit length L bits as the granularity. The number of times each sub-cache block appears is counted. The sub-cache block with the most repeated occurrences is the calculation result of the repetition method when the similar unit length is L bits.

[0069] (2) When calculating similar units using the statistical method, an array A of the same length as the similar units (denoted as L bits) is set as the statistical array. The cache block is then segmented with L bits as the granularity to obtain... Each sub-cache block is processed. For each sub-cache block, the content of each bit in the sub-cache block is recorded in the statistics array A. If a bit in the sub-cache block is '1', the corresponding position in the statistics array is incremented by 1; if a bit in the sub-cache block is '0', the corresponding position in the statistics array is incremented by 0, i.e., it remains unchanged. After completing the traversal, the statistics array A is processed. If any element in A is greater than or equal to... This indicates that at least half of the sub-cache blocks contain '1' at this location, therefore the element in A is reset to '1'; conversely, if an element is less than... Then the element is reset to '0'; after the statistical array A is sorted, its contents are the calculation results of the statistical method when the length of the similar unit is L bits.

[0070] S2. Determine whether simiunit0 obtained in step S1 is equal to simiunit1. If they are not equal, proceed to step S4 to encode the data in the cache block.

[0071] Determine whether simiunit0 obtained in step S1 is equal to simiunit1. If they are equal, then only one similar unit code is used; otherwise, while using one similar unit code, consider using two similar unit codes.

[0072] S3. Encode using only one similar unit, with the standard that the encoded data can be written to fewer storage units. Select the better one from simiunit0 and simiunit1. If simiunit0 and simiunit1 are equal, use simiunit0 directly as the result. Meanwhile, let N1 be the number of storage units that the encoded data needs to be written to.

[0073] When using a single similarity unit, the cache block is segmented according to the length of the similarity unit. Each sub-cache block is then XORed with the similarity unit. If the XOR result is 0, it means the sub-block's content is the same as the similarity unit, and the corresponding flag is set to '0'. If the XOR result is not 0, it means the sub-block's content is different from the similarity unit, and the corresponding flag is set to '1'. After encoding, the data will be organized in the form of "prefix + similarity unit + flag + content with a non-zero XOR result", where the prefix represents the length of the similarity unit. There are four alternative lengths for the similarity unit, and the one that requires the least amount of writing to the storage unit after encoding is selected as the final result of encoding using a single similarity unit.

[0074] Please see Figure 4 When using a similar unit for encoding, the similar unit in the diagram is 64 bits long. The original cache block is divided into 8 segments (sub0 to sub7) with a granularity of 64 bits. Each segment is XORed with the similar unit to obtain 8 new segments (sub0 to sub7). ’ up to sub7 ’ Check if the XOR result is 0, and record any non-zero results, such as... Figure 4 The intermediate results are shown in the figure. Let N1 be the number of storage units that need to be updated bit by bit after the data is written and encoded.

[0075] S4. Use two similar units for encoding. At this time, simiunit0 and simiunit1 are not equal. Use both units for encoding. Let N2 be the number of storage units that need to be written after encoding.

[0076] When using two similar units, the cache block is segmented according to the similar unit length. The result of the repetition method, `simiunit0`, is used as the primary similar unit. For the remaining sub-cache blocks that are not equal to `simiunit0`, a new `simiunit1` is calculated using a statistical method and used as the secondary similar unit. Sub-blocks identical to `simiunit0` are calculated by XORing `simiunit0` with each sub-cache block, and their corresponding flag is set to '0' in `tag0`. For sub-blocks not equal to `simiunit0`, they are XORed with `simiunit1` obtained by the statistical method, and sub-blocks equal to `simiunit1` are marked, with their corresponding flag set to '0' in `tag1`. After data encoding, it will be organized as "prefix + primary similar unit + tag0 + secondary similar unit + tag1 + content whose XOR result with the secondary similar unit is not 0", where the prefix represents the similar unit length. There are four alternative similar unit lengths; the one requiring the least amount of memory space after encoding is selected as the final result of encoding with two similar units.

[0077] Please see Figure 5When simiunit0 and simiunit1 are not equal, consider using two similar units for encoding. The result simiunit0 obtained by the repetition method is used as the primary similar unit. Each sub-block is XORed with it, and the sub-buffer blocks equal to the primary similar unit are marked in tag0. For sub-blocks not equal to the primary similar unit, a statistical method is used to calculate the secondary similar unit simiunit1. The sub-buffer blocks equal to the secondary similar unit are then XORed in tag1, and the non-zero values ​​of the XOR result are recorded. The encoded data organization is as follows: Figure 5 As shown in the diagram. Let N2 be the number of storage units that need to be updated bit by bit after the data is written and encoded.

[0078] S5. Check the length of the encoded data in steps S3 and S4. If the data length exceeds 512 bits, the encoding result is too long, and updating this form requires writing 512 storage units; if the data length does not exceed 512 bits, the encoding result is valid.

[0079] Determine if the encoded data is too long. If the data length exceeds 512 bits, the encoding method cannot be used. Update the number of storage units that need to be updated bit by bit to 512.

[0080] S6. Compare N0, N1, and N2, and select the data format corresponding to the minimum value as the final write format.

[0081] In another embodiment of the present invention, a data encoding system for extending the lifespan of a phase-change memory is provided. This system can be used to implement the above-mentioned data encoding method for extending the lifespan of a phase-change memory. Specifically, the data encoding system for extending the lifespan of a phase-change memory includes an extraction module, a judgment module, a first encoding module, a second encoding module, a verification module, and an output module.

[0082] In the extraction module, during the write operation, the data characteristics of the data in each cache block in the last level cache are extracted using the repetition method and the statistical method. The similar units simiunit0 and simiunit1 in the cache block are calculated, and the number of storage units written before data encoding is denoted as N0.

[0083] The judgment module determines whether simiunit0 obtained from the extraction module is equal to simiunit1;

[0084] In the first encoding module, when simiunit0 equals simiunit1 in the judgment module, a similar unit is used for encoding. The standard is that the encoded data can be written to the fewest storage units. One of simiunit0 and simiunit1 is selected, and the number of storage units written to the encoded data is denoted as N1.

[0085] In the second encoding module, when simiunit0 is not equal to simiunit1 in the judgment module, two similar units are used for encoding, and the number of data written to the storage unit after encoding is denoted as N2.

[0086] The verification module checks the length of the data encoded by the first and second encoding modules. If the data length exceeds 512 bits, it updates the number of entries written to the corresponding storage unit to 512. If the data length does not exceed 512 bits, the corresponding encoding result is valid.

[0087] The output module compares N0 obtained from the extraction module, N1 obtained from the first encoding module, and N2 obtained from the second encoding module, and selects the data format corresponding to the minimum value as the final writing format to complete the data encoding.

[0088] In another embodiment of the present invention, a terminal device is provided, comprising a processor and a memory. The memory stores a computer program, which includes program instructions. The processor executes the program instructions stored in the computer storage medium. The processor may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing and control core of the terminal, suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions to implement a corresponding method flow or corresponding function. The processor described in this embodiment of the present invention can be used in the operation of a data encoding method to extend the lifespan of phase-change memory, including:

[0089] During the write operation, for each data block in the last-level cache, the data characteristics of the data in the cache block are extracted using the repetition method and statistical method, and similar units simiunit0 and simiunit1 in the cache block are calculated. The number of storage units written before data encoding is denoted as N0. It is determined whether simiunit0 is equal to simiunit1. If simiunit0 is equal to simiunit1, one similar unit is used for encoding. The standard is that the encoded data can be written to the fewest storage units. One of simiunit0 and simiunit1 is selected, and the number of storage units written after encoding is denoted as N1. If simiunit0 is not equal to simiunit1, two similar units are used for encoding, and the number of storage units written after encoding is denoted as N2. The length of the encoded data is checked. If the data length exceeds 512 bits, the number of storage units written to the corresponding form is updated to 512. If the data length does not exceed 512 bits, the corresponding encoding result is valid. N0, N1 and N2 are compared, and the data form corresponding to the minimum value is selected as the final write form to complete the data encoding.

[0090] In another embodiment of the present invention, a storage medium is also provided, specifically a computer-readable storage medium (memory). This computer-readable storage medium is a memory device in a terminal device used to store programs and data. It is understood that the computer-readable storage medium here can include both the built-in storage medium in the terminal device and extended storage media supported by the terminal device. The computer-readable storage medium provides storage space that stores the terminal's operating system. Furthermore, this storage space also stores one or more instructions suitable for loading and execution by a processor. These instructions can be one or more computer programs (including program code). It should be noted that the computer-readable storage medium here can be high-speed RAM or non-volatile memory, such as at least one disk storage device.

[0091] One or more instructions stored in a computer-readable storage medium can be loaded and executed by a processor to implement the corresponding steps of the data encoding method for extending the lifetime of phase-change memory in the above embodiments; one or more instructions in the computer-readable storage medium are loaded and executed by the processor in the following steps:

[0092] During the write operation, for each data block in the last-level cache, the data characteristics of the data in the cache block are extracted using the repetition method and statistical method, and similar units simiunit0 and simiunit1 in the cache block are calculated. The number of storage units written before data encoding is denoted as N0. It is determined whether simiunit0 is equal to simiunit1. If simiunit0 is equal to simiunit1, one similar unit is used for encoding. The standard is that the encoded data can be written to the fewest storage units. One of simiunit0 and simiunit1 is selected, and the number of storage units written after encoding is denoted as N1. If simiunit0 is not equal to simiunit1, two similar units are used for encoding, and the number of storage units written after encoding is denoted as N2. The length of the encoded data is checked. If the data length exceeds 512 bits, the number of storage units written to the corresponding form is updated to 512. If the data length does not exceed 512 bits, the corresponding encoding result is valid. N0, N1 and N2 are compared, and the data form corresponding to the minimum value is selected as the final write form to complete the data encoding.

[0093] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0094] Experiments were conducted using GEM5 and NVMain on real workloads in SPEC CPU 2006. For the two main indicators of extending the lifespan of phase-change memory, bit flips and write power consumption, the coding method based on data similarity designed in this invention can reduce bit flips by an average of 36.94% and write power consumption by 37.54% in six workloads with a data similarity of approximately 90%. This represents an average improvement of over 4.84% and 3.89% in optimization performance compared to other methods.

[0095] In summary, the present invention provides a data encoding method and system for extending the lifespan of phase-change memory. By analyzing and extracting data characteristics, and using similar units to encode the data in the cache block of the last-level cache, the write to the phase-change memory is reduced, thereby extending its lifespan.

[0096] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0097] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0098] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0099] In the embodiments provided by this invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0100] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0101] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0102] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0103] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0104] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0105] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0106] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. A data encoding method for extending the lifespan of a phase-change memory, characterized in that, Includes the following steps: S1. In the write operation, for each data in the last level cache, the data characteristics of the data in the cache block are extracted by the repetition method and the statistical method, and the similar units simiunit0 and simiunit1 in the cache block are calculated. The number of storage units written before data encoding is denoted as N0. Each cache block is 512 bits long. The candidate lengths for similar units are 16 bits, 32 bits, 64 bits, and 128 bits. When calculating similar units using the statistical method, an array A of the same length as the similar units is used as the statistical array. The cache block is then segmented with a granularity of L bits to obtain... Each sub-cache block is traversed. The content of each bit in each sub-cache block is recorded in the statistics array A. If the content of a bit in the sub-cache block is 1, the content of the corresponding position in the statistics array is incremented by 1; if the content of a bit in the sub-cache block is 0, the content of the corresponding position in the statistics array is incremented by 0. After completing the traversal, process the statistical array A. If any element in A is greater than or equal to... This indicates that at least half of the sub-cache blocks contain 1 at this location, so the element in A is reset to 1; conversely, if an element is less than... If the corresponding element is not found, then the corresponding element will be reset to 0; the content of the statistical array A after being sorted will be used as the result of the statistical method when the length of the similarity unit is Lbit. When calculating similar units using the repetition method, the cache block is segmented with a similar unit length of L bits as the granularity. The number of occurrences of each sub-cache block is counted, and the sub-cache block with the most repetitions is taken as the calculation result of the repetition method when the similar unit length is L bits. S2. Determine whether simiunit0 obtained in step S1 is equal to simiunit1; S3. When simiunit0 equals simiunit1 in step S2, a similar unit is used for encoding. The standard is that the encoded data can be written to the fewest storage units. One of simiunit0 and simiunit1 is selected. At the same time, the number of storage units written to the encoded data is denoted as N1. S4. When simiunit0 is not equal to simiunit1 in step S2, two similar units are used for encoding, and the number of data written to the storage unit after encoding is denoted as N2. S5. Check the data length of N1 and N2 after encoding in steps S3 and S4. If the data length exceeds 512 bits, update the number of storage units written to the corresponding form to 512; if the data length does not exceed 512 bits, the corresponding encoding result is valid. S6. Compare N0 obtained in step S1 with N1 and N2 obtained in step S5, and select the data format corresponding to the minimum value as the final writing format to complete the data encoding.

2. The data encoding method for extending the lifespan of a phase-change memory according to claim 1, characterized in that, In step S3, the cache block is segmented according to the length of similar units, and each sub-cache block is XORed with the similar unit. If the XOR result is 0, the corresponding sub-block and the content of the similar unit are the same, and the corresponding flag bit is set to 0. If the XOR result is not 0, the corresponding sub-block and the content of the similar unit are different, and the corresponding flag bit is set to 1; the result that writes the least to the storage unit after encoding is selected as the final result of encoding with a similar unit.

3. The data encoding method for extending the lifespan of a phase-change memory according to claim 2, characterized in that, There are four possible lengths for similar units. After data encoding, they are organized as follows: prefix + similar unit + flag bit + non-zero content of XOR result. The prefix indicates the length of the similar unit.

4. The data encoding method for extending the lifespan of a phase-change memory according to claim 2, characterized in that, If simiunit0 is equal to simiunit1, then simiunit0 is used directly as the result.

5. The data encoding method for extending the lifespan of a phase-change memory according to claim 1, characterized in that, In step S4, the cache block is segmented according to the length of the similar unit. The result of the repetition method, simiunit0, is used as the main similar unit. For the remaining sub-cache blocks that are not equal to simiunit0, a new simiunit1 is calculated using a statistical method and used as the auxiliary similar unit. The sub-blocks that are the same as simiunit0 are calculated by XORing simiunit0 with each sub-cache block, and their corresponding flag bits are set to 0 in tag0; for sub-blocks that are not equal to simiunit0, they are XORed with simiunit1 obtained by statistical method, and the sub-blocks that are equal to simiunit1 are marked, and their corresponding flag bits are set to 0 in tag1; the one that has the fewest writes to the storage unit after encoding is selected as the final result of encoding with two similar units.

6. The data encoding method for extending the lifespan of a phase-change memory according to claim 5, characterized in that, There are four possible lengths for similarity units. After data encoding, the data will be organized in the form of: prefix + main similarity unit + tag0 + secondary similarity unit + tag1 + content that is not zero when XORed with the secondary similarity unit. The prefix indicates the length of the similarity unit.

7. A data encoding system for extending the lifespan of a phase-change memory, characterized in that, include: In the write operation, the extraction module uses the repetition method and the statistical method to extract the data characteristics of the data in each cache block in the last level cache, and calculates the similar units simiunit0 and simiunit1 in the cache block. The number of storage units written before data encoding is denoted as N0. Each cache block is 512 bits long. The candidate lengths for similar units are 16 bits, 32 bits, 64 bits, and 128 bits. When calculating similar units using the statistical method, an array A of the same length as the similar units is used as the statistical array. The cache block is then segmented with a granularity of L bits to obtain... Each sub-cache block is traversed. The content of each bit in each sub-cache block is recorded in the statistics array A. If the content of a bit in the sub-cache block is 1, the content of the corresponding position in the statistics array is incremented by 1; if the content of a bit in the sub-cache block is 0, the content of the corresponding position in the statistics array is incremented by 0. After completing the traversal, process the statistical array A. If any element in A is greater than or equal to... This indicates that at least half of the sub-cache blocks contain 1 at this location, so the element in A is reset to 1; conversely, if an element is less than... If the corresponding element is not found, then the corresponding element will be reset to 0; the content of the statistical array A after being sorted will be used as the result of the statistical method when the length of the similarity unit is Lbit. When calculating similar units using the repetition method, the cache block is segmented with a similar unit length of L bits as the granularity. The number of occurrences of each sub-cache block is counted, and the sub-cache block with the most repetitions is taken as the calculation result of the repetition method when the similar unit length is L bits. The judgment module determines whether simiunit0 obtained from the extraction module is equal to simiunit1; In the first encoding module, when simiunit0 equals simiunit1 in the judgment module, a similar unit is used for encoding. The standard is that the encoded data can be written to the fewest storage units. One of simiunit0 and simiunit1 is selected, and the number of storage units written to the encoded data is denoted as N1. In the second encoding module, when simiunit0 is not equal to simiunit1 in the judgment module, two similar units are used for encoding, and the number of data written to the storage unit after encoding is denoted as N2. The verification module checks the data lengths of N1 and N2 after encoding by the first and second encoding modules. If the data length exceeds 512 bits, the corresponding number of entries written to the storage unit is updated to 512. If the data length does not exceed 512 bits, the corresponding encoding result is valid. The output module compares N0 obtained from the extraction module with N1 and N2 obtained from the verification module, selects the data format corresponding to the minimum value as the final writing format, and completes the data encoding.

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