Method, device and electronic equipment for diagnosing abnormal operation of a dma controller

Abstract

Embodiments of the present application provide a method, device and electronic equipment for diagnosing abnormal operation of a DMA controller, relating to the technical field of communication. The method comprises: reading data from a memory in a process of transmitting data by using a DMA controller to reproduce a target problem; comparing first target data in the read data with second target data corresponding to the target problem, wherein the second target data is pre-set normal data; and saving a current state as abnormal scene information for abnormal reason analysis in a case where the first target data is inconsistent with the second target data. In this way, some scene states when the DMA controller is abnormal can be captured in time, and the diagnosis efficiency of the DMA controller abnormality can be greatly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, in particular to a method and device for diagnosing operation exception of a DMA controller and an electronic device. BACKGROUND

[0002] Although the DMA (Direct Memory Access) controller has the advantages of efficient transmission and non-occupation of CPU (Center Process Unit) resources, the hardware implementation is relatively complex and needs to follow the bus protocol. Meanwhile, since the DMA controller and the CPU interact through shared memory, improper cache consistency control of the memory can cause problems in the interaction between the DMA controller and the CPU, and trigger unpredictable problems. It is difficult to locate such problems, and the common method is to add some diagnostic registers in the DMA controller to record some stats and states.

[0003] Some abnormal phenomena of the DMA controller often have contingency and timeliness, and the on-site state when the problem occurs is difficult to capture. What is seen is often the state after the exception, which cannot well reflect the cause of the exception, and brings certain difficulty to problem diagnosis. SUMMARY

[0004] Embodiments of the present application provide a method and device for diagnosing operation exception of a DMA controller, an electronic device and a readable storage medium, which can capture some on-site states when the DMA controller is abnormal in time, and greatly improve the diagnosis efficiency of the DMA controller exception.

[0005] Embodiments of the present application can be implemented as follows:

[0006] In a first aspect, embodiments of the present application provide a method for diagnosing operation exception of a DMA controller, and the method comprises:

[0007] reading data from the memory in the process of transmitting data by the DMA controller to reproduce a target problem;

[0008] comparing first target data in the read data with second target data corresponding to the target problem, wherein the second target data is pre-set normal data;

[0009] in the case that the first target data is inconsistent with the second target data, saving the current state as abnormal on-site information for abnormal cause analysis.

[0010] In a second aspect, embodiments of the present application provide a device for diagnosing operation exception of a DMA controller, and the device comprises:

[0011] a data reading module, configured to read data from the memory in a process of transmitting data by using the DMA controller to reproduce a target problem;

[0012] a comparison module, configured to compare first target data in the read data with second target data corresponding to the target problem, wherein the second target data is pre-set normal data;

[0013] a processing module, configured to save a current state as abnormal scene information for abnormal reason analysis in a case where the first target data is inconsistent with the second target data.

[0014] In a third aspect, an electronic device is provided, including a processor and a memory, the memory storing machine executable instructions capable of being executed by the processor, and the processor being capable of executing the machine executable instructions to implement the method for diagnosing DMA controller operation abnormality in the foregoing embodiments.

[0015] In a fourth aspect, a readable storage medium is provided, storing a computer program, and the computer program is executed by a processor to implement the method for diagnosing DMA controller operation abnormality in the foregoing embodiments.

[0016] The method, device, electronic device and readable storage medium for diagnosing DMA controller operation abnormality provided by the embodiments of the present application can read data from the memory in a process of transmitting data by using the DMA controller to reproduce a target problem, then compare first target data in the read data with second target data corresponding to the target problem, wherein the second target data is pre-set normal data, and then save a current state as abnormal scene information for abnormal reason analysis in a case where the first target data is inconsistent with the second target data. In this way, some scene states when the DMA controller is abnormal can be captured in time, and the diagnosis efficiency of the DMA controller abnormality can be greatly improved. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as a limitation to the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0018] Figure 1 a block schematic diagram of the electronic device provided by the embodiments of the present application;

[0019] Figure 2One of flowcharts of diagnosing abnormal operation of a DMA controller provided by an embodiment of the present application;

[0020] Figure 3 A schematic diagram of working principle of the DMA controller;

[0021] Figure 4 The second one of flowcharts of diagnosing abnormal operation of a DMA controller provided by an embodiment of the present application;

[0022] Figure 5 The third one of flowcharts of diagnosing abnormal operation of a DMA controller provided by an embodiment of the present application;

[0023] Figure 6 An execution process schematic diagram of a method of diagnosing abnormal operation of a DMA controller provided by an embodiment of the present application;

[0024] Figure 7 A block schematic diagram of a device of diagnosing abnormal operation of a DMA controller provided by an embodiment of the present application.

[0025] Icon: 100-electronic device; 110-memory; 120-processor; 130-communication unit; 200-device of diagnosing abnormal operation of a DMA controller; 210-data reading module; 220-comparison module; 230-processing module. DETAILED DESCRIPTION

[0026] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0027] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0028] It should be noted that the relational terms herein, such as first and second and the like, are used solely to distinguish one from another entity or action, without necessarily requiring or implying any actual relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0029] DMA (Direct Memory Access) is a way of CPU interacting with peripherals. DMA controller can realize the transmission of memory block by obtaining the bus control right. Compared with traditional IO, DMA does not need CPU to participate in the process of data transmission, and can realize large batch data transmission at a time, has the advantages of high transmission efficiency and not occupying CPU resources. At present, it is widely used in the scene of network card transceiving message.

[0030] Although the DMA controller has the advantages of high transmission efficiency and not occupying CPU resources, the hardware implementation is relatively complex and needs to follow the bus protocol. At the same time, since the DMA controller and the CPU interact through shared memory, improper cache coherency control of the memory will cause problems in the interaction between the DMA controller and the CPU, and unpredictable problems will be caused. It is difficult to locate such problems, and the general method is to add some diagnostic registers in the DMA controller to record some stats and states.

[0031] However, some abnormal phenomena of the DMA controller often have contingency and timeliness, and the scene state of the problem is difficult to capture. What is seen is often some state generated after the exception, which cannot well reflect the cause of the exception, and brings certain difficulty to problem diagnosis.

[0032] In view of the above situation, the embodiment of the present application provides a method and device for diagnosing operation exception of DMA controller and electronic equipment. The observation condition is set in advance, and the problem scene meeting the observation condition is saved in the process of reproducing the target problem by using the DMA controller to transmit data, so as to facilitate the diagnosis of the abnormal reason.

[0033] It is worth mentioning that the defects of the above solutions are the results of the inventors after practice and careful study, and therefore, the discovery process of the above problems and the solutions proposed by the embodiments of the present application to the above problems should be the contributions of the inventors to the present application.

[0034] Some embodiments of the present application will be described in detail below with reference to the drawings. The following examples and features in the examples can be combined with each other without conflict.

[0035] Please refer to Figure 1 , Figure 1 is a block schematic diagram of an electronic device 100 provided by the embodiments of the present application. The electronic device 100 can be, but is not limited to, a DMA controller and the like. The electronic device 100 includes a memory 110, a processor 120 and a communication unit 130. The memory 110, the processor 120 and the communication unit 130 are directly or indirectly electrically connected to each other to realize the transmission or interaction of data. For example, these elements can be electrically connected to each other through one or more communication buses or signal lines.

[0036] The memory 110 is configured to store programs or data. The memory 110 can be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (EPROM), an electrically erasable programmable read only memory (EEPROM) and the like.

[0037] The processor 120 is configured to read / write the data or programs stored in the memory 110 and perform corresponding functions. For example, the memory 110 stores a device 200 for diagnosing operation abnormities of a DMA controller, and the device 200 for diagnosing operation abnormities of the DMA controller includes at least one software function module stored in the memory 110 in the form of software or firmware. The processor 120 runs the software programs and modules stored in the memory 110, such as the device 200 for diagnosing operation abnormities of the DMA controller in the embodiments of the present application, to perform various function applications and data processing, i.e. to realize the method for diagnosing operation abnormities of the DMA controller in the embodiments of the present application.

[0038] The communication unit 130 is configured to establish a communication connection between the electronic device 100 and another communication terminal via a network, and to transmit and receive data via the network.

[0039] It should be understood that, Figure 1 The illustrated structure is merely a schematic diagram of the structure of the electronic device 100, and the electronic device 100 can further include more or fewer components than those shown in Figure 1 or have a different configuration than that shown in Figure 1 . Figure 1 The components shown in the above description can be implemented in hardware, software, or a combination thereof.

[0040] Reference will be made to Figure 2 , Figure 2 One of flowcharts of a method for diagnosing an abnormal operation of a DMA controller provided by an embodiment of the present application is shown. The specific flow of the method for diagnosing an abnormal operation of a DMA controller is described in detail below. In this embodiment, the method can include steps S110-S130.

[0041] In step S110, data is read from a memory in a process of transmitting data by using a DMA controller to reproduce a target problem.

[0042] The target problem is a problem to be reproduced in the process of transmitting data by using the DMA controller this time. The problem can be reproduced by repeating a test step or restarting, etc. In the process of transmitting data by using the DMA controller, data can be read from the memory, which is written into the memory by a CPU. The data can be data that needs to be read in a normal operation of the DMA controller, so that the work flow of the DMA controller is not changed too much.

[0043] In step S120, first target data in the read data is compared with second target data corresponding to the target problem.

[0044] After the data is read, the same type of data as the second target data corresponding to the target problem can be selected from the read data as the first target data according to the type of the second target data. Then, the first target data is compared with the second target data to determine whether the currently read data satisfies a preset observation condition. The second target data is a normal data set in advance, i.e., an expected normal data value set in advance.

[0045] In step S130, in a case where the first target data is inconsistent with the second target data, a current state is saved as abnormal scene information for abnormal reason analysis.

[0046] If the first target data is inconsistent with the second target data, it indicates that an exception occurs, and the current state can be saved as abnormal scene information, and subsequent abnormal reason analysis can be performed based on the abnormal scene information.

[0047] The embodiment of the present application saves the problem scene that meets the observation condition, thereby capturing some scene states when the DMA controller is abnormal in time, and greatly improving the diagnosis efficiency of the DMA controller exception.

[0048] Optionally, as a possible implementation manner, different problems and respective corresponding target data can be set in advance, and the target problem can be determined according to the corresponding relationship between the problem and the target data and the target problem, so as to determine the target data corresponding to the target problem as the second target data. The target data corresponding to the problem is set by analyzing the phenomenon of the problem. In this way, it is not necessary to separately set the second target data corresponding to the problem before reproducing the problem each time.

[0049] Optionally, as another possible implementation manner, the phenomenon of the target problem that has occurred can be analyzed before reproducing the target problem, to determine information that needs to be focused on, and then the target data is set according to the information. That is, only one target data is configured in advance, and the target data is set according to the target problem. When the target problem is reproduced, the pre-configured target data can be directly read, and the target data is taken as the second target data, and then the second target data is compared with the first target data. In this way, it is convenient to analyze the reason for each problem in the test process.

[0050] The difference between the above two manners is that the corresponding relationship between different problems and target data is set in advance in the first manner, and only the target data corresponding to the target problem to be reproduced is set in advance in the second manner. The above two manners are only for example, and the obtaining manner of the second target data can be set according to actual needs.

[0051] Optionally, the different problems and respective corresponding target data or the target data corresponding to the target problem configured in advance can be configured in the memory by the CPU in advance.

[0052] As Figure 3As shown, the working principle of the DMA controller is to interact with the CPU by using descriptor information, and the descriptor is a piece of DDR (Double Data Rate SDRAM, Double Data Rate SDRAM) address space, which is organized in a certain format and contains some key information. For example, the fields included are: valid, Done, SOP, EOP, CfgSize, RealSize, DataAddress, and ErrorStatus. Among them, valid describes that the descriptor is valid, and the software (i.e. CPU) has prepared it, and the DMA controller can take the descriptor. Done indicates that the DMA controller has updated the message to the memory pointed to by the descriptor, and the software can take the message. SOP is the start-of-packet flag, and EOP is the end-of-packet flag. CfgSize indicates the length of the data packet pre-allocated by the software. RealSize indicates the actual length of the message collected by the DMA controller. DataAddress indicates the address where the data is stored, and ErrorStatus indicates some exception status.

[0053] When these interaction fields are abnormal due to some unknown reasons such as memory, cache, etc., it will cause the information between the CPU and the DMA controller to be out of synchronization, and further cause the DMA controller to work abnormally. In order to analyze the abnormal reasons of such a situation, the second target data can include the preset fields in the descriptor (i.e. include some specific fields, which belong to the descriptor), that is, include some control information. After the DMA controller takes data from the DDR, the data corresponding to the preset fields in the descriptor can be extracted from the data as the first target data, and then compared with the second target data. If they are inconsistent, the current state is saved as the abnormal scene information.

[0054] That is, it is equivalent to adding a monitoring unit. After the DMA controller takes data from the DDR, the data is first sent to the monitoring unit and compared with the second target data. In the case of consistency, the mechanism of saving the current state is triggered to save the abnormal scene information.

[0055] For example, if the target problem is a message transmission exception, the message length or the specified message feature field can be monitored, that is, the specific value of the monitored message length or the specified message feature field is set in advance, and then the data read from the memory is compared with the specific value set in advance in the process of reproducing the target problem, to determine whether to save the current state.

[0056] The operation object of the DMA controller also includes data itself, which is located in the DDR as the descriptor information, and the consistency of the memory or cache can also cause the abnormal operation of the DMA controller on the data. To facilitate the analysis of the abnormal reason in this case, the second target data can include data information related to the data to be transmitted, that is, some information of the data itself. The specific information type and information content in the data information can be set in combination with the actual situation, for example, in the message sending and receiving application, the data refers to the message, and the data information can include two-layer header, IP header and the like. Correspondingly, after the DMA controller takes out the data from the DDR, the actual data information corresponding to the data information included in the second target data can be extracted from the data as the first target data, and then compared with the second target data. If they are inconsistent, the current state is saved as the abnormal scene information.

[0057] Optionally, as can be known from the above description, the second target data can include the preset field in the descriptor and / or the data information related to the data to be transmitted, which can be set in combination with the actual demand. Then the corresponding data obtained from the DDR is compared with the second target data to determine whether the current is abnormal.

[0058] Optionally, in the embodiment, in the case that the first target data is consistent with the second target data, it can be considered that the current is normal, and the DMA controller can perform the subsequent operation of transmitting data. In the case that the first target data is inconsistent with the second target data, the snapshot mechanism can be used to obtain the abnormal scene information.

[0059] The detailed information in the abnormal scene information is specifically used for abnormal analysis, so the information required for abnormal analysis can be determined in combination with the actual demand, and then the information in these aspects is taken as the abnormal scene information.

[0060] As a possible implementation, at least one of the current bus interface state, the current internal state of the DMA controller, and the data inconsistency information determined according to the first target data and the second target data can be saved as the abnormal scene information. For example, the current bus interface state includes address information and control information transmitted on the bus; the current internal state of the DMA controller can include a FIFO (First Input First Output), a state machine, and various statistical information in the DMA controller; and the inconsistency information can include a type of the inconsistency information, a current value of the type of the inconsistency information, and a value of the type of the inconsistency information in the second target data, for example, including a packet length inconsistency, a current actual packet length A, and an expected packet length (i.e., a packet length included in the second target data) B.

[0061] Please refer to Figure 4 , Figure 4 FIG. 2 is a flowchart of a method for diagnosing an abnormal operation of a DMA controller according to an embodiment of the present application. In this embodiment, after step S110, the method can further include step S120.

[0062] In step S120, the operation of the DMA controller is paused.

[0063] In the case where the first target data and the second target data are inconsistent, if the DMA controller continues to perform subsequent operations, more serious problems can be caused. To avoid this situation, in the case where the first target data and the second target data are inconsistent, all operations of the DMA controller can be paused.

[0064] In addition, in the case where a storage space for storing abnormal scene information can only store one piece of abnormal scene information, if the DMA controller continues to perform operations, the stored abnormal scene information can be refreshed, thereby causing inconvenience for analyzing the cause of the abnormality. For example, the storage space originally stores abnormal scene information at time 1, the DMA controller continues to perform operations, and abnormality occurs again at time 2. The abnormal scene information at time 1 stored in the storage space is refreshed to abnormal scene information at time 2. By pausing the operation of the DMA controller, the abnormal scene information stored in the storage space can also be prevented from being refreshed to abnormal scene information at a later time when abnormality occurs.

[0065] Please refer to Figure 5 , Figure 5 FIG. 3 is a flowchart of a method for diagnosing an abnormal operation of a DMA controller according to an embodiment of the present application. In this embodiment, after step S130, the method can further include step S150.

[0066] Step S150, sending an exception prompt information to the CPU, so that the CPU analyzes the exception cause according to the exception field information.

[0067] Optionally, in the case that the first target data is different from the second target data, an exception interrupt can be triggered to notify the CPU. The exception prompt information can also be sent to the CPU in other manners. In this way, the CPU can analyze the exception cause in time according to the saved exception field information.

[0068] In the embodiment, the observation condition is set in advance, the problem field meeting the observation condition is saved by the snapshot technology, and the CPU is notified in time to process and analyze. In this way, the state of some fields in the case of DMA controller exception can be captured in time, and the diagnosis efficiency of DMA controller exception is greatly improved. In the case of capturing the exception, the subsequent operation of the DMA controller can be paused, and the other operations of the subsequent DMA controller can be prevented from refreshing the exception state.

[0069] The method for diagnosing the operation exception of the DMA controller will be described below by taking the second target data including the preset field in the descriptor as an example. Figure 6

[0070] S1: presetting an expected condition. The expected condition is an expected value of a specific field in the descriptor. That is, the expected data value is set as the expected condition (i.e., the second target data) according to the descriptor information expected by the CPU.

[0071] S2: reading the descriptor information from the DDR.

[0072] S3: comparing the read descriptor information with the expected condition.

[0073] In the case of consistency (i.e., matching), S4 is executed; in the case of inconsistency, S5 is executed.

[0074] S4: determining that the descriptor state is normal, and the DMA controller continues to execute the subsequent operation.

[0075] S5: determining that an exception occurs, and saving the current state as the exception field information.

[0076] The snapshot technology can be used to obtain the exception field information, and the exception field information is saved into a storage unit, which can be, but is not limited to, an SRAM (Static Random-Access Memory). The exception field information can include the bus interface state, the DMA controller state itself, and the unmatched exception information.

[0077] ​S6: suspend all operations of the current DMA controller.

[0078] S7: report the abnormal interruption to the CPU.

[0079] S8: the CPU responds to the interruption.

[0080] S9: the CPU reads the snapshot information. The snapshot information here is the abnormal scene information described above.

[0081] S10: the CPU analyzes the abnormal cause according to the snapshot information.

[0082] To perform the corresponding steps in the above embodiments and various possible manners, an implementation of a device 200 for diagnosing abnormal operation of a DMA controller is given below. Optionally, the device 200 for diagnosing abnormal operation of a DMA controller can be implemented in the device structure of the electronic device 100 shown in Figure 1 . Further, please refer to Figure 7 , Figure 7 for the device structure of the electronic device 100. A block schematic diagram of the device 200 for diagnosing abnormal operation of a DMA controller provided in the embodiments of the present application is shown in the figure. It should be noted that the device 200 for diagnosing abnormal operation of a DMA controller provided in the embodiments has the same basic principles and technical effects as the above embodiments. For brief description, the part of the embodiments not mentioned in the present embodiment can be referred to the corresponding content of the above embodiments. The device 200 for diagnosing abnormal operation of a DMA controller can include a data reading module 210, a comparison module 220 and a processing module 230.

[0083] The data reading module 210 is configured to read data from the memory in the process of transmitting data by the DMA controller to reproduce a target problem.

[0084] The comparison module 220 is configured to compare first target data in the read data with second target data corresponding to the target problem. The second target data is normal data set in advance.

[0085] The processing module 230 is configured to save the current state as abnormal scene information for abnormal cause analysis in the case that the first target data is inconsistent with the second target data.

[0086] Optionally, in the present embodiment, the comparison module 220 is specifically configured to determine the second target data corresponding to the target problem according to the correspondence between each problem and target data saved in advance, and compare the second target data with the first target data; or, configure only one copy of target data as the second target data in advance, and compare the second target data with the first target data, wherein the only one copy of target data is set according to the target problem.

[0087] Optionally, in the embodiment, the processing module 230 is specifically configured to obtain the abnormal scene information in at least one of the following three ways: saving a current bus interface state; saving a current internal state of the DMA controller; and saving data inconsistency information determined according to the first target data and the second target data.

[0088] Optionally, in the embodiment, the processing module 230 is specifically configured to obtain the abnormal scene information by using a snapshot mechanism.

[0089] Optionally, in the embodiment, the second target data includes a preset field in a descriptor and / or data information related to the transmitted data.

[0090] Optionally, in the embodiment, when the first target data is inconsistent with the second target data, the processing module 230 is further configured to suspend operation of the DMA controller.

[0091] Optionally, in the embodiment, after saving the current state as the abnormal scene information for abnormal reason analysis, the processing module 230 is further configured to send abnormal prompt information to a CPU, so that the CPU analyzes an abnormal reason according to the abnormal scene information.

[0092] Optionally, the above modules can be stored in the memory 110 in the form of software or firmware (Firmware) or solidified in an operating system (OS) of the electronic device 100, and can be executed by the processor 120. Figure 1 Meanwhile, data, program code, and the like required for executing the above modules can be stored in the memory 110. Figure 1

[0093] The embodiment of the present application further provides a readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the method for diagnosing operation abnormality of a DMA controller.

[0094] ​To sum up, the embodiment of the present application provides a method, device, electronic equipment and readable storage medium for diagnosing operation exception of a DMA controller. In the process of transmitting data by using the DMA controller to reproduce a target problem, data is read from a memory; then, first target data in the read data is compared with second target data corresponding to the target problem, wherein the second target data is pre-set normal data; and then, in the case that the first target data is inconsistent with the second target data, a current state is saved as abnormal scene information for abnormal reason analysis. In this way, some scene states when the DMA controller is abnormal can be captured in time, and the diagnosis efficiency of the DMA controller exception can be greatly improved.

[0095] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can also be implemented by other manners. The apparatus embodiments described above are only schematic, for example, the flow charts and block diagrams in the drawings show the possible implementation architectures, functions and operations of the apparatus, method and computer program product according to the embodiments of the present application. In this regard, each block in the flow charts or block diagrams can represent a module, a program segment or a part of code, which contains one or more executable instructions for implementing the specified logical function. It should also be noted that, in some alternative implementation manners, the functions noted in the blocks can also occur in different orders from that noted in the drawings. For example, two consecutive blocks can actually be executed substantially in parallel, and sometimes they can also be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flow charts, and the combination of blocks in the block diagrams and / or flow charts, can be implemented by a dedicated hardware-based system for implementing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0096] In addition, each functional module in the embodiments of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0097] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts of the prior art that make contributions or parts of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0098] The above only describes optional embodiments of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for diagnosing DMA controller operational abnormalities, characterized in that, The method includes: Data is read from memory during the process of using the DMA controller to transfer data in order to reproduce the target problem; The first target data in the read data is compared with the second target data corresponding to the target problem, wherein the second target data is pre-set normal data; the second target data is a preset field in the descriptor; the DMA controller and the CPU interact through the descriptor information; If the first target data and the second target data are inconsistent, the current state is saved as abnormal scene information for analysis of the cause of the abnormality; wherein, saving the current state as abnormal scene information includes at least one of the following two methods: saving the current bus interface state; saving the current internal state of the DMA controller.

2. The method according to claim 1, characterized in that, The step of saving the current state as abnormal scene information also includes: Save the data inconsistency information determined based on the first target data and the second target data.

3. The method according to claim 1, characterized in that, Saving the current state as abnormal scene information includes: The abnormal scene information is obtained through a snapshot mechanism.

4. The method according to claim 1, characterized in that, The second target data includes preset fields in the descriptor and / or data information related to the data being transmitted.

5. The method according to claim 1, characterized in that, In the event that the first target data and the second target data are inconsistent, the method further includes: Pause the operation of the DMA controller.

6. The method according to claim 1, characterized in that, In the event that the first target data and the second target data are inconsistent, after saving the current state as abnormal scene information for anomaly cause analysis, the method further includes: An exception notification message is sent to the CPU so that the CPU can analyze the cause of the exception based on the exception situation information.

7. The method according to any one of claims 1-6, characterized in that, The step of comparing the first target data in the read data with the second target data corresponding to the target problem includes: Based on the pre-saved correspondence between each question and target data, the second target data corresponding to the target question is determined, and the second target data is compared with the first target data; or... A pre-configured set of target data is used as the second target data, and the second target data is compared with the first target data, wherein the pre-configured set of target data is set according to the target problem.

8. An apparatus for diagnosing DMA controller malfunctions, characterized in that, The device includes: The data reading module is used to read data from memory during the process of using the DMA controller to transfer data in order to reproduce the target problem; The comparison module is used to compare the first target data in the read data with the second target data corresponding to the target problem, wherein the second target data is pre-set normal data; the second target data is a preset field in the descriptor; the DMA controller and the CPU interact through the descriptor information; The processing module is used to save the current state as abnormal scene information for abnormal cause analysis when the first target data and the second target data are inconsistent; wherein, saving the current state as abnormal scene information includes at least one of the following two methods: saving the current bus interface state; saving the current internal state of the DMA controller.

9. An electronic device, characterized in that, The device includes a processor and a memory, the memory storing machine-executable instructions that can be executed by the processor to implement the method for diagnosing DMA controller malfunctions as described in any one of claims 1-7.

10. A readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the method for diagnosing DMA controller operational abnormalities as described in any one of claims 1-7.

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