A manufacturing method of a chip temperature compensation attenuator based on an NTC thermistor ceramic substrate

Abstract

A manufacturing method of a chip temperature-compensated attenuator based on an NTC thermistor ceramic substrate belongs to the technical field of electronic components. It includes an NTC thermistor ceramic substrate, a thin-film resistor layer, a thin-film electrode layer, and a back insulation protection layer. The NTC thermistor is composed of the NTC thermistor ceramic substrate and its electrodes, and is both the carrier of the chip temperature-compensated attenuator and the functional body of the negative temperature coefficient resistor of the attenuation network of the chip temperature-compensated attenuator; a thin-film resistor is prepared on the upper surface of the NTC thermistor ceramic substrate, and a thin-film electrode layer is prepared on the thin-film resistor layer; a back insulation protection layer is prepared on the bottom surface of the NTC thermistor ceramic substrate; the resistor thin-film is both the functional body of the positive temperature coefficient resistor of the attenuation network of the chip temperature-compensated attenuator and the adhesion blocking layer of the electrode layer. It solves the problems of the existing temperature-compensated attenuators with large size, low N value, and low application frequency. The chip temperature-compensated attenuator is widely used in fields such as 5G communication, electronic radar, and human-machine delivery.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic components, and further relates to the field of attenuators. Specifically, it relates to a manufacturing method of a temperature-compensated attenuator based on an NTC thermistor ceramic substrate chip. Background Art

[0002] The passive chip film temperature-compensated attenuator (hereinafter referred to as the temperature-compensated attenuator) has the characteristics of high application frequency, good compensation characteristics, no system distortion, phase shift and time delay, etc. It is widely used in industrial Internet, electronic radar, human-computer interaction, 5G communication and other fields, and plays a role of temperature compensation and isolation protection in the electronic system.

[0003] At present, the temperature-compensated attenuator basically uses NTC resistor paste and PTC resistor paste to be organically integrated on a ceramic substrate by thick film printing to form a π-type attenuation network, and then the product preparation is completed through processes such as encapsulation protection and electrode preparation. However, this manufacturing method has the following limitations:

[0004] First, generally, the minimum operating size of the thick film process platform is about 60μm. To integrate NTC resistors and PTC resistors on a limited area to form the core resistor network of the attenuator, the operating accuracy of the thick film platform greatly limits the reduction of the product size. Therefore, the minimum size of the temperature-compensated attenuator on the market is 1.91mm×1.52mm×0.30mm, which is equivalent to the size of the resistor 2012.

[0005] Second, for the temperature-compensated attenuator with a high temperature coefficient (N value), the β value of the NTC paste used will be very high. For the attenuator with an attenuation of 1dB to 10dB, its resistance value is in the order of 100Ω. How to perform the square reduction design on a limited area has become the key to preparing the high-N value temperature-compensated attenuator. Due to the limited size, the square reduction design is restricted, so that the temperature-compensated attenuator can currently only provide N1 (-0.001dB / dB / °C) to N9 (-0.009dB / dB / °C), and cannot provide a higher-N value temperature-compensated attenuator.

[0006] Finally, for the temperature-compensated attenuator prepared by thick film printing, its application frequency will be greatly limited, and the temperature compensation characteristic of the temperature-compensated attenuator will decrease with the increase of the application frequency. The application frequency of the commonly used temperature-compensated attenuator on the market only reaches 18GHz.

[0007] The thin film process is an effective method to solve the miniaturization of the size of the temperature-compensated attenuator, but the research on NTC thermistor material targets and PTC thermistor material targets is not yet mature, and there is no thin film temperature-compensated attenuator on the market.

[0008] In view of this, the present invention is specifically proposed. Summary of the Invention

[0009] The technical problem to be solved by the present invention is to solve the problems that the minimum operating size of the thick film process platform of the temperature-compensated attenuator prepared by the existing thick film printing process is limited, the high N value is limited by the size, and the application frequency is limited.

[0010] The inventive concept of the present invention is to use the film sputtering and lithography forming process to fabricate a thin film resistor attenuation network, thin film electrodes and an insulating protective layer, and interact with the resistors of the NTC thermistor ceramic substrate to achieve the purpose of micro-size, high N value and high frequency.

[0011] To this end, the present invention provides a chip temperature-compensated attenuator based on an NTC thermistor ceramic substrate, and the schematic structure is as Figure 1-2 shown.

[0012] It includes an NTC thermistor ceramic substrate 1, a thin film resistor layer 2, a thin film electrode layer 3, and a back insulating protective layer 4.

[0013] The resistance attenuation network of the chip temperature-compensated attenuator is jointly composed of an NTC thermistor, a thin film resistor and a thin film electrode.

[0014] The NTC thermistor is composed of an NTC thermistor ceramic substrate and its electrodes. The NTC thermistor ceramic substrate is both the carrier of the chip temperature-compensated attenuator and the functional body of the negative temperature coefficient resistor of the attenuation network of the chip temperature-compensated attenuator.

[0015] The NTC thermistor ceramic substrate is a double-sided polished substrate. A thin film resistor is prepared on the upper surface of the NTC thermistor ceramic substrate, and a thin film electrode layer is prepared on the thin film resistor layer; a back insulating protective layer is prepared on the bottom surface of the NTC thermistor ceramic substrate.

[0016] The thin film resistor is composed of an electrode on the NTC thermistor ceramic substrate and a sputtered resistor thin film. The resistor thin film is both the functional body of the positive temperature coefficient resistor of the attenuation network of the chip temperature-compensated attenuator and the adhesion blocking layer of the electrode layer.

[0017] The thin film electrodes and thin film resistors are completed by thin film processes.

[0018] The surface graphic structure of the chip temperature-compensated attenuator is determined by the specific shapes and specific combinations of the thin film resistor layer and the thin film electrode layer, including but not limited to π-type network straight resistors and double straight parallel electrodes, π-type network S-shaped resistors and UT-shaped nested parallel electrodes, π-type network U resistors and double straight broken strip parallel electrodes, T-type network straight resistors and triple straight parallel electrodes, T-type network straight resistors and cross-shaped nested triple parallel electrodes, or T-type network S-shaped resistors and triple straight parallel electrodes, etc. Generally speaking, the shapes of the electrodes include but not limited to S-shaped electrodes, nested electrodes, vertical parallel electrodes, etc.; the shapes of the thin film resistors include but not limited to S-shaped resistor bodies, Z-shaped resistor bodies, vertical resistor bodies.

[0019] The NTC thermistor is composed of an NTC thermistor substrate and electrodes. When the sheet resistance of the NTC thermistor substrate is constant, the resistance value of the NTC thermistor is determined by the shape of the electrodes and the distance between the electrodes.

[0020] The manufacturing method of a chip temperature compensation attenuator based on an NTC thermistor ceramic substrate includes the following steps:

[0021] (1) Cleaning: Select an NTC thermistor ceramic substrate with a specific B value and double-sided polishing, and ultrasonically clean the substrate with ceramic cleaning agent, acetone, alcohol, and deionized water in sequence, and then dry it in an oven;

[0022] (2) Sputtering of the resistance film layer: Prepare a resistance film layer on one polished surface of the NTC thermistor ceramic substrate by means of magnetron sputtering;

[0023] (3) Sputtering of the electrode layer: Sputter an electrode film layer on the thermistor ceramic substrate on which the resistance film layer has been prepared by means of magnetron sputtering;

[0024] (4) First lithography: Coating, exposure, and development; etching the electrode film layer, and removing the glue after etching;

[0025] (5) Second lithography: After etching the electrodes, coat the glue again, bake, expose, and develop, and etch the thin film resistance layer, and remove the glue after etching;

[0026] (6) Preparation of the back insulation layer: Adopt the spin coating method to prepare a polyimide film protective layer on the back of the NTC thermistor ceramic substrate, and perform pre-baking, exposure, and post-baking; then cure it in an oven;

[0027] (7) Dicing and cutting: Adopt the mechanical cutting method to dice and cut the NTC thermistor ceramic substrate to obtain a chip temperature compensation attenuator with a set size.

[0028] The resistance film layer is prepared by a thin film process, including but not limited to vacuum evaporation, chemical deposition, sputtering, etc.;

[0029] The materials of the resistance film layer include but not limited to Ni-Co series thin films such as TaN, NiCr, CrSi, TiAlN, Ta series resistance thin films, Si series resistance thin films, Au-Cr series resistance thin films, Ni-P series resistance thin films.

[0030] The electrode film layer is a metal film structure, and the materials of the electrode layer include but not limited to TiW-Au structure metal film, TiW-Ni-Au structure metal film, TiW-Cu structure metal film, and TiN-AL, etc.

[0031] The materials of the back insulation protection layer include, but are not limited to, polyimide film, resin film for thick film printing, silicon nitride film, silicon oxide film, etc.; the preparation processes include, but are not limited to, thick film printing, CVD deposition, dispensing coating, magnetron sputtering, etc.

[0032] Beneficial effects:

[0033] Compared with the existing preparation technology of temperature-compensated attenuators, the present invention makes full use of the advantages of the linear temperature compensation characteristics of the NTC thermistor ceramic substrate, the miniaturization of thin film processes, etc., so that the prepared chip temperature-compensated attenuator has the characteristics of small volume, high application frequency (up to 36 GHz), good compensation characteristics, large temperature compensation coefficient, good compensation linearity, etc.; at the same time, using this process method to prepare the chip temperature attenuator, the process is simple, the repeatability is strong, and the cost is low.

[0034] The chip temperature-compensated attenuator prepared by the present invention can be widely applied to fields such as 5G communication, electronic radar, and human-computer delivery. Description of the drawings

[0035] Figure 1 It is a schematic structural diagram of a π-type chip temperature-compensated attenuator.

[0036] Figure 2 It is a schematic structural diagram of a T-type chip temperature-compensated attenuator.

[0037] In the figure: 1 is the NTC thermistor ceramic substrate, 2 is the resistance functional layer, 3 is the electrode layer, and 4 is the back insulation protection layer. Specific implementation manners

[0038] As Figure 1-2 shown, for the manufacturing method of a chip temperature-compensated attenuator based on an NTC thermistor ceramic substrate, the resistance film layer uses a TaN resistance film with a film thickness of 0.05 μm to 1 μm; the electrode film layer uses a TiW-Au composite structure metal electrode film with an electrode layer thickness of 2 μm to 4 μm; the NTC thermistor ceramic substrate is double-sided polished with a roughness of 0.005 μm to 0.025 μm, a substrate thickness of 150 μm to 550 μm, and a β value range of 150 K to 4500 K; the back insulation protection layer is a polyimide film.

[0039] The specific manufacturing process is as follows:

[0040] (1) Cleaning: Select an NTC thermistor ceramic substrate with a specific B value that is double-sided polished, and ultrasonically clean the substrate with ceramic cleaning agent, acetone, alcohol, and deionized water in sequence for 10 min ± 2 min each, and then dry it in an oven at 150 °C ± 10 °C for 120 min to 180 min;

[0041] (2) Sputtering of the resistive film layer: The resistive film layer is prepared on the polished surface of one side of the NTC thermistor ceramic substrate by means of magnetron sputtering. The sputtering time is 20 min to 60 min, and the film layer thickness is 0.05 μm to 1 μm.

[0042] (3) Sputtering of the electrode layer: The TiW adhesion layer and the Au layer are sequentially sputtered on the thermistor ceramic substrate on which the resistive film layer has been prepared by means of magnetron sputtering. The sputtering time of the Au layer is 40 min to 60 min, and the thickness is about 2 μm to 4 μm; the thickness of the titanium tungsten is about 150 nm to 200 nm.

[0043] (4) First lithography: Coating with glue; baking on a hot plate at 95°C to 110°C for 90 s ± 10 s; exposing for 10 s ± 3 s and then developing; etching the top Au layer and the TiW layer. After etching, remove the glue and brush the product with acetone.

[0044] (5) Second lithography: After etching the electrodes, coat with glue again, bake (temperature: 95°C to 110°C, time: 90 s ± 10 s), expose (time: 10 s ± 3 s), develop (time: 45 s ± 10 s), then etch out the thin film resistor body, and finally remove the glue.

[0045] (6) Preparation of the back insulation layer: The polyimide film protective layer is prepared on the other polished surface of the NTC thermistor ceramic substrate by means of spin coating. The pre-baking temperature is 95°C to 110°C, and the pre-baking time is 90 s ± 10 s; expose (time 35 s ± 15 s) and then post-bake; then cure in an oven at 250°C ± 5°C for 240 min to 300 min.

[0046] (7) Dicing and cutting: The NTC thermistor ceramic substrate is diced and cut by means of mechanical cutting to obtain a chip temperature compensation attenuator with dimensions meeting the requirements.

[0047] Finally, it should be noted that the above embodiments are merely examples given for clear illustration. The present invention includes but is not limited to the above embodiments, and it is not necessary and impossible to enumerate all the implementation manners here. For those of ordinary skill in the art, other different forms of changes or variations can be made on the basis of the above description. All implementation manners meeting the requirements of the present invention fall within the protection scope of the present invention.

Claims

1. A manufacturing method of a chip temperature-compensated attenuator based on an NTC thermosensitive ceramic substrate, characterized in that: The structure of the chip temperature-compensated attenuator includes an NTC thermosensitive ceramic substrate, a thin-film resistor layer, a thin-film electrode layer, and a back insulation protection layer; The resistance attenuation network of the chip temperature-compensated attenuator is jointly composed of an NTC thermistor, a thin-film resistor, and a thin-film electrode; The NTC thermistor is composed of an NTC thermosensitive ceramic substrate and its electrodes. The NTC thermosensitive ceramic substrate is both the carrier of the chip temperature-compensated attenuator and the functional body of the negative temperature coefficient resistor of the attenuation network of the chip temperature-compensated attenuator; The NTC thermosensitive ceramic substrate is a double-sided polished substrate. A thin-film resistor is prepared on the upper surface of the NTC thermosensitive ceramic substrate, and a thin-film electrode layer is prepared on the thin-film resistor layer; a back insulation protection layer is prepared on the bottom surface of the NTC thermosensitive ceramic substrate; The thin-film resistor is composed of an electrode on the NTC thermosensitive ceramic substrate and a sputtered resistor thin film. The resistor thin film is both the functional body of the positive temperature coefficient resistor of the attenuation network of the chip temperature-compensated attenuator and the adhesion blocking layer of the electrode layer; The manufacturing method of the chip temperature-compensated attenuator is as follows: (1) Cleaning: Select a double-sided polished NTC thermosensitive ceramic substrate, and ultrasonically clean the substrate with a ceramic cleaning agent, acetone, alcohol, and deionized water in sequence, and then dry it in an oven; (2) Sputtering of the resistor film layer: Use a magnetron sputtering method to prepare a resistor film layer on one polished surface of the NTC thermosensitive ceramic substrate; (3) Sputtering of the electrode layer: Use a magnetron sputtering method to deposit an electrode film layer on the thermosensitive ceramic substrate on which the resistor film layer has been prepared; (4) First lithography: Coating, exposure, and development; Etching the electrode film layer, and removing the photoresist after etching; (5) Second lithography: After etching the electrodes, coat the photoresist again, bake, expose, and develop, etch the thin-film resistor layer, and remove the photoresist after etching; (6) Preparation of the back insulation layer: Use a spin coating method to prepare a polyimide film protection layer on the back of the NTC thermosensitive ceramic substrate, perform pre-baking, exposure, and post-baking; then cure it in an oven; (7) Dicing and cutting: Use a mechanical cutting method to dice and cut the NTC thermosensitive ceramic substrate to obtain a chip temperature-compensated attenuator with a set size.

2. The manufacturing method of a chip temperature-compensated attenuator based on an NTC thermosensitive ceramic substrate as described in claim 1, characterized in that: The resistance attenuation network is a π-type resistance attenuation network or a T-type resistance attenuation network.

3. The manufacturing method of a chip temperature-compensated attenuator based on an NTC thermosensitive ceramic substrate as described in claim 1, characterized in that: The resistor film layer is prepared by a thin-film process, and the thin-film process is vacuum evaporation, chemical deposition, or sputtering.

4. The manufacturing method of a chip temperature-compensated attenuator based on an NTC thermosensitive ceramic substrate as described in claim 1, characterized in that: The resistor film layer is a Ni-Co series thin film, a Ta series resistor thin film, a Si series resistor thin film, an Au-Cr series resistor thin film, or a Ni-P series resistor thin film, and the film layer thickness is 0.05 μm to 1 μm.

5. The manufacturing method of a chip temperature-compensated attenuator based on an NTC thermosensitive ceramic substrate as described in claim 4, It is characterized in that: The material of the resistance thin film is TaN, NiCr, CrSi or TiAlN.

6. The manufacturing method of a chip temperature compensation attenuator based on an NTC thermosensitive ceramic substrate according to claim 1, It is characterized in that: The electrode film layer is a metal film structure, and the thickness of the electrode layer is 2 μm to 4 μm.

7. The manufacturing method of a chip temperature compensation attenuator based on an NTC thermosensitive ceramic substrate according to claim 6, It is characterized in that: The metal film structure is a TiW-Au structure metal film, a TiW-Ni-Au structure metal film, a TiW-Cu structure metal film or a TiN-AL structure metal film.

8. The manufacturing method of a chip temperature compensation attenuator based on an NTC thermosensitive ceramic substrate according to claim 1, It is characterized in that: The NTC thermosensitive ceramic substrate is double-sided polished, with a roughness of 0.005 μm to 0.025 μm, a substrate thickness of 150 μm to 550 μm, and a β value range of 150 K to 4500 K.

9. The manufacturing method of a chip temperature compensation attenuator based on an NTC thermosensitive ceramic substrate according to claim 1, It is characterized in that: The back insulation protection layer is an insulating thin film. The preparation process of the insulating thin film is thick film printing, CVD deposition, dispensing coating or magnetron sputtering. The material of the insulating thin film is polyimide thin film, resin film of thick film printing, silicon nitride thin film or silicon oxide thin film.

10. The manufacturing method of a chip temperature compensation attenuator based on an NTC thermosensitive ceramic substrate according to claim 1, It is characterized in that: The detailed manufacturing process of the chip temperature compensation attenuator is as follows: (1) Cleaning: Select a double-sided polished NTC thermosensitive ceramic substrate, and ultrasonically clean the substrate with ceramic cleaning agent, acetone, alcohol, and deionized water in sequence for 10 min ± 2 min each, and then dry it in an oven at 150 °C ± 10 °C for 120 min to 180 min; (2) Sputtering of the resistance film layer: Use the magnetron sputtering method to prepare a resistance film layer on one polished surface of the NTC thermosensitive ceramic substrate, with a sputtering time of 20 min to 60 min and a film layer thickness of 0.05 μm to 1 μm; (3) Sputtering of the electrode layer: Magnetron sputter a TiW adhesion layer and an Au layer in sequence on the thermosensitive ceramic substrate on which the resistance film layer has been prepared. The sputtering time of the gold layer is 40 min to 60 min, and the thickness is 2 μm to 4 μm; the thickness of titanium tungsten is 150 nm to 200 nm; (4) First lithography: Coating with glue; baking on a hot plate at 95 °C to 110 °C for 90 s ± 10 s; exposing for 10 s ± 3 s and then developing; etching the top gold layer and titanium tungsten layer; removing the glue after etching, and brushing the product with acetone; (5) Second lithography: After etching the electrodes, coat the glue again, bake at 95 °C to 110 °C for 90 s ± 10 s, expose for 10 s ± 3 s, develop for 45 s ± 10 s, then etch out the thin film resistor body, and finally remove the glue; (6) Preparation of the back insulation layer: Use the spin coating method to prepare a polyimide thin film protection layer on the other polished surface of the NTC thermosensitive ceramic substrate, and pre-bake at 95 °C to 110 °C for 90 s ± 10 s; Expose for 35 s ± 15 s and then post-bake; then cure in an oven at 250 °C ± 5 °C for 240 min to 300 min; (7) Dicing and cutting: Use mechanical cutting to dice the NTC thermistor ceramic substrate to obtain a chip temperature compensation attenuator with dimensions meeting the requirements.

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