A Digital-Analog Hybrid AGC Method and Device Applicable to Ultra-High-Speed Broadband Waveforms

Abstract

The present invention provides a digital-analog hybrid AGC method and device applicable to ultra-high-speed broadband waveforms. An AGC frame is designed. After the designed AGC frame passes through a multipath and high Doppler channel, an AGC frame passing through a complex channel is obtained. The AGC frame includes a plurality of analog AGC segments and a plurality of digital AGC segments, and the length of the analog AGC segment is equal to the length of the digital AGC segment. After the digital AGC in the AGC frame passing through the complex channel is cross-correlated with the original digital AGC, the obtained peak value exceeds the detection threshold. The repetition times of the AGC segments in the AGC frame are determined according to the time slot frame structure of the signal waveform to be transmitted and the length of each AGC segment. The AGC frame, the synchronization frame, the data frame, and the protection frame are spliced in sequence into a time slot frame, and the time slot frame is radio frequency output after passing through an up-conversion low-pass filter. The digital-analog hybrid AGC method of the present invention enables the receiving end operating in the Ku band to accurately implement AGC and ensures the good operation of the subsequent signal processing module.

Description

Technical Field

[0001] The present invention belongs to the field of communications, and more particularly, relates to a digital-analog hybrid automatic gain control (AGC) method and apparatus applicable to ultra-high-speed broadband waveforms. Background Art

[0002] AGC is an automatic control method that adjusts the gain of the amplification circuit at the receiver end of a communication system according to the signal strength. In the radio frequency front end, the amplitudes of the signals transmitted through the channel are in a relatively large range. If these signals are processed with a fixed gain, it will inevitably exceed the number of bits of the analog-to-digital converter (ADC), and there is a risk of burning out the ADC. Therefore, it is necessary to use the AGC method to process the signals after the down-conversion filter (which filters out a large number of useless signals from the intermediate-frequency signals). Specifically, it attenuates the signals with larger amplitudes and strengthens the signals with smaller amplitudes.

[0003] AGC algorithms can be divided into two types: analog AGC algorithms and digital AGC algorithms. The former designs an AGC loop (circuit) in the radio frequency front end to control the signals received by the radio frequency front end in the analog domain; the latter implements a digital signal processing algorithm at the digital acquisition ADC end to control the digital signals after digital filtering and signal capture in the digital domain. With the rapid development of integrated electronic circuits, the current design trend of wireless communication systems is to convert as many complex signal processing circuits in traditional wireless communication systems as possible into signal processing algorithms in the digital domain, while the analog domain focuses more on the processing of the radio frequency front end. The delay correlation algorithm is an algorithm commonly used in the field of signal processing. Generally, the cross-correlation function is used to extract the time delay between two received signals, and in combination with other information, the specific position of the signal is determined.

[0004] In the field of marine wireless communication, since it is impossible to deploy a large number of base stations for relay forwarding like land wireless communication, higher requirements are placed on the performance of a single node. Specifically, the waveform used for marine wireless communication has a shorter time slot length than the commonly used land communication waveforms, and each frame contains a large amount of data. At the same time, due to the relatively long transmission distance between nodes, a guard interval must be set within the time slot, so it is particularly easy to design ultra-high-speed (greater than 1 Gbps) broadband (greater than 700 M) waveforms. And such waveforms have high requirements for AGC. AGC has become an important technology to ensure the stable operation of the backend signal processing module. If the performance of the AGC algorithm is poor, it will cause a significant increase in the bit error rate of the backend demodulation and other modules.

[0005] The AGC loop used in the analog AGC technology cannot quickly calculate the required gain control. The digital AGC technology processes the down-converted signal from the perspective of algorithms, and its accuracy is not as high as that of the analog AGC technology. Therefore, in view of the above problems of unstable performance of traditional analog AGC or digital AGC in the ultra-high-speed broadband waveform of marine wireless communication, a fast and accurate AGC method needs to be proposed. Summary of the Invention

[0006] Aiming at the defects of the prior art, the purpose of the present invention is to provide a digital-analog hybrid AGC method and device applicable to ultra-high-speed broadband waveforms, aiming to solve the problem of unstable performance of traditional analog AGC or digital AGC in the ultra-high-speed broadband waveform of marine wireless communication.

[0007] To achieve the above object, in the first aspect, the present invention provides a digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms, including the following steps:

[0008] Design an AGC frame. After the designed AGC frame passes through a multipath and high Doppler channel, an AGC frame passing through a complex channel is obtained; the AGC frame includes a plurality of analog AGC segments and a plurality of digital AGC segments, and the length of the analog AGC segment is equal to the length of the digital AGC segment; after the digital AGC in the AGC frame passing through the complex channel is cross-correlated with the original digital AGC, the obtained peak value exceeds the detection threshold.

[0009] Determine the repetition times of the AGC segments in the AGC frame according to the time slot frame structure of the signal waveform to be transmitted and the length of each AGC segment; the sum of the product of the length of a single AGC segment and the repetition times of the AGC segment, the synchronization frame length, the data frame length, and the protection frame length is less than or equal to the total length of the time limit frame.

[0010] Splice the AGC frame, the synchronization frame, the data frame, and the protection frame in sequence into a time slot frame, and radio-frequency output the time slot frame after passing through an up-conversion low-pass filter.

[0011] In an optional example, the AGC frame is repeated in units of AGC blocks, and the AGC block sequentially includes 2 analog AGC segments and 2 digital AGC segments;

[0012] If the repetition times of the AGC segment AGC num is less than 4, the AGC frame includes AGC num such digital AGC segments; if the repetition times of the AGC segment AGC num is greater than 4 and not an integer multiple of 4, AGC num= 4*k + m, where m is a positive integer less than 4 and k is a positive integer. Then the AGC frame sequentially includes k AGC blocks and m of the digital AGC segments to ensure that the ending part of the AGC frame is a digital AGC segment.

[0013] In a second aspect, the present invention provides a digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms, including the following steps:

[0014] Receive a radio frequency signal;

[0015] Pass the radio frequency signal through a down-conversion low-pass filter, and divide the output signal into periods with n moments as one period; n is equal to the length of the digital AGC segment designed at the transmitting end;

[0016] Perform a differential operation on the signal at time t and the signal at time t + n to obtain a signal differential result. Obtain n signal differential results corresponding to t = 1, 2,..., n for a total of n moments, take the difference correlation of the n signal differential results to obtain the delay correlation value within the time period n; calculate the difference between the signal power at time t and the signal power at time t + n to obtain a power difference. Obtain n power differences corresponding to t = 1, 2,..., n for a total of n moments, sum the n power differences to obtain the signal energy within the time period n; and divide the delay correlation value by the signal energy to obtain a decision variable;

[0017] Sequentially obtain the decision variable values within each time period. When the decision variable exceeds a preset signal detection threshold within consecutive preset time periods, then use the signals within the consecutive preset time periods as the captured valid signals;

[0018] Based on the digital AGC segment designed at the transmitting end and the captured valid signals, determine the AGC segments within the valid signals, and determine the power value of the valid signals according to the repetition times of the AGC segments. Adjust the gain when receiving the radio frequency signal and the scaling factor when analyzing the output signal based on the corresponding power value;

[0019] Combine the gain and the scaling factor to analyze the received radio frequency signal and decode to obtain the valid data transmitted by the transmitting end.

[0020] In an optional example, determining the AGC segments within the valid signals based on the digital AGC segment designed at the transmitting end and the captured valid signals is specifically as follows:

[0021] When the cross-correlation between a certain segment of the captured valid signal and the original digital AGC segment designed at the transmitting end results in a peak exceeding a preset value, then this segment of the signal is a digital AGC segment.

[0022] In a third aspect, the present invention provides a transmitting end, including:

[0023] An AGC frame design unit is used to design an AGC frame. After the designed AGC frame passes through a multipath and high Doppler channel, an AGC frame passing through a complex channel is obtained. The AGC frame includes multiple analog AGC segments and multiple digital AGC segments, and the length of the analog AGC segment is equal to the length of the digital AGC segment. After the digital AGC in the AGC frame passing through the complex channel is cross-correlated with the original digital AGC, the obtained peak exceeds the detection threshold. And the repetition times of the AGC segments in the AGC frame are determined according to the time slot frame structure of the signal waveform to be transmitted and the length of each AGC segment. The sum of the product of the length of a single AGC segment and the repetition times of the AGC segments, the synchronization frame length, the data frame length, and the protection frame length is less than or equal to the total time limit frame length.

[0024] A time slot frame output unit is used to splice the AGC frame, the synchronization frame, the data frame, and the protection frame in sequence into a time slot frame, and radio frequency output the time slot frame after passing through an up-conversion low-pass filter.

[0025] In an optional example, the AGC frame designed by the AGC frame design unit is repeated in units of AGC blocks. The AGC block sequentially includes 2 analog AGC segments and 2 digital AGC segments. If the repetition times of the AGC segments AGC num is less than 4, the AGC frame designed by the AGC frame design unit includes AGC num such digital AGC segments. If the repetition times of the AGC segments AGC num is greater than 4 and not an integer multiple of 4, AGC num = 4*k + m, where m is a positive integer less than 4 and k is a positive integer, then the AGC frame designed by the AGC frame design unit sequentially includes k AGC blocks and m such digital AGC segments to ensure that the ending part of the AGC frame is a digital AGC segment.

[0026] In a fourth aspect, the present invention provides a receiving end, including:

[0027] A radio frequency signal receiving unit is used to receive radio frequency signals;

[0028] A signal division unit is used to pass the radio frequency signal through a down-conversion low-pass filter and divide the output signal in a cycle of n moments. n is equal to the length of the digital AGC segment designed by the transmitting end;

[0029] A decision variable determination unit is configured to perform a difference operation on the signal at time t and the signal at time t + n to obtain a signal difference result, acquire n signal difference results corresponding to n times of t = 1, 2,..., n, perform difference correlation on the n signal difference results to obtain a delay correlation value within the time period n; calculate the difference between the signal power at time t and the signal power at time t + n to obtain a power difference, acquire n power differences corresponding to n times of t = 1, 2,..., n, sum up the n power differences to obtain the signal energy within the time period n; and divide the delay correlation value by the signal energy to obtain a decision variable;

[0030] A signal capture unit is configured to sequentially obtain the decision variable values within each time period. When the decision variable exceeds a preset signal detection threshold within a continuous preset number of time periods, the signals within the continuous preset number of time periods are taken as the captured valid signals;

[0031] A data decoding unit is configured to determine the AGC segment within the valid signal based on the digital AGC segment designed by the transmitting end and the captured valid signal, determine the power value of the valid signal according to the repetition times of the AGC segment, adjust the gain when receiving the radio frequency signal and the scaling factor when analyzing the output signal based on the corresponding power value; and analyze the received radio frequency signal in combination with the gain and the scaling factor to decode the valid data transmitted by the transmitting end.

[0032] In an optional example, the data decoding unit determines the AGC segment within the valid signal based on the digital AGC segment designed by the transmitting end and the captured valid signal, specifically as follows: when the cross-correlation between a certain segment of the captured valid signal and the original digital AGC segment designed by the transmitting end results in a peak exceeding a preset value, then this segment of the signal is the digital AGC segment.

[0033] In a fifth aspect, the present invention provides an electronic device, which includes a processor and a memory. The memory stores at least one piece of program code, and the program code is loaded and executed by the processor to implement the method provided in the first aspect or the second aspect as described above.

[0034] In a sixth aspect, the present invention provides a computer-readable storage medium, in which at least one piece of program code is stored, and the program code is loaded and executed by a processor to implement the method provided in the first aspect or the second aspect as described above.

[0035] Generally speaking, compared with the prior art, the above technical solution conceived by the present invention has the following beneficial effects:

[0036] The present invention provides a digital-analog hybrid AGC method and device applicable to ultra-high-speed broadband waveforms. Aiming at the problem of unstable performance of traditional analog AGC or digital AGC in ultra-high-speed broadband waveforms for marine wireless communication, a fast and accurate digital-analog alternating AGC method is proposed, and the performance of this method is verified through intermediate-frequency intercommunication experiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a flowchart of a digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms provided by an embodiment of the present invention;

[0038] Figure 2 It is a flowchart of another digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms provided by an embodiment of the present invention;

[0039] Figure 3 It is a schematic flowchart of a digital-analog alternating AGC method applicable to ultra-high-speed broadband waveforms in a marine environment provided according to an embodiment of the present invention;

[0040] Figure 4 It is a schematic diagram of an application scenario provided according to an embodiment of the present invention;

[0041] Figure 5 It is a block diagram of the implementation of a digital-analog alternating AGC method applicable to ultra-high-speed broadband waveforms in a marine environment provided according to an embodiment of the present invention;

[0042] Figure 6 It is a schematic diagram of an AGC frame structure provided according to an embodiment of the present invention;

[0043] Figure 7 It is a schematic diagram of the frame structure within a time slot provided according to an embodiment of the present invention;

[0044] Figure 8 It is a schematic diagram of the time-domain response of a low-pass filter provided according to an embodiment of the present invention;

[0045] Figure 9 It is a schematic flowchart of a delay-related length-keeping algorithm provided according to an embodiment of the present invention;

[0046] Figure 10 It is a schematic flowchart of a digital-analog alternating AGC provided according to an embodiment of the present invention;

[0047] Figure 11 It is a waveform diagram of an initial time-slot frame signal provided by an embodiment of the present invention;

[0048] Figure 12 It is a waveform diagram of a time-slot frame signal after passing through a complex channel provided by an embodiment of the present invention;

[0049] Figure 13Cross-correlation result graph when the AGC frame position is undetermined provided by the embodiment of the present invention;

[0050] Figure 14 Cross-correlation result graph when the AGC frame is determined provided by the embodiment of the present invention;

[0051] Figure 15 Signal waveform graph after AGC according to the AGC frame provided by the embodiment of the present invention;

[0052] Figure 16 Comparison experiment graph of signal adjustment between the existing AGC and the AGC of the present invention provided by the embodiment of the present invention;

[0053] Figure 17 Transmitter architecture diagram provided by the embodiment of the present invention;

[0054] Figure 18 Receiver architecture diagram provided by the embodiment of the present invention. Detailed implementation manners

[0055] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The description of at least one exemplary embodiment below is actually only illustrative and in no way restrictive of the present invention and its application or use. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0056] It should be noted that the terms used herein are only for describing specific implementation manners and are not intended to limit the exemplary embodiments according to the present invention. As used herein, unless otherwise clearly specified in the context, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "include" and / or "comprise" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.

[0057] In the description of the present invention, the meaning of "several" is more than one, the meaning of "multiple" is more than two, understandings such as "greater than", "less than", "exceeding" do not include the present number, and understandings such as "above", "below", "within" include the present number. If there is a description of "first" and "second", it is only for the purpose of distinguishing technical features and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features or implicitly indicating the sequence relationship of the indicated technical features.

[0058] In the description of the present invention, the descriptions with reference to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples" mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0059] The problem to be solved by the present invention is to provide a digital-analog hybrid AGC method, so that the receiving end of an ultra-high-speed broadband waveform for ocean communication operating in the Ku band can accurately implement AGC and ensure the good operation of the backend signal processing module.

[0060] Figure 1 It is a flowchart of a digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms provided by an embodiment of the present invention; as Figure 1 shown, it includes the following steps:

[0061] S101, design an AGC frame. After the designed AGC frame passes through a multipath and high Doppler channel, an AGC frame passing through a complex channel is obtained; the AGC frame includes a plurality of analog AGC segments and a plurality of digital AGC segments, and the length of the analog AGC segment is equal to the length of the digital AGC segment; after the digital AGC in the AGC frame passing through the complex channel is cross-correlated with the original digital AGC, the obtained peak value exceeds the detection threshold;

[0062] S102, determine the repetition times of the AGC segments in the AGC frame according to the time slot frame structure of the signal waveform to be sent and the length of each AGC segment; the sum of the product of the length of a single AGC segment and the repetition times of the AGC segment, the length of the synchronization frame, the length of the data frame, and the length of the protection frame is less than or equal to the total length of the time limit frame;

[0063] S103, splice the AGC frame, the synchronization frame, the data frame, and the protection frame in sequence into a time slot frame, and perform radio frequency output after passing the time slot frame through an up-conversion low-pass filter.

[0064] Figure 2 It is a flowchart of another digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms provided by an embodiment of the present invention; as Figure 2 shown, it includes the following steps:

[0065] S201, receive a radio frequency signal;

[0066] S202, pass the radio frequency signal through a down-conversion low-pass filter, and divide the output signal into periods with n moments as a cycle; n is equal to the length of the digital AGC segment designed at the sending end;

[0067] S203. Perform a differential operation on the signal at time t and the signal at time t + n to obtain a signal differential result. Obtain n signal differential results corresponding to n moments of t = 1, 2,..., n. Take the difference correlation of the n signal differential results to obtain a delay correlation value within the time period n. Calculate the difference between the signal power at time t and the signal power at time t + n to obtain a power difference. Obtain n power differences corresponding to n moments of t = 1, 2,..., n. Sum the n power differences to obtain the signal energy within the time period n. And divide the delay correlation value by the signal energy to obtain a decision variable.

[0068] S204. Sequentially obtain the decision variable values within each time period. When the decision variable exceeds a preset signal detection threshold within a continuous preset time period, regard the signal within the continuous preset time period as the captured valid signal.

[0069] S205. Determine the AGC segment within the valid signal based on the digital AGC segment designed by the transmitting end and the captured valid signal, and determine the power value of the valid signal according to the repetition times of the AGC segment. Adjust the gain when receiving the radio frequency signal and the scaling factor when analyzing the output signal based on the corresponding power value.

[0070] S206. Analyze the received radio frequency signal in combination with the gain and the scaling factor, and decode to obtain the valid data transmitted by the transmitting end.

[0071] Figure 3 This is a flowchart of an ultra - high - speed broadband waveform automatic gain method applicable to the marine environment provided by an embodiment of the present invention, including:

[0072] 1. Design the AGC segment structure according to the specific data frame structure within the waveform time slot;

[0073] Among them, the AGC segment structure described in content 1 is calculated according to the time slot length TS l , the sync header length SYNC l , the data segment length Data l and the protection segment length Prot l . The specific calculation method is:

[0074] ACG l *AGC num <=TS l -SYNC l -Data l -Prot l

[0075] Among them, ACG l is the length of the AGC segment, AGCnum is the number of repetitions of the AGC segment. The core design idea of the entire AGC segment is to increase the number of repetitions of the AGC segment as much as possible without affecting the performance indicators (transmission rate and transmission distance) to ensure the performance of the AGC at the receiving end.

[0076] Specifically, TS l , Prot l and Data l are determined during the initial waveform design, SYNC l is determined according to the synchronization scheme, ACG l is a known quantity. Therefore, AGC num should be taken as large as possible (it can be understood as making the left and right sides as close to equal as possible); regarding ACG l , this is the basic component of the AGC segment, which is a waveform of a fixed length. The core feature of this waveform is that after passing this segment of the waveform through a multipath and high Doppler channel and calculating the cross-correlation coefficient between it and the original waveform, a peak that far exceeds other positions can be obtained.

[0077] Specifically, the scenario diagrams of the transmitting end and the receiving end are as Figure 4 shown.

[0078] 2. Design a low-pass filter according to the performance requirements of the up-conversion filter required by the transmitting end. The filter coefficients are denoted as FIR s .

[0079] For the low-pass filter structure used in the up-conversion of the transmitting end described in Content 2, the filter order is obtained from the simulation of the communication system at the initial design stage; the initial values of the filter coefficients are also obtained from the simulation. In the later wireless range test, they will be adjusted according to the actual performance.

[0080] 3. Design a low-pass filter according to the performance requirements of the down-conversion filter required by the receiving end. The filter coefficients are denoted as FIR r .

[0081] The low-pass filter structure used in the down-conversion of the receiving end described in Content 3 corresponds to the low-pass filter structure used in the up-conversion of the transmitting end. That is, the filter order and coefficients are determined according to the up-conversion filter.

[0082] 4. Design a signal determination method based on the delay correlation and length preservation algorithm according to the designed AGC segment structure to determine the position of the AGC segment in the signal received at the receiving end.

[0083] The signal determination method based on the delay correlation plus length retention algorithm described in Content 4, when performing signal acquisition and detection, receives signals according to period n by designing ping-pong registers on the FPGA. Then, a differential operation D is performed on the signal at time t and the signal at time t + n. t *conj(D t+n ) to obtain the differential result C n . Then, for n differential results, the difference correlation is taken to obtain the delay correlation value CORR within this period; at the same time, the signal powers of the received signal at time t and time t + n are calculated. After obtaining the power difference, the n power differences are summed to obtain the signal energy P n , and m n = CORR / P n is used as the decision variable of the delay correlation algorithm.

[0084] When no data packet arrives, the received signal only contains noise. Since the energy of noise is equal under ideal conditions, m n changes flatly; when the data packet starts to arrive, m n will also increase and reach a peak (both the received signal and the signal delayed by D moments are short training sequences). When the data packet is about to be completely received, m n will gradually decrease from the peak. According to this characteristic of m n , a detection threshold is set. When m n exceeds the threshold value and remains continuously for a period of time, it can be considered that the signal acquisition is successful.

[0085] Specifically, as mentioned above, the characteristic of the AGC section is that by calculating the cross-correlation between the AGC section passing through the complex channel and the local AGC section, a peak can be obtained. According to the position of this peak, the starting position of the AGC section can be calculated. Therefore, the position of the AGC section can be determined based on this characteristic.

[0086] 5. According to the performance characteristics of the phased array antenna, design an analog AGC gain calculation method for the RF front end. See Figure 5 as shown. Specifically:

[0087] For the analog AGC gain calculation method for the RF front end described in Content 5, since the AGC section repeats AGC num times, a total of AGC num signal power values can be obtained. Based on these signal power values, the RF gain is adjusted.

[0088] Specifically, the basic structure of the analog AGC is a detector + arithmetic circuit (analog circuit). The detector calculates the power of the input signal, and then amplifies or reduces the input signal according to the fixed power value (reference value) of the arithmetic circuit.

[0089] 6. According to the debugging results of backend data processing, design a method for calculating the digital AGC amplification and reduction factor for the FPGA waveform processing board.

[0090] For the digital AGC gain calculation method for the FPGA waveform processing board described in Content 6. Since the AGC segment is repeated AGC num times, a total of AGC num signal power values can be obtained. Based on these signal power values, adjust the digital AGC amplification and reduction factor.

[0091] Specifically, the scaling factor = reference value / power value.

[0092] 7. According to the designed AGC segment structure, design an AGC method with digital-to-analog repeated alternation within a time slot.

[0093] An AGC method with digital-to-analog repeated alternation within a time slot described in Content 7 is designed according to AGC num First, 2 analog AGCs and 2 digital AGCs form an AGC block, and then the AGC block is repeated according to the size of AGC num If AGC num is less than 4, the first AGC block is all digital AGC; if AGC num is an integer multiple of 4, the last AGC block is complete; if AGC num is greater than 4 and not an integer multiple of 4, after the penultimate AGC block is sent, the last AGC block is all digital AGC.

[0094] In an example, due to the existence of clutter, a single AGC may be inaccurate, so the number of AGCs should be more than two. The digital-to-analog hybrid structure can give play to the advantages of both, so a structure of 2 analog AGCs + 2 digital AGCs is constructed and this structure is cycled. See Figure 6 shown: Taking AGC num as 25, 25 = 6 * (2 analog AGCs + 2 digital AGCs) + 1 digital AGC.

[0095] In a specific example, the flowchart of a digital-to-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms provided by the present invention includes:

[0096] According to the specific data frame structure within the waveform time slot, design the AGC frame structure. The length of the AGC segment is AGC l and the number of repetitions of the AGC segment is AGC num .

[0097] See Figure 7As shown in the figure, the AGC frame, synchronization frame, data frame, and protection frame are assembled into a complete time slot frame in sequence, and then the time slot frame is sent to the up-conversion low-pass filter FIR s , the order of the filter is obtained according to the simulation of the communication system in the initial stage of design; the initial value of the filter coefficient is also obtained according to the simulation. In the later wireless range test, it will be adjusted according to the actual performance.

[0098] The signal received by the RF antenna at the receiving end of the wireless communication system is sent to the down-conversion low-pass filter. The order and coefficient of the filter are determined according to the up-conversion low-pass filter. Among them, the schematic diagram of the time domain response of the low-pass filter is as Figure 8 shown.

[0099] Specifically, the delay correlation plus length retention algorithm is shown in Figure 9 : For the signal passing through the down-conversion low-pass filter, during signal acquisition and detection, by designing ping-pong registers on the FPGA, the signal is received according to the period n. Then, the signal at time t and the signal at time t + n are subjected to a differential operation D t *conj(D t+n ), to obtain the differential result C n , and then the differences of n differential results are taken for correlation to obtain the delay correlation value CORR within this period; at the same time, the signal powers of the received signal at time t and time t + n are calculated, and after obtaining the power difference, the sum of n power differences is calculated to obtain the signal energy P n within this period, and m n = CORR / P n is used as the decision variable of the delay correlation algorithm.

[0100] When no data packet arrives, the received signal only contains noise. Since the energy of noise is equal under ideal conditions, m n changes flatly; when the data packet starts to arrive, m n will also increase and reach a peak (the received signal and its signal delayed by D moments are both short training sequences). When the data packet is about to be received completely, m n will gradually decrease from the peak. According to this characteristic of m n , a detection threshold is set. When m n exceeds the threshold value and remains continuously for a period of time, it can be considered that the signal acquisition is successful.

[0101] See Figure 10 shown. According to the AGC position determined by signal acquisition and according to the analog-digital alternation rule, analog AGC or digital AGC is performed. First, 2 times of analog AGC and 2 times of digital AGC form an AGC block, and then according to AGC numThe size is used to repeat the AGC block. If the AGC num is less than 4, the first AGC block is all digital AGC; if the AGC num is an integer multiple of 4, the last AGC block is complete; if the AGC num is greater than 4 and not an integer multiple of 4, after the second-to-last AGC block is sent, the last AGC block is all digital AGC. Among them, the RF gain is adjusted according to the signal power value; the digital AGC adjusts the digital AGC amplification and reduction factor according to the signal power value.

[0102] The above process is repeated for each received time slot.

[0103] Specifically, taking the length of the digital AGC segment as 512 as an example for illustration:

[0104] For the signal after the down-conversion filter, a sequence signalIn with a length of 4*n (n = 512) is processed. First, the first sequence with a length of n is calculated, and by calculating its root mean square (RMS), the average power power1 of this segment of the signal is obtained: power1 = RMS(signalIn(1:512));

[0105] By comparing power1 with the reference value agcStad, an initial scaling factor zoomFactor1 is obtained: zoomFactor1 = agcStad / power1;

[0106] The subsequent signalIn(513:2048) is scaled for the first time according to zoomFactor1. Then, starting from signalIn(513), a sliding window with a width of 512 is used, and the values within the sliding window are cross-correlated with the local AGC sequence, that is, a total of 512 cross-correlations are performed. The first cross-correlation is signalIn(513:1024) and the local AGC sequence, and the last cross-correlation is signalIn(1025:1536) and the local AGC sequence. The peak point peak_pos is taken, and the starting position of the AGC segment in the received sequence is calculated according to peak_pos. Then, the RMS of the entire AGC segment is calculated to obtain the average power power2 of this segment. By comparing power1 with the reference value agcStad, a secondary scaling factor zoomFactor2 is obtained: zoomFactor2 = agcStad / power2; The subsequent signal is scaled for the second time according to zoomFactor1.

[0107] To illustrate the beneficial effects of the technical solution of the present invention, the present invention has conducted an intermediate frequency interconnection simulation experiment, and the experimental results are shown inFigures 11 - 16 As shown in:

[0108] Wherein, Figure 11 , Figure 12 and Figure 15 The abscissa of is the time axis, with the unit of ms; the ordinate is the signal amplitude. Figure 13 and Figure 14 are the correlation results of two sequences. The abscissa is the cross-correlation position of the two sequences, and the ordinate is the cross-correlation value.

[0109] See Figure 11 , the data segment in the time slot frame signal at the transmitting end is a sine signal. The initial signal attached figure is as Figure 11 . The time slot frame signal after passing through the complex channel is as Figure 12 shown.

[0110] The cross-correlation value when the AGC segment position is not accurately located is as Figure 13 shown. It can be seen that there is no obvious peak in the signal after cross-correlation. And see Figure 14 shown, an obvious peak appears in the cross-correlation value when the AGC segment position is accurately located. After accurately locating the AGC segment, the signal after AGC is as Figure 15 shown. Comparing Figure 11 and Figure 12 it can be known that after passing through the multipath and high Doppler channels, the amplitude of the sine signal increases. Comparing Figure 11 and Figure 15 it can be known that after shrinking it through AGC, the signal amplitude is similar to Figure 11 . It can be seen that the AGC scheme provided by the present invention successfully controls the signal gain.

[0111] Through comparative experiments, when using analog AGC + the digital AGC proposed by the present invention and analog AGC + traditional digital AGC, and equally performing 10 times of digital AGC adjustment, the results of the comparative experiment are shown in Figure 16 shown. As Figure 16 can be found, for the traditional digital AGC, after 5 adjustments, the signal amplitude passing through the channel is adjusted in place; for the digital AGC of the present invention, 2 adjustments are required. It can be seen that the AGC method provided by the present invention can adjust the signal more quickly.

[0112] It should be noted that traditional digital AGC does not locate the AGC segment. Instead, it intercepts a signal segment of a fixed length, calculates its power, then calculates the scaling factor, and finally scales the signal according to the scaling factor. The problem with the existing method is that since the intercepted signal segment is not a complete AGC segment, there is a deviation between the calculated power and the true power of the signal at this time, and the adjustment may not be in place. In the digital AGC of the present invention, before the AGC segment is found, the signal is not scaled. After the AGC segment is found, the power of the complete AGC segment is calculated, then the scaling factor is calculated, and finally the signal is scaled. Since the complete AGC segment is used when calculating the power, the single adjustment is more accurate, so the number of adjustments required is less. It can be seen that the digital-analog alternating AGC method provided by the present invention is fast and accurate and has good application prospects.

[0113] Figure 17 This is the architecture diagram of the transmitting end provided by the embodiment of the present invention; as Figure 17 shown, it includes:

[0114] An AGC frame design unit 1710, configured to design an AGC frame. After the designed AGC frame passes through a multipath and high Doppler channel, an AGC frame passing through a complex channel is obtained. The AGC frame includes a plurality of analog AGC segments and a plurality of digital AGC segments, and the length of the analog AGC segment is equal to the length of the digital AGC segment. After the digital AGC in the AGC frame passing through the complex channel is cross-correlated with the original digital AGC, the obtained peak exceeds the detection threshold; and the repetition times of the AGC segments in the AGC frame are determined according to the time slot frame structure of the signal waveform to be transmitted and the length of each AGC segment. The sum of the product of the length of a single AGC segment and the repetition times of the AGC segments, the length of the synchronization frame, the length of the data frame, and the length of the protection frame is less than or equal to the total length of the time limit frame;

[0115] A time slot frame output unit 1720, configured to splice the AGC frame, the synchronization frame, the data frame, and the protection frame into a time slot frame in sequence, and perform radio frequency output on the time slot frame after passing through an up-conversion low-pass filter.

[0116] Figure 18 This is the architecture diagram of the receiving end provided by the embodiment of the present invention, as Figure 18 shown, it includes:

[0117] A radio frequency signal receiving unit 1810, configured to receive a radio frequency signal;

[0118] A signal division unit 1820, configured to pass the radio frequency signal through a down-conversion low-pass filter and divide the output signal in periods of n moments; n is equal to the length of the digital AGC segment designed at the transmitting end;

[0119] A decision variable determination unit 1830 is configured to perform a differential operation on the signal at time t and the signal at time t + n to obtain a signal differential result, acquire n signal differential results corresponding to n times of t = 1, 2,..., n, perform difference correlation on the n signal differential results to obtain a delay correlation value within a time period n; calculate the difference between the signal power at time t and the signal power at time t + n to obtain a power difference, acquire n power differences corresponding to n times of t = 1, 2,..., n, sum the n power differences to obtain the signal energy within a time period n; and divide the delay correlation value by the signal energy to obtain a decision variable;

[0120] A signal capture unit 1840 is configured to sequentially obtain the decision variable values within each time period. When the decision variable exceeds a preset signal detection threshold within a continuous preset time period, the signals within the continuous preset time period are used as the captured valid signals;

[0121] A data decoding unit 1850 is configured to determine the AGC segment within the valid signal based on the digital AGC segment designed by the transmitting end and the captured valid signals, determine the power value of the valid signal according to the repetition times of the AGC segment, adjust the gain when receiving the radio frequency signal and the scaling factor when analyzing the output signal based on the corresponding power value; and analyze the received radio frequency signal in combination with the gain and the scaling factor to decode the valid data transmitted by the transmitting end.

[0122] It can be understood that for the detailed function implementation of each of the above units, reference can be made to the introduction in the foregoing method embodiments, and details are not described herein.

[0123] In addition, an embodiment of the present invention provides another electronic device, which includes: a memory and a processor;

[0124] The memory is configured to store a computer program;

[0125] The processor is configured to implement the method in the above embodiments when executing the computer program.

[0126] In addition, the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method in the above embodiments is implemented.

[0127] Based on the method in the above embodiments, an embodiment of the present invention provides a computer program product. When the computer program product runs on a processor, the processor is caused to execute the method in the above embodiments.

[0128] Based on the method in the above embodiments, an embodiment of the present invention further provides a chip, which includes one or more processors and an interface circuit. Optionally, the chip may further include a bus. Among them:

[0129] The processor may be an integrated circuit chip with the ability to process signals. In the implementation process, each step of the above method can be completed by the integrated logic circuit in the hardware of the processor or instructions in the form of software. The above processor may be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods and steps disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0130] The interface circuit can be used for sending or receiving data, instructions, or information. The processor can utilize the data, instructions, or other information received by the interface circuit for processing and can send the processed information through the interface circuit.

[0131] Optionally, the chip further includes a memory. The memory may include a read-only memory and a random access memory and provide operation instructions and data to the processor. A part of the memory may also include a non-volatile random access memory (NVRAM).

[0132] Optionally, the memory stores executable software modules or data structures. The processor can execute corresponding operations by calling the operation instructions stored in the memory (the operation instructions can be stored in the operating system).

[0133] Optionally, the interface circuit can be used to output the execution result of the processor.

[0134] It should be noted that the respective functions corresponding to the processor and the interface circuit can be implemented through hardware design, can also be implemented through software design, or can be implemented through a combination of software and hardware, and there is no limitation here.

[0135] It should be understood that each step of the above method embodiments can be completed by the logic circuit in the hardware form or instructions in the software form in the processor.

[0136] It can be understood that the magnitudes of the sequence numbers of the steps in the above embodiments do not mean the order of execution. The execution order of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. In addition, in some possible implementation manners, the steps in the above embodiments can be selectively executed according to the actual situation, can be partially executed, or can be fully executed, and there is no limitation here.

[0137] It is understandable that the processor in the embodiments of the present application may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0138] The method steps in the embodiments of the present application may be implemented in a hardware manner or by a processor executing software instructions. The software instructions may be composed of corresponding software modules, and the software modules may be stored in a random access memory (RAM), flash memory, read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), register, hard disk, removable hard disk, CD-ROM, or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may be located in the ASIC.

[0139] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more integrated available media. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)), etc.

[0140] It is easy for those skilled in the art to understand that the above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms, characterized in that, The steps include: Design an AGC frame. After the designed AGC frame passes through a multipath and high Doppler channel, an AGC frame passing through a complex channel is obtained. The AGC frame without passing through the complex channel includes a plurality of analog AGC segments and a plurality of digital AGC segments, and the length of the analog AGC segment is equal to the length of the digital AGC segment. Determine the repetition times of the digital AGC segments in the AGC frame without passing through the complex channel according to the time slot frame structure of the signal waveform to be transmitted and the length of each digital AGC segment. The sum of the product of the length of a single digital AGC segment and the repetition times of the digital AGC segments, the product of the length of a single analog AGC segment and the repetition times of the analog AGC segments, the length of the synchronization frame, the length of the data frame, and the length of the protection frame is less than or equal to the total length of the time slot frame. Splice the AGC frame without passing through the complex channel, the synchronization frame, the data frame, and the protection frame in sequence into a time slot frame, and perform radio frequency output after passing the time slot frame through an up-conversion low-pass filter.

2. The method according to claim 1, characterized in that The AGC frame without passing through the complex channel is repeated in units of AGC blocks, and each AGC block sequentially includes 2 analog AGC segments and 2 digital AGC segments. If the number of repetitions of the digital AGC segment in the AGC frame that has not passed through the complex channel is less than 4, then the AGC frame that has not passed through the complex channel includes such digital AGC segments; if the number of repetitions of the digital AGC segment in the AGC frame that has not passed through the complex channel is greater than 4 and not an integer multiple of 4, = 4*k + m, where m is a positive integer less than 4 and k is a positive integer, then the AGC frame that has not passed through the complex channel sequentially includes k AGC blocks and m such digital AGC segments to ensure that the ending part of the AGC frame that has not passed through the complex channel is a digital AGC segment.

3. A digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms, characterized in that, The steps include: Receive a radio frequency signal. Pass the radio frequency signal through a down-conversion low-pass filter, and divide the output signal into periods with n moments as a cycle; n is equal to the length of the digital AGC segment designed at the sending end. Perform a differential operation on the signal at time t and the signal at time t + n to obtain a signal differential result. Obtain n signal differential results corresponding to n moments of t = 1, 2,..., n, and perform difference correlation on the n signal differential results to obtain a delay correlation value within the time period n; calculate the difference between the signal power at time t and the signal power at time t + n to obtain a power difference. Obtain n power differences corresponding to n moments of t = 1, 2,..., n, and sum the n power differences to obtain the signal energy within the time period n; and divide the delay correlation value by the signal energy to obtain a decision variable. Successively obtain the decision variable values within each time period. When the decision variable exceeds a preset signal detection threshold within a continuous preset time period, the signal within the continuous preset time period is used as the captured valid signal. Determine the AGC segments within the valid signal based on the digital AGC segments designed at the sending end and the captured valid signal, and determine the power value of the valid signal according to the repetition times of the AGC segments. Adjust the gain when receiving the radio frequency signal and the scaling factor when analyzing the digital signal before passing through the down-conversion digital filter based on the corresponding power value. Analyze the received radio frequency signal in combination with the gain and the scaling factor, and decode to obtain the valid data sent by the sending end.

4. The method according to claim 3, wherein Determine the AGC segments within the valid signal based on the digital AGC segments designed at the sending end and the captured valid signal. Specifically: When the cross-correlation between a certain segment of the captured valid signal and the original digital AGC segment designed at the sending end results in a peak exceeding a preset value, this segment of the signal is a digital AGC segment.

5. A transmitting end, characterized in that, It includes: An AGC frame design unit for designing an AGC frame without a complex channel. After the designed AGC frame passes through a multipath and high Doppler channel, an AGC frame passing through a complex channel is obtained. The AGC frame without a complex channel includes multiple analog AGC segments and multiple digital AGC segments, and the length of the analog AGC segment is equal to the length of the digital AGC segment. And determine the repetition times of the AGC segments in the AGC frame according to the time slot frame structure of the signal waveform to be transmitted and the length of each AGC segment. The sum of the product of the length of a single AGC segment and the repetition times of the AGC segments, the length of the synchronization frame, the length of the data frame, and the length of the protection frame is less than or equal to the total length of the time slot frame. A time slot frame output unit for splicing the AGC frame without a complex channel, the synchronization frame, the data frame, and the protection frame in sequence into a time slot frame, and radio-frequency outputting the time slot frame after passing through an up-conversion low-pass filter.

6. The transmitter according to claim 5, characterized in that The AGC frame designed by the AGC frame design unit is repeated in units of AGC blocks, and each AGC block sequentially includes 2 analog AGC segments and 2 digital AGC segments; if the repetition times of the AGC segments are less than 4, then the AGC frame designed by the AGC frame design unit includes digital AGC segments; if the repetition times of the AGC segments are greater than 4 and not an integer multiple of 4, = 4*k + m, where m is a positive integer less than 4 and k is a positive integer, then the AGC frame designed by the AGC frame design unit sequentially includes k AGC blocks and m digital AGC segments to ensure that the ending part of the AGC frame that has not passed through a complex channel is a digital AGC segment.

7. A receiving end, characterized in that, Comprising: A radio-frequency signal receiving unit for receiving radio-frequency signals. A signal division unit for passing the radio-frequency signal through a down-conversion low-pass filter and dividing the output signal in a cycle of n moments. n is equal to the length of the digital AGC segment designed at the transmitting end. A decision variable determination unit for performing a differential operation on the signal at time t and the signal at time t + n to obtain a signal differential result, obtaining n signal differential results corresponding to n moments of t = 1, 2,..., n, taking the difference correlation of the n signal differential results to obtain a delay correlation value within the time period n; calculating the difference between the signal power at time t and the signal power at time t + n to obtain a power difference, obtaining n power differences corresponding to n moments of t = 1, 2,..., n, summing the n power differences to obtain the signal energy within the time period n; and dividing the delay correlation value by the signal energy to obtain a decision variable. A signal capture unit for sequentially obtaining the decision variable values within each time period. When the decision variable exceeds a preset signal detection threshold within a continuous preset time period, the signal within the continuous preset time period is used as the captured valid signal. A data decoding unit for determining the AGC segments within the valid signal based on the digital AGC segments designed at the transmitting end and the captured valid signal, determining the power value of the valid signal according to the repetition times of the AGC segments, and adjusting the gain when receiving the radio-frequency signal and the scaling factor when analyzing the digital signal before passing through the down-conversion digital filter based on the corresponding power value. And analyzing the received radio-frequency signal in combination with the gain and the scaling factor to decode the valid data transmitted by the transmitting end.

8. The receiving end according to claim 7, wherein The data decoding unit determines the digital AGC segments in the AGC frame after passing through a complex channel within the valid signal based on the digital AGC segments designed at the transmitting end and the captured valid signal. Specifically, when the cross-correlation between a certain segment of the captured valid signal and the original digital AGC segment designed at the transmitting end results in a peak exceeding a preset value, this segment of the signal is a digital AGC segment.

9. An electronic device, characterized in that, The electronic device includes a processor and a memory, and the memory stores at least one program code, which is loaded and executed by the processor to implement the digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms as described in claim 1 or 2, or the digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms as described in claim 3 or 4.

10. A computer-readable storage medium, characterized in that, At least one program code is stored in the computer-readable storage medium, and the program code is loaded and executed by a processor to implement the digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms as described in claim 1 or 2, or the digital-analog hybrid AGC method applicable to ultra-high-speed broadband waveforms as described in claim 3 or 4.

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