Calibration Method for Single-Sideband Time Modulator

Abstract

The present invention discloses a calibration method for a single-sideband time modulator. The method includes: setting a single-sideband time modulation signal before calibrating the single-sideband time modulator; measuring the S parameters of each channel in the time modulator to obtain calibration coefficients; generating a calibrated single-sideband time modulation signal based on the calibration coefficients; setting the calibrated single-sideband time modulation signal to verify the calibration effect. By modifying the control program, the present invention adjusts the single-sideband time modulation signal to compensate for the error influence of the hardware structure, greatly simplifies the calibration process of the sideband time modulator, is convenient to operate, has strong applicability, and has important practical value.

Description

Technical Field

[0001] The present invention belongs to the technical fields of microwave technology and antenna engineering technology, and particularly relates to a calibration method for a single-sideband time modulator. Background Art

[0002] With the development of wireless systems, traditional array antennas are facing increasingly high requirements in many fields such as precision guidance, aerospace, and navigation. As a phased array antenna consists of a large number of identical antenna elements, and by controlling the feeding amplitude and phase of the antenna elements to control the radiation pattern of the array, the control of its beam pointing can be achieved. However, the control accuracy is restricted by cost. In recent years, the new technology of time-modulated arrays has been applied to phased array antennas. It adds "time" as the fourth design dimension to the traditional antenna design in three-dimensional space. By subjecting the antenna to time modulation, the radiation characteristics of the antenna can be changed and controlled, and low-cost and high-precision beam scanning can be achieved. To solve the influence of a large number of useless sidebands brought by time modulation, a single-sideband time-modulated phased array controls the time characteristics of the corresponding antenna elements through a single-sideband time modulator with a specific structure, effectively improving the spectral performance and system efficiency.

[0003] However, the final performance of the single-sideband time modulator depends on the accuracy of the internal hardware structure. Especially for a single-sideband time modulator using quadrature modulation, the suppression of useless sidebands is achieved by the mutual cancellation between different channels within the modulator. If the amplitude and phase relationships between different channels deviate from the theoretical situation, the spectral performance will deteriorate. Especially in situations where a higher level of sideband suppression is required, the hardware structure accuracy requirements for the single-sideband time modulator are more stringent and calibration is needed. However, if the method of calibrating T / R components in traditional phased arrays is used to perform hardware calibration on the amplitude and phase of each channel, the cost will be greatly increased, and the low-cost advantage of the time-modulated array will be lost. Therefore, by fully leveraging the advantage that the single-sideband time modulator has "time" as the fourth design dimension, designing a method applicable to the single-sideband time modulator to achieve the calibration effect by modifying the time modulation signal will have high application value. Summary of the Invention

[0004] The purpose of the present invention is to provide a calibration method for a single-sideband time modulator in view of the problems existing in the prior art. Without modifying the hardware, by modifying the control program in the FPGA to correct the time modulation signal, the calibration of the single-sideband time modulator is achieved, and the designed spectral performance is restored.

[0005] The technical solution to achieve the purpose of the present invention is: A calibration method for a single-sideband time modulator, the method comprising the following steps:

[0006] Set the single-sideband time modulation signal of the single-sideband time modulator;

[0007] Measure the S-parameters of each channel in the single-sideband time modulator to obtain calibration coefficients;

[0008] Calibrate the single-sideband time modulation signal based on the calibration coefficients.

[0009] Further, the single-sideband time modulator includes a first Wilkinson power divider, a second Wilkinson power divider, a first channel, a second channel, a third channel, a fourth channel, a first port, and a second port; the first port is respectively connected to the second channel, the third channel, and the fourth channel through the first Wilkinson power divider, and then reaches the second port via the second Wilkinson power divider;

[0010] The first channel includes a first digital controlled attenuator, a first single-pole double-throw RF switch, a 0° channel of a first 0 / 180° phase shifter, and a second single-pole double-throw RF switch arranged in sequence along the direction from the first port to the second port;

[0011] The second channel includes a first digital controlled attenuator, a first single-pole double-throw RF switch, a 180° channel of a first 0 / 180° phase shifter, and a second single-pole double-throw RF switch arranged in sequence along the direction from the first port to the second port;

[0012] The third channel includes a second digital controlled attenuator, a third single-pole double-throw RF switch, a 0° channel of a second 0 / 180° phase shifter, a fourth single-pole double-throw RF switch, and a 90° phase shifter arranged in sequence along the direction from the first port to the second port;

[0013] The fourth channel includes a second digital controlled attenuator, a third single-pole double-throw RF switch, a 180° channel of a second 0 / 180° phase shifter, a fourth single-pole double-throw RF switch, and a 90° phase shifter arranged in sequence along the direction from the first port to the second port.

[0014] Further, the single-sideband time modulation signal is a stepped time modulation signal U A (t), U B (t), U C (t), U D (t) superimposed and formed by the FPGA circuit controlling the first channel, the second channel, the third channel, and the fourth channel respectively. The single-sideband time modulation signal needs to fit the Euler formula e jωt =cos(ωt)+jsin(ωt), so as to determine the amplitudes b A of each level of U B (t), U C (t), U D (t) and the durations τ s of each level, b s , b sand τ s respectively represent the amplitude and duration of the s-th level of the stepped waveform, and satisfy t A / T p = t B / T p -1 / 4 = t C / T p -1 / 2 = t D / T p -3 / 4, t A 、t B 、t C 、t D are respectively the central time points of the modulation signals U A (t), U B (t), U C (t), U D (t), and T p is the waveform period of the stepped time modulation signal.

[0015] Furthermore, the method for obtaining the S parameters of each channel in the measurement single-sideband time modulator is as follows: The first digital control attenuator, the second digital control attenuator, the first single-pole double-throw RF switch, the second single-pole double-throw RF switch, the third single-pole double-throw RF switch, and the fourth single-pole double-throw RF switch are controlled by the FPGA, so that one of the channels in the first channel, the second channel, the third channel, and the fourth channel is turned on, and the other three channels are turned off. Then, the vector network analyzer is used to measure the S parameters from the first port to the second port to obtain the S parameters of the turned-on channel.

[0016] Furthermore, the calibration coefficient is the amplitude error and phase error of the S parameters of the first channel, the second channel, the third channel, and the fourth channel relative to the ideal state.

[0017] Furthermore, the calibrated single-sideband time modulation signal is obtained by correcting the amplitude and phase of the single-sideband time modulation signal before calibration according to the calibration coefficients of the first channel, the second channel, the third channel, and the fourth channel.

[0018] Compared with the prior art, the present invention has the following remarkable advantages: By modifying the control program, the single-sideband time modulation signal is adjusted to compensate for the error influence of the hardware structure, greatly simplifying the calibration process of the sideband time modulator, with convenient operation and strong applicability, and having important practical value.

[0019] The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a flowchart of the calibration method for the single-sideband time modulator of the present invention.

[0021] Figure 2Schematic diagram of the hardware structure of the single-sideband time modulator of the present invention.

[0022] Figure 3 Schematic diagram of the stepped time modulation signal generated by the first channel of the single-sideband time modulator of the present invention.

[0023] Figure 4 Schematic diagram of the stepped time modulation signal generated by the second channel of the single-sideband time modulator of the present invention.

[0024] Figure 5 Schematic diagram of the stepped time modulation signal generated by the third channel of the single-sideband time modulator of the present invention.

[0025] Figure 6 Schematic diagram of the stepped time modulation signal generated by the fourth channel of the single-sideband time modulator of the present invention.

[0026] Figure 7 Theoretical spectrum diagram of the single-sideband time modulator before calibration in the embodiment of the present invention.

[0027] Figure 8 Measured spectrum diagram of the single-sideband time modulator before calibration in Embodiment 1.

[0028] Figure 9 Measured spectrum diagram of the single-sideband time modulator after calibration in Embodiment 1.

[0029] Figure 10 Measured spectrum diagram of the single-sideband time modulator before calibration in Embodiment 2.

[0030] Figure 11 Measured spectrum diagram of the single-sideband time modulator after calibration in Embodiment 2.

[0031] Figure 12 Schematic diagram of the single-sideband time modulation phased array structure in Embodiment 3.

[0032] Figure 13 Measured spectrum diagram of the eight single-sideband time modulators in the single-sideband time modulation phased array before calibration in Embodiment 3.

[0033] Figure 14 Measured spectrum diagram of the eight single-sideband time modulators in the single-sideband time modulation phased array after calibration in Embodiment 3.

[0034] Figure 15 Measured normalized radiation patterns of the +1st sideband and -1st sideband of the single-sideband time modulation phased array before and after calibration in Embodiment 3.

[0035] Figure 16Measured normalized radiation pattern of the +1st sideband beam scanning of the single-sideband time-modulated phased array in Embodiment 3. Detailed implementation manners

[0036] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0037] It should be noted that if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, features defined with "first", "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between various embodiments may be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present invention.

[0038] Combined with Figure 1 , the present invention provides a calibration method for a single-sideband time modulator, including the following steps:

[0039] Step S1: Set the single-sideband time modulation signal of the single-sideband time modulator.

[0040] Combined with Figure 2, The single-sideband time modulator is the core component of the single-sideband time-modulated phased array, including a first Wilkinson power divider 2, a second Wilkinson power divider 7, a first channel 3, a second channel 4, a third channel 5, a fourth channel 6, a first port 1, and a second port 8; the first port 1 is respectively connected to the second channel 4, the third channel 5, and the fourth channel 6 through the first Wilkinson power divider 2, and then reaches the second port 8 via the second Wilkinson power divider 7. The first channel 3 includes a first numerically controlled attenuator 9, a first single-pole double-throw RF switch 10, a 0° channel 11 of a first 0 / 180° phase shifter, and a second single-pole double-throw RF switch 13 arranged in sequence along the direction from the first port to the second port. The second channel 4 includes a first numerically controlled attenuator 9, a first single-pole double-throw RF switch 10, an 180° channel 12 of a first 0 / 180° phase shifter, and a second single-pole double-throw RF switch 13 arranged in sequence along the direction from the first port to the second port. The third channel 5 includes a second numerically controlled attenuator 14, a third single-pole double-throw RF switch 15, a 0° channel 16 of a second 0 / 180° phase shifter, a fourth single-pole double-throw RF switch 18, and a 90° phase shifter 19 arranged in sequence along the direction from the first port to the second port. The fourth channel 6 includes a second numerically controlled attenuator 14, a third single-pole double-throw RF switch 15, an 180° channel 17 of a second 0 / 180° phase shifter, a fourth single-pole double-throw RF switch 18, and a 90° phase shifter 19 arranged in sequence along the direction from the first port to the second port.

[0041] Combined with Figure 3 , Figure 4 , Figure 5 and Figure 6 , the single-sideband time modulation signal is formed by combining stepped time modulation signal combinations generated by the FPGA circuit controlling the first channel 3, the second channel 4, the third channel 5, and the fourth channel 6. Figure 3 The stepped time modulation signal U A (t) generated by the first channel 3 shown, is a stepped modulation wave with an S-level stepped waveform and a period of T p , the amplitude and duration of the s-th step are respectively and and the center time point is t A . Figure 4 The stepped time modulation signal U B (t) generated by the second channel 4 shown, is a stepped modulation wave with an S-level stepped waveform and a period of T p , the amplitude and duration of the s-th step are respectively and and the center time point is t B . Figure 5 The stepped time modulation signal U C(t) is a stepped modulation wave with an S - level stepped waveform having a period of T p For the s - th step, the amplitude and the duration are respectively and The central time point is t C . Figure 6 The stepped - time modulation signal U D (t) generated by the fourth channel 6 shown is a stepped modulation wave with an S - level stepped waveform having a period of T p For the s - th step, the amplitude and the duration are respectively and The central time point is t D .

[0042] The single - sideband time - modulation signal is formed by the superposition of U A (t), U B (t), U C (t) and U D (t). In order to achieve single - sideband, the +1 order working sideband is retained and other useless sidebands are suppressed. The single - sideband time - modulation signal needs to fit the Euler's formula e jωt = cos(ωt)+jsin(ωt), so as to determine the amplitudes b A and the durations τ B of each level of U C (t), U D (t), U s and U s (t). b s and τ s respectively represent the amplitude and the duration of the s - th step of the stepped waveform, and satisfy t A / T p = t B / T p -1 / 4 = t C / T p -1 / 2 = t D / T p -3 / 4.

[0043] Based on the single - sideband time - modulation signal and the hardware structure of the time - modulator in the theoretical case, determine the control program of the FPGA circuit to implement the single - sideband time - modulation signal before setting the calibration of the single - sideband time - modulator.

[0044] Step S2: Measure the S - parameters of each channel in the single - sideband time - modulator to obtain the calibration coefficients;

[0045] To measure the S-parameters of each channel in the time modulator, the FPGA controls the first digitally controlled attenuator 9 and the second digitally controlled attenuator 14, as well as the first single-pole double-throw RF switch 10, the second single-pole double-throw RF switch 13, the third single-pole double-throw RF switch 15, and the fourth single-pole double-throw RF switch 18, so that one of the channels in the first channel 3, the second channel 4, the third channel 5, and the fourth channel 6 is turned on, and the other three channels are turned off. Then, the vector network analyzer is used to measure the S-parameters from the first port 1 to the second port 8 to obtain the S-parameters of the turned-on channel.

[0046] To measure the S-parameters of the first channel 3, the FPGA circuit controls the first digitally controlled attenuator 9 to be in a low-resistance state, the second digitally controlled attenuator 14 to be in a high-resistance state, the first single-pole double-throw RF switch 10 and the second single-pole double-throw RF switch 13 to point to the 0° channel 11 of the first 0 / 180° phase shifter, the third single-pole double-throw RF switch 15 to point to the 0° channel 16 of the second 0 / 180° phase shifter, and the fourth single-pole double-throw RF switch 18 to point to the 180° channel 17 of the second 0 / 180° phase shifter. Then, the vector network analyzer is used to measure the S-parameters from the first port 1 to the second port 8 to obtain the S-parameters of the first channel 3.

[0047] To measure the S-parameters of the second channel 4, the FPGA circuit controls the first digitally controlled attenuator 9 to be in a low-resistance state, the second digitally controlled attenuator 14 to be in a high-resistance state, the first single-pole double-throw RF switch 10 and the second single-pole double-throw RF switch 13 to point to the 180° channel 12 of the first 0 / 180° phase shifter, the third single-pole double-throw RF switch 15 to point to the 0° channel 16 of the second 0 / 180° phase shifter, and the fourth single-pole double-throw RF switch 18 to point to the 180° channel 17 of the second 0 / 180° phase shifter. Then, the vector network analyzer is used to measure the S-parameters from the first port 1 to the second port 8 to obtain the S-parameters of the second channel 4.

[0048] To measure the S-parameters of the third channel 5, the FPGA circuit controls the first digitally controlled attenuator 9 to be in a high-resistance state, the second digitally controlled attenuator 14 to be in a low-resistance state, the first single-pole double-throw RF switch 10 to point to the 0° channel 11 of the first 0 / 180° phase shifter, the second single-pole double-throw RF switch 13 to point to the 180° channel 12 of the first 0 / 180° phase shifter, and the third single-pole double-throw RF switch 15 and the fourth single-pole double-throw RF switch 18 to point to the 0° channel 16 of the second 0 / 180° phase shifter. Then, the vector network analyzer is used to measure the S-parameters from the first port 1 to the second port 8 to obtain the S-parameters of the third channel 5.

[0049] The S-parameters of the fourth channel 6 are measured by controlling the first digitally controlled attenuator 9 to be in a high-impedance state and the second digitally controlled attenuator 14 to be in a low-impedance state through the FPGA circuit. The first single-pole double-throw RF switch 10 is directed to the 0° channel 11 of the first 0 / 180° phase shifter, the second single-pole double-throw RF switch 13 is directed to the 180° channel 12 of the first 0 / 180° phase shifter, the third single-pole double-throw RF switch 15 and the fourth single-pole double-throw RF switch 18 are directed to the 180° channel 17 of the second 0 / 180° phase shifter. Then, a vector network analyzer is used to measure the S-parameters from the first port 1 to the second port 8 to obtain the S-parameters of the fourth channel 6.

[0050] The calibration coefficients are the amplitude errors and phase errors of the S-parameters of the first channel 3, the second channel 4, the third channel 5, and the fourth channel 6 relative to the ideal state, and are expressed in complex form as α A 、α B 、α C and α D . In the ideal state, the amplitudes of the first channel 3, the second channel 4, the third channel 5, and the fourth channel 6 are the same, and the relative values of the phases are 0°, 180°, 90°, and 270° respectively.

[0051] Step S3: Calibrate the single-sideband time-modulated signal based on the calibration coefficients;

[0052] The calibrated single-sideband time-modulated signal is obtained by correcting the amplitude and phase of the single-sideband time-modulated signal before calibration according to the calibration coefficients of the first channel 3, the second channel 4, the third channel 5, and the fourth channel 6.

[0053] According to the calibration coefficients, using an optimization algorithm, the durations of each level of the multi-level staircase waveform in the time-modulated signals U A (t), U B (t), U C (t) and U D (t) before calibration are corrected to and and the center time points are corrected to t A2 、t B2 、t C2 and t D2 , restoring the theoretical amplitude and phase relationship of the first channel 3, the second channel 4, the third channel 5, and the fourth channel 6.

[0054] (1) According to the calibration coefficient α A of the first channel 3, the durations of each level of the multi-level staircase waveform in U A (t) are corrected to and the center time point t A is corrected to t A2, which is achieved based on the following objective function and phase relationship:

[0055]

[0056] 2π·(t A -t A2 ) / T p =P(α A )

[0057] In the formula, w1 is the weighting value for the amplitude correction of the multi-level stepped waveform, and w2 is the weighting value for the sideband level optimization, ensuring that while correcting the amplitude, the deterioration of the sideband level is avoided;

[0058] (2) According to the calibration coefficient α of the second channel 4 B Modify the duration of each level of the multi-level stepped waveform in U B (t) to Modify The central time point t B to t B2 , which is achieved based on the following objective function and phase relationship:

[0059]

[0060] 2π·(t B -t B2 ) / T p =P(α B )

[0061] (3) According to the calibration coefficient α of the third channel 5 C Modify the duration of each level of the multi-level stepped waveform in U C (t) to Modify The central time point t C to t C2 , which is achieved based on the following objective function and phase relationship:

[0062]

[0063] 2π·(t C -t C2 ) / T p =P(α C )

[0064] (4) According to the calibration coefficient α of the fourth channel (6) D Modify the duration of each level of the multi-level stepped waveform in U D (t) to Modify The central time point t D to t D2, which is achieved based on the following objective function and phase relationship:

[0065]

[0066] 2π·(t D -t D2 ) / T p =P(α D ).

[0067] Based on the single-sideband time modulation signal corrected by the calibration coefficient, re-edit the control program of the FPGA circuit to complete the calibration of the single-sideband time modulation signal. Input the radio frequency signal at the first port 1, measure the signal spectrum output at the second port 8 with a spectrum analyzer, observe the suppression effect of the unwanted sideband, and verify the calibration effect.

[0068] The present invention will be further described in detail below with reference to the embodiments.

[0069] Embodiment 1

[0070] Exemplarily, the embodiment of the present invention adopts an 8-level stepped time modulation waveform (S = 8). According to the amplitude distribution of the digital controlled attenuator, the stepped amplitudes of all channels satisfy b1 = -14dB, b2 = -12dB, b3 = -10dB, b4 = -8dB, b5 = -6dB, b6 = -4dB, b7 = -2dB, b8 = 0dB. After optimization, the stepped durations of all channels are τ1 = 0.469, τ2 = 0.422, τ3 = 0.406, τ4 = 0.383, τ5 = 0.348, τ6 = 0.305, τ7 = 0.242, τ8 = 0.148.

[0071] See Figure 7 , which is the theoretical spectrum diagram of the single-sideband time modulator according to Embodiment 1 of the present invention. According to the above waveform parameters, set the single-sideband time modulation signal before calibration of the single-sideband time modulator, and the theoretical upper sideband level is -35.57dB.

[0072] The measured hardware circuit of this embodiment operates at 2GHz, and the frequency of the generated single-sideband time modulation signal is 100kHz.

[0073] Exemplarily, after setting the single-sideband time modulation signal before calibration of the single-sideband time modulator in Embodiment 1 of the present invention, by measuring the S parameters of each channel in the time modulator, the obtained calibration coefficients are α A =1.000e j0° 、α B =1.006e j0° 、α C =1.022e j6° and α D =1.021ej7° Its error is manifested as a large phase error in the orthogonality relationship between the first channel 3, the second channel 4, the third channel 5, and the fourth channel 6.

[0074] See Figure 8 , which is the measured spectrum diagram of the single-sideband time modulator before calibration in the first embodiment of the present invention. It can be seen from the figure that the -1 sideband in the spectrum deteriorates significantly, and the sideband level is -24.94 dB.

[0075] By adjusting the center time points t A (t), U B (t), U C (t) and U D (t) of the single-sideband time modulation signals U A , t B , t C and t D to compensate for the phase error in the hardware circuit and restore orthogonality.

[0076] Exemplarily, according to the measured calibration coefficients α C and α D , the phase errors are 6° and 7°, so t C2 and t D2 are delayed by 0.016T p and 0.019T p respectively to compensate for the phase error in the hardware circuit.

[0077] See Figure 9 , which is the measured spectrum diagram of the single-sideband time modulator after calibration in the first embodiment of the present invention. It can be seen from the figure that the -1 sideband in the spectrum is significantly suppressed, and the sideband level is -35.03 dB.

[0078] Embodiment 2

[0079] The hardware circuit adopted in the second embodiment of the present invention and the single-sideband time modulation signal before calibration are the same as those in the first embodiment.

[0080] Exemplarily, after setting the single-sideband time modulation signal before calibration of the single-sideband time modulator in the second embodiment of the present invention, the obtained calibration coefficients are α A = 1.000e j0° , α B = 1.000e j1° , α C = 1.151e j0° and α D = 1.143e j0° . Its error is manifested as a significantly lower amplitude of the first channel 3 and the second channel 4 compared to the third channel 5 and the fourth channel 6. The amplitude consistency of the four channels is damaged.

[0081] See Figure 10 , which is the measured spectrum diagram of the single-sideband time modulator before calibration in the second embodiment of the present invention. It can be seen from the figure that the -1st sideband in the spectrum deteriorates significantly, and the sideband level is -23.29 dB.

[0082] By adjusting the multi-level step waveforms of the time modulation signals U A (t), U B (t), U C (t) and U D (t), where the duration of each level of the multi-level step waveform is and it is possible to change the amplitudes of U A (t), U B (t), U C (t) and U D (t) to compensate for the amplitude error in the hardware circuit and restore the amplitude consistency of the four channels.

[0083] Exemplarily, in the second embodiment of the present invention, the amplitudes of U C (t) and U D (t) are reduced. According to the measured calibration coefficients, the durations of each level of the multi-level step waveforms of U C (t) and U D (t) are optimized based on the objective function, and both are modified to τ1 = 0.461, τ2 = 0.418, τ3 = 0.387, τ4 = 0.375, τ5 = 0.324, τ6 = 0.281, τ7 = 0.191, τ8 = 0.051.

[0084] See Figure 12 , which is the measured spectrum diagram of the single-sideband time modulator after calibration in the second embodiment of the present invention. It can be seen from the figure that the -1st sideband in the spectrum is significantly suppressed, and the sideband level is -31.86 dB.

[0085] Embodiment 3

[0086] The calibration method of the single-sideband time modulator proposed by the present invention has application value in many application scenarios, and the calibration of the single-sideband time modulation phased array is one of the important applications. The following further elaborates on the application of the calibration method of the single-sideband time modulator in the calibration of the single-sideband time modulation phased array in combination with Figure 13 the accompanying drawings and Embodiment 3.

[0087] See Figure 12, which is a schematic diagram of the hardware structure of the single-sideband time-modulated phased array according to the third embodiment of the present invention. The single-sideband time-modulated phased array consists of N single-sideband time modulators, N antenna elements connected thereto, an FPGA control circuit, and a 1-N power divider. The single-sideband time modulator is controlled by a periodic time sequence sent from the FPGA control circuit, and can realize the suppression of the useless sideband and amplitude-phase weighting.

[0088] Exemplarily, the scale of the entire time-modulated antenna array composed of N antenna elements in the third embodiment of the present invention can be any required one-dimensional or two-dimensional array. For example, in this embodiment, a one-dimensional 8-element antenna array is adopted and correspondingly connected to 8 single-sideband time modulators. The third embodiment of the present invention does not limit this.

[0089] The hardware circuit of the single-sideband time modulator adopted in the third embodiment of the present invention and the single-sideband time modulation signal before calibration are the same as those in the first embodiment.

[0090] See Figure 13 , which is the measured spectrum diagram of the 8 single-sideband time modulators in the single-sideband time-modulated phased array according to the third embodiment of the present invention before calibration. Among them, the 1st, 2nd, 3rd, and 5th single-sideband time modulators have significant hardware errors, resulting in the significant deterioration of the -1st sideband to -22.23 dB. The sideband levels of the other single-sideband time modulators without significant hardware errors are about -32.09 dB.

[0091] By measuring the S parameters of each channel in the time modulator with hardware errors, the calibration coefficients are obtained. It can be found that the 1st, 2nd, and 5th single-sideband time modulators are similar to those in the first embodiment, and there are large errors in the phase orthogonality relationship between channels. The 3rd single-sideband time modulator is similar to that in the second embodiment, and the amplitude consistency between channels is poor.

[0092] See Figure 14 , which is the measured spectrum diagram of the 8 single-sideband time modulators in the single-sideband time-modulated phased array according to the third embodiment of the present invention after calibration. Based on the error types of the 1st, 2nd, 3rd, and 5th single-sideband time modulators, referring to the first and second embodiments, the corresponding calibration methods are adopted, and the sideband levels of the calibrated single-sideband time modulators are all suppressed below -31.86 dB.

[0093] See Figure 15 , which is the measured normalized radiation patterns of the +1st sideband and -1st sideband of the single-sideband time-modulated phased array according to the third embodiment of the present invention before and after calibration. The radiation pattern of the +1st sideband as the working sideband is not affected by the calibration. The -1st sideband that needs to be suppressed is calibrated, and the peak value in the radiation pattern is reduced from -30.27 dB to -35.25 dB.

[0094] See Figure 16, which is the measured normalized radiation pattern of the +1st sideband beam scanning of the single-sideband time modulation phased array according to the third embodiment of the present invention, where the beams are respectively directed to 0°, ±15°, ±30°, and ±45°. Through the control of the FPGA circuit, a time difference Δt′ is generated between the single-sideband time modulation signals generated by adjacent single-sideband time modulators, satisfying:

[0095]

[0096] where is the phase difference generated by adjacent time modulation units, that is, the phase difference between antenna units; T p is the period of the stepped time modulation pulse, β is the free-space beam, d is the antenna element spacing, and θ0 is the beam direction of the antenna array.

[0097] In summary, the present invention adjusts the single-sideband time modulation signal by modifying the control program to compensate for the error influence of the hardware structure, greatly simplifies the calibration process of the sideband time modulator, is convenient to operate, has strong applicability, and has important practical value.

[0098] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. The above embodiments and the description in the specification only illustrate the principles of the present invention. Without departing from the spirit and scope of the present invention, any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

Claims

1. A calibration method for a single-sideband time modulator, characterized in that, The method includes the following steps: Set the single-sideband time modulation signal of the single-sideband time modulator; Measure the S-parameters of each channel in the single-sideband time modulator to obtain calibration coefficients; Calibrate the single-sideband time modulation signal based on the calibration coefficients; The single-sideband time modulator includes a first Wilkinson power divider (2), a second Wilkinson power divider (7), a first channel (3), a second channel (4), a third channel (5), a fourth channel (6), a first port (1), and a second port (8); the first port (1) is respectively connected to the second channel (4), the third channel (5), and the fourth channel (6) through the first Wilkinson power divider (2), and then reaches the second port (8) via the second Wilkinson power divider (7); The first channel (3) includes a first numerically controlled attenuator (9), a first single-pole double-throw RF switch (10), a 0° channel (11) of a first 0 / 180° phase shifter, and a second single-pole double-throw RF switch (13) arranged in sequence along the direction from the first port (1) to the second port (8); The second channel (4) includes a first numerically controlled attenuator (9), a first single-pole double-throw RF switch (10), a 180° channel (12) of a first 0 / 180° phase shifter, and a second single-pole double-throw RF switch (13) arranged in sequence along the direction from the first port (1) to the second port (8); The third channel (5) includes a second numerically controlled attenuator (14), a third single-pole double-throw RF switch (15), a 0° channel (16) of a second 0 / 180° phase shifter, a fourth single-pole double-throw RF switch (18), and a 90° phase shifter (19) arranged in sequence along the direction from the first port (1) to the second port (8); The fourth channel (6) includes a second numerically controlled attenuator (14), a third single-pole double-throw RF switch (15), a 180° channel (17) of a second 0 / 180° phase shifter, a fourth single-pole double-throw RF switch (18), and a 90° phase shifter (19) arranged in sequence along the direction from the first port (1) to the second port (8); The single-sideband time modulation signal is a stepped time modulation signal U generated by the FPGA circuit controlling the first channel (3), the second channel (4), the third channel (5), and the fourth channel (6) respectively A (t), U B (t), U C (t), U D (t) superimposed to form. The single-sideband time modulation signal needs to fit the Euler's formula e jωt = cos(ωt) + jsin(ωt), so as to determine U A (t), U B (t), U C (t) and U D (t) amplitudes b s and durations τ s , b s and τ s respectively represent the amplitude and duration of the s-th level of the stepped waveform, and satisfy t A / T p = t B / T p -1 / 4 = t C / T p -1 / 2 = t D / T p -3 / 4, t A , t B , t C , t D are the central time points of the modulation signals U A (t), U B (t), U C (t), U D (t), respectively, and T p is the waveform period of the stepped time modulation signal; The calibration coefficients are the amplitude errors and phase errors of the S-parameters of the first channel (3), the second channel (4), the third channel (5), and the fourth channel (6) relative to the ideal state; The calibration of the single-sideband time modulation signal based on the calibration coefficients is specifically as follows: According to the calibration coefficient, use an optimization algorithm to correct the time modulation signals U A (t), U B (t), U C (t) and U D (t), and the duration and central time points of each level of the multi-level step waveform in them, and restore the theoretical amplitude and phase relationship of the first channel (3), the second channel (4), the third channel (5), and the fourth channel (6); specifically including: (1)According to the calibration coefficient α of the first channel (3) A Modify the duration of each level of the multi-level staircase waveform in U A (t) to Modify the central time point t A to t A2 , which is achieved based on the following objective function and phase relationship: 2π·(t A -t A2 ) / T p =P(α A ) In the formula, w1 is the weighting value for multi-level stepped waveform amplitude correction, and w2 is the weighting value for sideband level optimization; (2)According to the calibration coefficient α of the second channel (4) B Modify the duration of each level of the multi-level staircase waveform in U B (t) to Modify the central time point t B to t B2 , which is achieved based on the following objective function and phase relationship: 2π·(t B -t B2 ) / T p =P(α B ) (3) According to the calibration coefficient α of the third channel (5) C Modify the duration of each level of the multi-level step waveform in U C (t) to Modify the central time point t C to t C2 , which is achieved based on the following objective function and phase relationship: 2π·(t C -t C2 ) / T p =P(α C ) (4) According to the calibration coefficient α of the fourth channel (6) D Modify the duration of each level of the multi-level stepped waveform in U D (t) to Modify the central time point t D to t D2 , achieved based on the following objective function and phase relationship: 2π·(t D -t D2 ) / T p =P(α D )。 2. The calibration method of the single-sideband time modulator according to claim 1, characterized in that The specific method for measuring the S-parameters of each channel in the single-sideband time modulator is: control the first numerically controlled attenuator (9), the second numerically controlled attenuator (14), the first single-pole double-throw RF switch (10), the second single-pole double-throw RF switch (13), the third single-pole double-throw RF switch (15), and the fourth single-pole double-throw RF switch (18) through the FPGA, so that one of the channels in the first channel (3), the second channel (4), the third channel (5), and the fourth channel (6) is turned on, and the other three channels are turned off, and then use a vector network analyzer to measure the S-parameters from the first port (1) to the second port (8) to obtain the S-parameters of the turned-on channel.

3. The calibration method of the single-sideband time modulator according to claim 2, wherein In the ideal state, the amplitudes of the first channel (3), the second channel (4), the third channel (5), and the fourth channel (6) are the same, and the relative values of the phases are 0°, 180°, 90°, and 270° respectively.

4. The calibration method of the single-sideband time modulator according to claim 1, characterized in that The calibrated single-sideband time modulation signal is obtained by correcting the amplitude and phase of the single-sideband time modulation signal before calibration according to the calibration coefficients of the first channel (3), the second channel (4), the third channel (5), and the fourth channel (6).

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