A nonvolatile memory operation method and system based on ovonic threshold switch

Abstract

The application discloses a nonvolatile storage operation method and system based on an Ovonic threshold switch. Based on the discovery that a threshold voltage value and an off-state resistance value are strongly positively correlated, the off-state resistance value can be adjusted by performing repeated unidirectional pulse operations on the Ovonic threshold switch, and the corresponding threshold voltage is adjusted accordingly, so that the Ovonic threshold switch has a threshold state with sufficient distinguishability. Based on the conversion of the Ovonic threshold switch between two threshold states with obvious differences, nonvolatile storage of information can be realized, and a threshold voltage window is large enough, which can significantly improve the accuracy of read operation and greatly reduce the complexity of external circuits. In addition, the Ovonic threshold switch has the advantages of nanosecond switching speed, good scalability and easy three-dimensional stacking, and is expected to be used in DRAM application scenarios under a technology node of less than 20 nm when realizing a nonvolatile storage unit, thereby greatly improving the storage density on the basis of matching the DRAM access speed.

Description

Technical Field

[0001] This invention belongs to the field of micro-nano electronics technology, and more specifically, relates to a non-volatile storage operation method and system based on an Orthorough threshold switch. Background Technology

[0002] Dynamic Random Access Memory (DRAM) has been the main memory in computer storage architectures for decades due to its advantages in both speed and storage density. However, as the technology node has entered the 20nm stage, DRAM has been limited by issues such as reduced capacitance and increased transistor leakage current caused by size reduction. It has approached the physical limits of size reduction, and the complex processes and high costs required for further DRAM miniaturization have led to the gradual saturation of the cost benefits brought by its miniaturization, forming a barrier in terms of physical size and cost, creating the "miniaturization wall".

[0003] Therefore, it is necessary to achieve new types of memory with smaller process dimensions while matching the access speed of DRAM. Among the current mainstream new memory based on resistance switching mechanisms, resistive random access memory (RRAM) and phase-change memory (PCM) have difficulty matching the read and write speeds of DRAM because the memory cells must undergo non-volatile structural transitions during the erase and write processes. While spin-transfer torque magnetoresistence random access memory (STT-MRAM) has advantages in read and write speeds, it has disadvantages in scalability, storage density, and cost, and is considered more suitable for applications of static random access memory (SRAM). Ferroelectric RAM (FeRAM) also faces serious size reduction problems.

[0004] Ovonic threshold switches are characterized by fast switching speed, low process cost, and easy three-dimensional stacking. They are fast and dense enough to match DRAM. The key to storing information based on Ovonic threshold switches is to enable two distinct states to be switched under electrical operation.

[0005] In existing technologies, the polarity-dependent threshold voltage of the Orthorhombic threshold switch is mainly utilized, employing a polarity pulse operation scheme to achieve the transition between two significantly different states. However, this method based on the polarity dependence of the Orthorhombic threshold voltage may suffer from limitations due to defects within the threshold switch layer contributing only to conduction in one direction. Consequently, the threshold voltage window size in a given material may fluctuate around a fixed value. Furthermore, the insignificant polarity of the Orthorhombic threshold switch results in a small threshold voltage window, leading to poor read accuracy when used as a memory unit. In addition, the external circuitry employing polarity pulse operation also requires higher complexity. Summary of the Invention

[0006] In view of the above-mentioned defects or improvement needs of the prior art, the present invention provides a non-volatile storage operation method and system based on an Orthocrite threshold switch to solve the technical problem of small threshold voltage window in the prior art.

[0007] To achieve the above objectives, in a first aspect, the present invention provides a non-volatile storage operation method based on an Orthocritean threshold switch, including an erase operation comprising the following steps:

[0008] A pulse signal is applied to the Ortho threshold switch to read its initial threshold voltage V. th0 And obtain the off-state resistance value R of the Orthorhombic threshold switch in its initial state. ini ;

[0009] Repeatedly apply reset pulses to the Ortho threshold switch to increase its off-state resistance until its off-state resistance equals R. ini The ratio is greater than the first preset ratio, thereby realizing the erasure operation;

[0010] Wherein, the aforementioned off-state resistance value is the resistance value of the Ortho threshold switch under a preset fixed voltage; the preset fixed voltage ranges from V. th0 The neighborhood range is 2; the above reset pulse is a unidirectional pulse.

[0011] More preferably, if the Auerbach threshold switch has not been turned on for the first time before the pulse signal is applied, a DC voltage scan is applied to the Auerbach threshold switch before the pulse signal is applied to make it turn on for the first time.

[0012] More preferably, the reset pulse has a pulse width range of 10-500ns and an amplitude range of 2-10V.

[0013] More preferably, the above-mentioned non-volatile storage operation method further includes a write operation, specifically including:

[0014] When the off-state resistance of the Orthorhombic threshold switch is greater than R iniWhen multiplied by the first preset ratio, the set pulse is repeatedly applied to the Ortho threshold switch to reduce its off-state resistance value until its off-state resistance value is equal to R. ini The ratio is less than the second preset ratio, thus enabling the write operation;

[0015] The set pulse is a unidirectional pulse with a pulse width greater than that of the reset pulse and an amplitude smaller than that of the reset pulse.

[0016] More preferably, the pulse width of the set pulse is in the range of 1-50 μs, and the amplitude is in the range of 1-4 V.

[0017] More preferably, the above-mentioned non-volatile storage operation method further includes a read operation, specifically including: applying a preset voltage to an Ortho threshold switch to realize the read operation;

[0018] Among them, the preset voltage is greater than the voltage V. low And less than voltage V high Voltage V low The off-state resistance value of the Ortho threshold switch is greater than R. ini The threshold voltage when multiplied by the second preset ratio; voltage V high The off-state resistance value of the Ortho threshold switch is less than R. ini The threshold voltage when multiplied by the first preset ratio.

[0019] More preferably, the aforementioned Auschwitz threshold switch includes a first metal electrode layer, a threshold switch layer, and a second metal electrode layer distributed sequentially from top to bottom.

[0020] More preferably, the material of the threshold switching layer is selected from SiTe. x 、CTe x BTe x ,GeTe x AlTe x BiTe x AsTe x SnTe x MgTe x ,GeSe x 、SbSe x BiSe x 、AsSe x GeS x and GaS x At least one of them;

[0021] Alternatively, the material of the threshold switching layer mentioned above can be selected from doped SiTe. x 、CTe x BTe x ,GeTe xAlTe x BiTe x AsTe x SnTe x MgTe x ,GeSe x 、SbSe x BiSe x 、AsSe x GeS x and GaS x At least one of the following: wherein the doping element is selected from at least one of N, Sb, In, and C.

[0022] More preferably, both the first metal electrode layer and the second metal electrode layer are inert electrode materials, and the inert electrode materials are selected from at least one of W, TiW, TiN, Pt, Ti, Au, Ru, TaN, ITO and IZO.

[0023] In a second aspect, the present invention provides a non-volatile memory operating system based on an Ortho threshold switch, comprising: an Ortho threshold switch and a controller;

[0024] The controller is used to execute the non-volatile storage operation method provided in the first aspect of the present invention.

[0025] Thirdly, the present invention also provides a computer-readable storage medium comprising a stored computer program, wherein the computer program, when executed by a processor, controls the device containing the storage medium to perform the non-volatile storage operation method provided in the first aspect of the present invention.

[0026] In summary, the above-described technical solutions conceived in this invention can achieve the following beneficial effects:

[0027] 1. This invention provides a non-volatile storage operation method based on an Orteau threshold switch. Based on the discovery that the threshold voltage value and the off-state resistance value are strongly positively correlated, the off-state resistance value can be adjusted by performing repeated unidirectional pulse operations on the Orteau threshold switch, thereby adjusting the corresponding threshold voltage. This allows the Orteau threshold switch to have sufficiently distinguishable threshold states. Based on the transition between two significantly different threshold states of the Orteau threshold switch, non-volatile storage of information can be achieved, and a sufficiently large threshold voltage window can be provided, which can significantly improve the accuracy of read operations.

[0028] 2. The non-volatile storage operation method based on the Auermann threshold switch provided by the present invention can switch between two significantly different threshold states by only one-way operation, which greatly reduces the complexity of the external circuit.

[0029] 3. This invention is based on an Orthorhombic threshold switch to realize non-volatile memory operation. The Orthorhombic threshold switch has the advantages of nanosecond-level switching speed, good miniaturization and easy three-dimensional stacking. When realizing non-volatile memory cells, it is expected to be used in DRAM application scenarios under technology nodes smaller than 20nm, thereby significantly improving storage density while matching DRAM access speed. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the structure of the Auerbach threshold switch provided by the present invention;

[0031] Figure 2 This is a flowchart illustrating the erasure operation method based on an Orthorough threshold switch provided in Embodiment 1 of the present invention.

[0032] Figure 3 This is a schematic diagram of the waveform of the reset pulse provided in Embodiment 1 of the present invention;

[0033] Figure 4 This is a flowchart illustrating the specific eraser operation provided in Embodiment 1 of the present invention;

[0034] Figure 5 The threshold voltage V in the initial state provided in Embodiment 1 of the present invention th With the off-state resistance value R off Relationship diagram;

[0035] Figure 6 The off-state resistance value R provided in Embodiment 1 of the present invention offn With R ini The threshold voltage V when the ratio is greater than the first preset ratio value a th With the off-state resistance value R off Relationship diagram;

[0036] Figure 7 This is a schematic diagram of the waveform of the set pulse provided in Embodiment 2 of the present invention;

[0037] Figure 8 The off-state resistance value R provided in Embodiment 2 of the present invention offn With R ini The threshold voltage V when the ratio is less than the second preset ratio b th With the off-state resistance value R off Relationship diagram;

[0038] Figure 9 The threshold voltage V during the cyclic operation provided by this invention th With the off-state resistance value R off A diagram showing the relationships between them. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0040] To achieve the above objectives, in a first aspect, the present invention provides a non-volatile storage operation method based on an Orthorough threshold switch, including an erase operation, a write operation, and a read operation.

[0041] Specifically, such as Figure 1 As shown, the Auerbach threshold switch includes a first metal electrode layer 300, a threshold switch layer 200 and a second metal electrode layer 100 distributed from top to bottom, and is used as a non-volatile memory unit.

[0042] It should be noted that, since the threshold switching layer of the Ausen threshold switch is mainly composed of amorphous chalcogenide compounds, the transition of electrons from delocalization to localization within the threshold switching layer is incomplete after the first fire. This results in a pre-conduction path during subsequent conductions, causing the off-state resistance to be around a certain value, while the threshold voltage also remains around a certain voltage. By applying multiple reset pulses similar to those in phase change materials, the threshold switching layer can be rapidly melted and solidified, increasing its amorphous disorder and reducing the proportion of electrons retained in the delocalized state. This results in a larger external excitation required for the next conduction, macroscopically manifested as a significant increase in the off-state resistance. Since the threshold voltage and off-state resistance are strongly positively correlated, the corresponding threshold voltage also increases significantly, corresponding to the high-resistivity state of the phase change memory cell. After conduction at a high threshold voltage, due to the newly generated... When a pre-conduction path is established, both the off-state resistance and threshold voltage will decrease. However, their spontaneous changes may not be sufficient to form two distinct threshold voltages. Therefore, a set pulse similar to that in phase change materials, i.e., a long pulse with low energy and slow speed, needs to be applied to reduce its amorphous disorder. Macroscopically, this manifests as a significant decrease in the off-state resistance and a corresponding significant decrease in the threshold voltage, which corresponds to the low-resistance state of the phase change memory cell. Based on this, this invention can achieve two distinct threshold states within a certain range by adjusting the off-state resistance. Compared to achieving two threshold states by using the polarity of an Orthocritea threshold switch, this method yields two threshold states with more obvious differences, a larger and more controllable threshold voltage window, and higher read accuracy.

[0043] Specifically, in some alternative implementations, the material of the threshold switching layer is selected from SiTe. x 、CTe x BTe x ,GeTe xAlTe x BiTe x AsTe x SnTe x MgTe x ,GeSe x 、SbSe x BiSe x 、AsSe x GeS x and GaS x At least one of them, or selected from doped SiTe x 、CTe x BTe x ,GeTe x AlTe x BiTe x AsTe x SnTe x MgTe x ,GeSe x 、SbSe x BiSe x 、AsSe x GeS x and GaS x At least one of the following: wherein the doping element is selected from at least one of N, Sb, In, and C.

[0044] In some optional embodiments, both the first metal electrode layer and the second metal electrode layer are inert electrode materials, and the inert electrode materials are selected from at least one of W, TiW, TiN, Pt, Ti, Au, Ru, TaN, ITO and IZO.

[0045] To further illustrate the non-volatile storage operation method provided by the present invention, the following detailed description is provided in conjunction with specific embodiments:

[0046] Example 1

[0047] A non-volatile storage operation method based on an Orthorough threshold switch, including an erase operation, such as... Figure 2 As shown, it includes the following steps:

[0048] A pulse signal is applied to the Ortho threshold switch to read its initial threshold voltage V. th0 And obtain the off-state resistance value R of the Orthorhombic threshold switch in its initial state. ini Specifically, in this embodiment, a triangular wave with a rise and fall time of 5μs and an amplitude of 2.5V is used as the pulse signal to read its initial threshold voltage V. th0 .

[0049] Repeatedly apply reset pulses to the Ortho threshold switch to increase its off-state resistance until its off-state resistance equals R. ini The ratio is greater than a first preset ratio, thereby realizing the erasure operation; wherein, the first preset ratio is greater than or equal to 2; preferably, the range of the first preset ratio is 2-100 times, and in this embodiment, it is preferably 2. It should be noted that the reset pulse is a unidirectional pulse with a small pulse width and a high amplitude, which can be a triangular wave, square wave, trapezoidal wave, etc.; preferably, the pulse width range of the reset pulse is 10-500ns, and the amplitude range is 2-10V.

[0050] Wherein, the aforementioned off-state resistance value is the resistance value of the Ortho threshold switch under a preset fixed voltage; the preset fixed voltage ranges from V. th0 The neighborhood range of / 2, i.e. (V th0 / 2-δ, V th0 / 2+δ); In this embodiment, δ is greater than 0 and less than 0.3. Specifically, in some optional implementations, the off-state resistance value R of the Orteau threshold switch is obtained by applying a DC voltage scan with a preset fixed amplitude to the Orteau threshold switch under the current threshold voltage state. ini It should be noted that, under any threshold voltage state, the off-state resistance value of the Orthorhombic threshold switch is the same as the resistance value of the Orthorhombic threshold switch under a preset fixed voltage, and the same method can be used to obtain it.

[0051] Preferably, if the Auerbach threshold switch has not undergone its first conduction before the pulse signal is applied, a DC voltage scan is applied to the Auerbach threshold switch before the pulse signal is applied to complete its first conduction (First Fire).

[0052] Specifically, in one optional implementation, the first preset ratio a is set to 2; the threshold switch layer of the Orthorhombic threshold switch is made of Ge material. x Te 1-x (where x is 0.25); the preset fixed voltage is V. th0 / 2, in this embodiment, the value is taken as 0.5V; the reset pulse is as follows: Figure 3 The diagram shows a trapezoidal wave with rise / hold / fall times of 100ns / 60ns / 100ns and an amplitude of 3V. The specific procedure for the corresponding erase operation is as follows: Figure 4 As shown.

[0053] To further demonstrate the erasure operation described in this invention, a relationship diagram of different stages is shown step by step, specifically including:

[0054] A pulse signal is applied to the Ortho threshold switch to read its initial threshold voltage V. th0 And in V th0Obtaining the resistance value R of the Oswald threshold switch under / 2 voltage ini At this point, the threshold voltage V is obtained. th With the off-state resistance value R off Relationship diagram as follows Figure 5 As shown.

[0055] To increase the off-state resistance of an Orthosen threshold switch, a reset pulse is repeatedly applied. Each reset pulse increases the resistance at V. th0 The resistance value of the Orthorhombic threshold switch is obtained under voltage / 2 (denoted as R after the nth reset pulse). offn ), until the off-state resistance value R offn With R ini The ratio is greater than the first preset ratio a, thereby realizing the erase operation; specifically, when the off-state resistance value R... offn With R ini When the ratio is greater than the first preset ratio a, the threshold voltage V is obtained. th With the off-state resistance value R off Relationship diagram as follows Figure 6 As shown.

[0056] Therefore, it can be seen that in such Figure 3 Under the operation of the reset pulse shown, the Orthorhombic threshold switch is... Figure 5 The state shown transforms into Figure 6 The state shown demonstrates the erasure process of the 0.5V threshold voltage window.

[0057] Example 2

[0058] A non-volatile memory operation method based on an Orthorough threshold switch, including a write operation, comprising:

[0059] When the off-state resistance of the Orthorhombic threshold switch is greater than R ini When multiplied by the first preset ratio, the set pulse is repeatedly applied to the Ortho threshold switch to reduce its off-state resistance value until its off-state resistance value is equal to R. ini The ratio is less than the second preset ratio, thus enabling the write operation;

[0060] Among them, the pulse width of the set pulse is greater than the pulse width of the reset pulse; the amplitude of the set pulse is less than the amplitude of the reset pulse.

[0061] It should be noted that the set pulse and reset pulse can be in the same direction or in opposite directions; preferably, the set pulse and reset pulse are in the same direction to reduce the cost of external circuitry.

[0062] Further, the second preset ratio is less than or equal to 0.5; preferably, the range of the second preset ratio is 0.01-0.5 times, and in this embodiment, it is preferably 0.5. It should be noted that the set pulse is a unidirectional pulse with a small pulse width and amplitude, which can be a triangular wave, square wave, trapezoidal wave, etc.; preferably, the pulse width range of the set pulse is 1-50μs, and the amplitude range is 1-4V.

[0063] Similar to Example 1, the above-mentioned off-state resistance value is the resistance value of the Ortho threshold switch under a preset fixed voltage; the preset fixed voltage ranges from V. th0 The neighborhood range is 2.

[0064] Specifically, in one optional implementation, the second preset ratio b is set to 1; the threshold switch layer of the Ortho threshold switch is made of Ge material. x Te 1-x (where x is 0.25); the preset fixed voltage is V. th0 / 2, in this implementation, the value is taken as 0.5V; the set pulse is as follows: Figure 7 The diagram shows a trapezoidal wave with a rise time / hold time / fall time of 100ns / 10μs / 10μs and an amplitude of 1.5V. The specific procedure for the corresponding erase operation is as follows: Figure 7 As shown.

[0065] Specifically, reading in V th0 The resistance value of the Ortho threshold switch is obtained under voltage / 2. If its value is greater than a×R ini Then, repeatedly apply the set pulse to the Ortho threshold switch to reduce its off-state resistance value. Each time the set pulse is applied, the resistance value of the switch is reduced by V. th0 The resistance value of the Orthorhombic threshold switch is obtained under voltage / 2 (denoted as R after the nth application of the set pulse). offn ), until the off-state resistance value R offn With R ini The ratio is less than the second preset ratio b, thus enabling the write operation; specifically, when the off-state resistance value R... offn With R ini When the ratio is less than the second preset ratio b, the threshold voltage V is obtained. th With the off-state resistance value R off Relationship diagram as follows Figure 8 As shown.

[0066] Therefore, it can be seen that in such Figure 7 Under the operation of the set pulse shown, the Orthorhombic threshold switch is... Figure 6 The state shown transforms into Figure 8 The state shown demonstrates the writing process for a threshold voltage window of 0.5V.

[0067] The relevant technical solutions are the same as in Embodiment 1, and will not be repeated here.

[0068] Example 3

[0069] A non-volatile storage operation method based on an Orteau threshold switch includes a read operation, specifically including: applying a preset voltage to the Orteau threshold switch to realize the read operation;

[0070] Among them, the preset voltage is greater than the voltage V. low And less than voltage V high Voltage V low The off-state resistance value of the Ortho threshold switch is greater than R. ini The threshold voltage when multiplied by the second preset ratio; voltage V high The off-state resistance value of the Ortho threshold switch is less than R. ini The threshold voltage when multiplied by the first preset ratio.

[0071] It should be noted that by performing unidirectional repetitive pulse operations on the Orthorhombic threshold switch during the erase and write processes respectively, the difference in the off-state resistance between the two processes is adjusted, thus achieving two distinct threshold states. This ensures that the Orthorhombic threshold switch has sufficiently distinct threshold states, i.e., V. high With V low The difference is relatively large. Compared with the method of using the polarity of the Auerbach threshold switch to achieve two threshold states, the difference between the two threshold states obtained by this method is more obvious, the threshold voltage window is larger and more controllable, and the reading accuracy is also higher.

[0072] To prevent erroneous readings during read operations, such as... Figure 6 and Figure 8 In the results shown, the read voltage should be greater than 1.6V and less than 2.1V, preferably between 1.8V and 1.9V. When the non-volatile memory cell is in the "1" state, the read pulse will turn on the Ortho threshold switch and output a large current; when the non-volatile memory cell is in the "0" state, the read pulse will turn off the Ortho threshold switch and output a small current. The state of the non-volatile memory cell can be read by sampling the current.

[0073] The relevant technical solutions are the same as those in Embodiments 1 and 2, and will not be repeated here.

[0074] Furthermore, to verify the feasibility of the non-volatile storage operation method based on an Orteau threshold switch provided by this invention, multiple 100ns / 60ns / 100ns reset pulses were applied to the Orteau threshold switch to operate its off-state resistance to above 500MΩ, and its threshold voltage value was read. Then, for each set pulse applied, the off-state resistance value and threshold voltage value were read, and this process was repeated 20 times to obtain the following result: Figure 9The threshold voltage V during the cyclic operation shown th With the off-state resistance value R off The relationship diagram shows the relationship between the left axis and the solid dots, where the left axis represents the off-state resistance value R. off The right axis and the hollow point represent the threshold voltage V. th As can be seen from the figure, the threshold voltage value V during the entire cycle is... th With the off-state resistance value R off They exhibit a strong positive correlation. Therefore, by increasing the off-state resistance of the Ortholm threshold switch through unidirectional pulse operation, the threshold voltage of the Ortholm threshold switch is increased, enabling the Ortholm threshold switch to have sufficiently distinguishable threshold states. This allows it to switch between two significantly different threshold states, greatly improving the threshold voltage window and the accuracy of read operations, thus enabling more accurate non-volatile information storage. Simultaneously, the use of unidirectional pulse operation reduces the demand for external circuitry. The Ortholm threshold switch, with its nanosecond-level switching speed, good scalability, and ease of three-dimensional stacking, holds promise for use in DRAM applications at technology nodes smaller than 20nm, significantly increasing storage density while matching DRAM access speeds.

[0075] In a second aspect, the present invention provides a non-volatile memory operating system based on an Ortho threshold switch, comprising: an Ortho threshold switch and a controller;

[0076] The controller is used to execute the non-volatile memory operation method provided in the first aspect of this invention. Related technical solutions are the same as the non-volatile memory operation method provided in the first aspect of this invention, and will not be described in detail here.

[0077] Thirdly, the present invention also provides a computer-readable storage medium comprising a stored computer program, wherein the computer program, when executed by a processor, controls the device containing the storage medium to perform the non-volatile storage operation method provided in the first aspect of the present invention.

[0078] The related technical solutions are the same as the non-volatile storage operation method provided in the first aspect of this invention, and will not be described in detail here.

[0079] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A non-volatile storage operation method based on an Orthocriterion threshold switch, characterized in that, The erasure operation includes the following steps: S1. Apply a pulse signal to the Ortho threshold switch to read its initial threshold voltage V. th0 And obtain the off-state resistance value R of the Orthorhombic threshold switch in its initial state. ini ; S2. Repeatedly apply reset pulses to the Audemars Piezoresistive threshold switch to increase its off-state resistance value until its off-state resistance value is equal to R. ini The ratio is greater than the first preset ratio, thereby realizing the erasure operation; Wherein, the off-state resistance value is the resistance value of the Ortho threshold switch under a preset fixed voltage; the preset fixed voltage ranges from V. th0 The neighborhood range of / 2; the reset pulse is a unidirectional pulse; The Auschwitz threshold switch includes a first metal electrode layer, a threshold switch layer, and a second metal electrode layer distributed from top to bottom.

2. The non-volatile storage operation method according to claim 1, characterized in that, If the Auerbach threshold switch has not been turned on for the first time before step S1, then a DC voltage scan is applied to the Auerbach threshold switch before step S1 to make it turn on for the first time.

3. The non-volatile storage operation method according to claim 1, characterized in that, The reset pulse has a pulse width range of 10-500ns and an amplitude range of 2-10V.

4. The non-volatile storage operation method according to any one of claims 1-3, characterized in that, It also includes write operations, specifically: When the off-state resistance value of the Aude threshold switch is greater than R ini When multiplied by a first preset ratio, a set pulse is repeatedly applied to the Auerbach threshold switch to reduce its off-state resistance value until its off-state resistance value is equal to R. ini The ratio is less than the second preset ratio, thus enabling the write operation; The set pulse is a unidirectional pulse, with a pulse width greater than that of the reset pulse and an amplitude less than that of the reset pulse.

5. The non-volatile storage operation method according to claim 4, characterized in that, The pulse width of the set pulse ranges from 1 to 50 μs, and the amplitude ranges from 1 to 4 V.

6. The non-volatile storage operation method according to claim 4, characterized in that, It also includes a read operation, specifically including: applying a preset voltage to the Ortho threshold switch to realize the read operation; Wherein, the preset voltage is greater than voltage V low And less than voltage V high ; The voltage V low The value of the off-state resistance of the Ortho threshold switch is greater than R. ini The threshold voltage when the product of the product with the second preset ratio is reached; The voltage V high The resistance value of the off-state of the Ortho threshold switch is less than R. ini The threshold voltage when multiplied by the first preset ratio.

7. The non-volatile storage operation method according to claim 1, characterized in that, The material of the threshold switching layer is selected from SiTe. x 、CTe x BTe x ,GeTe x AlTe x BiTe x AsTe x SnTe x MgTe x ,GeSe x 、SbSe x BiSe x 、AsSe x GeS x and GaS x At least one of them; Alternatively, the material of the threshold switching layer is selected from doped SiTe. x 、CTe x BTe x ,GeTe x AlTe x BiTe x AsTe x SnTe x MgTe x ,GeSe x 、SbSe x BiSe x 、AsSe x GeS x and GaS x At least one of the following: wherein the doping element is selected from at least one of N, Sb, In, and C.

8. The non-volatile storage operation method according to claim 1, characterized in that, Both the first metal electrode layer and the second metal electrode layer are inert electrode materials, and the inert electrode materials are selected from at least one of W, TiW, TiN, Pt, Ti, Au, Ru, TaN, ITO and IZO.

9. A non-volatile memory operating system based on an Ortho threshold switch, comprising: Auerbach threshold switches and controllers; The Auerbach threshold switch includes a first metal electrode layer, a threshold switch layer, and a second metal electrode layer distributed from top to bottom. The controller is used to execute the non-volatile memory operation method according to any one of claims 1-8.

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