A dual boost cascade power factor correction circuit and control method

Abstract

The present invention discloses a dual boost type cascade power factor correction circuit, which specifically includes two cascaded power frequency bridge arms, four cascaded BOOST bridge arms, one coupled inductor and two output filter capacitors, wherein the power frequency bridge arm is connected to both ends of an AC power supply, and the BOOST bridge arm is bridged by a boost coupled inductor. A control strategy proposed based on this device includes output voltage control, inductor current control and carrier phase shift PWM modulation strategy. The proposed device and its control strategy are helpful to reduce the inductor volt-second product, suppress common mode noise, and prevent the bridge arm from being directly connected, thereby improving the efficiency and reliability of the device.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, relates to a cascade-type multi-level switch conversion technology, and specifically relates to a double-boost cascade power factor correction circuit and a control method. Background Art

[0002] The traditional two-level power factor correction circuit has large switching device voltage stress and large inductance volt-second, which limits the power density and efficiency. In order to further improve the power density and efficiency of the power factor correction circuit, multi-level technology can be used to reduce the voltage stress of the device and reduce the inductance volt-second product.

[0003] Through multi-level technology, not only can the voltage amplitude at both ends of the inductor be effectively reduced, but also the switching frequency can be doubled, thereby greatly reducing the volt-second product of the inductor. At present, the bridgeless power factor correction circuit based on cascade multi-level and flying capacitor multi-level technology can achieve a peak efficiency greater than 99%. Despite this, the above method still has problems such as serious common-mode interference. These problems will interfere with the normal operation of other electrical equipment and damage the stability of its own circuit system. At the same time, the converter composed of voltage-type bridge arms still has the risk of direct-through, and the occurrence of direct-through must be prevented by adding dead zones, but this also reduces the waveform quality of the input current. Therefore, on the basis of solving the multi-level common-mode problem, it is of great practical significance to propose a power factor correction device that can prevent the bridge arm from direct-through to improve its reliability. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention proposes a dual-boost cascade power factor correction circuit and a control method, which solves the common-mode problem of a three-level cascade bridgeless power factor correction and adopts a dual Boost bridge arm to prevent direct-through and increase system reliability.

[0005] A double-boost cascade power factor correction circuit comprises six bridge arms forming two branches, a coupling inductor connected in parallel between the two branches, two filter capacitors and two load resistors.

[0006] Each industrial frequency bridge arm has two switching tubes, and each Boost bridge arm contains a switching tube and a diode. The Boost bridge arm is composed of the source of the upper switching tube connected to the cathode of the lower diode or the anode of the upper diode connected to the drain of the lower switching tube.

[0007] The positive and negative polarity ends of the AC power supply are connected to the source electrodes of the upper switch tubes of the first power frequency bridge arm and the second power frequency bridge arm respectively. The left end of the coupling inductor is connected in parallel between the source electrode of the upper switch tube of the first Boost bridge arm and the anode electrode of the diode of the second Boost bridge arm. The right end of the coupling inductor is between the anode electrode of the diode of the third Boost bridge arm and the source electrode of the switch tube of the fourth Boost bridge arm.

[0008] The two ends of the filter capacitor 1 are respectively connected to the cathode of the diode on the Boost bridge arm 3 in the upper branch and the source of the lower switch tube, and the two ends of the filter capacitor 2 are respectively connected to the drain of the switch tube on the Boost bridge arm 4 in the lower branch and the anode of the lower diode. Two load resistors are respectively connected in parallel at both ends of the filter capacitors 1 and 2.

[0009] It should be noted that the upper switch tube, upper diode, lower switch tube and lower diode described in the present invention are located up and down as shown in the figure, which is convenient for distinguishing the connection relationship between different switch tubes and diodes.

[0010] Among them, the switching tube of the industrial frequency bridge arm can be Si MOSFET tube, the switching tube of the Boost bridge arm can be SiCMOSFET tube or GaN tube, and the diode can be SiC diode.

[0011] The present invention also provides a control method for a dual-boost cascade power factor correction circuit, which specifically includes the following steps:

[0012] Step 1: In the cascaded bridgeless dual-Boost power factor correction device, current IL1 and current IL2 flowing through the coupled inductor, voltage values ​​VC1 and VC2 across two filter capacitors, and instantaneous voltage value Vac of the AC power supply are collected.

[0013] Step 2: Compare the instantaneous voltage value Vac of the AC power supply with the zero value to generate the switch control signal V of the first and second power frequency bridge arms. control :

[0014]

[0015] Step 3: After adding the voltage values ​​VC1 and VC2, subtract the voltage from the first reference voltage V0, and then pass the calculation result through the PI regulator and multiply it by the instantaneous phase PH of the AC power supply to obtain the inductor current reference signal.

[0016] Step 4: Subtract the reference inductor current signal obtained in step 3 from the current IL1 after positive amplitude limiting, and then pass the calculation result through the PI regulator and compare it with the first carrier and the second carrier respectively to obtain the switch tube control signals of the first Boost bridge arm and the second Boost bridge arm.

[0017] Step 5: Subtract the reference inductor current signal obtained in step 3 from the current IL2 after negative amplitude limiting, and then pass the calculation result through the PI regulator and compare it with the third carrier and the fourth carrier respectively to obtain the switch tube control signals of the third Boost bridge arm and the fourth Boost bridge arm.

[0018] The first to fourth carriers are triangular waves or sawtooth waves with equal peak values, the first carrier and the third carrier are in phase, the second carrier and the fourth carrier are in phase, and the first and third carriers are 180° out of phase with the second and fourth carriers.

[0019] The present invention has the following beneficial effects:

[0020] 1. The two ends of the AC power supply are connected to the midpoints of the two power frequency bridge arms respectively. This structure eliminates the common mode noise of the cascaded bridgeless power factor correction circuit and helps to reduce the volume of the common mode filter.

[0021] 2. The cascaded Boost bridge arm adopts a carrier phase shift control method, which can reduce the volt-second product of the inductor, reduce the inductor current ripple, reduce the THD of the input current and improve the PF value of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 The present invention is a schematic diagram of a dual-boost cascade power factor correction circuit and a control method.

[0023] Figure 2 It is the waveform of inductor current IL1 under carrier phase shift control.

[0024] Figure 3 It is the waveform of inductor current IL2 under carrier phase shift control.

[0025] Figure 4 It is the waveform of output capacitor voltage VC1.

[0026] Figure 5 It is the waveform of output capacitor voltage VC2. DETAILED DESCRIPTION

[0027] The present invention will be further explained below with reference to the accompanying drawings;

[0028] The present invention provides a dual boost type cascade power factor correction circuit, such as Figure 1 As shown, it includes 6 bridge arms forming two branches, a coupled inductor, 2 filter capacitors and 2 load resistors.

[0029] Among them, the first power frequency bridge arm includes switch tubes S1 and S2, the first boost bridge arm includes switch tube S3 and diode D1, the third boost bridge arm includes switch tube S4 and diode D2, the second power frequency bridge arm includes switch tubes S5 and S6, the second boost bridge arm includes switch tube S7 and diode D3, and the fourth boost bridge arm includes switch tube S8 and diode D4. The drains of switch tubes S1 and S3 are connected to the cathode of diode D2, the sources of switch tubes S1 and S3 are respectively connected to the drain of switch tube S2 and the cathode of diode D1, and the anode of diode D2 is connected to the drain of S4; the sources of switch tubes S2 and S4 are connected to the anode of diode D1. The drains of switch tubes S5 and S8 are connected to the cathode of diode D3, the sources of switch tubes S5 and S8 are respectively connected to the drain of switch tube S6 and the cathode of diode D4, and the anode of diode D3 is connected to the drain of S7; the sources of switch tubes S6 and S7 are connected to the anode of diode D4.

[0030] The sources of the switch tubes S1 and S5 are connected to the positive and negative polarity ends of the AC power supply respectively. The source of the switch tube S3 and the anode of the diode D3 are connected to the left ends of the coupled inductor respectively. The source of the switch tube S8 and the anode of the diode D2 are connected to the right ends of the coupled inductor respectively.

[0031] One end of the first filter capacitor C1 and the first resistor R1 is connected to the drain of the switch tubes S1 and S3 and the cathode of the diode D2, and the other end is connected to the source of the switch tubes S2 and S4 and the cathode of the diode D1. One end of the second filter capacitor C2 and the second resistor R2 is connected to the drain of the switch tubes S5 and S8 and the cathode of the diode D3, and the other end is connected to the source of the switch tubes S6 and S7 and the anode of the diode D4.

[0032] The present invention also provides a control method for a dual-boost cascade power factor correction circuit, which specifically includes the following steps:

[0033] Step 1: Collect the currents IL1 and IL2 flowing through the coupled inductor, the voltage values ​​VC1 and VC2 across the two filter capacitors, and the instantaneous voltage value Vac of the AC power supply.

[0034] Step 2: Compare the instantaneous voltage value Vac of the AC power supply with the zero value to generate the switch control signal V of the first and second power frequency bridge arms. control :

[0035]

[0036] Step 3: After adding the voltage values ​​VC1 and VC2, subtract the voltage from the first reference voltage V0, and then pass the calculation result through the PI regulator and multiply it by the instantaneous phase PH of the AC power supply to obtain the inductor current reference signal.

[0037] Step 4: Subtract the inductor current reference signal obtained in step 3 from the current IL1 after positive amplitude limiting, and then pass the calculation result through the PI regulator and compare it with the first carrier and the second carrier respectively to obtain the switch tube control signals of the first Boost bridge arm and the second Boost bridge arm.

[0038] Step 5: Subtract the reference inductor current signal obtained in step 3 from the current IL2 after negative amplitude limiting, and then pass the calculation result through the PI regulator and compare it with the third carrier and the fourth carrier respectively to obtain the switch tube control signals of the third Boost bridge arm and the fourth Boost bridge arm.

[0039] Example 1

[0040] In combination with the above technical solution, this embodiment provides the following specific cases.

[0041] In this embodiment, carrier phase shift control is adopted, and the first carrier to the fourth carrier are all triangular waves with an amplitude of 1, that is, the phases of the first carrier, the second carrier, the third carrier, and the fourth carrier are 0°, 180°, 0°, and 180°, respectively.

[0042] In the positive half cycle of the AC power supply, the switch tube S1 and the switch tube S6 are always turned on, and the switch tube S2 and the switch tube S5 are always turned off. The Boost bridge arm 1 and the Boost bridge arm 2 work to generate the current IL1 when the AC power supply is in the positive half cycle, while the Boost bridge arm 3 and the Boost bridge arm 4 do not work, the current does not flow through the right side of the coupled inductor, and the current IL2 is not generated.

[0043] When the switch tubes S3 and S7 are both disconnected, the AC power forms a loop through the diodes D1, D3, the filter capacitors C1, C2, and the load resistors R1, R2, and discharges the right side of the coupled inductor. The current IL1 flowing through the left side of the coupled inductor decreases at a certain slope to charge the filter capacitors C1 and C2.

[0044] When the switch tube S3 is turned on and the switch tube S7 is turned off, the current on the left side of the coupled inductor flows through the loop formed by the diode D3, the second filter capacitor C2, the load resistor R2 and the AC power supply to discharge, and the current IL1 flowing through the left side of the coupled inductor decreases at a certain slope, and the load R1 is powered by the filter capacitor C1.

[0045] When the switch tube S7 is turned on and the switch tube S3 is turned off, the current on the left side of the coupled inductor flows through the loop formed by the diode D1, the first filter capacitor C1, the load resistor R1 and the AC power supply to charge, and the current IL1 flowing through the left side of the coupled inductor rises at a certain slope, and the load R2 is powered by the filter capacitor C2.

[0046] When the switches S3 and S7 are both turned on, the left side of the coupled inductor forms a loop with the AC power supply to charge the inductor. The current IL1 flowing through the left side of the coupled inductor rises at a certain slope. The load R1 is powered by the filter capacitor C1, and the load R2 is powered by the filter capacitor C2.

[0047] Similarly, in the negative half cycle of the AC power supply, the switch tube S2 and the switch tube S5 are always turned on, the switch tube S1 and the switch tube S6 are always turned off, the Boost bridge arm 3 and the Boost bridge arm 4 work to generate the current IL2 when the AC power supply is in the negative half cycle, while the Boost bridge arm 1 and the Boost bridge arm 2 do not work, the current does not flow through the left side of the coupled inductor, and the current IL1 is not generated.

Claims

1. A dual boost cascade power factor correction circuit, characterized in that: It includes an AC power supply, a first power frequency bridge arm, a second power frequency bridge arm, a first Boost bridge arm, a second Boost bridge arm, a third Boost bridge arm, a fourth Boost bridge arm, an inductor L1, an inductor L2, a capacitor C1, a capacitor C2, a load resistor R1 and a load resistor R2, The first and second power frequency bridge arms each contain two switch tubes, and the first, second, third and fourth Boost bridge arms contain a switch tube and a diode. The first and fourth Boost bridge arms are formed in such a way that the source of the switch tube is connected to the cathode of the diode, and the second and third Boost bridge arms are formed in such a way that the anode of the diode is connected to the drain of the switch tube; The positive and negative polarity ends of the AC power supply are respectively connected to the source of one of the switch tubes in the first power frequency bridge arm and the second power frequency bridge arm, and the source of one of the switch tubes in the first power frequency bridge arm and the second power frequency bridge arm is connected to the drain of the other switch tube; The inductor L1 is connected in parallel between the source of the switch tube in the first Boost bridge arm and the anode of the diode in the second Boost bridge arm, and the inductor L2 is connected in parallel between the anode of the diode in the third Boost bridge arm and the source of the switch tube in the fourth Boost bridge arm; The two ends of the capacitor C1 are respectively connected to the cathode of the diode and the source of the switch tube in the third Boost bridge arm, and the two ends of the capacitor C2 are respectively connected to the drain of the switch tube and the anode of the diode in the fourth Boost bridge arm. The two load resistors R1 and the load resistor R2 are respectively connected in parallel to the two ends of the capacitor C1 and the capacitor C2.

2. A dual boost cascade power factor correction circuit as claimed in claim 1, characterized in that: The first power frequency bridge arm, the first Boost bridge arm, and the third Boost bridge arm are connected to form an upper branch circuit; the second power frequency bridge arm, the second Boost bridge arm, and the fourth Boost bridge arm are connected to form a lower branch circuit.

3. A dual boost cascade power factor correction circuit as claimed in claim 1, characterized in that: The inductor L1 and the inductor L2 are coupled inductors.

4. A dual boost cascade power factor correction circuit as claimed in claim 1, characterized in that: The capacitor C1 and the capacitor C2 are both filter capacitors.

5. A dual boost cascade power factor correction circuit as claimed in claim 1, characterized in that: The switch tubes in the first power frequency bridge arm and the second power frequency bridge arm are SiMOSFEET tubes.

6. A dual boost cascade power factor correction circuit device as claimed in claim 1, characterized in that: The switch tubes in the first, second, third and fourth Boost bridge arms are SiC MOSFET tubes or GaN tubes, and the diodes are SiC diodes.

7. A method for controlling the dual boost cascade power factor correction circuit according to any one of claims 1 to 6, characterized in that: The specific steps include: Step 1, collecting currents IL1 and IL2 flowing through inductors L1 and L2, collecting voltage values ​​VC1 and VC2 across capacitors C1 and C2, and an instantaneous voltage value Vac of an AC power supply; Step 2: Compare the instantaneous voltage value Vac of the AC power supply with the zero value to generate the switch control signal V of the first and second power frequency bridge arms. control : Step 3, after adding the voltage values ​​VC1 and VC2, subtract the voltage from the first reference voltage V0, and then pass the calculation result through the PI regulator and multiply it by the instantaneous phase PH of the AC power supply to obtain the inductor current reference signal; Step 4: Subtract the inductor current reference signal obtained in step 3 from the current IL1 after positive amplitude limiting, and then pass the calculation result through the PI regulator, and then compare it with the first carrier and the second carrier respectively to obtain the switch tube control signals of the first Boost bridge arm and the second Boost bridge arm; Step 5: Subtract the inductor current reference signal obtained in step 3 from the current IL2 after negative amplitude limiting, and then pass the calculation result through the PI regulator and compare it with the third carrier and the fourth carrier respectively to obtain the switch tube control signals of the third Boost bridge arm and the fourth Boost bridge arm.

8. The control method of the dual boost cascade power factor correction circuit according to claim 7, characterized in that: The peak values ​​of the first, second, third and fourth carriers are equal, the phases of the first carrier and the second carrier differ by 180°, the phases of the third carrier and the fourth carrier differ by 180°, the phases of the first and third carriers are the same, and the phases of the second and fourth carriers are the same.

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