Resource management method, electronic device, and computer-readable storage medium

Abstract

The present invention provides a resource management method, an electronic device, and a computer-readable storage medium, relating to the field of gaming. In an electronic device running a game engine using Direct3D 12, a GPU maintains a command queue for storing command lists, where one command list corresponds to one frame of a game screen; and a CPU maintains a circular delayed release queue including the storage addresses of the resources to be released corresponding to each command list in the command queue. The GPU renders a target game screen based on a target command list read from the command queue, and sends a rendering end instruction to the CPU when the rendering of the target game screen is completed. The CPU then responds to the rendering end instruction, reads the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue, and releases the target resource to be released based on the target storage address. In this way, the CPU releases the resources only when the rendering end instruction is received, thereby ensuring the validity of the resources required to render the target game screen.

Description

Technical Field

[0001] The present invention relates to the field of games, and in particular to a resource management method, an electronic device, and a computer-readable storage medium. Background Art

[0002] Microsoft DirectX is a graphics API (Application Programming Interface) used to create games and high-performance graphics applications. DirectX supports both 2D and 3D graphics. Direct3D is the 3D graphics API within DirectX. In previous versions, including Direct3D 11, the underlying graphics driver system relied heavily on this API to manage resources behind the scenes.

[0003] However, in the current Direct3D 12 version, resource management is no longer handled by the API's underlying graphics driver system, but rather by users designing their own resource management solutions. Therefore, when using Direct3D 12, ensuring resource availability during rendering becomes a critical consideration. Summary of the Invention

[0004] The object of the present invention is to provide a resource management method, an electronic device and a computer-readable storage medium to improve the problems existing in the prior art.

[0005] The embodiments of the present invention can be implemented as follows:

[0006] In a first aspect, the present invention provides a resource management method, which is applied to an electronic device running a game engine using Direct3D 12, wherein the electronic device includes a central processing unit (CPU) and a graphics processing unit (GPU) that are communicatively connected;

[0007] The GPU maintains a command queue, the command queue is used to store command lists, and one command list corresponds to one frame of game screen; the CPU maintains a circular delayed release queue, the circular delayed release queue includes the storage address of the to-be-released resource corresponding to each command list in the command queue; the method includes:

[0008] The GPU reads a target command list from the command queue; the target command list corresponds to a target game screen;

[0009] The GPU renders the target game screen according to the target command list, and sends a rendering end instruction to the CPU when the rendering of the target game screen is completed;

[0010] The CPU responds to the rendering end instruction and reads the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue;

[0011] The CPU releases the target resource to be released based on the target storage address.

[0012] In an optional embodiment, the electronic device further includes a memory space corresponding to the CPU and a resource buffer maintained by the Direct3D 12;

[0013] Before the step of the GPU reading the target command list from the command queue, the method further includes:

[0014] The CPU loads the rendering resources of the target game screen from the memory space to the resource buffer;

[0015] The CPU obtains the target command list corresponding to the target game screen, and stores the target command list in the command queue.

[0016] In an optional embodiment, the electronic device further includes a video memory space corresponding to the GPU and a resource buffer created and maintained by Direct3D 12, wherein the resource buffer includes rendering resources for the target game screen; the target command list includes a first state transition instruction, a resource copy instruction, a second state transition instruction, a resource binding instruction, and a rendering instruction;

[0017] The step of, said GPU rendering said target game screen according to said target command list, comprising:

[0018] In response to the first state conversion instruction, marking the resource state of the rendering resource of the target game screen in the resource buffer as a copy target state;

[0019] In response to the resource copy instruction, read the rendering resource from the resource buffer to the video memory space;

[0020] In response to the second state transition instruction, switching the resource state of the rendering resource in the video memory space from the copy target state to a default resource state;

[0021] In response to the resource binding instruction, performing resource binding on the rendering resource;

[0022] In response to the rendering instruction, the target game screen is rendered based on the rendering resources.

[0023] In an optional embodiment, the target game screen includes at least one object to be rendered;

[0024] The step of performing resource binding on the rendering resource in response to the resource binding instruction includes:

[0025] Creating a descriptor for each object to be rendered, wherein the descriptor points to rendering resources required for rendering the object to be rendered;

[0026] Each of the descriptors is bound to a pre-created graphics pipeline.

[0027] In an optional embodiment, the ring delayed release queue includes a resource list array corresponding to each command list in the command queue, and the resources to be released include buffer resources to be released, texture resources to be released, graphics pipeline status to be released, root signature to be released and descriptor stack to be released, and the resource list array includes the storage addresses of the released buffer resources, the texture resources to be released, the graphics pipeline status to be released, the root signature to be released and the descriptor stack to be released.

[0028] In a second aspect, the present invention provides an electronic device running a game engine using Direct3D 12, the electronic device comprising a CPU and a GPU in communication connection;

[0029] The GPU maintains a command queue, which is used to store command lists, and one command list corresponds to one frame of game screen; the CPU maintains a circular delayed release queue, which includes the storage address of the to-be-released resource corresponding to each command list in the command queue;

[0030] The GPU is used to read a target command list from the command queue; the target command list corresponds to a target game screen;

[0031] The GPU is used to render the target game screen according to the target command list, and send a rendering end instruction to the CPU when the rendering of the target game screen is completed;

[0032] The CPU is configured to respond to the rendering end instruction and read the target storage address of the target resource to be released corresponding to the target command list from the annular delayed release queue;

[0033] The CPU is configured to release the target resource to be released based on the target storage address.

[0034] In an optional embodiment, the method further includes a memory space corresponding to the CPU and a resource buffer maintained by the Direct3D 12;

[0035] Before reading the target command list from the command queue, the GPU is further configured to:

[0036] Loading the rendering resources of the target game screen from the memory space into the resource buffer;

[0037] Obtain the target command list corresponding to the target game screen, and store the target command list in the command queue.

[0038] In an optional embodiment, the system further includes a video memory space corresponding to the GPU and a resource buffer created and maintained by Direct3D 12, wherein the resource buffer includes rendering resources for the target game screen; the target command list includes a first state transition instruction, a resource copy instruction, a second state transition instruction, a resource binding instruction, and a rendering instruction;

[0039] When the GPU is used to render the target game screen according to the target command list, it is specifically used to:

[0040] In response to the first state conversion instruction, marking the resource state of the rendering resource of the target game screen in the resource buffer as a copy target state;

[0041] In response to the resource copy instruction, read the rendering resource from the resource buffer to the video memory space;

[0042] In response to the second state transition instruction, switching the resource state of the rendering resource in the video memory space from the copy target state to a default resource state;

[0043] In response to the resource binding instruction, performing resource binding on the rendering resource;

[0044] In response to the rendering instruction, the target game screen is rendered based on the rendering resources.

[0045] In an optional embodiment, the ring delayed release queue includes a resource list array corresponding to each command list in the command queue, and the resources to be released include buffer resources to be released, texture resources to be released, graphics pipeline states to be released, root signatures to be released, and descriptor heaps to be released;

[0046] The resource list array includes storage addresses of the released buffer resources, the texture resources to be released, the graphics pipeline state to be released, the root tag to be released, and the descriptor heap to be released.

[0047] In a third aspect, the present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the resource management method described in any one of the aforementioned embodiments.

[0048] Compared to the prior art, embodiments of the present invention provide a resource management method, an electronic device, and a computer-readable storage medium. In an electronic device running a game engine using Direct3D 12, the GPU maintains a command queue for storing command lists, where one command list corresponds to one frame of game screen; and the CPU maintains a circular delayed release queue that includes the storage addresses of the resources to be released corresponding to each command list in the command queue. The GPU renders the target game screen based on the target command list read from the command queue and sends a rendering end instruction to the CPU when the rendering of the target game screen is complete. The CPU then responds to the rendering end instruction by reading the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue and releasing the target resource to be released based on the target storage address. In this way, the CPU releases resources only when it receives the rendering end instruction, ensuring the validity of the resources required to render the target game screen. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0050] Figure 1 A schematic structural diagram of an electronic device provided by an embodiment of the present invention.

[0051] Figure 2 This is one of the flow charts of a resource management method provided by an embodiment of the present invention.

[0052] Figure 3 A schematic diagram of signaling interaction between the CPU and GPU provided in an embodiment of the present invention.

[0053] Figure 4 A schematic diagram of loading rendering resources provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0054] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0055] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0056] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0057] In addition, the terms "first", "second", etc., if used, are merely used to distinguish and describe, and should not be understood as indicating or implying relative importance.

[0058] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0059] The keywords or key terms involved in the present invention are as follows:

[0060] 1. Microsoft Direct3D 12: A new generation of graphics programming interface launched by Microsoft in the Windows operating system, hereinafter referred to as Direct3D 12;

[0061] 2. CPU (Control Process Unit): The central processing unit (CPU) in a computer that serves as the computing and control core.

[0062] 3. GPU (Graphics Process Unit): The graphics processor in the computer that is responsible for graphics processing;

[0063] 4. API (Application Programming Interface): Application Programming Interface;

[0064] 5. Descriptor: The main binding unit for a single resource in Direct3D 12. It is divided into the following types: CBV (Constant Buffer View) | SRV (Shader Resource Views) | UAV (Unordered Resource Views), Sampler (Sampler Descriptor), DSV (Depth Stencil View), RTV (Render Target View); a descriptor is a relatively small block of data whose size and format are determined by the graphics driver and are opaque;

[0065] 6. Descriptor table: Logically, a descriptor table can be viewed as an array of descriptors. Each descriptor table can store one or more types of descriptors. A descriptor table is not a memory allocation; it is simply an offset and length in the descriptor heap.

[0066] 7. Descriptor heap: a set of descriptors distributed continuously in memory;

[0067] 8. Graphics pipeline: The abstract state set required by the GPU to complete drawing commands;

[0068] 9. Root signature: used to define the resource type bound to the graphics pipeline

[0069] Here, we first introduce the electronic device 1000. Figure 1 , Figure 1 This is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. The electronic device 1000 may include a CPU 100 and a GPU 200 communicating via a bus 700, and a game engine using Direct3D 12 is installed on the electronic device 1000.

[0070] The storage space of the electronic device 1000 includes a system storage space 300 , a memory space 400 , a video memory space 500 , and a resource buffer 600 maintained by Direct3D 12.

[0071] The CPU 100 can access the system storage space 300, the memory space 400, and the resource buffer 600 via the bus 700. The GPU 200 can access the video memory space 500 and the resource buffer 600 via the bus 700. The memory space 400 can only be accessed by the CPU 100, and the video memory space 500 can only be accessed by the GPU 200.

[0072] The electronic device 1000 may be, but is not limited to, a personal notebook, a desktop computer, a server, etc.

[0073] The system storage space 300 stores resource files required for rendering. When the game engine starts running and needs to perform game rendering, the CPU 100 loads the resource files from the system storage space 300 to the memory space 400 .

[0074] During the rendering process, the rendering resources in the resource file in the memory space 400 will gradually go through the process from the memory space 400 to the resource buffer 600 and then to the video memory space 500 and finally be released after the rendering is completed. In this whole process, the management of resources is the focus of this solution.

[0075] It should be noted that Figure 1The structure shown is only for illustration, and the electronic device may also include Figure 1 More or fewer components than shown, or with Figure 1 Different configurations shown. Figure 1 Each component shown in the figure can be implemented by hardware, software or a combination thereof.

[0076] Please refer to Figure 2 , Figure 2 A flowchart of a resource management method provided in an embodiment of the present invention is provided. The execution subject of the method is the above-mentioned electronic device, which runs a game engine using Direct3D12. The electronic device includes a CPU and a GPU that are communicatively connected.

[0077] The GPU maintains a command queue, which is used to store command lists. Each command list corresponds to a frame of game screen to be rendered. The CPU maintains a circular delayed release queue, which includes the storage address of the resources to be released corresponding to each command list in the command queue. The resource management method includes the following steps:

[0078] S210 : The GPU reads a target command list from the command queue.

[0079] In this embodiment, the command queue may include at most three command lists. Based on the first-in-first-out principle of the queue, the target command list is the command list at the head of the three command lists, and the target command list corresponds to the target game screen.

[0080] It can be understood that the command list includes a set of instructions collected by the rendering thread (Render Thread) in the CPU to render a frame of game screen.

[0081] S220. The GPU renders the target game screen according to the target command list, and sends a rendering end instruction to the CPU when the rendering of the target game screen is completed.

[0082] It can be understood that each time the GPU reads a command list from the command queue, when the command list is executed (that is, the rendering of a frame of game screen corresponding to the command list is completed), a rendering end instruction will be sent to the CPU.

[0083] S230 : The CPU responds to the rendering end instruction and reads the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue.

[0084] It can be understood that the circular delayed release queue may include at most three resource list arrays, and each resource list array may include the storage address of the to-be-released resources of one frame of game screen.

[0085] In this embodiment, the resource list array at the head of the circular delayed release queue is the target storage address of the target resource to be released.

[0086] S240: The CPU releases the target resource to be released based on the target storage address.

[0087] It can be understood that the target resources to be released include more than one resource, and the storage mapping addresses of different resources may be different. Correspondingly, the target storage address here may include the storage mapping address of each resource in the target resources to be released.

[0088] The resource management method provided in this embodiment is that, in an electronic device running a game engine using Direct3D 12, the GPU maintains a command queue for storing command lists, where one command list corresponds to one frame of game screen; and the CPU maintains a circular delayed release queue that includes the storage addresses of the resources to be released corresponding to each command list in the command queue. The GPU renders the target game screen based on the target command list read from the command queue and sends a rendering end instruction to the CPU when the rendering of the target game screen is completed. The CPU then responds to the rendering end instruction by reading the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue and releasing the target resource to be released based on the target storage address. In this way, the CPU releases the resources only when it receives the rendering end instruction, thereby ensuring the validity of the resources required to render the target game screen.

[0089] In an optional embodiment, the ring delayed release queue may include a resource list array corresponding to each command list in the command queue, and the resources to be released include buffer resources to be released, texture resources to be released, graphics pipeline states to be released, root tags to be released, and descriptor heaps to be released.

[0090] Correspondingly, the resource list array may include five arrays: a released buffer resource list array, a to-be-released texture resource list array, a to-be-released graphics pipeline state list array, a to-be-released root tag list array, and a to-be-released descriptor heap list array. These five arrays respectively include the storage addresses of the released buffer resources, to-be-released texture resources, to-be-released graphics pipeline state, to-be-released root tag, and to-be-released descriptor heap.

[0091] In an optional embodiment, the electronic device may further include a memory space corresponding to the CPU and a resource buffer maintained by Direct3D 12. Taking the target command list as an example, the CPU needs to prepare relevant data before submitting the target command list to the command queue. Accordingly, before the above step S210, the resource management method may further include steps S110 to S120:

[0092] S110 , the CPU loads the rendering resources of the target game screen from the memory space into the resource buffer.

[0093] S120. The CPU obtains a target command list corresponding to the target game screen, and stores the target command list in a command queue.

[0094] It can be understood that the memory space may include resource files loaded from the system storage space. In order to render the target game screen, the CPU needs to first load the rendering resources of the target game screen from the memory space to the resource buffer, and then collect the respective instructions for rendering the target game screen to obtain the target command list, and submit the target command list to the command queue maintained by the GPU.

[0095] It can be understood that for each frame of the game screen, the above steps S110-S120 and S210-S240 are required to complete the rendering of the game screen. In addition, each time the CPU submits a command list to the command queue, it can also store the storage address of the to-be-released resources corresponding to the game screen in the circular delayed release queue.

[0096] In an optional embodiment, the CPU loads the rendering resources of three consecutive frames of game screens into the resource buffer, and the CPU's rendering thread Render Thread collects and submits at most three command lists corresponding to the three consecutive frames of game screens at the same time. Figure 3 Taking the example of the Render Thread directly submitting command list 1, command list 2, and command list 3 to the command queue maintained by the GPU, the asynchronous work process between the CPU and GPU is as follows:

[0097] 1. The Render Thread submits command lists 1 to 3 corresponding to the first to third frames of the game screen to the command queue, and then waits for the GPU to complete command list 1 before continuing with the subsequent work.

[0098] 2. When the GPU reads command list 1 from the command queue, it starts executing command list 1;

[0099] 3. When command list 1 is executed, the GPU sends a rendering end instruction to the Render Thread;

[0100] 4. Render Thread responds to the rendering end instruction and releases the pending resources corresponding to command list 1.

[0101] 1-4 above illustrate the asynchronous process between the CPU's Render Thread and the GPU, from the time the Render Thread submits Command List 1 until the corresponding pending resources are released. The process from the submission of Command List 2 and Command List 3 to the release of their corresponding resources is similar and will not be detailed here.

[0102] Game rendering involves rendering frames of the game screen one by one. During this process, the user may resize the game rendering window on the display interface of the electronic device, which resets the window swap chain. In this case, the special processing is as follows:

[0103] When resizing the game rendering window (user-generated window resizing), the GPU must wait until all instructions in the command list corresponding to the current frame of the game screen are completed. No more write operations are performed on the old back buffer, and the window swap chain resets the back buffer rendering target size. Before resetting the window swap chain, since the GPU has completed the command list corresponding to the game screen before the current frame of the game screen, the CPU can clean up the pending resources corresponding to other game screens except the current frame of the game screen. The reason why the CPU does not clean up the pending resources of the current frame of the game screen is that the upper layer may have created resources and then destroyed them immediately.

[0104] In an optional embodiment, the electronic device may further include a video memory space corresponding to the GPU; the target command list includes but is not limited to first state transition instructions, resource copy instructions, second state transition instructions, resource binding instructions and rendering instructions, etc.

[0105] Correspondingly, in the above step S220, the process of the GPU rendering the target game screen according to the target command list may include the following sub-steps:

[0106] S221. In response to the first state conversion instruction, mark the resource state of the rendering resource of the target game screen in the resource buffer as the copy target state.

[0107] In order to ensure the validity of Direct3D 12 data, the resources that need to be concerned about are mainly divided into two types: buffer resources and texture resources. That is, rendering resources include buffer resources and texture resources.

[0108] It can be understood that before the CPU loads the rendering resources of the target game screen into the resource buffer, it specifies the default resource states of the target game screen buffer resources and texture resources according to their respective usage purposes, and tracks the current states.

[0109] Therefore, for the GPU, in response to the first state conversion instruction, the resource state of the rendering resource of the target game screen in the resource buffer is converted from the default resource state to the copy target state.

[0110] S222 : Respond to the resource copy instruction and read the rendering resources from the resource buffer to the video memory space.

[0111] S223 : In response to the second state transition instruction, switch the resource state of the rendering resource in the video memory space from the copy target state to the default resource state.

[0112] After the GPU reads the rendering resources of the target game screen from the resource buffer into the video memory space, the resource state of the rendering resources can be restored from the copy target state to the default resource state.

[0113] Assume that the CPU submits a command list of three consecutive frames of game screen to the command queue, then the corresponding CPU stores the rendering resources of each of these three frames of game screen in the resource buffer in advance.

[0114] Combine Figure 4 There can be three storage areas in the resource buffer. When initializing the allocation, the default predefined maximum update number is 8, and eight storage blocks are allocated to each storage area; the GPU-side buffer in the video memory space also defaults to eight storage blocks.

[0115] Assume that the rendering resource sizes of three frames of game screen (frame N, frame N+1, and frame N+2, where N can be a multiple of 3) are different. The three rendering resources can be loaded from the CPU-side buffer to a storage area of ​​the resource buffer by updating them 4, 7, and 1 times respectively.

[0116] Correspondingly, for GPU:

[0117] After the GPU reads the command list corresponding to the Nth frame from the command queue, it responds to the resource copy instruction and reads the rendering resources from the resource buffer to the GPU-side buffer in the video memory space, which requires copying 4 times.

[0118] When the GPU subsequently reads the command list corresponding to the N+1th frame from the command queue, it responds to the resource copy instruction and reads the rendering resources from the resource buffer to the GPU-side buffer in the video memory space, which requires copying 7 times.

[0119] When the GPU subsequently reads the command list corresponding to the N+2th frame from the command queue, it responds to the resource copy instruction and reads the rendering resources from the resource buffer to the GPU-side buffer in the video memory space, which requires copying once.

[0120] It can be understood that the predefined maximum number of updates of 8 is only the default setting for initial allocation. The predefined maximum number of updates corresponding to buffer resources can be dynamically adjusted to: 1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, etc. The predefined maximum number of updates corresponding to texture resources can be dynamically adjusted to: 1, 2, 4, 8, 16, 32, etc.

[0121] Therefore, if the CPU is loading the rendering resources of a frame of game screen into the storage area, if the update times of the buffer resources and texture resources respectively exceed the current predefined maximum update times of each, the predefined maximum update times and the number of dynamically allocated storage blocks in the storage area can be increased.

[0122] It should be noted that the above examples are merely illustrative and are not limiting.

[0123] S224: Respond to the resource binding instruction and perform resource binding on the rendering resources.

[0124] In this embodiment, the target game screen may include at least one object to be rendered. Accordingly, in S224, the GPU responds to the resource binding instruction, and the process of resource binding the rendering resources of the target game screen may include:

[0125] (1) Create a descriptor for each object to be rendered, where the descriptor points to the rendering resources required for rendering the object to be rendered;

[0126] (2) Bind each descriptor to a pre-created graphics pipeline.

[0127] In this embodiment, the rendering system of the electronic device only uses the vertex shading stage and the pixel shading stage of the graphics pipeline, and stipulates that the vertex and pixel shading stages can use a maximum of two constant buffers with continuous shader slots and multiple textures with discontinuous shader slot positions.

[0128] Direct3D 12 requires a root signature for the graphics pipeline. The root signature defines the types of resources that each shader stage expects to access, and the runtime specifies the resources actually accessed. The root signature consists of a list of root parameters, which can be of the following three types:

[0129] (1) Root constant: A single 32-bit data is inlined in the parameter and can only be used as a constant buffer in the shading stage;

[0130] (2) Root descriptor: The descriptor is inlined in the parameter and can only be used to define CBV, raw or structured UAV, SRV buffer, pointing to a descriptor in a continuous range in the descriptor heap;

[0131] (3) Root Descriptor Table: The offset and length of the descriptor heap. The descriptor table is only 32 bits (1 DWORD, and there is no limit on how many descriptors can be in the descriptor table (except for indirection up to the maximum descriptor heap size). When accessing resources from the descriptor table, there are two indirection overheads. The first indirection method is from the descriptor table pointer to the descriptor stored in the heap, and then from the descriptor heap to the actual resource).

[0132] In this embodiment, Direct3D 12 introduces a new resource reference mechanism. Descriptors are divided into shader-visible type and shader-invisible type. The shader-visible type is used to bind GPU resources to the graphics pipeline; the shader-invisible type is used for application-side cache resource references.

[0133] In this solution, the graphics pipeline access resource layout is organized as follows:

[0134] There is a high frequency of update in the command list of each frame of the game screen through the constant buffer. The two constant buffer slots accessed by the vertex shading stage and the pixel shading stage are associated with a root descriptor parameter respectively. Due to the discontinuity of the texture and sampler slots, the texture slot sets accessed by the vertex and pixel shading stages are associated with a root descriptor table parameter respectively. Each texture slot occupies a descriptor table in the root descriptor table array and is arranged continuously in the descriptor table array. In order to subsequently copy the texture resource descriptor to the continuous descriptor segment in the descriptor heap, only the starting address of the texture resource descriptor set in the descriptor heap is bound to the texture root descriptor table to complete the binding of the texture resource; the sampler set accessed by the vertex and pixel shading stages adopts the same strategy as the texture set.

[0135] In this solution, the resource descriptor heap allocation and management scheme is as follows:

[0136] Direct3D 12 descriptor types include: DSV, RTV, CBV|SRV|UAV, and Samper. Applications need to manage DSV and RTV descriptors and temporary CBV|SRV|UAV descriptors used to cache GPU resources. A temporary descriptor heap allocator is used: a doubly linked list is used to record free and used descriptors, enabling the recycling and reuse of these temporary descriptors.

[0137] The graphics pipeline accesses GPU resources through the root descriptor table. It is necessary to copy the GPU resource descriptor to the shader-visible descriptor heap. Before access, the descriptor heap is bound to the graphics pipeline, and the start descriptor of the continuous segment of the GPU resource in the descriptor heap is associated with the root descriptor table. To avoid interruption of parallel GPU drawing commands caused by switching descriptor heaps during GPU drawing command execution, a global CBV|SRV|UAV descriptor heap and sampler descriptor heap allocator solution is adopted (pre-allocating GPU resource descriptor heaps that can accommodate multi-frame GPU command access. The actual capacity of the global shader CBV|SRV|UAV descriptor heap is 288,000, which can meet the needs of a maximum of 4,000 GPU drawing commands accessing GPU CBV|SRV|UAV resources.

[0138] The global shader visible sampler descriptor heap is 2048: the global descriptor heap is used in a circular manner, recording the starting and ending positions of the descriptors allocated for each frame in the global descriptor heap. When the command list corresponding to the target game screen of the frame is executed, the continuous descriptor segments used by the frame are recycled for subsequent resource binding cycles.

[0139] S225. Respond to the rendering instruction and render the target game screen based on the rendering resources.

[0140] It is understood that after completing resource binding, the GPU can execute the rendering instructions of the target command list to render the target game screen. It should be noted that the execution order of each step in the above method embodiment is not limited to that shown in the accompanying drawings, and the execution order of each step shall be based on the actual application situation.

[0141] An embodiment of the present invention further provides an electronic device running a game engine using Direct3D12, the electronic device comprising a CPU and a GPU communicatively connected to each other. The GPU maintains a command queue for storing command lists, each command list corresponding to a frame of game screen; the CPU maintains a circular delayed release queue, the circular delayed release queue including the storage address of a to-be-released resource corresponding to each command list in the command queue.

[0142] The GPU is used to read a target command list from the command queue; the target command list corresponds to a target game screen;

[0143] The GPU is used to render the target game screen according to the target command list, and send a rendering end instruction to the CPU when the rendering of the target game screen is completed;

[0144] The CPU is configured to respond to the rendering end instruction and read the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue;

[0145] The CPU is configured to release the target resource to be released based on the target storage address.

[0146] Optionally, the electronic device further includes a memory space corresponding to the CPU and a resource buffer maintained by the Direct3D12;

[0147] Before being used to read the target command list from the command queue, the GPU is also used to: load the rendering resources of the target game screen from the memory space to the resource buffer; obtain the target command list corresponding to the target game screen, and store the target command list in the command queue.

[0148] Optionally, the electronic device further includes a video memory space corresponding to the GPU and a resource buffer created and maintained by Direct3D12, wherein the resource buffer includes rendering resources for the target game screen; the target command list includes a first state transition instruction, a resource copy instruction, a second state transition instruction, a resource binding instruction, and a rendering instruction;

[0149] When the GPU is used to render the target game screen according to the target command list, it is specifically used to: respond to the first state transition instruction, mark the resource state of the rendering resources of the target game screen in the resource buffer as the copy target state; respond to the resource copy instruction, read the rendering resources from the resource buffer to the video memory space; respond to the second state transition instruction, switch the resource state of the rendering resources in the video memory space from the copy target state to the default resource state; respond to the resource binding instruction, bind the rendering resources; respond to the rendering instruction, render the target game screen based on the rendering resources.

[0150] Optionally, the ring delayed release queue includes a resource list array corresponding to each command list in the command queue, and the resources to be released include buffer resources to be released, texture resources to be released, graphics pipeline states to be released, root signatures to be released, and descriptor heaps to be released;

[0151] The resource list array includes storage addresses of the released buffer resources, the texture resources to be released, the graphics pipeline state to be released, the root tag to be released, and the descriptor heap to be released.

[0152] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the interaction between the CPU and GPU in the electronic device described above and their respective specific working processes can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0153] An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the computer-readable storage medium implements the resource management method disclosed in the above embodiment. The computer-readable storage medium may be, but is not limited to, a random access memory (RAM), a read-only memory (ROM), a flash memory (Flash), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic disk, an optical disk, or other medium capable of storing program code.

[0154] In summary, an embodiment of the present invention provides a resource management method, an electronic device, and a computer-readable storage medium. In an electronic device running a game engine using Direct3D 12, the GPU maintains a command queue for storing command lists, where one command list corresponds to one frame of the game screen; and the CPU maintains a circular delayed release queue including the storage address of the resources to be released corresponding to each command list in the command queue. The GPU renders the target game screen based on the target command list read from the command queue, and sends a rendering end instruction to the CPU when the rendering of the target game screen is completed. The CPU then responds to the rendering end instruction, reads the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue, and releases the target resource to be released based on the target storage address. In this way, the CPU releases the resources only when the rendering end instruction is received, thereby ensuring the validity of the resources required to render the target game screen.

[0155] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A resource management method, characterized in that: Applicable to an electronic device, wherein the electronic device runs a game engine using Direct3D12, and the electronic device includes a central processing unit (CPU) and a graphics processing unit (GPU) that are communicatively connected; The GPU maintains a command queue, the command queue is used to store command lists, and one command list corresponds to one frame of game screen; the CPU maintains a circular delayed release queue, the circular delayed release queue includes the storage address of the to-be-released resource corresponding to each command list in the command queue; the method includes: The GPU reads a target command list from the command queue; the target command list corresponds to a target game screen; The GPU renders the target game screen according to the target command list, and sends a rendering end instruction to the CPU when the rendering of the target game screen is completed; The CPU responds to the rendering end instruction and reads the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue; The CPU releases the target resource to be released based on the target storage address; The electronic device further includes a video memory space corresponding to the GPU and a resource buffer created and maintained by Direct3D 12, wherein the resource buffer includes rendering resources for the target game screen; the target command list includes a first state transition instruction, a resource copy instruction, a second state transition instruction, a resource binding instruction, and a rendering instruction; and the step of the GPU rendering the target game screen according to the target command list includes: In response to the first state conversion instruction, marking the resource state of the rendering resource of the target game screen in the resource buffer as a copy target state; In response to the resource copy instruction, read the rendering resource from the resource buffer to the video memory space; In response to the second state transition instruction, switching the resource state of the rendering resource in the video memory space from the copy target state to a default resource state; In response to the resource binding instruction, performing resource binding on the rendering resource; In response to the rendering instruction, the target game screen is rendered based on the rendering resources.

2. The method according to claim 1, characterized in that The electronic device further includes a memory space corresponding to the CPU and a resource buffer maintained by the Direct3D12; Before the step of the GPU reading the target command list from the command queue, the method further includes: The CPU loads the rendering resources of the target game screen from the memory space to the resource buffer; The CPU obtains the target command list corresponding to the target game screen, and stores the target command list in the command queue.

3. The method according to claim 1, characterized in that The target game screen includes at least one object to be rendered; The GPU responding to the resource binding instruction and performing resource binding on the rendering resource includes: Creating a descriptor for each object to be rendered, wherein the descriptor points to rendering resources required for rendering the object to be rendered; Each of the descriptors is bound to a pre-created graphics pipeline.

4. The method according to claim 1, wherein The circular delayed release queue includes a resource list array corresponding to each command list in the command queue, the resources to be released include buffer resources to be released, texture resources to be released, graphics pipeline status to be released, root signature to be released, and descriptor stack to be released, and the resource list array includes the storage addresses of the released buffer resources, the texture resources to be released, the graphics pipeline status to be released, the root signature to be released, and the descriptor stack to be released.

5. An electronic device, characterized in that: The electronic device runs a game engine using Direct3D12, and the electronic device includes a CPU and a GPU that are communicatively connected; The GPU maintains a command queue, which is used to store command lists, and one command list corresponds to one frame of game screen; the CPU maintains a circular delayed release queue, which includes the storage address of the to-be-released resource corresponding to each command list in the command queue; The GPU is used to read a target command list from the command queue; The target command list corresponds to the target game screen; The GPU is used to render the target game screen according to the target command list, and send a rendering end instruction to the CPU when the rendering of the target game screen is completed; The CPU is configured to respond to the rendering end instruction and read the target storage address of the target resource to be released corresponding to the target command list from the circular delayed release queue; The CPU is configured to release the target resource to be released based on the target storage address; The electronic device further includes a video memory space corresponding to the GPU and a resource buffer created and maintained by Direct3D 12, wherein the resource buffer includes rendering resources for the target game screen; the target command list includes a first state transition instruction, a resource copy instruction, a second state transition instruction, a resource binding instruction, and a rendering instruction; and when the GPU is used to render the target game screen according to the target command list, it is specifically used to: In response to the first state conversion instruction, marking the resource state of the rendering resource of the target game screen in the resource buffer as a copy target state; In response to the resource copy instruction, read the rendering resource from the resource buffer to the video memory space; In response to the second state transition instruction, switching the resource state of the rendering resource in the video memory space from the copy target state to a default resource state; In response to the resource binding instruction, performing resource binding on the rendering resource; In response to the rendering instruction, the target game screen is rendered based on the rendering resources.

6. The electronic device according to claim 5, characterized in that It also includes the memory space corresponding to the CPU and the resource buffer maintained by the Direct3D 12; Before reading the target command list from the command queue, the GPU is further configured to: Loading the rendering resources of the target game screen from the memory space into the resource buffer; Obtain the target command list corresponding to the target game screen, and store the target command list in the command queue.

7. The electronic device according to claim 5, wherein: The annular delayed release queue includes a resource list array corresponding to each command list in the command queue, and the resources to be released include buffer resources to be released, texture resources to be released, graphics pipeline states to be released, root signatures to be released, and descriptor heaps to be released; The resource list array includes storage addresses of the released buffer resources, the texture resources to be released, the graphics pipeline state to be released, the root tag to be released, and the descriptor heap to be released.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the resource management method according to any one of claims 1 to 4 is implemented.

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