Marathon test method, apparatus and system for semiconductor process equipment

Abstract

This invention provides a marathon testing method, apparatus, and system for semiconductor process equipment. The method includes: if the current cycle number is not greater than a preset marathon cycle number, performing a first operation and a second operation on a first lifting device and a second lifting device respectively; if the current cycle number is odd, controlling a robotic arm to transfer the wafer from the first lifting device to the second lifting device; if the current cycle number is even, transferring the wafer from the second lifting device to the first lifting device; incrementing the current cycle number by 1 and repeating the process until the current cycle number exceeds the preset marathon cycle number. During the above testing process, there is no need to rely on a host computer and its software interface; the testing of semiconductor process equipment can be achieved through a lower-level computer. Simultaneously, it enriches the testing content, improves the testing efficiency and quality of semiconductor process equipment, and ensures the stable operation of the semiconductor process equipment.

Description

Technical Field

[0001] This invention relates to the field of semiconductor process equipment technology, and in particular to marathon testing methods, apparatus and systems for semiconductor process equipment. Background Technology

[0002] For the 800 and 600 platforms used in etching machines, stability verification is conducted on three main components—the robot, the alinger, and the VCE (Vertical Cassette Elevator) platform—both in the platform production workshop and at the customer's site. Efficiently conducting stability verification is crucial for improving production efficiency and reducing the time spent on chamber maintenance for customer products.

[0003] The relevant technologies mainly verify the stability of the three major components through host computers and host software. This not only involves complex operation methods but also has limited testing functions, which reduces the platform's testing efficiency and verification quality. Therefore, how to improve the testing efficiency and testing quality of the platform's three major components is an urgent problem to be solved. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a marathon testing method, apparatus and system for semiconductor process equipment, which can realize the testing of semiconductor process equipment through a lower-level machine without relying on a host computer and host computer software operation interface; at the same time, it enriches the test content, improves the testing efficiency and test quality of semiconductor process equipment, and ensures the stable operation of semiconductor process equipment.

[0005] In a first aspect, embodiments of the present invention provide a marathon testing method for semiconductor process equipment, applied to a lower-level machine communicatively connected to the semiconductor process equipment. The semiconductor process equipment includes: a robotic arm, an adjuster, a first lifting device, and a second lifting device; wherein a first wafer cassette is placed in the first lifting device, and a second wafer cassette is placed in the second lifting device, and both the first and second wafer cassettes are provided with multiple wafer slots for holding wafers; the method includes: step S102, if the current cycle number is not greater than a preset marathon cycle number, performing a first operation and a second operation on the first lifting device and the second lifting device respectively; wherein the first operation includes closing the door of the first lifting device. The first operation involves scanning multiple slots in the first wafer cassette to generate first wafer information and performing vacuuming on the first lifting device. The second operation involves closing the door of the second lifting device, scanning multiple slots in the second wafer cassette to generate second wafer information, and performing vacuuming on the second lifting device. In step S104, if the current cycle number is odd, the robot arm is controlled to transfer the wafer in the first lifting device to the second lifting device; or, if the current cycle number is even, the wafer in the second lifting device is transferred to the first lifting device. In step S106, the current cycle number is incremented by 1, and the process returns to step S102 to repeat until the current cycle number is greater than the preset marathon cycle number.

[0006] Preferably, the method further includes: acquiring first absolute position information corresponding to the first lifting device and second absolute position information corresponding to the second lifting device; wherein the first absolute position information is used to characterize the height of the wafer slot in the first wafer cassette from the ground, and the second absolute position information is used to characterize the height of the wafer slot in the second wafer cassette from the ground; controlling the height position of the robot arm to remain unchanged; determining the stability information of the first lifting device based on the first absolute position information and the corresponding first wafer information; and determining the stability information of the second lifting device based on the second absolute position information and the corresponding second wafer information; wherein the first wafer information is used to characterize the position information of the wafer in the first wafer cassette in the wafer slot, and the second wafer information is used to characterize the position information of the wafer in the second wafer cassette in the wafer slot.

[0007] Preferably, the step of controlling the robotic arm to transfer the wafers from the first lifting device to the second lifting device includes: controlling the robotic arm to rotate to the position of the first lifting device and controlling the first gate valve between the first lifting device and the lower-level machine to open; controlling the robotic arm to take out the first target wafer from the current wafer pick-up slot in the first wafer cassette and place the first target wafer in the adjuster so that the adjuster calibrates the first target wafer, and when the calibration is completed, controlling the robotic arm to take out the first target wafer from the adjuster and controlling the first gate valve to close; and controlling the robotic arm to rotate to the position of the second lifting device and controlling the second gate valve between the second lifting device and the lower-level machine to open, controlling the robotic arm to place the first target wafer in the slot corresponding to the current wafer pick-up slot in the second wafer cassette and controlling the second gate valve to close; incrementing the current wafer pick-up slot by 1, and repeating the above transfer process until all wafers in the first wafer cassette are transferred to the second lifting device.

[0008] Preferably, the step of controlling the robotic arm to transfer the wafers from the second lifting device to the first lifting device includes: controlling the robotic arm to rotate to the position of the second lifting device and controlling the second gate valve to open; controlling the robotic arm to remove the second target wafer from the current wafer pick-up slot in the second wafer cassette and place the second target wafer in the adjuster so that the adjuster calibrates the second target wafer, and when the calibration is completed, controlling the robotic arm to remove the second target wafer from the adjuster and controlling the second gate valve to close; and controlling the robotic arm to rotate to the position of the first lifting device and controlling the first gate valve to open, controlling the robotic arm to place the second target wafer in the slot corresponding to the current wafer pick-up slot in the first wafer cassette and controlling the first gate valve to close; incrementing the current wafer pick-up slot by 1, and repeating the above transfer process until all wafers in the second wafer cassette are transferred to the first lifting device.

[0009] Preferably, the method further includes: if the current number of film slots is greater than the preset number of film slots, controlling the first valve and the second valve to close; and after a delay, controlling the first lifting device and the second lifting device to open their doors respectively after being inflated.

[0010] Preferably, the steps of performing the first operation and the second operation on the first lifting device and the second lifting device respectively further include: performing the first operation on the first lifting device and delaying for a preset time before performing the second operation on the second lifting device; or, performing the second operation on the second lifting device and delaying for a preset time before performing the first operation on the first lifting device.

[0011] Preferably, the method further includes: generating a preset marathon number of cycles in response to the user's input operation on the number of cycles.

[0012] Preferably, the display interface of the lower-level machine is also equipped with a one-click button, and the method further includes: controlling the semiconductor process equipment to perform a marathon test in response to a pressing operation of the one-click button.

[0013] Secondly, embodiments of the present invention also provide a marathon testing device for semiconductor process equipment, applied to a lower-level machine communicating with semiconductor process equipment. The semiconductor process equipment includes: a robotic arm, an adjuster, a first lifting device, and a second lifting device; wherein a first wafer cassette is placed in the first lifting device, and a second wafer cassette is placed in the second lifting device, and both the first and second wafer cassettes are provided with multiple wafer slots for holding wafers; the device includes: an operation execution module, used to execute a first operation and a second operation on the first lifting device and the second lifting device respectively if the current cycle number is not greater than a preset marathon cycle number; wherein the first operation includes closing the door of the first lifting device and the second operation on the first lifting device. The first operation involves scanning multiple wafer slots in a wafer cassette to generate first wafer information and performing vacuuming on the first lifting device. The second operation includes closing the door of the second lifting device, scanning multiple wafer slots in the second wafer cassette to generate second wafer information, and performing vacuuming on the second lifting device. The wafer transfer module is used to control the robot to transfer the wafer in the first lifting device to the second lifting device if the current cycle number is odd, or to control the robot to transfer the wafer in the second lifting device to the first lifting device if the current cycle number is even. The loop execution module is used to increment the current cycle number by 1 and return to the operation execution module to repeat the execution until the current cycle number is greater than the preset marathon cycle number.

[0014] Thirdly, embodiments of the present invention also provide a marathon testing system for semiconductor process equipment. The system includes: a lower-level machine and semiconductor process equipment communicatively connected to the lower-level machine; wherein the semiconductor process equipment includes: a robotic arm, an adjuster, a first lifting device, and a second lifting device; the lower-level machine includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the marathon testing method for semiconductor process equipment of the first aspect.

[0015] The embodiments of the present invention bring the following beneficial effects:

[0016] This invention provides a marathon testing method, apparatus, and system for semiconductor process equipment. It eliminates the need for a host computer and its software interface, allowing testing of semiconductor process equipment to be performed via a lower-level device. Furthermore, it enriches the testing content, improves the testing efficiency and quality of semiconductor process equipment, and ensures the stable operation of the equipment.

[0017] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention are realized and obtained through the structures particularly pointed out in the description and the drawings.

[0018] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0019] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 A flowchart of a horse-riding test provided in an embodiment of the present invention;

[0021] Figure 2 A schematic diagram of a marathon testing system for semiconductor process equipment provided in an embodiment of the present invention;

[0022] Figure 3 A schematic diagram of the structure of another marathon test system for semiconductor process equipment provided in an embodiment of the present invention;

[0023] Figure 4 A flowchart of a marathon test method for semiconductor process equipment provided in an embodiment of the present invention;

[0024] Figure 5 This is a schematic diagram of the interface of a lower-level machine provided in an embodiment of the present invention;

[0025] Figure 6 A flowchart of another marathon test method for semiconductor process equipment provided in an embodiment of the present invention;

[0026] Figure 7 A schematic diagram of a marathon testing apparatus for semiconductor process equipment provided in an embodiment of the present invention;

[0027] Figure 8 This is a schematic diagram of a lower-level machine provided in an embodiment of the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] The stability of the platform's three main components is primarily verified through marathon testing. Marathon testing involves transporting a certain number of wafers from a specific location on the VCE using a robot, calibrating them with an Aligner, and then placing them back into the VCE. This process verifies the proper functioning of the robot, VCE, and Aligner.

[0030] Specifically, taking VCEA as an example, the testing process for VCEB can be referenced from VCEA; such as... Figure 1 As shown, existing marathon tests mainly include the following steps:

[0031] Step A1: Place the disc tray in the VCEA; that is, the production or maintenance personnel place the disc tray into the VCEA.

[0032] Step A2: Click Load. VCEA will automatically perform the following steps: VCEA door closing, VCEA wafer sweeping, and VCEA vacuuming. That is, production or maintenance personnel click Load to control VCEA to close the door, sweep the wafer cassette, and perform vacuuming.

[0033] Step A3: Create a wafer transport flow; that is, production or maintenance personnel edit and create a wafer transport flow in the host computer Job interface.

[0034] Step A4: Select all wafers;

[0035] Step A5: Configure wafer transport flow based on wafer;

[0036] Step A6: Create a marathon video upload task;

[0037] Step A7: Enter the marathon cycle number; and start the marathon video upload task;

[0038] Step A8: Open the valve, that is, open the valve between VCEA and the TM system (i.e., the lower-level machine);

[0039] Step A9: Determine if the current loop number is less than or equal to the marathon loop number; if yes, proceed to step A10; otherwise, end the marathon test process.

[0040] Step A10: Determine if all wafer slot arrays have not been traversed; if not, return to step A9 and re-execute; if yes, execute step A11.

[0041] Step A11: If VCEA moves to slot N at this time, Robot acquires the wafer at slot N;

[0042] Step A12: The robot places the wafer into the Alinger;

[0043] Step A13: Alinger calibrates the wafer; that is, it calibrates the wafer's center position in the robotic arm.

[0044] Step A14: The robot retrieves the wafer from the Aligner;

[0045] Step A15: Robot places the wafer at slot N;

[0046] Steps A16 and N+1 are executed, and then the process returns to step A10.

[0047] Therefore, the existing marathon test mainly includes VCE lifting, robot wafer loading and unloading, and Aligner wafer calibration. The test content is limited, and it must rely on the host computer and host computer software interface, which requires manual settings. This makes the test operation complicated and cumbersome, thereby reducing test efficiency and test results.

[0048] Based on this, embodiments of the present invention provide a marathon testing method, apparatus, and system for semiconductor process equipment, which can achieve testing of semiconductor process equipment through a lower-level machine without relying on a host computer and host computer software interface; at the same time, it enriches the testing content, improves the testing efficiency and quality of semiconductor process equipment, and ensures the stable operation of semiconductor process equipment.

[0049] To facilitate understanding of this embodiment, a marathon testing system for semiconductor process equipment provided by this invention will be described in detail below. For example... Figure 2 As shown, the system includes: a lower-level machine 21, and semiconductor process equipment communicatively connected to the lower-level machine 21; wherein, the semiconductor process equipment includes: a robot 22, an adjuster 23, a first lifting device 241, and a second lifting device 242. Here, the lower-level machine 21 can also be referred to as a vacuum transfer platform control system or a vacuum TM (Transfer Module) system. The first lifting device 241 and the second lifting device 242 are both vacuum wafer cassette lifters, such as the first lifting device 241 being VCEA and the second lifting device 242 being VCEB. Furthermore, as... Figure 3As shown, a slot valve is also provided between VCE and TM. For example, the slot valve between the first lifting device 241 (VCEA) and the lower-level machine 21 (TM) can also be called the first slot valve, and the slot valve between the second lifting device 242 (VCEA) and the lower-level machine 21 (TM) can also be called the second slot valve. Furthermore, TM is also connected to multiple PMs (Process Modules), etc. Specific PMs can be found in existing technologies, and will not be described in detail here.

[0050] In summary, by integrating the marathon testing of the three key components of the 600 platform semiconductor process equipment used in the etching machine—the Robot, Alinger, and VCE lifting device—into a standard workflow through software coding, and providing a one-click interface in the platform™ software interface, the system eliminates the need for manual settings in the host computer software interface, thereby improving the modularity, automation, and testing efficiency of semiconductor process equipment testing.

[0051] Based on the aforementioned marathon testing system for semiconductor process equipment, this embodiment of the invention provides a marathon testing method for semiconductor process equipment. The executing entity is a lower-level machine communicatively connected to the semiconductor process equipment. The semiconductor process equipment includes: a robot, an adjuster, a first lifting device VCEA, and a second lifting device VCEB. The first lifting device holds a first wafer cassette, and the second lifting device holds a second wafer cassette. Both the first and second wafer cassettes are provided with multiple wafer slots, each slot for holding a wafer. Figure 4 As shown, the method includes the following steps:

[0052] Step S102: If the current number of cycles is not greater than the preset number of marathon cycles, perform the first operation and the second operation on the first lifting device and the second lifting device respectively;

[0053] Specifically, the operator only needs to manually open the door of the first lifting device VCEA and the door of the second lifting device VCEB, place the first wafer cassette with the wafer in VCEA, and place the empty second wafer cassette in VCEB. The lower-level machine can then perform a marathon test on the semiconductor process equipment, thus completing the wafer transfer operation.

[0054] Specifically, for each round of wafer transfer, if the current cycle number is not greater than the preset marathon cycle number, the first lifting device VCEA and the second lifting device VCEB are respectively subjected to a first operation and a second operation. Specifically, the first operation includes closing the door of the first lifting device VCEA (i.e., VCEA Door), scanning multiple slots in the first wafer cassette to generate first wafer information, and performing a vacuum process on the first lifting device VCEA. The second operation includes closing the door of the second lifting device VCEB (i.e., VCEB Door), scanning multiple slots in the second wafer cassette to generate second wafer information, and performing a vacuum process on the second lifting device VCEB.

[0055] It should be noted that the aforementioned first wafer information and second wafer information are only used to distinguish the wafer information corresponding to the first wafer cassette and the second wafer cassette respectively. That is, during the entire marathon test, the wafer information generated by scanning the wafer slots in the first wafer cassette is referred to as the first wafer information. Similarly, the wafer information generated by scanning the wafer slots in the second wafer cassette is referred to as the second wafer information.

[0056] Optionally, during execution, a first operation can be performed on the first lifting device, and after a preset delay, a second operation can be performed on the second lifting device; or, a second operation can be performed on the second lifting device, and after a preset delay, a first operation can be performed on the first lifting device; here, the preset delay is preferably 1 second, and the specific execution order of the first and second operations can be set according to the actual situation.

[0057] It should be noted that if there is a wafer in the first wafer cassette, the first wafer information includes information on whether a wafer exists or not in each slot of the first wafer cassette, as well as information on which layer it is located on; similarly, the second wafer information includes information on whether a wafer exists or not in each slot of the second wafer cassette, as well as information on which layer it is located on.

[0058] Preferably, the method further includes: generating a preset marathon number of cycles in response to a user's input of the number of cycles. For example... Figure 5 As shown, in the Debugger interface of the lower-level machine, the user, i.e. the operator, can also input the number of cycles to generate a preset marathon cycle number.

[0059] In addition, the lower-level machine's display interface is equipped with a one-click button, namely the VCEMAlathon button. The method also includes controlling the semiconductor process equipment to perform a marathon test in response to pressing the one-click button. Specifically, the operator manually opens the VCEA Door and VCEB Door, places the first wafer cassette with the wafer on the VCEA, places the empty second wafer cassette on the VCEB, enters the cycle number in the Debugger interface to generate a preset marathon cycle number, and finally clicks the VCEMAlathon button. The lower-level machine can then perform a marathon test on the semiconductor process equipment.

[0060] Step S104: If the current cycle number is odd, control the robot to transfer the wafer in the first lifting device to the second lifting device; or, if the current cycle number is even, transfer the wafer in the second lifting device to the first lifting device.

[0061] Specifically, since the current cycle number has the attribute of being odd or even, for an odd-numbered cycle, such as the first cycle, there is a wafer in the first cassette of VCEA, but no wafer in the second cassette of VCEB. Therefore, the transfer direction of the wafer can be determined according to the attribute of the current cycle number; that is, if the current cycle number is odd, the control robot will transfer the wafer in the first lifting device to the second lifting device; or, if the current cycle number is even, the wafer in the second lifting device will be transferred to the first lifting device.

[0062] The process of controlling the robotic arm to transfer wafers from the first lifting device to the second lifting device is as follows: The robotic arm rotates to the position of the first lifting device VCEA and opens the first valve between VCEA and the lower-level machine TM; the robotic arm removes the first target wafer from the current wafer slot in the first wafer cassette and places it in the Aligner so that the Aligner can calibrate the first target wafer; after calibration, the robotic arm removes the first target wafer from the Aligner and closes the first valve; the robotic arm rotates to the position of the second lifting device VCEB and opens the second valve between VCEB and the lower-level machine TM; the robotic arm places the first target wafer in the slot corresponding to the current wafer slot in the second wafer cassette and closes the second valve; the current wafer slot is incremented by 1, and the above transfer process is repeated until all wafers in the first wafer cassette are transferred to the second lifting device VCEB. For each wafer in VCEA, the following actions are performed: The first valve is opened, the Robot retrieves the first target wafer from slot X of the first wafer cassette, places the first target wafer into the Aligner, and after calibration, the Robot retrieves the first target wafer and closes the first valve between VCEA and TM. The second valve between VCEB and TM is then opened, the Robot places the first target wafer into the corresponding slot X in the second wafer cassette of VCEB, and closes the second valve between VCEB and TM.

[0063] Similarly, the process of controlling the robot to transfer wafers from the second lifting device to the first lifting device is as follows: The robot is controlled to rotate to the position of the second lifting device VCEB and the second valve is opened; the robot removes the second target wafer from the current wafer pick-up slot in the second wafer cassette and places it in the Aligner so that the Aligner can calibrate the second target wafer; after calibration, the robot removes the second target wafer from the Aligner and the second valve is closed; the robot is then controlled to rotate to the position of the first lifting device VCEA and the first valve is opened; the robot places the second target wafer in the slot corresponding to the current wafer pick-up slot in the first wafer cassette and the first valve is closed; the current wafer pick-up slot is incremented by 1, and the above transfer process is repeated until all wafers in the second wafer cassette are transferred to the first lifting device VCEA. For each wafer in VCEB, the following actions are performed: The second valve is opened, the robot retrieves the second target wafer from slot Y in the second wafer cassette, places the second target wafer into the Aligner, and after calibration, the robot retrieves the second target wafer and closes the second valve between VCEB and TM. The first valve between VCEA and TM is then opened, the robot places the second target wafer into the corresponding slot Y in the first wafer cassette of VCEA, and closes the first valve between VCEA and TM.

[0064] Therefore, when the cycle number is odd, all wafers are transferred from VCEA to VCEB; when the cycle number is even, all wafers are transferred from VCEB to VCEA. Each round also includes a wafer scanning test, where wafer scanning is the function of the wafer detection sensor in VCE. By scanning the wafer slots, the lower-level machine can determine the position of the wafers in the slots, facilitating subsequent wafer transfer. If there are no wafers in the slots, the scanning result is "no wafer present," thus enabling the lower-level machine to automatically generate wafer status information for each slot in VCEB.

[0065] It should be noted that the current wafer pick-up slot V and current wafer pick-up slot Y mentioned above are only used for the current wafer pick-up slot in different wafer hoppers. They may be the same or different, and the specific settings should be made according to the actual situation. Also, for each wafer transferred, the valve between the VCE and TM will be opened and closed. The process corresponding to each cycle number will include gas filling, opening and closing the VCE door, and vacuuming.

[0066] Preferably, the method further includes: if the current wafer slot number is greater than the preset wafer slot number, controlling the first valve and the second valve to close; and after a delay, controlling the first lifting device VCEA and the second lifting device VCEB to open their doors respectively after inflation. Therefore, the marathon test process of this embodiment can not only realize VCE lifting, Robot rotation, Alinger calibration, valve opening and closing, and VCE wafer scanning tests, but also realize VCE vacuuming and inflation tests, thereby enriching the test content and improving the test quality.

[0067] Step S106: Increment the current loop number by 1, and return to step S102 to repeat until the current loop number is greater than the preset marathon loop number.

[0068] After the current loop count test is completed, the current loop count is incremented by 1, and the above process is repeated. This achieves the stability test of semiconductor process equipment by performing wafer transfer operations on the first and second lifting devices in each round. Furthermore, since the host computer is not suitable for editing complex hardware operation procedures, and the scheduling algorithm is too complex, it is prone to software scheduling stoppage problems. In this embodiment of the invention, the execution entity is the lower-level computer. From a modular perspective, this decouples the marathon test from the host computer system, thereby improving test efficiency and test quality.

[0069] In summary, the marathon testing method for semiconductor process equipment provided in this embodiment of the invention mainly includes three parts: VCE motion stability test, Aligner stability test, and Robot stability test; wherein each part is as follows:

[0070] (1) VCE motion stability test: In each marathon cycle, the key interfaces of VCE will be tested; such as calling the VCE CloseDoor (i.e., closing the VCE door) and OpenDoor interfaces (i.e., opening the VCE door after inflation); calling the VCE map (scanning) interface to obtain the wafer information where the VCE is placed, and calling the VCE motion slot interface in sequence for the placed wafer; and calling the VCE POS, ABS (absolute position) interface to record the high and low positions of each slot and store them in the log so as to analyze whether there is any offset in the high and low positions during the marathon test, thereby analyzing the stability of the VCE upgrade.

[0071] Furthermore, the method further includes: acquiring first absolute position information corresponding to the first lifting device and second absolute position information corresponding to the second lifting device; wherein the first absolute position information is used to characterize the height of the wafer slot in the first wafer cassette from the ground, and the second absolute position information is used to characterize the height of the wafer slot in the second wafer cassette from the ground; controlling the height position of the robot arm to remain unchanged; determining the stability information of the first lifting device based on the first absolute position information and the corresponding first wafer information; and determining the stability information of the second lifting device based on the second absolute position information and the corresponding second wafer information; wherein the first wafer information is used to characterize the position information of the wafer in the first wafer cassette in the wafer slot, and the second wafer information is used to characterize the position information of the wafer in the second wafer cassette in the wafer slot. For ease of understanding, the first lifting device is used as an example. The first absolute position information corresponding to the first lifting device is obtained, that is, the height of the wafer slot in the first wafer cassette from the ground. By scanning multiple wafer slots in the first wafer cassette, the first wafer information is obtained, that is, the position information of the wafer in the wafer slot, such as which layer of the wafer slot it is in. Thus, during the lifting of the first wafer cassette by the first lifting device, when the height of the robot arm remains unchanged, the stability of the first lifting device can be determined based on the first wafer information and the height of the corresponding wafer slot (i.e., the first absolute position information). That is, when the height of the robot arm remains unchanged, the stability information of the VCEA is determined based on the first absolute position information recorded by the VCEA and the corresponding first wafer information. Similarly, when the height of the robot arm remains unchanged, the stability information of the VCEB can be determined based on the second absolute position information recorded by the VCEB and the corresponding second wafer information.

[0072] (2) Aligner stability test: In each marathon cycle, the key interfaces of Aligner will be tested, such as the Align (calibration) interface of Aligner, and the results of the interface call will be judged. If the result exceeds the Aligner range, an alarm will be thrown, and if the result is within the Aligner calibration range, the Align data will also be recorded.

[0073] (3) Robot stability test: In each marathon cycle, the key interfaces of the robot will be tested; for example, the interface of the robot picking up the chip from the VCE and the Aligner station, the interface of the robot placing the chip to the VCE and the Aligner station, and the interface of the robot rotating from one VCE to another, etc.; thereby verifying the correctness of each key interface to verify the robot's motion stability.

[0074] In addition, the running time of the current cycle is recorded and stored in the log during each marathon cycle to test the stability of the platform's transmission efficiency.

[0075] To facilitate understanding, the marathon test process is illustrated below. First, the operator opens the door of VCEA and places the first wafer cassette containing the wafer into VCEA; then, they open the door of VCEB and place the second wafer cassette without the wafer into VCEB. Finally, the marathon cycle number is set, and the marathon test is started with a single click. Figure 6 As shown, the marathon test process for semiconductor process equipment is as follows:

[0076] Step S602: Determine whether the current number of loops is less than or equal to the number of marathon loops; if yes, proceed to step S604; otherwise, end the marathon test process.

[0077] Step S604: Perform the following on VCEA: VCEA door closing, VCEA scanning, and VCEA vacuuming; after a 1-second delay, perform the following on VCEB: VCEB door closing, VCEB scanning, and VCEB vacuuming; it should be noted that the order of VCEA and VCEB is adjustable.

[0078] Step S606: Determine whether the current wafer transfer slot x satisfies slot x≤25 (total number of slots); that is, determine whether the previous wafer transfer round has been completed. If yes, proceed to step S608; otherwise, proceed to step S622.

[0079] Step S608: Determine whether the current loop number is odd. If it is, proceed to step S610; otherwise, proceed to step S616.

[0080] Step S610: Determine if there is a wafer in VCEA slot N; that is, determine if there is a wafer in VCEA slot N. If yes, proceed to step S612; otherwise, increase the number of slots by N+1 and return to step S606.

[0081] Step S612: Control the Robot to rotate to the VCEA position, control the VCEA to move to slot N, control the first gate valve to open, the Robot acquires the wafer at slot N and places it in the Alinger so that the Alinger can calibrate the wafer, and control the first gate valve to close.

[0082] Step S614: Control the Robot to rotate to the VCEB position, control the VCEB to move to slot N of the second wafer cassette, control the second valve to open, the Robot to place the wafer in slot N of the VCEB, control the second valve to close; and, move slot N+1 and return to step S606.

[0083] Step S616: Determine if there is a wafer in VCEAB slot N; that is, determine if there is a wafer in VCEB slot N. If yes, proceed to step S618; otherwise, increase the number of slots by N+1 and return to step S606.

[0084] Step S618: Control the Robot to rotate to the VCEB position, control the VCEB to move to slot N, control the second gate valve to open, the Robot acquires the wafer at slot N and places it in the Alinger so that the Alinger can calibrate the wafer, and control the second gate valve to close.

[0085] Step S620: Control the Robot to rotate to the VCEA position, control the VCEA to move to slot N of the first wafer cassette, control the first gate valve to open, the Robot to place the wafer in slot N of the VCEA, control the first gate valve to close; and, move slot N+1 and return to step S606.

[0086] Step S622: Control the first valve and the second valve to close. After a 1-second delay, charge VCEA with atmospheric air and control the VCEA valve to open. After a 1-second delay, charge VCEB with atmospheric air and control the VCEB valve to open. After a 1-second delay, return to step S602.

[0087] Therefore, the marathon testing method for semiconductor process equipment provided in this embodiment of the invention not only enables the 800 and 600 platforms to automatically perform marathon testing of the three main platform components—Robot, VCE, and Aligner—with one click, but also reduces the dependence on the host computer during the testing process, improves modular testing capabilities, reduces personnel consumption and the probability of manual operation errors, and improves testing efficiency; at the same time, it also enriches the testing content, improves the testing quality, and ensures the stable operation of the semiconductor process equipment.

[0088] Corresponding to the above method embodiments, this invention also provides a marathon testing device for semiconductor process equipment, applied to a lower-level machine communicating with the semiconductor process equipment. The semiconductor process equipment includes: a robotic arm, an adjuster, a first lifting device, and a second lifting device; wherein, a first wafer cassette is placed in the first lifting device, and a second wafer cassette is placed in the second lifting device. Both the first and second wafer cassettes are provided with multiple wafer slots for holding wafers. Figure 7 As shown, the device includes: an operation execution module 71, a wafer transfer module 72, and a loop execution module 73; the functions of each module are as follows:

[0089] The operation execution module 71 is used to perform a first operation and a second operation on the first lifting device and the second lifting device respectively if the current loop number is not greater than the preset marathon loop number; wherein, the first operation includes closing the door of the first lifting device, scanning multiple slots in the first wafer cassette to generate first wafer information, and performing vacuuming on the first lifting device; the second operation includes closing the door of the second lifting device, scanning multiple slots in the second wafer cassette to generate second wafer information, and performing vacuuming on the second lifting device;

[0090] The wafer transfer module 72 is used to control the robot to transfer the wafer in the first lifting device to the second lifting device if the current cycle number is odd; or, if the current cycle number is even, to control the robot to transfer the wafer in the second lifting device to the first lifting device.

[0091] The loop execution module 73 is used to increment the current loop number by 1 and return to the operation execution module to repeat the execution until the current loop number is greater than the preset marathon loop number.

[0092] The marathon testing device for semiconductor process equipment provided in this embodiment of the invention does not rely on a host computer and host computer software interface, and can realize the testing of semiconductor process equipment through a lower-level machine; at the same time, it enriches the test content, improves the testing efficiency and test quality of semiconductor process equipment, and ensures the stable operation of semiconductor process equipment.

[0093] Preferably, the device further includes: acquiring first absolute position information corresponding to the first lifting device and second absolute position information corresponding to the second lifting device; wherein the first absolute position information is used to characterize the height of the wafer slot in the first wafer cassette from the ground, and the second absolute position information is used to characterize the height of the wafer slot in the second wafer cassette from the ground; controlling the height position of the robot arm to remain unchanged; determining the stability information of the first lifting device based on the first absolute position information and the corresponding first wafer information; and determining the stability information of the second lifting device based on the second absolute position information and the corresponding second wafer information; wherein the first wafer information is used to characterize the position information of the wafer in the first wafer cassette in the wafer slot, and the second wafer information is used to characterize the position information of the wafer in the second wafer cassette in the wafer slot.

[0094] Preferably, the wafer transfer module 72 is further configured to: control the robot arm to rotate to the position of the first lifting device, and control the first valve between the first lifting device and the lower-level machine to open; control the robot arm to take out the first target wafer from the current wafer slot in the first wafer cassette, and place the first target wafer in the adjuster so that the adjuster calibrates the first target wafer, and when the calibration is completed, control the robot arm to take out the first target wafer from the adjuster and control the first valve to close; and control the robot arm to rotate to the position of the second lifting device, and control the second valve between the second lifting device and the lower-level machine to open, control the robot arm to place the first target wafer in the slot corresponding to the current wafer slot in the second wafer cassette, and control the second valve to close; increment the current wafer slot by 1, and repeat the above transfer process until all wafers in the first wafer cassette are transferred to the second lifting device.

[0095] Preferably, the wafer transfer module 72 is further configured to: control the robot arm to rotate to the position of the second lifting device and control the second gate valve to open; control the robot arm to remove the second target wafer from the current wafer pick-up slot in the second wafer cassette and place the second target wafer in the adjuster so that the adjuster calibrates the second target wafer, and when the calibration is completed, control the robot arm to remove the second target wafer from the adjuster and control the second gate valve to close; and control the robot arm to rotate to the position of the first lifting device and control the first gate valve to open, control the robot arm to place the second target wafer in the slot corresponding to the current wafer pick-up slot in the first wafer cassette and control the first gate valve to close; increment the current wafer pick-up slot by 1, and repeat the above transfer process until all wafers in the second wafer cassette are transferred to the first lifting device.

[0096] Preferably, the device further includes: if the current number of tablet slots is greater than the preset number of tablet slots, controlling the first valve and the second valve to close; and after a delay, controlling the first lifting device and the second lifting device to open their doors respectively after being inflated.

[0097] Preferably, the operation execution module 71 is further configured to: perform a first operation on the first lifting device, and after a preset delay, perform a second operation on the second lifting device; or, perform a second operation on the second lifting device, and after a preset delay, perform a first operation on the first lifting device.

[0098] Preferably, the device further includes: generating a preset number of marathon cycles in response to a user's input of the number of cycles.

[0099] Preferably, the display interface of the lower-level machine is also equipped with a one-button button, and the device further includes: controlling the semiconductor process equipment to perform a marathon test in response to pressing the one-button button.

[0100] The marathon testing apparatus for semiconductor process equipment provided in this embodiment of the invention has the same technical features as the marathon testing method for semiconductor process equipment provided in the above embodiments, so it can also solve the same technical problems and achieve the same technical effects.

[0101] This invention also provides a lower-level machine, including a processor and a memory. The memory stores machine-executable instructions that can be executed by the processor. The processor executes the machine-executable instructions to implement the marathon testing method for the semiconductor process equipment described above.

[0102] See Figure 8 As shown, the lower-level machine includes a processor 80 and a memory 81. The memory 81 stores machine-executable instructions that can be executed by the processor 80. The processor 80 executes the machine-executable instructions to implement the marathon test method for the semiconductor process equipment described above.

[0103] Furthermore, Figure 8 The lower-level machine shown also includes a bus 82 and a communication interface 83. The processor 80, the communication interface 83 and the memory 81 are connected through the bus 82.

[0104] The memory 81 may include high-speed random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Communication between this system network element and at least one other network element is achieved through at least one communication interface 83 (which can be wired or wireless), such as the Internet, wide area network, local area network, or metropolitan area network. The bus 82 may be an ISA (Industrial Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Enhanced Industry Standard Architecture) bus. These buses can be categorized as address buses, data buses, and control buses. For ease of representation, Figure 8 The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.

[0105] The processor 80 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of the processor 80 or by instructions in software form. The processor 80 can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory 81. The processor 80 reads the information in memory 81 and, in conjunction with its hardware, completes the steps of the method described in the foregoing embodiment.

[0106] This embodiment also provides a machine-readable storage medium storing machine-executable instructions. When the machine-executable instructions are invoked and executed by a processor, the machine-executable instructions cause the processor to implement the marathon test method for the semiconductor process equipment described above.

[0107] The computer program product of the marathon testing method, apparatus and system for semiconductor process equipment provided in the embodiments of the present invention includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the preceding method embodiments. For specific implementation, please refer to the method embodiments, which will not be repeated here.

[0108] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and apparatus described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0109] Furthermore, in the description of the embodiments of the present invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the present invention based on the specific circumstances.

[0110] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0111] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0112] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A marathon test method for semiconductor process equipment, characterized in that, A lower-level machine is applied to communicate with the semiconductor process equipment, the semiconductor process equipment including: a robotic arm, an adjuster, a first lifting device, and a second lifting device; wherein, a first wafer cassette is placed in the first lifting device, and a second wafer cassette is placed in the second lifting device, both the first and second wafer cassettes being provided with multiple wafer slots for holding wafers; the method includes: Step S102: If the current number of cycles is not greater than the preset marathon cycle number, perform a first operation and a second operation on the first lifting device and the second lifting device respectively; wherein, the first operation includes closing the door of the first lifting device, scanning the multiple wafer slots in the first wafer cassette to generate first wafer information, and performing a vacuum process on the first lifting device; the second operation includes closing the door of the second lifting device, scanning the multiple wafer slots in the second wafer cassette to generate second wafer information, and performing a vacuum process on the second lifting device; Step S104: If the current cycle number is odd, control the robot to transfer the wafer in the first lifting device to the second lifting device; or, if the current cycle number is even, control the robot to transfer the wafer in the second lifting device to the first lifting device. Step S106: Increment the current loop number by 1, and return to step S102 to repeat until the current loop number is greater than the preset marathon loop number.

2. The method according to claim 1, characterized in that, The method further includes: Obtain first absolute position information corresponding to the first lifting device and second absolute position information corresponding to the second lifting device; wherein, the first absolute position information is used to characterize the height of the tray slot above the ground in the first tray, and the second absolute position information is used to characterize the height of the tray slot above the ground in the second tray; The robot arm is kept at a constant height. The stability information of the first lifting device is determined based on the first absolute position information and the corresponding first wafer information. The stability information of the second lifting device is determined based on the second absolute position information and the corresponding second wafer information. The first wafer information is used to characterize the position information of the wafer in the first wafer cassette in the wafer slot, and the second wafer information is used to characterize the position information of the wafer in the second wafer cassette in the wafer slot.

3. The method according to claim 1, characterized in that, The step of controlling the robotic arm to transfer the wafer from the first lifting device to the second lifting device includes: The robot arm is controlled to rotate to the position of the first lifting device, and the first valve between the first lifting device and the lower-level machine is opened; the robot arm is controlled to take out the first target wafer from the current wafer pick-up slot in the first wafer cassette, and place the first target wafer in the adjuster so that the adjuster calibrates the first target wafer, and when the calibration is completed, the robot arm is controlled to take out the first target wafer from the adjuster, and the first valve is controlled to close; and the robot arm is controlled to rotate to the position of the second lifting device, and the second valve between the second lifting device and the lower-level machine is opened, the robot arm is controlled to place the first target wafer in the slot corresponding to the current wafer pick-up slot in the second wafer cassette, and the second valve is controlled to close; the current wafer pick-up slot is incremented by 1, and the above transfer process is repeated until all wafers in the first wafer cassette are transferred to the second lifting device.

4. The method according to claim 3, characterized in that, The step of controlling the robotic arm to transfer the wafer from the second lifting device to the first lifting device includes: The robot arm is controlled to rotate to the position of the second lifting device, and the second gate valve is controlled to open; the robot arm is controlled to remove the second target wafer from the current wafer pick-up slot in the second wafer cassette, and place the second target wafer in the adjuster so that the adjuster calibrates the second target wafer, and when the calibration is completed, the robot arm is controlled to remove the second target wafer from the adjuster, and the second gate valve is controlled to close; the robot arm is controlled to rotate to the position of the first lifting device, and the first gate valve is controlled to open, and the robot arm is controlled to place the second target wafer in the slot corresponding to the current wafer pick-up slot in the first wafer cassette, and the first gate valve is controlled to close; the current wafer pick-up slot is incremented by 1, and the above transfer process is repeated until all wafers in the second wafer cassette are transferred to the first lifting device.

5. The method according to claim 3 or 4, characterized in that, The method further includes: If the current number of film slots is greater than the preset number of film slots, control the first valve and the second valve to close; and after a delay, control the first lifting device and the second lifting device to be inflated and then open the doors of the first lifting device and the second lifting device respectively.

6. The method according to claim 1, characterized in that, The step of performing the first operation and the second operation on the first lifting device and the second lifting device respectively further includes: Perform the first operation on the first lifting device, and after a preset delay, perform the second operation on the second lifting device; or, The second operation is performed on the second lifting device, and after a preset delay, the first operation is performed on the first lifting device.

7. The method according to claim 1, characterized in that, The method further includes: In response to the user's input of the number of cycles, the preset marathon cycle number is generated.

8. The method according to claim 1, characterized in that, The lower-level machine's display interface is also equipped with a one-button operation, and the method further includes: In response to a press of the one-touch button, the semiconductor process equipment is controlled to perform the marathon test.

9. A marathon testing apparatus for semiconductor process equipment, characterized in that, A lower-level machine is applied to communicate with the semiconductor process equipment, which includes: a robotic arm, an adjuster, a first lifting device, and a second lifting device; wherein, a first wafer cassette is placed in the first lifting device, and a second wafer cassette is placed in the second lifting device; both the first and second wafer cassettes are provided with multiple wafer slots for holding wafers; the device includes: An operation execution module is configured to perform a first operation and a second operation on the first lifting device and the second lifting device respectively if the current loop number is not greater than a preset marathon loop number; wherein, the first operation includes closing the door of the first lifting device, scanning the plurality of wafer slots in the first wafer cassette to generate first wafer information, and performing a vacuum process on the first lifting device; the second operation includes closing the door of the second lifting device, scanning the plurality of wafer slots in the second wafer cassette to generate second wafer information, and performing a vacuum process on the second lifting device; A wafer transfer module is used to control the robot to transfer the wafer in the first lifting device to the second lifting device if the current cycle number is odd; or, if the current cycle number is even, control the robot to transfer the wafer in the second lifting device to the first lifting device. The loop execution module is used to increment the current loop number by 1 and return to the operation execution module to repeat the execution until the current loop number is greater than the preset marathon loop number.

10. A marathon testing system for semiconductor process equipment, characterized in that, The system includes: a lower-level machine, and semiconductor process equipment communicatively connected to the lower-level machine; wherein, the semiconductor process equipment includes: a robot arm, an adjuster, a first lifting device, and a second lifting device; The lower-level machine includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the marathon test method for semiconductor process equipment as described in any one of claims 1-8.

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