Preparation method of air bridge in quantum chip and superconducting quantum chip

Abstract

The present invention discloses a preparation method and a chip of an air bridge in a quantum chip, which are applied to the technical field of quantum chips. The method includes setting a first superconducting layer on the surface of a substrate; etching the first superconducting layer to form the topography of a coplanar waveguide structure; the coplanar waveguide structure includes separated ends; setting a second superconducting layer on the surface of the sample after forming the coplanar waveguide structure; the second superconducting layer covers the coplanar waveguide structure and fills the gaps of the coplanar waveguide structure, and the corrosion resistance of the second superconducting layer is lower than that of the first superconducting layer; based on the second superconducting layer, setting an air bridge connected to the first superconducting layer; the corrosion resistance of the air bridge is higher than that of the second superconducting layer; removing the second superconducting layer by a selective etching solution. Using the second superconducting layer as a sacrificial layer to fabricate the air bridge, even if there is residue after releasing the sacrificial layer, it will not have a great impact on the circuit performance, thereby reducing the impact on the circuit performance.

Description

Technical Field

[0001] The present invention relates to the technical field of quantum chip technology, and particularly to a method for preparing an air bridge in a quantum chip and a superconducting quantum chip. Background Art

[0002] The development of quantum computing provides infinite possibilities for realizing human exploration of nature, research on material drug synthesis, and big data analysis, and is also regarded as the next technological revolution. The superconducting quantum scheme is one of the most likely schemes to achieve fault-tolerant computing among many quantum schemes at present, and it is expected to be commercialized in the middle of this century. The superconducting quantum chip utilizes the nonlinear LC circuit characteristics of Josephson junctions and uses microwave measurement and control technology for measurement and control, and can realize the regulation and detection of two energy levels. CPW (coplanar waveguide structure) is an important structure and component in the quantum chip. However, due to the splitting of the ground planes on both sides of its signal transmission line, there will be obvious parasitics and crosstalk during microwave transmission. Therefore, most of them adopt the superconducting air bridge scheme to solve this problem.

[0003] At present, the superconducting quantum chip circuit mainly uses Al as the substrate, and various circuit devices are prepared on this basis. However, with the further research, it is found that the superconducting circuit prepared by Ta film can greatly improve the chip performance. Especially in terms of coherence time, the Ta film circuit has improved by about one order of magnitude compared with the Al film circuit. Moreover, the properties of Ta film are more stable than those of Al, acid and alkali resistant, and its oxide is also more stable and pure. Therefore, in recent years, people have begun to widely use Ta as the substrate material. However, the current material of the air bridge is mainly Al, using photoresist thermal reflux or silicon oxide as the sacrificial layer as the bridge support, and then preparing the bridge piers and bridge decks and releasing the sacrificial layer.

[0004] However, in the current air bridge preparation scheme, non-superconducting materials such as photoresist or oxide are used as the sacrificial layer. During the process of releasing the sacrificial layer, if there is residue, it will have obvious interference to the entire superconducting circuit and reduce the device performance. Therefore, how to reduce the risk of the influence of the sacrificial layer residue on the circuit performance is an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of the present invention is to provide a method for preparing an air bridge in a quantum chip, which can reduce the influence of the sacrificial layer residue on the circuit performance; another purpose of the present invention is to provide a superconducting quantum chip, which can reduce the influence of the sacrificial layer residue on the circuit performance.

[0006] To solve the above technical problems, the present invention provides a method for preparing an air bridge in a quantum chip, including:

[0007] Setting a first superconducting layer on the surface of the substrate;

[0008] Etch the first superconducting layer to form the topography of a coplanar waveguide structure; the coplanar waveguide structure includes separated ends;

[0009] Set a second superconducting layer on the sample surface after forming the coplanar waveguide structure; the second superconducting layer covers the coplanar waveguide structure and fills the gap of the coplanar waveguide structure, and the corrosion resistance of the second superconducting layer is lower than that of the first superconducting layer;

[0010] Based on the second superconducting layer, set an air bridge connected to the first superconducting layer; the air bridge uses the second superconducting layer as a bridge support and connects the ends of the coplanar waveguide structure; the corrosion resistance of the air bridge is higher than that of the second superconducting layer;

[0011] Remove the second superconducting layer by a selective etching solution, and retain the coplanar waveguide structure and the air bridge.

[0012] Optionally, the setting of the air bridge connected to the first superconducting layer based on the second superconducting layer includes:

[0013] Etch a preset position corresponding to the air bridge pier in the second superconducting layer until the first superconducting layer is exposed;

[0014] On the sample surface formed after etching the second superconducting layer, set an air bridge connected to the first superconducting layer at the preset position; the selective etching solution can etch the second superconducting layer and cannot etch the first superconducting layer and the air bridge.

[0015] Optionally, the setting of the air bridge connected to the first superconducting layer at the preset position on the sample surface formed after etching the second superconducting layer includes:

[0016] Deposit a third superconducting layer on the sample surface after the first superconducting layer at the preset position is exposed; the thickness of the third superconducting layer is greater than that of the second superconducting layer, and the corrosion resistance of the third superconducting layer is higher than that of the second superconducting layer;

[0017] Polish the third superconducting layer;

[0018] After polishing the third superconducting layer, etch the third superconducting layer to form the air bridge.

[0019] Optionally, the etching of the third superconducting layer to form the air bridge after polishing the third superconducting layer includes:

[0020] After polishing the third superconducting layer, remove the third superconducting layer outside the area corresponding to the air bridge by a photolithography etching process to form the air bridge.

[0021] Optionally, on the surface of the sample formed after etching the second superconducting layer, the air bridge disposed at the preset position and connected to the first superconducting layer includes:

[0022] A mask is disposed in the region of the second superconducting layer corresponding to the outside of the air bridge;

[0023] A third superconducting layer is disposed on the surface of the sample provided with the mask; the thickness of the third superconducting layer is greater than the thickness of the second superconducting layer;

[0024] The mask is peeled off to form the air bridge.

[0025] Optionally, the mask is a mask formed based on a photolithography process.

[0026] Optionally, the material of the air bridge is the same as the material of the first superconducting layer.

[0027] Optionally, the material of the first superconducting layer and the air bridge is tantalum, and the material of the second superconducting layer is aluminum.

[0028] Optionally, the selective etching solution is a piranha solution.

[0029] The present invention also provides a superconducting quantum chip, including an air bridge prepared by the method for preparing an air bridge in the quantum chip described in any one of the above.

[0030] A method for preparing an air bridge in a quantum chip provided by the present invention includes: disposing a first superconducting layer on the surface of a substrate; etching the first superconducting layer to form a topography of a coplanar waveguide structure; the coplanar waveguide structure includes mutually separated ends; disposing a second superconducting layer on the surface of the sample after forming the coplanar waveguide structure; the second superconducting layer covers the coplanar waveguide structure and fills the gaps of the coplanar waveguide structure, and the corrosion resistance of the second superconducting layer is lower than that of the first superconducting layer; based on the second superconducting layer, an air bridge connected to the first superconducting layer is disposed; the air bridge uses the second superconducting layer as a bridge support to connect the ends of the coplanar waveguide structure; the corrosion resistance of the air bridge is higher than that of the second superconducting layer; the second superconducting layer is removed by a selective etching solution, and the coplanar waveguide structure and the air bridge are retained.

[0031] Based on the different corrosion resistances of the first superconducting layer and the second superconducting layer, the second superconducting layer is used as a sacrificial layer to fabricate the air bridge. Even if there is residue after releasing the sacrificial layer, since the second superconducting layer itself is still a superconducting material, it will not have a great impact on the circuit performance, thereby reducing the impact of the sacrificial layer residue on the circuit performance.

[0032] The present invention also provides a superconducting quantum chip, which also has the above beneficial effects and will not be elaborated here. Description of the Drawings

[0033] To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0034] Figures 1 to 7 It is a process flow diagram of a method for preparing an air bridge in a quantum chip provided by an embodiment of the present invention;

[0035] Figures 8 to 10 It is a process flow diagram of the first specific method for preparing an air bridge in a quantum chip provided by an embodiment of the present invention;

[0036] Figures 11 to 13 It is a process flow diagram of the second specific method for preparing an air bridge in a quantum chip provided by an embodiment of the present invention.

[0037] In the figure: 1. Substrate, 2. First superconducting layer, 21. Coplanar waveguide structure, 3. Second superconducting layer, 4. Air bridge, 41. Third superconducting layer, 5. Mask. Detailed implementation manner

[0038] The core of the present invention is to provide a method for preparing an air bridge in a quantum chip. In the prior art, non-superconducting materials such as photoresist or oxide are used as the sacrificial layer. During the process of releasing the sacrificial layer, if there is residue, it will significantly interfere with the entire superconducting circuit and reduce the device performance.

[0039] A method for preparing an air bridge in a quantum chip provided by the present invention includes: disposing a first superconducting layer on the surface of the substrate; etching the first superconducting layer to form the topography of a coplanar waveguide structure; the coplanar waveguide structure includes separated ends; disposing a second superconducting layer on the surface of the sample after forming the coplanar waveguide structure; the second superconducting layer covers the coplanar waveguide structure and fills the gaps of the coplanar waveguide structure, and the corrosion resistance of the second superconducting layer is lower than that of the first superconducting layer; based on the second superconducting layer, an air bridge connected to the first superconducting layer is disposed; the air bridge uses the second superconducting layer as a bridge support to connect the ends of the coplanar waveguide structure; the corrosion resistance of the air bridge is higher than that of the second superconducting layer; the second superconducting layer is removed by a selective etching solution, and the coplanar waveguide structure and the air bridge are retained.

[0040] Based on the different corrosion resistances of the first superconducting layer and the second superconducting layer, the second superconducting layer is used as a sacrificial layer to fabricate the air bridge. Even if there is residue after releasing the sacrificial layer, since the second superconducting layer itself is still a superconducting material, it will not have a great impact on the circuit performance, thus reducing the impact of the sacrificial layer residue on the circuit performance.

[0041] To enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0042] Please refer to Figures 1 to 7 , Figures 1 to 7 , which is a process flow diagram of a method for fabricating an air bridge in a quantum chip provided by an embodiment of the present invention.

[0043] See Figure 1 , in the embodiment of the present invention, the method for fabricating an air bridge in a quantum chip includes:

[0044] S101: Set a first superconducting layer on the surface of the substrate.

[0045] See Figure 2 , the above-mentioned substrate 1 can be a high-resistance silicon substrate 1 or a sapphire substrate 1, which is a supporting structure of the superconducting quantum chip. In this step, a first superconducting layer 2 will be set on the surface of the substrate 1 first. The material of the first superconducting layer 2 usually needs to have high corrosion resistance so that the first superconducting layer 2 can be retained when the sacrificial layer is released subsequently. Specifically, in this step, the first superconducting layer 2 can be grown on the surface of the substrate 1 based on the growth process.

[0046] S102: Etch the first superconducting layer to form the morphology of a coplanar waveguide structure.

[0047] See Figure 3 , in the embodiment of the present invention, the coplanar waveguide structure 21 includes separated ends. In this step, the coplanar waveguide structure 21 needs to be set based on the first superconducting layer 2. Specifically, in this step, the first superconducting layer 2 can be etched based on the etching process, such as the photolithography etching process, to form the morphology of the coplanar waveguide structure 21 and obtain the coplanar waveguide structure 21 (CPW).

[0048] When the photolithography etching process is selected for etching, this step specifically includes: on the above-mentioned substrate 1, using photolithography to define the structural morphology of the CPW; based on the defined CPW structural morphology, using the etching process for etching to complete the pattern transfer and obtain the CPW structure of the first superconducting layer 2.

[0049] S103: Set a second superconducting layer on the surface of the sample after the coplanar waveguide structure is formed.

[0050] See Figure 4, in an embodiment of the present invention, the second superconducting layer 3 covers the coplanar waveguide structure 21 and fills the gap of the coplanar waveguide structure 21, and the corrosion resistance of the second superconducting layer 3 is lower than that of the first superconducting layer 2.

[0051] In this step, it is necessary to set the second superconducting layer 3 covering the coplanar waveguide structure 21. This second superconducting layer 3 not only needs to cover the surface of the coplanar waveguide structure 21, but also needs to fill the gap of the coplanar waveguide structure 21 to be used as a bridge support for manufacturing the air bridge 4 in subsequent steps. In an embodiment of the present invention, it is necessary to ensure that the corrosion resistance of the second superconducting layer 3 is lower than that of the first superconducting layer 2, that is, based on their corrosion resistance, the first superconducting layer 2 and the second superconducting layer 3 can achieve selective etching, and the second superconducting layer 3 is removed and the first superconducting layer 2 is retained during release.

[0052] Specifically, this step can grow the second superconducting layer 3 on the sample surface based on the growth process. Since the first superconducting layer 2 in the sample is not a flat surface at this time, polishing is usually required after setting the second superconducting layer 3. Specifically, after setting the second superconducting layer 3, chemical mechanical polishing (CMP) can be performed on the sample surface to thin and polish it to make the surface of the second superconducting layer 3 flat.

[0053] S104: Set an air bridge connected to the first superconducting layer based on the second superconducting layer.

[0054] In an embodiment of the present invention, the air bridge 4 uses the second superconducting layer 3 as a bridge support and connects the ends of the coplanar waveguide structure 21: the corrosion resistance of the air bridge 4 is higher than that of the second superconducting layer 3.

[0055] In this step, the second superconducting layer 3 will be used as a sacrificial layer to be made into a bridge support of the air bridge 4 to manufacture the air bridge 4 in this way. The specific preparation process of the air bridge 4 will be introduced in detail in the following embodiments of the invention and will not be elaborated here. In an embodiment of the present invention, the corrosion resistance of the material for making the air bridge 4 also needs to be higher than that of the second superconducting layer 3, that is, based on their corrosion resistance, the air bridge 4 and the second superconducting layer 3 can also achieve selective etching, and the second superconducting layer 3 is removed and the first superconducting layer 2 is retained during release. That is, in an embodiment of the present invention, the selective etching solution can etch the second superconducting layer and cannot etch the first superconducting layer and the air bridge. It should be emphasized that in an embodiment of the present invention, using a superconducting metal material as a sacrificial layer can effectively reduce the risk of the influence of residues on the circuit performance.

[0056] Specifically, in the embodiments of the present invention, the material of the air bridge 4 is the same as that of the first superconducting layer 2. At this time, not only can it ensure that the air bridge 4 can be retained when the second superconducting layer 3 is released, but setting the material of the air bridge 4 and the material of the coplanar waveguide structure 21 to a superconducting material can avoid the joint stress problem between dissimilar metals. Generally, the materials of the first superconducting layer 2 and the air bridge 4 are tantalum, and the material of the second superconducting layer 3 is aluminum. Since the corrosion resistances of tantalum and aluminum are quite different, selecting the above materials can achieve the selective etching of the first superconducting layer 2 and the second superconducting layer 3. The material of the air bridge 4 and the first superconducting layer 2 as the substrate material are both superconducting metal Ta, which can avoid the joint stress problem between dissimilar metals.

[0057] See Figure 5 and Figure 6 , specifically, this step may specifically include: etching a preset position corresponding to the pier of the air bridge 4 in the second superconducting layer 3 until the first superconducting layer 2 is exposed; on the sample surface formed after etching the second superconducting layer 3, an air bridge 4 connected to the first superconducting layer 2 at the preset position is provided.

[0058] Since the subsequent air bridge 4 needs to be connected to the coplanar waveguide structure, in this step, it is necessary to etch the position where the pier of the air bridge 4 needs to be provided to expose the first superconducting layer 2 at this preset position.

[0059] This step may specifically etch the above preset position based on a photolithography process, that is, this step may specifically include: spin-coating and photolithography on the above second superconducting layer 3 to define the pier area; etching the second superconducting layer 3 in the pier area until reaching the underlying first superconducting layer 2, and then cleaning and removing the photoresist.

[0060] After that, an air bridge 4 connected to the first superconducting layer 2 will be provided through the above preset position, and the specific content of this part will be introduced in detail in the following embodiments of the invention.

[0061] S105: Remove the second superconducting layer through a selective etching solution, and retain the coplanar waveguide structure and the air bridge.

[0062] See Figure 7 , in this step, specifically, the second superconducting layer 3 will be etched through a selective etching solution to remove the second superconducting layer 3 as a sacrificial layer, and retain the coplanar waveguide structure 21 and the air bridge 4, thus completing the preparation of the air bridge 4 and the coplanar waveguide structure 21.

[0063] Specifically, when aluminum is selected as the second superconducting layer 3 and tantalum is selected as the first superconducting layer 2, the selective etching solution can be piranha solution. The piranha solution can achieve selective etching of tantalum and aluminum, specifically removing the metal aluminum to realize the preparation of the above-mentioned air bridge 4. The specific components of the piranha solution can refer to the prior art and will not be elaborated here. At this time, this step specifically includes: cleaning the above sample with piranha solution to release the second superconducting layer 3 as the sacrificial layer and simultaneously removing the organic residue, and finally cleaning and drying with clean water.

[0064] In the embodiment of the present invention, the material of the second superconducting layer 3 as the sacrificial layer can specifically be other superconducting metals or metal compounds such as Al, Sn, TiN, In, Nb, etc. The release of the sacrificial layer can use piranha solution, acidic solution or alkaline solution. For example, conventional dilute hydrochloric acid, dilute sulfuric acid, developer, etc. can all be used, mainly to meet the selective etching conditions.

[0065] A method for preparing an air bridge 4 in a quantum chip provided by an embodiment of the present invention, based on the different corrosion resistances of the first superconducting layer 2 and the second superconducting layer 3, uses the second superconducting layer 3 as the sacrificial layer to fabricate the air bridge 4. Even if there is still residue after releasing the sacrificial layer, because the second superconducting layer 3 itself is still a superconducting material, it will not have a great impact on the circuit performance, thereby reducing the impact of the sacrificial layer residue on the circuit performance.

[0066] The specific content of a method for preparing an air bridge in a quantum chip provided by the present invention will be introduced in detail in the following embodiments of the invention.

[0067] Please refer to Figures 8 to 10 , Figures 8 to 10 which is the process flow chart of the first specific method for preparing an air bridge in a quantum chip provided by an embodiment of the present invention.

[0068] See Figure 8 , in the embodiment of the present invention, the method for preparing an air bridge in a quantum chip includes:

[0069] S201: Set the first superconducting layer on the substrate surface.

[0070] S202: Etch the first superconducting layer to form the morphology of the coplanar waveguide structure.

[0071] S203: Set the second superconducting layer on the sample surface after forming the coplanar waveguide structure.

[0072] S204: Etch the preset position corresponding to the air bridge pier in the second superconducting layer until the first superconducting layer is exposed.

[0073] The above S201 to S204 are described in detail in S101 to S103 in the above embodiments of the invention. For the detailed content, please refer to the above embodiments of the invention and will not be elaborated here.

[0074] S205: Deposit a third superconducting layer on the sample surface after exposing the first superconducting layer at a preset position.

[0075] See Figure 9 , in the embodiment of the present invention, the thickness of the third superconducting layer 41 is greater than the thickness of the second superconducting layer 3, and the corrosion resistance of the third superconducting layer 41 is higher than that of the second superconducting layer 3.

[0076] The above third superconducting layer 41 is the material for forming the air bridge 4. The corrosion resistance of the third superconducting layer 41 needs to be higher than that of the second superconducting layer 3 to achieve selective etching. At the same time, the thickness of the third superconducting layer 41 needs to be greater than the thickness of the second superconducting layer 3, that is, the third superconducting layer 41 needs to fill the groove formed when etching the second superconducting layer 3 to the first superconducting layer 2, so as to form an integrated air bridge 4. The piers and the bridge deck of the air bridge 4 are integrally formed, without damaging the substrate 1, without weak links in the step connection. At the same time, the piers are in vertical contact with the first superconducting layer 2 and the bridge deck, with high strength.

[0077] Before this step, it is usually necessary to first remove the oxide layer formed on the sample surface, that is, usually before this step, it includes: performing ionmilling cleaning on the sample surface after etching the second superconducting layer 3 to remove the metal surface oxide layer, and then in this step, a layer of the above third superconducting layer 41 can be grown based on the growth process. In order to reduce the stress at the junction between the air bridge 4 and the coplanar waveguide structure 21, the material of the third superconducting layer 41 can be the same as the material of the first superconducting layer 2.

[0078] S206: Polish the third superconducting layer.

[0079] See Figure 10 , in this step, it is necessary to polish the third superconducting layer to form a flat surface. This step usually specifically includes: performing CMP (chemical mechanical polishing) thinning and polishing treatment on the above sample to make the surface of the third superconducting layer 41 flat.

[0080] S207: After polishing the third superconducting layer, etch the third superconducting layer to form an air bridge.

[0081] In this step, the third superconducting layer 41 will be etched to remove the other third superconducting layer 41 that does not belong to the air bridge 4 to form an integrated air bridge 4. At this time, the air bridge 4 includes an integrated pier and a bridge deck. At this time, the second superconducting layer 3 located under the bridge deck serves as a bridge support.

[0082] This step specifically includes: etching the above sample to remove the redundant third superconducting layer 41, retaining the bridge deck area, and then cleaning and removing the photoresist. The above etching process can specifically be a photolithography etching process. Therefore, this step can specifically include: after polishing the third superconducting layer 41, removing the third superconducting layer 41 outside the area corresponding to the air bridge 4 in the third superconducting layer 41 through the photolithography etching process to form the air bridge 4.

[0083] S208: Removing the second superconducting layer through a selective etching solution, and retaining the coplanar waveguide structure and the air bridge.

[0084] This step is basically the same as S105 in the above-mentioned invention embodiment. For detailed content, please refer to the above-mentioned invention embodiment and will not be elaborated here.

[0085] A method for preparing an air bridge in a quantum chip provided by an embodiment of the present invention, based on the different corrosion resistances of the first superconducting layer 2 and the second superconducting layer 3, uses the second superconducting layer 3 as a sacrificial layer to fabricate the air bridge 4. Even if there is residue after releasing the sacrificial layer, since the second superconducting layer 3 itself is still a superconducting material, it will not have a great impact on the circuit performance, thereby reducing the impact of the sacrificial layer residue on the circuit performance.

[0086] Specific content regarding the method for preparing an air bridge in a quantum chip provided by the present invention will be introduced in detail in the following invention embodiments.

[0087] Please refer to Figures 11 to 13 , Figures 11 to 13 which is the process flow chart of the second specific method for preparing an air bridge in a quantum chip provided by an embodiment of the present invention.

[0088] Refer to Figure 11 , in an embodiment of the present invention, the method for preparing an air bridge in a quantum chip includes:

[0089] S301: Setting a first superconducting layer on the substrate surface.

[0090] S302: Etching the first superconducting layer to form the morphology of the coplanar waveguide structure.

[0091] S303: Setting a second superconducting layer on the sample surface after forming the coplanar waveguide structure.

[0092] S304: Etching the preset position corresponding to the air bridge pier in the second superconducting layer until the first superconducting layer is exposed.

[0093] The above S301 to S304 are introduced in detail in S101 to S103 in the above-mentioned invention embodiment. For detailed content, please refer to the above-mentioned invention embodiment and will not be elaborated here.

[0094] S305: Set a mask in the area of the second superconducting layer corresponding to outside the air bridge.

[0095] See Figure 12 , in this step, a mask 5 will be set in the area of the second superconducting layer 3 corresponding to outside the air bridge 4 first, so as to strip and directly form the air bridge 4 based on the mask 5 in the subsequent steps. The above mask 5 can be a mask 5 formed based on the photolithography process, that is, this step can specifically include: spin-coating and photolithography are performed on the surface of the above sample to define the bridge deck pier area, that is, the area where the air bridge 4 is located.

[0096] S306: Set a third superconducting layer on the surface of the sample with the mask.

[0097] See Figure 13 , in the embodiment of the present invention, the thickness of the third superconducting layer 41 is greater than the thickness of the second superconducting layer 3, but the thickness of the third superconducting layer 41 generally does not exceed the sum of the thicknesses of the above mask 5 and the second superconducting layer 3, that is, the third superconducting layer 41 generally does not protrude above the mask 5. At this time, the above third superconducting layer 41 will fill the preset positions of the corresponding piers and form a bridge deck on the surface of the second superconducting layer 3, forming an integrated air bridge 4.

[0098] Before this step, it is usually necessary to remove the existing oxide layer first. Therefore, this step generally includes: performing ion milling cleaning on the above sample to remove the metal surface oxide layer, and then growing a layer of the third superconducting layer 41.

[0099] S307: Strip the mask to form an air bridge.

[0100] When the above mask 5 is a mask 5 formed based on photoresist, this step can specifically include: immersing and cleaning the above sample in an 85 °C NMP (N-methylpyrrolidone) solution to remove the glue, realizing the stripping of the mask 5, and at the same time stripping and removing the third superconducting layer 41 on the glue, and then cleaning the sample.

[0101] S308: Remove the second superconducting layer with a selective etching solution, and retain the coplanar waveguide structure and the air bridge.

[0102] This step is basically the same as S105 in the above embodiment of the invention. For the detailed content, please refer to the above embodiment of the invention and will not be elaborated here.

[0103] A method for fabricating an air bridge in a quantum chip provided by an embodiment of the present invention, based on the different corrosion resistances of the first superconducting layer 2 and the second superconducting layer 3, uses the second superconducting layer 3 as a sacrificial layer to fabricate the air bridge 4. Even if there is still residue after releasing the sacrificial layer, since the second superconducting layer 3 itself is still a superconducting material and will not have a great impact on the circuit performance, the impact of the sacrificial layer residue on the circuit performance can be reduced. The method for fabricating an air bridge in a quantum chip provided by this application is compatible with existing CMOS platform technologies and can achieve large-scale industrial fabrication of large sizes.

[0104] The present invention also provides a superconducting quantum chip, which is specifically a superconducting quantum chip fabricated by the method for fabricating an air bridge in a quantum chip provided by any one of the above-mentioned invention embodiments.

[0105] Since the method for fabricating an air bridge in a quantum chip provided by the above-mentioned invention embodiment still has residue even after releasing the sacrificial layer, because the second superconducting layer 3 itself is still a superconducting material and will not have a great impact on the circuit performance, the impact of the sacrificial layer residue on the circuit performance can be reduced. Therefore, a superconducting quantum chip provided by an embodiment of the present invention has a high yield rate and high performance. The specific structure and fabrication process of a superconducting quantum chip provided by the present invention have been described in detail in the above-mentioned invention embodiments and will not be elaborated here.

[0106] In this specification, each embodiment is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0107] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in this article can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0108] The steps of the method or algorithm described in combination with the embodiments disclosed in this article can be directly implemented by hardware, a software module executed by a processor, or a combination of the two. The software module can be placed in a random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, register, hard disk, removable disk, CD-ROM, or any other form of storage medium well-known in the technical field.

[0109] Finally, it should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising said element.

[0110] The preparation method of an air bridge in a quantum chip and a superconducting quantum chip provided by the present invention have been introduced in detail above. Specific examples are used in this text to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A preparation method for an air bridge in a quantum chip, characterized in that, Comprising: A first superconducting layer is provided on the substrate surface; The first superconducting layer is etched to form the topography of a coplanar waveguide structure; The coplanar waveguide structure includes separated ends; A second superconducting layer is provided on the sample surface after forming the coplanar waveguide structure; the second superconducting layer covers the coplanar waveguide structure and fills the gap of the coplanar waveguide structure, and the corrosion resistance of the second superconducting layer is lower than that of the first superconducting layer; Based on the second superconducting layer, an air bridge connected to the first superconducting layer is provided; the air bridge uses the second superconducting layer as a bridge support and connects the ends of the coplanar waveguide structure: the corrosion resistance of the air bridge is higher than that of the second superconducting layer; The second superconducting layer is removed by a selective etching solution, and the coplanar waveguide structure and the air bridge are retained; The selective etching solution can etch the second superconducting layer and cannot etch the first superconducting layer and the air bridge.

2. The method according to claim 1, wherein The step of providing an air bridge connected to the first superconducting layer based on the second superconducting layer includes: Etch a preset position corresponding to the air bridge pier in the second superconducting layer until the first superconducting layer is exposed; On the sample surface formed after etching the second superconducting layer, an air bridge connected to the first superconducting layer at the preset position is provided.

3. The method according to claim 2, wherein The step of providing an air bridge connected to the first superconducting layer at the preset position on the sample surface formed after etching the second superconducting layer includes: Deposit a third superconducting layer on the sample surface after the first superconducting layer at the preset position is exposed; the thickness of the third superconducting layer is greater than that of the second superconducting layer, and the corrosion resistance of the third superconducting layer is higher than that of the second superconducting layer; Polish the third superconducting layer; After polishing the third superconducting layer, etch the third superconducting layer to form the air bridge.

4. The method according to claim 3, characterized in that The step of etching the third superconducting layer to form the air bridge after polishing the third superconducting layer includes: After polishing the third superconducting layer, remove the third superconducting layer outside the area corresponding to the air bridge region in the third superconducting layer by a photolithography etching process to form the air bridge.

5. The method according to claim 2, wherein The step of providing an air bridge connected to the first superconducting layer at the preset position on the sample surface formed after etching the second superconducting layer includes: A mask is provided in the area of the second superconducting layer outside the air bridge; Deposit a third superconducting layer on the sample surface provided with the mask; the thickness of the third superconducting layer is greater than that of the second superconducting layer; The mask is peeled off to form the air bridge.

6. The method according to claim 5, wherein The mask is a mask formed based on a photolithography process.

7. The method according to claim 1, wherein The material of the air bridge is the same as that of the first superconducting layer.

8. The method according to claim 7, wherein The materials of the first superconducting layer and the air bridge are tantalum, and the material of the second superconducting layer is aluminum.

9. The method according to claim 8, wherein The selective etching solution is a piranha solution.

10. A superconducting quantum chip, characterized in that, Comprising an air bridge prepared by the method for preparing an air bridge in the quantum chip according to any one of claims 1 to 9.

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