Embedded device and method for repairing ROM program

Abstract

The present invention discloses an embedded device and a method for repairing a ROM program, wherein, after an address comparison circuit captures that the address of a repaired program in a breakpoint interrupt register is identical to the address in a PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates and writes the address of the breakpoint interrupt program into the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU by using the address in the breakpoint interrupt register that triggered the control circuit as the current repaired program address, searching for a repair method that matches the current repaired program address from the corresponding relationship, and repairing the repaired program according to the repair method.

Description

Technical Field

[0001] The present invention relates to the field of ROM program repair, and in particular to an embedded device and a method for repairing a ROM program. Background Art

[0002] Read-only memory (ROM) is an essential component of embedded systems, storing the programs and data necessary for system operation. Once the ROM is written and completed, it cannot be rewritten; it can only be read. Because the programs (or code) in the ROM may contain errors, it is sometimes necessary to repair the ROM code already stored on the chip to avoid re-making a new ROM.

[0003] A conventional solution involves writing the addresses of all programs to be repaired into a comparator and then monitoring the address on the address bus. When the address on the address bus matches the comparator address, the CPU interrupts and then uses a fixed repair method to repair the program to be repaired. However, this solution is inefficient when there are many programs to be repaired. Summary of the Invention

[0004] Based on the above situation, the main purpose of the present invention is to provide an embedded device and a method for repairing a ROM program, so as to efficiently repair more programs to be repaired.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0006] A method for repairing a ROM program is applied to a system including a ROM, a CPU, an interrupt circuit, and a storage medium, wherein the CPU includes a PC register, the interrupt circuit includes a breakpoint interrupt register, an address comparison circuit, and a control circuit, and the storage medium stores a breakpoint interrupt program, a list of addresses of repaired programs, and a preset correspondence between each address of the repaired program and a repair method, wherein the correspondence includes multiple different repair methods. The method comprises the following steps: upon the address comparison circuit capturing that the address of the repaired program in the breakpoint interrupt register is identical to the address in the PC register, triggering the control circuit to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; upon receiving the interrupt, the CPU updates the PC register with the address of the breakpoint interrupt program to begin execution of the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU by using the address in the breakpoint interrupt register that triggered the control circuit as the current address of the repaired program, searching the correspondence for a repair method that matches the current address of the repaired program, and repairing the repaired program according to the repair method.

[0007] Preferably, the interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers; the correspondence relationship further records the correspondence between each repaired program address and a multi-branch flag, and the breakpoint interrupt program is executed by the CPU as follows: searching from the correspondence relationship whether the multi-branch flag corresponding to the current repaired program address is multi-branch; if so, searching from the repaired program address list for the first program group to which the current repaired program address belongs, allocating a first number of breakpoint interrupt registers to the first program group to which the current repaired program address belongs from the breakpoint interrupt register group so as to respectively write a plurality of repaired program addresses in the first program group, and Multiple second program groups are respectively assigned breakpoint interrupt registers to write the first repaired program address of the corresponding second program group; wherein, the first program group and the multiple second program groups are stored in the ROM, and the multiple second program groups are configured to jump from the first program group to the corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list includes the repaired program addresses in the first program group and the multiple second program groups, and the repair programs corresponding to the repaired programs in the first program group and the multiple second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers assigned to each second program group.

[0008] Preferably, the breakpoint interruption program includes the same number of breakpoint interruption subroutines as the repair method, and the address of each breakpoint interruption subroutine corresponds to the repair method to which it belongs; repairing the repaired program according to the repair method specifically includes: writing the address of the breakpoint interruption subroutine corresponding to the repair method into the PC register to start repairing the repaired program according to the repair method.

[0009] Preferably, the first program group includes a repaired random program, and among the first number of interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group that is configured to be executed after the current repaired program.

[0010] Preferably, the ROM also stores an initialization program, and the storage medium also stores a repair flag. After the system is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag is a repair; if so, reading the first repaired program address from the repaired program address list in the storage medium, and writing the first repaired program address into any breakpoint interrupt register; if not, continuing to execute the program in the ROM.

[0011] Preferably, the ROM, CPU, stack and interrupt circuit are integrated in a SOC chip, and the storage medium is located outside the SOC chip.

[0012] The present invention also provides an embedded device, comprising a ROM, a CPU, an interrupt circuit and a storage medium, wherein the CPU comprises a PC register, the interrupt circuit comprises a breakpoint interrupt register, an address comparison circuit and a control circuit, and the storage medium stores a breakpoint interrupt program, a list of addresses of repaired programs, and a pre-set correspondence between the address of each repaired program and a repair method, wherein the correspondence includes a plurality of different repair methods; the address comparison circuit is used to, after capturing that the address of the repaired program in the breakpoint interrupt register is identical to the address in the PC register, trigger the control circuit to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current address of the repaired program, and the repair method matching the current address of the repaired program is searched from the correspondence to repair the repair program according to the repair method.

[0013] Preferably, the interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers; the correspondence relationship further records the correspondence between each repaired program address and a multi-branch flag, and the breakpoint interrupt program is executed by the CPU as follows: searching from the correspondence relationship whether the multi-branch flag corresponding to the current repaired program address is multi-branch; if so, searching from the repaired program address list for the first program group to which the current repaired program address belongs, allocating a first number of breakpoint interrupt registers to the first program group to which the current repaired program address belongs from the breakpoint interrupt register group so as to respectively write a plurality of repaired program addresses in the first program group, and Multiple second program groups are respectively assigned breakpoint interrupt registers to write the first repaired program address of the corresponding second program group; wherein, the first program group and the multiple second program groups are stored in the ROM, and the multiple second program groups are configured to jump from the first program group to the corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list includes the repaired program addresses in the first program group and the multiple second program groups, and the repair programs corresponding to the repaired programs in the first program group and the multiple second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers assigned to each second program group.

[0014] Preferably, the breakpoint interruption program includes the same number of breakpoint interruption subroutines as the repair method, and the address of each breakpoint interruption subroutine corresponds to the repair method to which it belongs; repairing the repaired program according to the repair method specifically includes: writing the address of the breakpoint interruption subroutine corresponding to the repair method into the PC register to start repairing the repaired program according to the repair method.

[0015] Preferably, the first program group includes a repaired random program, and among the first number of interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group that is configured to be executed after the current repaired program.

[0016] Preferably, the ROM also stores an initialization program, and the storage medium also stores a repair flag. After the system is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag is a repair; if so, reading the first repaired program address from the repaired program address list in the storage medium, and writing the first repaired program address into any breakpoint interrupt register; if not, continuing to execute the program in the ROM.

[0017] Preferably, the ROM, CPU, stack and interrupt circuit are integrated in a SOC chip, and the storage medium is located outside the SOC chip.

[0018] Beneficial effects

[0019] In this solution, different repair methods are configured for different repaired programs by pre-setting a correspondence between each address of the repaired program and the repair method, and the address of the repaired program is written in the breakpoint interrupt register. After the address comparison circuit captures that the address of the repaired program in the breakpoint interrupt register is the same as the address in the PC register, it triggers the control circuit to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed, and the address in the breakpoint interrupt register that triggered the control circuit is used as the current repaired program address. The repair method matching the current repaired program address is searched from the correspondence, and the repaired program is repaired according to the repair method. In this way, different repair methods can be used to repair different repaired programs, thereby improving the repair efficiency.

[0020] In addition, in a more optimal solution, the repaired programs are grouped, and a larger number of breakpoint interrupt registers are allocated to the first program group currently being executed to meet the needs of repairing the next repaired program and the repaired random program in the first program group. At the same time, corresponding breakpoint interrupt registers are allocated to the addresses of the first repaired program of multiple second groups of programs that may be executed at any time to meet the needs of repairing the multiple second groups of programs. Therefore, a smaller number of breakpoint interrupt registers can be used to implement the repair of multiple groups of program groups that need to be repaired (including the first program group and multiple second program groups).

[0021] Other beneficial effects of the present invention will be explained through the introduction of specific technical features and technical solutions in the specific implementation methods. Those skilled in the art should be able to understand the beneficial technical effects brought about by the introduction of these technical features and technical solutions. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

[0023] Figure 1 A system diagram of an embedded device according to a preferred embodiment of the present invention;

[0024] Figure 2 A schematic diagram of a program in a ROM and a storage medium according to a preferred embodiment of the present invention;

[0025] Figure 3 A flowchart of a method for repairing a ROM program according to a preferred embodiment of the present invention;

[0026] Figure 4 A schematic diagram of a repaired program in a ROM according to a preferred embodiment of the present invention;

[0027] Figure 5 A schematic diagram of a repaired program in a ROM and a program in a storage medium according to a preferred embodiment of the present invention;

[0028] Figure 6 A schematic diagram of a repaired program and a breakpoint interrupt register group in a ROM according to a preferred embodiment of the present invention;

[0029] Figure 7 This is a schematic diagram of a breakpoint interruption program according to a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0030] The present invention is described below based on the following embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail. In order to avoid obscuring the essence of the present invention, well-known methods, processes, procedures, and components are not described in detail.

[0031] Furthermore, persons of ordinary skill in the art will appreciate that the figures provided herein are for illustration purposes only and are not necessarily drawn to scale.

[0032] Unless the context clearly requires otherwise, throughout the specification and claims, the words "include," "comprising," and similar words should be construed in an inclusive sense rather than an exclusive or exhaustive sense; that is, in the sense of "including but not limited to."

[0033] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood to indicate or imply relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0034] like Figure 1 As shown, Figure 1 The present invention relates to an embedded device, which includes a SOC chip and a storage medium (such as FLASH). The SOC chip includes a ROM, a CPU, an interrupt circuit and a RAM. The CPU includes a PC (Program Counter) register, the interrupt circuit includes a breakpoint interrupt register (Breakpoint Interrupt Register), an address comparison circuit and a control circuit. The RAM provides a storage location for temporary related data generated during the operation of the CPU. For example, the stack used by the CPU operation can be set in the RAM.

[0035] ROM stores programs that the CPU executes to perform various operations (including calculations and manipulation of the contents of various registers). Due to various reasons (such as errors in the design or verification phase), some of the programs (or code) stored in ROM need to be repaired. These are called repaired programs. When there are many repaired programs in the ROM, in order to repair the repaired programs efficiently, different types of repaired programs are repaired in different repair methods. For example, one repair method is an insertion repair method, that is, a repair program is inserted before the repaired program, so that the CPU executes the repaired program after executing the repair program; another type of repair method is to replace the repaired program with a repair program, so that when the repaired program is about to be run, the CPU no longer executes the repaired program, but executes the repair program instead. Depending on whether the repaired program needs to use the transfer parameters generated by the previous machine instructions of the repaired program, it can be divided into a parameter-passing instruction block replacement repair method (the repaired program includes multiple machine instructions and needs to use the transfer parameters generated by the previous machine instructions) and a non-parameter-passing instruction block replacement repair method (the repaired program includes multiple machine instructions and does not need to use the transfer parameters generated by the previous machine instructions).

[0036] In order to repair different types of repaired programs in a targeted and appropriate repair method, the storage medium stores a breakpoint interrupt program, a list of addresses of the repaired programs, a repair program for each repaired program (which can be stored in the storage medium before the embedded device leaves the factory, or updated to the storage medium through online upgrade after the embedded device leaves the factory), and a pre-set correspondence between the address of each repaired program and the repair method, wherein the correspondence includes a variety of different repair methods, for example, including: an insertion repair method (for example, represented by "1"), a repair method without parameter-passing instruction block replacement (for example, represented by "2"), and a repair method with parameter-passing instruction block replacement (for example, represented by "3"); in some embodiments, the list of addresses of the repaired programs and the above-mentioned correspondence can be integrated into a table, as shown in Table 1 below, where the list of addresses of the repaired programs includes all addresses (starting addresses) of the programs RD10 to RDm0 that need to be repaired, which are RDA10 to RDAm0 respectively. By writing the address of the repaired program in the breakpoint interrupt register, when the address comparison circuit captures that the address in the PC register is the same as the address of the breakpoint interrupt register, the trigger control circuit sends an interrupt to the CPU to prevent the repaired program pointed to by the address in the PC register (that is, the address in the breakpoint interrupt register that triggered the control circuit) from being directly executed (this interrupt is a special interrupt with the highest interrupt priority, which can interrupt the operation being executed by the CPU); after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program written to the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU as follows: The address in the breakpoint interrupt register of the control circuit is used as the current address of the repaired program, and the repair method matching the current address of the repaired program is found from the corresponding relationship to repair the repaired program according to the repair method. For example, if the current address of the repaired program is RDA10, according to Table 1, it can be found that its corresponding repair method is the insertion repair method, and then the repaired program is repaired by the insertion repair method; for another example, if the current address of the repaired program is RDA13, according to Table 1, it can be found that its corresponding repair method is the no-parameter instruction block replacement repair method, and then the repaired program is repaired by the no-parameter instruction block replacement repair method.

[0037]

[0038] Table 1

[0039] Figure 2 This is a schematic diagram of a program in a ROM according to an embodiment of the present invention. Figure 3 This is a method for repairing the ROM program of the above embedded device. The following is combined with Figure 2 and 3 The steps of this method are described in detail.

[0040] S100, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag is repair, and if so, reading the first repaired program address from the storage medium, and writing the first repaired program address into the breakpoint interrupt register (if there is a breakpoint interrupt register group including multiple breakpoint interrupt registers, any breakpoint interrupt register can be written); if not, continuing to execute the program in the ROM.

[0041] An initialization program can be stored in the ROM to determine whether the ROM program needs to be repaired. In addition, a repair flag is stored in the storage medium (if a repair method needs to be executed, the repair flag is set to repair (for example, 1); if the ROM program repair does not need to be executed, the repair flag is set to not repair (for example, 0)). After the embedded device is turned on and running, the CPU executes the initialization program to implement the following operations: the CPU reads the repair flag from the storage medium. If the repair flag is repair, the address (i.e., RDA10) of the first repaired program (i.e., RD10) is read from the repaired program address list in the storage medium, and the address RDA10 of the repaired program RD10 is written into the breakpoint interrupt register; if the repair flag is not repair, the program in the ROM continues to be executed.

[0042] S110, after the address comparison circuit captures that the address of the repaired program stored in the breakpoint interrupt register is the same as the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program written into the PC register to start executing the breakpoint interrupt program.

[0043] As each machine instruction in the ROM is executed, the PC register is updated with the address of the next machine instruction. After each machine instruction in the ROM is executed and before the next machine instruction begins execution, the address comparison circuit begins its current round of address comparison. For example, each update to the PC register triggers a round of address comparison. When machine instruction F11 begins execution, the PC register is written with the address (starting address) of the program being repaired, RD10. When machine instruction F11 is executed, the address comparison circuit begins this round of comparison. Since the address in the PC register at this time is the address of the repaired program RD10, and the address in the breakpoint interrupt register is also the address of the repaired program RD10, the address comparison circuit captures the address in the breakpoint interrupt register and the address in the PC register in this round. It triggers the control circuit to send an interrupt to the CPU to prevent the repaired program RD10 pointed to by the current address in the PC register from being directly executed. That is, relative to the repaired program RD10, the repair program RT10 is executed first. After the repair program is executed, whether the repaired program continues to be executed depends on the repair method of the repaired program RD10, which will be explained in detail below. After receiving the interrupt, the interrupt processing hardware in the CPU writes the address of the repaired program RD10 in the PC register to the RETI register (inside the CPU) and updates the address (starting address) of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program. Generally, after receiving the above interrupt, the CPU needs to push the current interrupt context data into the stack for field protection. The interrupt context data includes the address of the repaired program RD10 in the RETI register.

[0044] S120, the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current address of the program to be repaired, and a repair method that matches the current address of the program to be repaired is searched from the corresponding relationship to repair the program to be repaired according to the repair method.

[0045] The breakpoint interrupt program is executed by the CPU into the following steps: the address RDA10 in the breakpoint interrupt register that triggered the control circuit (that is, the starting address of the repaired program RD10) is used as the current repaired program address RDA10, and the repair method that matches the current repaired program address RDA10 is found from the correspondence in Table 1 as the insertion repair method, and the repaired program RD10 is subsequently repaired according to the insertion repair method.

[0046] 1. Insertion repair method

[0047] When the repair method for the repaired program is insert repair, the repaired program RD10 is used as an example for explanation. The repair program RT10 for the repaired program RD10 can be included in the breakpoint interrupt program. In this way, the breakpoint interrupt program is executed by the CPU and includes the following steps: executing the relevant operations of the repair program RT10; after the relevant operations of the repair program RT10 are completed, executing the exit interrupt operation, pushing the interrupt context out of the stack, and saving the address of the repaired program RD10 to the RETI register. Then, the address of the repaired program RD10 in the RETI register is written into the PC register. At this point, the PC register is written with the address of the repaired program RD10, and the CPU will continue to execute the repaired program RD10 and the normal program in the ROM.

[0048] 2. Repair method of replacing instruction blocks without parameter passing

[0049] When the repair method of the repaired program is to replace the instruction block without passing parameters, the repaired program is RD10 as an example. Figure 4 As shown, the repaired program block RD10 includes a plurality of consecutive repaired machine instructions RD100 to RD105. The repair program RT10 of the repaired program block RD10 can be included in the breakpoint interrupt program. In step S110, when the control circuit is triggered to send an interrupt to the CPU, the address of the PC register is the address of the repaired program RD10 (i.e., the address of the repaired machine instruction RD10). After the CPU receives the interrupt, the address of the RETI register in the interrupt context data pushed into the stack is also the address of the repaired machine instruction RD10. Thus, in step S120, the breakpoint interrupt program is executed by the CPU and includes the following steps: executing the relevant operations of the repair program RT10; after the relevant operations of the repair program RT10 are completed, then performing a pop operation to pop the interrupt context data to the relevant register, wherein the address of the repaired machine instruction RD10 is popped and saved to the RETI register; then the address in the RETI register is modified to the address of the next machine instruction N1, forming new interrupt context data, which is different from the RETI register address in the original interrupt context data; then performing a push operation to push the new interrupt context data onto the stack; then performing an exit interrupt operation, popping the new interrupt context data to the relevant register, wherein the address of the next machine instruction N1 is popped and saved to the RETI register; then writing the address of the next machine instruction N1 in the RETI register into the PC register. At this point, the PC register is written with the address of the next machine instruction N1, so the repaired program block RD10 is skipped and not executed. The CPU will continue to execute the next machine instruction N1 and the subsequent normal program in the ROM.

[0050] 3. Repair method of replacing instruction blocks with parameter passing

[0051] When the repair method of the repaired program is to replace the parameter instruction block, the repaired program is RD10 as an example. Figure 5 As shown, the repaired program RD10 includes multiple machine instructions configured to execute sequentially: a pop machine instruction RD101, an operation on passed parameters RD102, and a return operation RD103. The operation on passed parameters RD102 can be composed of one or more machine instructions, such as machine instructions for calculating the passed parameters, obtaining a result, and outputting the result. The first two machine instructions of the repaired program RD10 are a parameter generation machine instruction F10 and a push machine instruction F11. The parameter generation machine instruction F11, the push machine instruction F11, and the repaired program RD10 are configured to execute sequentially. Correspondingly, the replacement function RT10 includes the pop machine instruction RT101, the operation on passed parameters RT102, and the return operation RT103, configured to execute sequentially. The CPU executes the parameter generation machine instruction F10, generating the passed parameters temporarily stored in parameter registers (e.g., one or more of registers R0 to R15). The repaired program RD10 needs to use these passed parameters. At this time, what is written into the PC register is the address of the next machine instruction, that is, the instruction of the push machine instruction F11. After the parameter generation machine instruction F10 is executed, the push machine instruction F11 is executed. At this time, what is written into the PC register is the address of the next machine instruction, that is, the starting address of the replaced function RD10, that is, the address of the pop machine instruction RD101. The above-mentioned push machine instruction F11 is executed by the CPU as follows: the address in the PC register (at this time, the starting address of the repaired program RD10) is saved to the RETS register, and the calling context data is saved to the stack, wherein the calling context data includes the passed parameters in the parameter register and the address of the RETS register (at this time, the starting address of the repaired program RD10). In step S120, the breakpoint interrupt program is executed by the CPU as follows:

[0052] The pop machine instruction BP1 is executed by the CPU to pop the interrupt context in the stack, so that the interrupt context is written to the relevant registers, wherein the address of the repaired program RD10 is popped and saved to the RETI register; then, the address of the replacement function is written into the RETI register BP2 and executed by the CPU to modify the address of the repaired program RD10 in the RETI register to the address of the repair program RT10, at this time forming a new interrupt context; then the push machine instruction BP3 is executed to perform a push operation and push the new interrupt context into the stack. As mentioned above, the new interrupt context contains the address of the repair program RT10 in the RETI register; finally, the pop machine instruction BP4 is executed to perform an interrupt return operation, and the new interrupt context will be popped and saved to the relevant registers, wherein the address of the repair program RT10 contained in the new interrupt context in the stack will be popped and saved to the RETI register; then the PC register is written with the address of the repair program RT10 in the RETI register, so that the repair program RT10 starts to be executed after exiting the interrupt. In this way, after the interrupt returns, the address in the RETI register can be updated to the address of the repair program RT10 instead of the address of the repaired program RD10.

[0053] Afterwards, the CPU executes the repair program RT10, and the following operations are generated: the pop machine instruction RT101 is executed to pop the call context data in the stack and save it to the relevant registers, wherein the passed parameters in the call context data are popped and saved in the parameter register, and the address of the repaired program RD10 is popped and saved to the RETS register; then, the operation RT102 on the passed parameters is executed by the CPU to perform relevant operations on the passed parameters in the parameter register, such as performing operations on the passed parameters to obtain the operation results (such as multiplying the passed parameters by 10 to replace the operation of multiplying the passed parameters by 5 in the repaired program RD10), and then outputting the operation results (printing the operation results on the screen of the embedded device), or, for example, pushing the operation results into the stack for continued use by subsequent programs executed in the ROM (such as being called by other functions, etc.). At this point, the functional replacement and repair of the repaired program RD10 is completed; finally, the return operation RT103 is executed by the CPU, the address of the repaired program RD10 in the RETS register is taken out by the CPU, and the address of the repaired program RD10 is increased by the address step (for example, each time a machine instruction is executed, the address in the PC register increases by 1 (that is, the address of the PC register increases by 1), that is, the address step is 1) to obtain the address of the next machine instruction N1 of the repaired program RD10 in the ROM, and write the address of the next machine instruction N1 into the PC register. It can be seen that the address in the PC register points to the address of the normal program in the ROM again, and the CPU will continue to run the program in the ROM normally.

[0054] In order to further improve the efficiency of program repair when there are multiple branches in the repaired program, in some embodiments, by recording the correspondence between each repaired program address and the multi-branch flag, in conjunction with the allocation mechanism of the breakpoint interrupt register group, the purpose of improving program repair efficiency and saving hardware costs is achieved, as follows. The interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of the above-mentioned breakpoint interrupt registers; in addition, the correspondence also records the correspondence between each repaired program address and the multi-branch flag; the breakpoint interrupt program is executed by the CPU to find out from the correspondence whether the multi-branch flag corresponding to the current repaired program address is a multi-branch, and if so: allocate a first number of breakpoint interrupt registers from the breakpoint interrupt register group to the first program group to which the current repaired program address belongs to write several repaired program addresses in the first program group respectively, and allocate breakpoint interrupt registers to multiple second program groups respectively. To write the first repaired program address of the corresponding second program group; wherein, the first program group and multiple second program groups are stored in the ROM, and the multiple second program groups are configured to jump from the first program group to the corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list includes the repaired program addresses in the first program group and multiple second program groups, and the repair programs corresponding to the repaired programs in the first program group and multiple second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers assigned to each second program group. This step can be performed before searching for a repair method that matches the current repaired program address. In this way, the repaired programs in multiple program groups can be repaired using fewer breakpoint interrupt registers, and once a second program group is executed later, the corresponding repair program can be entered for repair.

[0055] The corresponding relationship also records the correspondence between each repaired program address and the multi-branch flag. As shown in Table 1, the multi-branch flag of the repaired program address RDA10 is a branch, and the multi-branch flag of the repaired program address RDA14 is a no-branch. Figure 6As shown, the breakpoint interrupt register group includes multiple breakpoint interrupt registers 1 to breakpoint interrupt register 4. The ROM stores a first program group 1 and multiple second program groups (respectively program group 2 and program group 3). The second program group 2 and the second program group 3 are configured to, during the execution of the first program group 1, when different conditions are met, jump from the first program group 1 to the corresponding second program group for execution. That is, during the execution of the first program group 1, which program group to jump to is relatively random. For example, if condition 2 is met during the execution of the first program group 1, the execution jumps from the first program group 1 to the second program group 2. If condition 3 is met during the execution of the first program group 1, the execution jumps from the first program group 1 to the second program group 3. Each program group contains several repaired programs. For example, the first program group 1 contains repaired programs RD10, RD11, RD12, and RD13, wherein the repaired programs RD10, RD11, and RD13 are configured to be executed sequentially, and the repaired program RD12 may be executed at any time during the execution of the first program group 1, that is, the execution order of the repaired program RD12 is relatively random, and it can be called the repaired random program RD12; similarly, the second program group 2 may contain repaired programs RD20 to RD23, wherein the repaired programs RD20, RD21, and RD23 are configured to be executed sequentially. It is configured to be executed successively, and the repaired program RD22 may be executed at any time during the execution of the second program group 2, that is, the execution order of the repaired program RD22 is relatively random, and it can be called the repaired random program RD22; similarly, there are repaired programs RD30 to RD33 in the second program group 3, among which the repaired programs RD30, RD31 and RD33 are configured to be executed successively, and the repaired program R32 may be executed at any time during the execution of the second program group 3, that is, the execution order of the repaired program R32 is relatively random, and it can be called the repaired random program RD32. Correspondingly, the storage medium also stores repair programs RT10 to RT13 of the first repair program group 1 for respectively repairing the repaired programs RD10 to RD13 in the first program group, stores repair programs RT20 to RT23 of the second repair program group 2 for repairing the repaired programs RD20 to RD23 in the second program group 2, and stores repair programs RT30 to RT33 of the second repair program group 3 for repairing the repaired programs RD30 to RD33 in the second program group 3. In addition, the storage medium also stores a list of addresses of all repaired programs, which includes the addresses of the repaired programs RD10 to RD13, RD20 to RD23, and RD30 to RD33, as well as the address of the first repaired program (for example, which may be the address of the repaired program RD10).

[0056] For example, the repaired program RD10 is the first repaired program, and its address is written into the breakpoint interrupt register 2 in step S100; in step S110, the address of the repaired program RD10 stored in the breakpoint interrupt register 2 triggers a CPU interrupt via the address comparison circuit, so that the breakpoint interrupt program is executed by the CPU; in step S120, the breakpoint interrupt program is executed by the CPU to further include the following steps: searching the first program group 1 to which the current repaired program address belongs from the repaired program address list, and allocating two breakpoint interrupt registers for the first program group 1 to which the current repaired program address belongs in the breakpoint interrupt register group: breakpoint interrupt register 1 and breakpoint interrupt register 2, so as to write the two repaired program addresses in the first program group respectively, wherein the breakpoint interrupt register The address of the repaired program RD12 (which belongs to the repaired random program) is written into register 1, the breakpoint interrupt register 2 is updated and written into the next repaired program RD11 of the repaired program RD10, and the address of the first repaired program RD20 of the second program group 2 (the CPU will switch to executing the second program group 2 when the condition 2 is met during the execution of the first program group 1) is written into the breakpoint interrupt register 3, and the address of the first repaired program RD30 of the second program group 3 (the CPU will switch to executing the second program group 3 when the condition 3 is met during the execution of the first program group 1) is written into the breakpoint interrupt register 4. In this embodiment, the number of breakpoint interrupt registers allocated to the first program group 1 is greater than the number of breakpoint interrupt registers allocated to each second program group. At this point, the operation of allocating and writing the addresses of the subsequent related repaired programs to the breakpoint interrupt register group is completed. As mentioned above, after this, the search for a repair method that matches the address of the current repaired program RD10 can be continued, and the repaired program RD10 can be repaired according to the repair method.

[0057] In some embodiments, first program group 1 is a program that implements a first function (e.g., performing operations on input data obtained by an embedded device to obtain operation results), second program group 2 is a program that implements a second function (e.g., outputting the operation results to a display screen), and second program group 3 is a program that implements another second function (e.g., outputting the operation results to a speaker in audio form). First program group 1, second program group 2, and second program group 3 may exist in the form of functions.

[0058] In this embodiment, by grouping the repaired programs, a larger number of breakpoint interrupt registers are allocated to the first program group 1 currently being executed to meet the needs of repairing the next repaired program in the first program group 1 and the repaired random program RD12. At the same time, corresponding breakpoint interrupt registers are allocated to the addresses of the first repaired program of multiple second groups of programs that may be executed at any time to meet the needs of repairing the multiple second groups of programs. Therefore, a smaller number of breakpoint interrupt registers can be used to implement the repair of multiple groups of program groups that need to be repaired (including the first program group and multiple second program groups).

[0059] As mentioned above, the execution process of the breakpoint interrupt program of the repaired program is different in different repair methods. In order to improve the efficiency of program repair, the breakpoint interrupt program includes the same number of breakpoint interrupt subroutines as the repair methods. The address of each breakpoint interrupt subroutine corresponds to the repair method to which it belongs. Figure 7 As shown, the breakpoint interruption subroutines for the above-mentioned insertion, no-parameter instruction block replacement, and parameter-passing instruction block replacement repair methods are breakpoint interruption subroutine 1, breakpoint interruption subroutine 2, and breakpoint interruption subroutine 3 breakpoint interruption programs, respectively. After entering the breakpoint interruption, the program can first determine the repair type of the current repaired program address. If the repair type is 1, the address of breakpoint interruption subroutine 1 is written to the PC register, and execution of breakpoint interruption subroutine 1 begins, and so on. As mentioned above, the repair program can be written into the breakpoint interruption subroutines for the insertion and no-parameter instruction block replacement repair methods.

[0060] The present invention also provides an embedded device, comprising a ROM, a CPU, an interrupt circuit and a storage medium, wherein the CPU comprises a PC register, the interrupt circuit comprises a breakpoint interrupt register, an address comparison circuit and a control circuit, and the storage medium stores a breakpoint interrupt program, a list of addresses of repaired programs, and a pre-set correspondence between the address of each repaired program and a repair method, wherein the correspondence includes a plurality of different repair methods; the address comparison circuit is used to, after capturing that the address of the repaired program in the breakpoint interrupt register is identical to the address in the PC register, trigger the control circuit to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current address of the repaired program, and the repair method matching the current address of the repaired program is searched from the correspondence to repair the repair program according to the repair method.

[0061] It should be noted that the use of step numbers (letters or numbers) to refer to certain specific method steps in the present invention is solely for the purpose of descriptive convenience and brevity, and is in no way intended to limit the order of these method steps. Those skilled in the art will appreciate that the order of the relevant method steps is determined by the technology itself and should not be unduly limited by the presence of step numbers. Those skilled in the art can determine various permissible and reasonable step orders based on the technology itself.

[0062] Those skilled in the art will appreciate that, provided there is no conflict, the above preferred solutions can be freely combined and superimposed.

[0063] It should be understood that the above-mentioned embodiments are merely illustrative and non-restrictive. Without departing from the basic principles of the present invention, various obvious or equivalent modifications or substitutions that can be made by those skilled in the art to the above-mentioned details will be included in the scope of the claims of the present invention.

Claims

1. A method for repairing a ROM program, applied to a system including a ROM, a CPU, an interrupt circuit and a storage medium, wherein: The CPU includes a PC register, characterized in that The interrupt circuit includes a breakpoint interrupt register, an address comparison circuit, and a control circuit. The storage medium stores a breakpoint interrupt program, a list of addresses of repaired programs, and a preset correspondence between each address of the repaired program and a repair method, wherein the correspondence includes multiple different repair methods. The method includes the following steps: When the address comparison circuit detects that the address of the repaired program in the breakpoint interrupt register is identical to the address in the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program in the PC register to start executing the breakpoint interrupt program; The breakpoint interrupt program is executed by the CPU to use the address in the breakpoint interrupt register that triggered the control circuit as the current address of the program to be repaired, and to search for a repair method that matches the current address of the program to be repaired from the corresponding relationship, so as to repair the program to be repaired according to the repair method.

2. The method according to claim 1, characterized in that The interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers; The correspondence relationship also records the correspondence between each repaired program address and the multi-branch flag. The breakpoint interruption program is executed by the CPU to search the corresponding relationship to see whether the multi-branch flag corresponding to the address of the currently repaired program is multi-branch, and if so: The first program group to which the current repaired program address belongs is searched from the repaired program address list, a first number of breakpoint interrupt registers are allocated to the first program group to which the current repaired program address belongs from the breakpoint interrupt register group so as to respectively write a number of repaired program addresses in the first program group, and a breakpoint interrupt register is allocated to each of the plurality of second program groups so as to respectively write the first repaired program address of the corresponding second program group; wherein the first program group and the plurality of second program groups are stored in the ROM, and the plurality of second program groups are configured to jump from the execution of the first program group to the execution of a corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list includes the repaired program addresses in the first program group and the plurality of second program groups, and the repair programs corresponding to the repaired programs in the first program group and the plurality of second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers allocated to each second program group.

3. The method according to claim 2, characterized in that The breakpoint interruption program includes the same number of breakpoint interruption subroutines as the repair mode, and the address of each breakpoint interruption subroutine corresponds to the corresponding repair mode; Repairing the repaired program according to the repair method specifically includes: The address of the breakpoint interrupt subroutine corresponding to the repair method is written into the PC register to start repairing the repaired program according to the repair method.

4. The method according to claim 2, characterized in that The first program group includes a repaired random program, and among the first number of interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group that is configured to be executed after the current repaired program.

5. The method according to claim 1, wherein The ROM also stores an initialization program, and the storage medium also stores a repair flag. After the system is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag indicates repair, If yes, read the first address of the repaired program from the repaired program address list in the storage medium, and write the first address of the repaired program into any breakpoint interrupt register; If not, continue executing the program in ROM.

6. The method according to any one of claims 1 to 5, characterized in that: The ROM, CPU, stack and interrupt circuit are integrated in the SOC chip, and the storage medium is located outside the SOC chip.

7. An embedded device comprising a ROM, a CPU, an interrupt circuit and a storage medium, wherein: The CPU includes a PC register, characterized in that The interrupt circuit includes a breakpoint interrupt register, an address comparison circuit, and a control circuit. The storage medium stores a breakpoint interrupt program, a list of addresses of repaired programs, and a preset correspondence between each address of the repaired program and a repair method, wherein the correspondence includes a plurality of different repair methods. The address comparison circuit is used to, upon detecting that the address of the repaired program in the breakpoint interrupt register is identical to the address in the PC register, trigger the control circuit to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; After receiving the interrupt, the CPU updates and writes the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current address of the program to be repaired, and a repair method that matches the address of the current program to be repaired is searched from the corresponding relationship to repair the program to be repaired according to the repair method.

8. The embedded device according to claim 7, characterized in that: The interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers; The correspondence relationship also records the correspondence between each repaired program address and the multi-branch flag. The breakpoint interruption program is executed by the CPU to search the corresponding relationship to see whether the multi-branch flag corresponding to the address of the currently repaired program is multi-branch, and if so: The first program group to which the current repaired program address belongs is searched from the repaired program address list, a first number of breakpoint interrupt registers are allocated to the first program group to which the current repaired program address belongs from the breakpoint interrupt register group so as to respectively write a number of repaired program addresses in the first program group, and a breakpoint interrupt register is allocated to each of the plurality of second program groups so as to respectively write the first repaired program address of the corresponding second program group; wherein the first program group and the plurality of second program groups are stored in the ROM, and the plurality of second program groups are configured to jump from the execution of the first program group to the execution of a corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list includes the repaired program addresses in the first program group and the plurality of second program groups, and the repair programs corresponding to the repaired programs in the first program group and the plurality of second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers allocated to each second program group.

9. The embedded device according to claim 8, characterized in that: The breakpoint interruption program includes the same number of breakpoint interruption subroutines as the repair mode, and the address of each breakpoint interruption subroutine corresponds to the corresponding repair mode; Repairing the repaired program according to the repair method specifically includes: The address of the breakpoint interrupt subroutine corresponding to the repair method is written into the PC register to start repairing the repaired program according to the repair method.

10. The embedded device according to claim 8, characterized in that: The first program group includes a repaired random program, and among the first number of interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group that is configured to be executed after the current repaired program.

11. The embedded device according to claim 7, wherein: The ROM also stores an initialization program, and the storage medium also stores a repair flag. After the embedded device is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag indicates repair, If yes, read the first address of the repaired program from the repaired program address list in the storage medium, and write the first address of the repaired program into any breakpoint interrupt register; If not, continue executing the program in ROM.

12. The embedded device according to any one of claims 7 to 11, characterized in that: The ROM, CPU, stack and interrupt circuit are integrated in the SOC chip, and the storage medium is located outside the SOC chip.

Images