A method and apparatus for determining flash memory quality

Abstract

The embodiment of the present application provides a kind of method and device for determining flash quality, comprising: the first precondition setting of quality detection to N first to-be-detected flash memory;Wherein, the first precondition of any two first to-be-detected flash memory is different;First precondition is used to indicate that different programming / erasing PE number is carried out under different temperature;N first to-be-detected flash memory is for the same series different batch production;For any first to-be-detected flash memory, read-write operation is carried out on the M block of first to-be-detected flash memory under each preset operating condition, and the first bit flip matrix of M block after read-write operation is determined;Preset operating condition is the temperature condition of read-write;According to each first bit flip matrix of N first to-be-detected flash memory under each preset operating condition, the quality condition of each flash memory of the series is determined.

Description

Technical Field

[0001] This invention relates to the field of storage technology, and more particularly to a method and apparatus for determining flash memory quality. Background Technology

[0002] With the continuous development of technology, people's demand for portable storage devices is increasing. Flash memory, as a type of non-volatile memory, is widely used in various fields. However, due to the inconsistent quality of flash memory chips, problems can easily occur during use.

[0003] Currently, the durability of flash memory chips can be predicted by page fault count, programming time, and PE cycles. However, because the reasons for the durability of flash memory chips are unpredictable, it is impossible to improve the performance of flash memory based on the reasons for their durability.

[0004] In summary, predicting the reasons for flash memory chip failure is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] The present invention provides a method and apparatus for determining flash memory quality, which solves the problem in the prior art that the reasons for flash memory chips not being durable cannot be predicted.

[0006] In a first aspect, embodiments of the present invention provide a method for determining flash memory quality, comprising: setting first preconditions for quality testing of N first flash memory samples to be tested; wherein, the first preconditions for any two first flash memory samples to be tested are different; the first preconditions are used to characterize different programming / erasing (PE) cycles performed at different temperatures; the N first flash memory samples to be tested are from the same series; for any first flash memory sample to be tested, read and write operations are performed on M storage blocks of the first flash memory sample to be tested under each preset operating condition, and the first bit flip matrix of the M blocks after the read and write operations is determined; the preset operating condition is the temperature condition for reading and writing; and the quality status of each flash memory in the series is determined based on the first bit flip matrices of the N first flash memory samples to be tested under each preset operating condition.

[0007] In this embodiment of the invention, by performing different PE cycles and read / write operations on N first flash memory samples of the same series at different temperatures, a first bit flip matrix under different conditions can be obtained. Then, based on the first bit flip matrix, the quality status of each flash memory in the series can be determined more accurately.

[0008] Optionally, the determining the quality status of the series of flash memories according to the first bit flipping matrixes of the N first flash memories under the preset operation conditions comprises: for each first flash memory, determining a target flipping feature of the first flash memory under each preset operation condition according to the M first bit flipping matrixes of the first flash memory; the preset operation condition is a temperature condition of reading and writing; and determining the quality status of the series of flash memories according to the target flipping features of the N first flash memories under the preset operation conditions.

[0009] Optionally, a second precondition for the quality detection of the second flash memories is set; wherein each second flash memory is accumulated under a same temperature condition and has different PE numbers;

[0010] Optionally, the reading and writing operations are performed on the K blocks under the same temperature condition for each second flash memory under any PE number, and the second bit flipping matrixes of the K blocks after the reading and writing operations are determined; and the determining the quality status of the series of flash memories according to the first bit flipping matrixes of the N first flash memories under the preset operation conditions comprises: determining the quality status of the series of flash memories according to the first bit flipping matrixes of the N first flash memories under the preset operation conditions and the second bit flipping matrixes of the second flash memories.

[0011] Optionally, the determining the quality status of the series of flash memories according to the first bit flipping matrixes of the N first flash memories under the preset operation conditions and the second bit flipping matrixes of the second flash memories comprises: taking the first bit flipping matrixes and the second bit flipping matrixes with the same precondition and the same temperature condition of reading and writing as the same type of bit flipping matrixes; determining a target flipping feature of each type from each type of bit flipping matrixes; and determining the quality status of the series of flash memories according to the target flipping features of each type.

[0012] Optionally, the determining the target flipping feature of each type from each type of bit flipping matrixes comprises: screening a pretreatment flipping feature from the same type of bit flipping matrixes by using mutual information, the pretreatment flipping feature being used to represent the quality of the flash memory to be detected of the type; if the similarity between any two pretreatment flipping features is greater than a similarity threshold, then the pretreatment flipping features are re-screened from the same type of bit flipping matrixes until the similarity between any two pretreatment flipping features is less than the similarity threshold, and the target flipping features of each type are obtained.

[0013] Optionally, the quality status of each flash memory in the series includes at least one of the following: a read interference index of the flash memory to be detected under a specified PE number condition; a write interference index of the flash memory to be detected under the specified PE number condition; a data retention capability index of the flash memory to be detected under the specified PE number condition; a durability capability index of the flash memory to be detected under the specified PE number condition; and a bit flip inconsistency index of the flash memory to be detected under the specified PE number condition.

[0014] Optionally, the obtaining of the target flip feature of each type includes: reading voltage information corresponding to the preprocessed flip features of each type; and determining the target flip feature of each type according to the preprocessed flip features of each type and the voltage information corresponding to the preprocessed flip features of each type.

[0015] In a second aspect, an embodiment of the present application provides a device for determining the quality of a flash memory, including: an acquisition unit configured to set a first precondition for quality detection of N first flash memories to be detected; wherein the first precondition of any two first flash memories to be detected is different; the first precondition is used to represent different programming / erasing PE numbers under different temperatures; and the N first flash memories to be detected are produced in the same series; and a processing unit configured to, for any first flash memory to be detected, perform read / write operations on M blocks of the first flash memory to be detected under each preset operation condition, and determine a first bit flip matrix of the M blocks after the read / write operations; the preset operation condition is a temperature condition of read / write; and determine the quality status of each flash memory in the series according to the first bit flip matrices of the N first flash memories to be detected under each preset operation condition.

[0016] Optionally, the processing unit is specifically configured to: for each first flash memory to be detected, determine a target flip feature of the first flash memory to be detected under each preset operation condition according to the M first bit flip matrices of the first flash memory to be detected; the preset operation condition is a temperature condition of read / write; and determine the quality status of each flash memory in the series according to the target flip features of the N first flash memories to be detected under each preset operation condition.

[0017] Optionally, the acquisition unit is further configured to: further set a second precondition for quality detection of second flash memories to be detected; wherein each second flash memory to be detected is accumulated under a same temperature condition and different PE numbers; and perform read / write operations on K blocks of the second flash memory to be detected under the same temperature condition at any PE number, and determine a second bit flip matrix of the K blocks after the read / write operations.

[0018] The processing unit is specifically configured to determine the quality status of the series of flash memories according to the first bit flip matrix of the N first to-be-detected flash memories under each preset operating condition and the second bit flip matrix of the second to-be-detected flash memory.

[0019] Optionally, the processing unit is specifically configured to: take each first bit flip matrix and each second bit flip matrix with the same precondition and the same read-write temperature condition as a same type of bit flip matrix; determine each type of target flip feature from each type of bit flip matrix; and determine the quality status of the series of flash memories according to the target flip features of each type.

[0020] Optionally, the processing unit is specifically configured to: screen out pre-processing flip features from the same type of bit flip matrix by using mutual information, the pre-processing flip features being used to represent the quality of the to-be-detected flash memory of this type; and if the similarity between any two pre-processing flip features is greater than a similarity threshold, re-screen out pre-processing flip features from the same type of bit flip matrix until the similarity between any two pre-processing flip features is less than the similarity threshold to obtain the target flip features of each type.

[0021] Optionally, the processing unit is specifically configured to: a read interference index of the to-be-detected flash memory under a specified PE number condition; a write interference index of the to-be-detected flash memory under the specified PE number condition; a data retention capability index of the to-be-detected flash memory under the specified PE number condition; a durability capability index of the to-be-detected flash memory under the specified PE number condition; and a bit flip inconsistency index of the to-be-detected flash memory under the specified PE number condition.

[0022] Optionally, the processing unit is specifically configured to: read voltage information corresponding to the pre-processing flip features of each type; and determine the target flip features of each type according to the pre-processing flip features of each type and the voltage information corresponding to the pre-processing flip features of each type.

[0023] In a third aspect, an embodiment of the present application further provides an electronic device, including at least one processor and at least one memory, wherein the memory stores a computer program, and when the program is executed by the processor, the processor executes the method for determining the quality of the flash memory in the first aspect.

[0024] In a fourth aspect, an embodiment of the present application further provides a computer readable storage medium, the storage medium stores a program, and when the program is run on a computer, the computer implements the method for determining the quality of the flash memory in the first aspect. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to make the technical solutions in the embodiments of the present application clearer, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0026] Figure 1 A method flowchart for determining flash memory quality is provided for the embodiments of the present application.

[0027] Figure 2 A first precondition diagram of a first to-be-detected flash memory is provided for the embodiments of the present application.

[0028] Figure 3 A method flowchart for determining a second bit flip matrix is provided for the embodiments of the present application.

[0029] Figure 4 A method flowchart for determining a flash memory quality status is provided for the embodiments of the present application.

[0030] Figure 5 A structural diagram of a flash memory quality device is provided for the embodiments of the present application.

[0031] Figure 6 A structural diagram of an electronic device is provided for the embodiments of the present application. DETAILED DESCRIPTION

[0032] In order to make the technical solutions in the embodiments of the present application clearer, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0033] In a possible scenario, with the continuous development of science and technology, the demand for storage devices is also increasing. Among them, as a non-volatile memory, flash memory has the characteristics of low power consumption, small size and fast read-write speed, and plays an increasingly important role in more and more fields. Among them, flash memory is widely used in various occasions. However, the quality of flash memory particles on the market is uneven. Due to problems such as basic process, power, packaging, etc., some particles will be more prone to a certain type of problem. For example, if a certain particle has high read power, the particle is more likely to have read interference problems.

[0034] In a possible case, the endurance score of the flash memory particle is determined by the page error count, the programming time and the number of PE cycles, wherein the higher the endurance score is, the healthier and more durable the flash memory particle is, and the lower the endurance score is, the less healthy and less durable the flash memory is. However, since the method cannot know which defect causes the endurance of the flash memory particle to decrease, the method cannot solve the problem of low endurance of the flash memory particle.

[0035] Therefore, first, the problems that may occur in the flash memory particle are predicted before the flash memory particle is shipped, and then the problems are processed, so that the performance of the flash memory after being shipped is good.

[0036] Therefore, first, the problems that may occur in the flash memory particle are predicted before the flash memory particle is shipped, and then the problems are processed, so that the performance of the flash memory after being shipped is good.

[0037] As shown in FIG. 1, a method for determining the quality of a flash memory is provided, and the method comprises the following steps: Figure 1 As shown in FIG. 1, a method for determining the quality of a flash memory is provided, and the method comprises the following steps:

[0038] In step 101, a first precondition for quality detection of N first to-be-detected flash memories is set.

[0039] In the embodiment of the present application, the number of the first to-be-detected flash memories is N, wherein the N first to-be-detected flash memories are of the same series, so that the quality of the flash memories of the series can be detected subsequently. In order to accurately detect the quality of the N first to-be-detected flash memories, the first preconditions of any two first to-be-detected flash memories are different, wherein the first preconditions are used to represent different programming / erasing PE times under different temperatures.

[0040] In step 102, for any first to-be-detected flash memory, read / write operations are performed on M blocks of the first to-be-detected flash memory under each preset operating condition, and a first bit flip matrix of the M blocks after the read / write operations is determined.

[0041] In the embodiment of the present application, the preset operating condition is a temperature condition for read / write operations. For example, if the first to-be-detected flash memory is first to-be-detected flash memory A, and the preset operating condition is a normal temperature for read / write operations, then the read / write operations are performed on the M blocks of the first to-be-detected flash memory A under the normal temperature condition, so that the first bit flip matrix of the M blocks of the first to-be-detected flash memory A after the read / write operations can be determined.

[0042] In step 103, the quality status of each flash memory of the series is determined according to the first bit flip matrices of the N first to-be-detected flash memories under each preset operating condition.

[0043] In the embodiment of the present application, according to the first bit flip matrix of the N first to-be-detected flash memories under each preset operating condition, the target flip feature of the first to-be-detected flash memory under each preset operating condition is determined, and then the target flip feature of the N first to-be-detected flash memories under each preset operating condition is input into the mathematical model, so that the quality status of each flash memory in the series can be determined.

[0044] As can be seen from steps 101 to 103, by performing different PE numbers of the same series of N first to-be-detected flash memories under different temperatures and performing read-write operations under different temperatures, the first bit flip matrix under different conditions can be obtained, and then the quality status of each flash memory in the series can be more accurately determined according to the first bit flip matrix.

[0045] In the embodiment of the present application, in order to more accurately determine the quality status of each flash memory in the series, the flash memory needs to be divided into two groups first, the first group is the first to-be-detected flash memory, and the second group is the second to-be-detected flash memory. Then the preconditions for quality detection of the flash memory are set, wherein the precondition of the first to-be-detected flash memory is the first precondition, and the precondition of the second to-be-detected flash memory is the second precondition. The following describes how to set the first precondition of the first to-be-detected flash memory in step 101.

[0046] As shown in Figure 2 Fig. 1 is a first precondition diagram of a first to-be-detected flash memory provided by the embodiment of the present application. As can be seen from the figure, the number of the first to-be-detected flash memory is 5, which are first to-be-detected flash memory A, first to-be-detected flash memory B, first to-be-detected flash memory C, first to-be-detected flash memory D and first to-be-detected flash memory E. If the actual PE operation number of the first to-be-detected flash memory is a maximum of 3000 times, in order to more accurately determine the quality status of each flash memory in the series, the maximum PE operation number tested by the present application is 4000 times, that is, the first precondition of the first to-be-detected flash memory E. Taking the first to-be-detected flash memory E as an example, since there are three temperature conditions, which are low temperature condition, normal temperature condition and high temperature condition, the first to-be-detected flash memory E selects 3*1000 blocks, which are divided into three groups, the first precondition of the first group of blocks of the first to-be-detected flash memory E is to perform 4000 times of PE operation under low temperature condition, the first precondition of the second group of blocks of the first to-be-detected flash memory E is to perform 4000 times of PE operation under normal temperature condition, and the first precondition of the third group of blocks of the first to-be-detected flash memory E is to perform 4000 times of PE operation under high temperature condition.

[0047] In the embodiment of the present application, the above describes how to set the first precondition of the first to-be-detected flash memory, and the following describes how to determine the first bit flip matrix of M blocks after read-write operation in step 102.

[0048] Specifically, there are various preset operating conditions, including room temperature read / write operation, room temperature read / write operation, high temperature read / write operation, high temperature read / low temperature write operation, low temperature read / high temperature write operation, room temperature read / low temperature write operation, room temperature read / high temperature write operation, low temperature read / room temperature write operation, low temperature read / low temperature write operation, and high temperature read / room temperature write operation, etc., which are not limited here. For example, the first flash memory A to be tested has M blocks. Under the first precondition of low temperature and PE count of 0, the first bit flip matrix of the M blocks obtained by high temperature read / low temperature write operation is...

[0049] In this embodiment of the invention, the method for determining the first bit flip matrix of the first flash memory to be tested has been described above. The method for determining the second bit flip matrix of the second flash memory to be tested is described below.

[0050] like Figure 3 The diagram shows a flowchart of a method for determining a second bit flip matrix according to an embodiment of the present invention. The method includes the following steps:

[0051] Step 301: Set the second preconditions for quality testing of the second flash memory to be tested.

[0052] In this embodiment of the invention, for example, the number of second flash memory to be tested can be one or more, and is not limited here. For the sake of convenience in introducing this solution, we will take one second flash memory to be tested as an example. The second flash memory to be tested is the second flash memory to be tested F, which selects 1000 blocks. The second prerequisite is to perform different PE operations a certain number of times under normal temperature conditions.

[0053] Step 302: Under any PE number, perform read and write operations on K blocks of the second flash memory to be tested at the same temperature to determine the second bit flip matrix of the K blocks after the read and write operations.

[0054] In this embodiment of the invention, for example, since the actual maximum number of PE operations is 3000, in order to more accurately determine the quality of the flash memory, the number of PE operations to be tested needs to be greater than the actual number of PE operations. Taking the number of PE operations to be tested as 4000 as an example, the 1000 blocks in flash memory F first undergo 0 PE operations at room temperature, and then read and write operations are performed at room temperature to obtain the second bit flip matrix of 1000 blocks. Then, based on the 0 PE operations, 500 PE operations are performed at room temperature, and then read and write operations are performed at room temperature to obtain the second bit flip matrix of 1000 blocks. Then, based on the 500 PE operations, another 500 PE operations are performed at room temperature, and then read and write operations are performed at room temperature to obtain the second bit flip matrix of 1000 blocks. This process continues until the accumulated PE operations reach 4000, at which point the process ends, and a total of K blocks of second bit flip matrices are obtained.

[0055] As can be seen from steps 301 to 302 above, by performing different PE operations at different temperatures and reading / writing operations under different temperature conditions, K second-bit flip matrices can be obtained, which facilitates the subsequent accurate determination of the quality status of this series of flash memory based on the K second-bit flip matrices.

[0056] Having determined the first bit-flipping matrix of the first flash memory to be tested and the second bit-flipping matrix of the second flash memory to be tested, the following describes how to determine the quality status of each flash memory in this series based on the first bit-flipping matrix and the second bit-flipping matrix.

[0057] like Figure 4 The diagram shown is a flowchart of a method for determining the quality status of flash memory according to an embodiment of the present invention. The method includes the following steps:

[0058] Step 401: Each first bit flip matrix and each second bit flip matrix with the same preconditions and the same temperature conditions for reading and writing are regarded as bit flip matrices of the same type.

[0059] In the embodiment of the present application, the first bit flipping matrix of the first group and the second bit flipping matrix of the second group are more, because the subsequent target flipping features need to be generated according to the first bit flipping matrix and the second bit flipping matrix, and then the target flipping features are input into the mathematical model, so as to realize the determination of the quality status of the series of flash memories, and the number of the first bit flipping matrix and the second bit flipping matrix is more, and before the target flipping features are generated, it is necessary to screen out the representative pre-processing bit flipping matrix from the first bit flipping matrix and the second bit flipping matrix. Therefore, first, the first bit flipping matrix and the second bit flipping matrix are classified, and then the representative pre-processing bit flipping matrix is found from the same type of bit flipping matrix. Among them, each first bit flipping matrix and each second bit flipping matrix with the same precondition and the same temperature condition of read-write are taken as the same type of bit flipping matrix. For example, if there are bit flipping matrix A, bit flipping matrix B and bit flipping matrix C, wherein the bit flipping matrix A is obtained by performing PE operation 0 times under normal temperature condition and then performing normal temperature read-write operation. The bit flipping matrix B is obtained by performing PE operation 0 times under normal temperature condition and then performing normal temperature read-write operation. The bit flipping matrix C is obtained by performing PE operation 0 times under high temperature condition and then performing normal temperature read-write operation. Then the bit flipping matrix A and the bit flipping matrix B are the same type of bit flipping matrix, and the bit flipping matrix C is not the same type of bit flipping matrix as the bit flipping matrix A and the bit flipping matrix B.

[0060] In step 402, mutual information is used to screen out pre-processing flipping features from the same type of bit flipping matrix, and the pre-processing flipping features are used to represent the quality of the flash memory to be detected.

[0061] In the embodiment of the present application, the bit flipping matrix is divided into multiple types by the above-mentioned step 401, and then the pre-processing flipping features are screened out from the same type of bit flipping matrix by using mutual information, wherein the pre-processing flipping features are used to represent the quality of the flash memory to be detected. Specifically, the features of the bit flipping matrix are extracted to obtain original bit flipping features, and then the mutual information of the original bit flipping features of the same type is calculated to obtain the pre-processing flipping features, wherein the pre-processing flipping features are calculated by formula 1, and the formula is as follows:

[0062]

[0063] X is the original bit flipping feature of the same type; Y is the original bit flipping feature of the same type; and Z is the type.

[0064] In step 403, it is determined whether the similarity between any two pre-processing flipping features is greater than a similarity threshold value, if yes, step 404 is executed, and if not, step 405 is executed.

[0065] In the embodiment of the present application, the pre-processed flipping features of each type are obtained by formula 1, but in order to input more effective flipping features into the subsequent mathematical model, it is necessary to prevent the similarity between the pre-processed flipping features of different types from being too high. Therefore, it is necessary to determine whether the similarity between any two pre-processed flipping features is greater than a similarity threshold value by formula 2, wherein the similarity threshold value can be pre-set or determined according to specific conditions, which is not limited herein. Formula 2 is as follows:

[0066]

[0067] wherein X m is a pre-processed flipping feature, C represents a type, and X s represents another pre-processed flipping feature.

[0068] If the similarity between any two pre-processed flipping features is greater than the similarity threshold value, it means that the similarity between the two pre-processed flipping features is very high, and if the two pre-processed flipping features with very high similarity are input into the mathematical model, it has little effect on the accuracy of determining the quality status of each flash memory of the series. If the similarity between any two pre-processed flipping features is less than the similarity threshold value, it means that the similarity between any two pre-processed flipping features is not high, and inputting the pre-processed flipping features into the mathematical model can improve the accuracy of determining the quality status of each flash memory of the series.

[0069] Step 404: re-screening pre-processed flipping features from the bit flipping matrix of the same type until the similarity between any two pre-processed flipping features is less than the similarity threshold value to obtain target flipping features of each type.

[0070] In the embodiment of the present application, if the similarity between any two pre-processed flipping features is greater than the similarity threshold value, it means that the similarity between the two pre-processed flipping features is very high, and in this case, it is necessary to re-screen pre-processed flipping features from the bit flipping matrix of the same type until the similarity between any two pre-processed flipping features is less than the similarity threshold value to obtain target flipping features of each type.

[0071] Step 405: determining target flipping features of each type.

[0072] In the embodiment of the present application, since the similarity between any two pre-processed flipping features is less than the similarity threshold value, the pre-processed flipping features are determined as target flipping features of each type.

[0073] Step 406: inputting the target flipping features of each type into the mathematical model to determine the quality status of each flash memory produced by the series.

[0074] In the embodiments of the present application, the target flipping features of each type are input into a mathematical model to determine the quality status of each flash memory in the series. The mathematical model can be constructed by one or more of the following methods: regression algorithm, regularization method, decision tree learning, instance-based algorithm, Bayesian method, clustering algorithm, dimensionality reduction algorithm, association rule learning, genetic algorithm, artificial neural network, deep learning, kernel-based algorithm and ensemble algorithm. Specifically, taking the mathematical model constructed by a random forest algorithm and a genetic algorithm as an example, the target flipping features are divided into two groups, one group is a sample set and the other group is a test set. The ratio between the sample set and the test set can be pre-set or determined according to the specific situation, which is not limited here. First, the sample set is sampled x times to form a new sample set. Then, y features are randomly selected from the many features to form a feature subset. Then, the best split attribute is found on the new sample set and the feature subset to establish a decision tree. The above operation is repeated until m decision trees are constructed. Then, the output results of the m decision trees are combined to establish a random forest model. The genetic algorithm is used to optimize the parameters of the classification algorithm due to its good search flexibility. For the random forest algorithm, the number of trees, the depth of the tree and the pruning parameters need to find the optimal parameter combination. The fitness function is calculated by the following formula:

[0075] FitV = Acc * a + s * b Formula 3

[0076] Wherein, Acc is the accuracy after classification of the random forest algorithm, s is the standard deviation of the accuracy of each class, a and b are the weight coefficients of the accuracy and the standard deviation, respectively.

[0077] Then, the test set is input into the constructed mathematical model to output the quality status of each flash memory in the series. The quality status includes at least one of the following: read interference index of the to-be-detected flash memory under the specified PE number condition; write interference index of the to-be-detected flash memory under the specified PE number condition; data retention capability index of the to-be-detected flash memory under the specified PE number condition; endurance capability index of the to-be-detected flash memory under the specified PE number condition; bit flipping inconsistency index of the to-be-detected flash memory under the specified PE number condition.

[0078] As can be seen from steps 401 to 407, by selecting target flipping features from a plurality of original flipping features, the computational load of the subsequent mathematical model is reduced, the output speed of the mathematical model is improved, and by inputting the target flipping features into the mathematical model, the quality status of each flash memory in the series can be accurately determined, and then the flash memory can be improved according to the quality status of each flash memory in the series, thereby improving the performance of the flash memory.

[0079] In one possible implementation, for any first flash memory to be tested, read and write operations are performed on M storage blocks of the first flash memory under each preset operating condition. Simultaneously, the first bit-flip matrix of the M blocks after the read and write operations is determined, and the voltage curve of the first flash memory is read. At any PE number, read and write operations are performed on K blocks of the second flash memory to be tested at the same temperature. Simultaneously, the second bit-flip matrix of the K blocks after the read and write operations is determined, and the voltage curve of the second flash memory is read. After determining the preprocessed flip characteristics based on the first and second bit-flip matrices, target flip characteristics are generated based on the preprocessed flip characteristics and the corresponding voltage curves. These target flip characteristics are then input into a mathematical model to determine the quality status of each flash memory in the series.

[0080] In one possible implementation, the target flip-flop features corresponding to the first set of flash memory are input into a mathematical model, and the output is the read interference index of the flash memory under test under a specified number of PE cycles; the write interference index of the flash memory under test under a specified number of PE cycles; the data retention capability index of the flash memory under test under a specified number of PE cycles; and the bit flip-flop inconsistency index of the flash memory under test under a specified number of PE cycles. The target flip-flop features corresponding to the second set of flash memory are input into the mathematical model, and the output is the durability index of the flash memory under test under a specified number of PE cycles.

[0081] Based on the same technical concept described above, embodiments of the present invention provide an apparatus for determining flash memory quality, such as... Figure 5 As shown, the device 500 includes: an acquisition unit 501, configured to set first preconditions for quality testing of N first flash memory samples to be tested; wherein the first preconditions for any two first flash memory samples to be tested are different; the first preconditions are used to characterize different programming / erasing (PE) cycles performed at different temperatures; the N first flash memory samples to be tested are from the same series; and a processing unit 502, configured to perform read and write operations on M storage blocks of any first flash memory sample to be tested under each preset operating condition, and determine the first bit flip matrix of the M blocks after the read and write operations; the preset operating condition is the temperature condition for reading and writing; and determine the quality status of each flash memory in the series based on the first bit flip matrices of the N first flash memory samples to be tested under each preset operating condition.

[0082] Optionally, the processing unit 502 is specifically configured to: for each first to-be-detected flash memory, determine a target flipping feature of the first to-be-detected flash memory under each preset operation condition according to M first bit flipping matrices of the first to-be-detected flash memory; the preset operation condition is a temperature condition of reading and writing; and determine the quality status of each flash memory of the series according to the target flipping features of N first to-be-detected flash memories under each preset operation condition.

[0083] Optionally, the acquisition unit 501 is further configured to: further include a second precondition for quality detection of a second to-be-detected flash memory; wherein each second to-be-detected flash memory is accumulated under a same temperature condition and different PE times; and at any PE time, reading and writing operations are performed on K blocks of the second to-be-detected flash memory under the same temperature condition to determine a second bit flipping matrix of the K blocks after the reading and writing operations.

[0084] The processing unit 502 is specifically configured to: determine the quality status of each flash memory of the series according to the first bit flipping matrices and the second bit flipping matrices of the N first to-be-detected flash memories under each preset operation condition.

[0085] Optionally, the processing unit 502 is specifically configured to: take each first bit flipping matrix and each second bit flipping matrix with the same precondition and the same temperature condition of reading and writing as a same type of bit flipping matrix; determine a target flipping feature of each type from each type of bit flipping matrix; and determine the quality status of each flash memory of the series according to the target flipping features of each type.

[0086] Optionally, the processing unit 502 is specifically configured to: screen a pretreatment flipping feature from the same type of bit flipping matrix by using mutual information, and the pretreatment flipping feature is used to represent the quality of the to-be-detected flash memory of the type.

[0087] If the similarity between any two pretreatment flipping features is greater than a similarity threshold, the pretreatment flipping feature is re-screened from the same type of bit flipping matrix until the similarity between any two pretreatment flipping features is less than the similarity threshold to obtain the target flipping feature of each type.

[0088] Optionally, the processing unit 502 is specifically configured to: a read interference index of the to-be-detected flash memory under a specified PE time condition; a write interference index of the to-be-detected flash memory under the specified PE time condition; a data retention capability index of the to-be-detected flash memory under the specified PE time condition; a durability capability index of the to-be-detected flash memory under the specified PE time condition; and a bit flipping inconsistency index of the to-be-detected flash memory under the specified PE time condition.

[0089] Optionally, the processing unit 502 is specifically configured to read the voltage information corresponding to the pre-processing flipping features of the types; and determine the target flipping features of the types according to the pre-processing flipping features of the types and the voltage information corresponding to the pre-processing flipping features of the types.

[0090] Based on the same technical concept, the embodiment of the present application further provides an electronic device, as shown in the figure, Figure 6 The electronic device 600 includes at least one processor 601 and a memory 602 connected with the at least one processor. In the embodiment of the present application, the specific connection medium between the processor 601 and the memory 602 is not limited, Figure 6 For example, the processor 601 and the memory 602 are connected through a bus. The bus can be divided into an address bus, a data bus, a control bus, etc.

[0091] In the embodiment of the present application, the memory 602 stores instructions executable by the at least one processor 601. The at least one processor 601 can execute the steps included in the foregoing method for determining the quality of the flash memory by executing the instructions stored in the memory 602.

[0092] The processor 601 is the control center of the computing device, can connect various parts of the computing device through various interfaces and lines, and realize data processing by running or executing the instructions stored in the memory 602 and calling the data stored in the memory 602. Optionally, the processor 601 can include one or more processing units. The processor 601 can integrate an application processor and a modem processor. The application processor mainly processes the operating system, user interface, application program, etc., and the modem processor mainly processes the issued instructions. It can be understood that the foregoing modem processor can also be integrated into the processor 601. In some embodiments, the processor 601 and the memory 602 can be implemented on the same chip, and in some embodiments, they can also be implemented on separate chips respectively.

[0093] The processor 601 can be a general-purpose processor, such as a central processing unit (CPU), a digital signal processor, an application specific integrated circuit (ASIC), a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and can implement or execute the methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in combination with the method embodiment of the method can be directly embodied as execution completed by a hardware processor, or executed by a combination of hardware and software modules in the processor.

[0094] The memory 602, as a non-volatile computer readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory 602 can include at least one type of storage medium, for example, can include flash memory, hard disk, multimedia card, card type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic storage, magnetic disk, optical disk, etc. The memory 602 is any other medium capable of carrying or storing desired program codes in the form of instructions or data structures and capable of being accessed by a computer, but is not limited thereto. The memory 602 in the embodiments of the present application can also be a circuit or any other device capable of realizing a storage function, used for storing program instructions and / or data.

[0095] Based on the same technical concept, the embodiments of the present application further provide a computer readable storage medium, which stores a computer program executable by a computing device, and when the program runs on the computing device, causes the computing device to execute the steps of the method of the above recharging.

[0096] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0097] The present application is described with reference to flowcharts and / or block diagrams of the method, device (system) and computer program product according to the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as a combination of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus produce a machine that implements the flowcharts and / or block diagrams. Figure 1 one flow or multiple flows and / or blocksFigure 1 means for performing the function specified by the block or blocks.

[0098] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the flow Figure 1 flow or flows and / or blocks Figure 1 means for performing the function specified by the block or blocks.

[0099] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions that are executed on the computer or other programmable apparatus provide steps for implementing the flow Figure 1 flow or flows and / or blocks Figure 1 steps of means for performing the function specified by the block or blocks.

[0100] Although preferred embodiments of the application have been described herein, changes and modifications can be suggested to one skilled in the art and it is intended that the application encompass such changes and modifications as fall within the scope of the appended claims. The patent claims recited herein are intended to encompass at least the following embodiments.

[0101] Obviously, numerous modifications and variations of the present application are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims and their equivalents, the application can be practiced otherwise than as specifically described herein.

Claims

1. A method of determining flash memory quality, the method comprising: The application relates to a quality detection method for flash memories. A first precondition is set for quality detection of N first flash memories to be detected; the first precondition of any two first flash memories to be detected is different; the first precondition is used for representing different PE (program / erase) times under different temperatures; the N first flash memories to be detected are different batches of the same series; For any first flash memory to be detected, read / write operations are respectively performed on M blocks of the first flash memory to be detected under each preset operation condition, and a first bit flip matrix of the M blocks after the read / write operations is determined; the preset operation condition is a temperature condition of read / write; Quality conditions of the flash memories of the series are determined according to the first bit flip matrices of the N first flash memories to be detected under the preset operation conditions; A second precondition is set for quality detection of second flash memories to be detected; each second flash memory to be detected is accumulated under the same temperature condition and has different PE times; under any PE time, read / write operations are respectively performed on K blocks of the second flash memory to be detected under the same temperature, and a second bit flip matrix of the K blocks after the read / write operations is determined; The quality conditions of the flash memories of the series are determined according to the first bit flip matrices of the N first flash memories to be detected under the preset operation conditions and the second bit flip matrices of the second flash memories to be detected.

2. The method of claim 1, wherein, The quality conditions of the flash memories of the series are determined according to the first bit flip matrices of the N first flash memories to be detected under the preset operation conditions, including: For each first flash memory to be detected, target flip features of the first flash memory to be detected under each preset operation condition are determined according to the M first bit flip matrices of the first flash memory to be detected; the preset operation condition is a temperature condition of read / write; the quality conditions of the flash memories of the series are determined according to the target flip features of the N first flash memories to be detected under the preset operation conditions.

3. The method of claim 1, wherein, The quality conditions of the flash memories of the series are determined according to the first bit flip matrices of the N first flash memories to be detected under the preset operation conditions and the second bit flip matrices of the second flash memories to be detected, including: Each first bit flip matrix and each second bit flip matrix with the same precondition and the same temperature condition of read / write are taken as a same type of bit flip matrix; Target flip features of each type are determined from each type of bit flip matrix; The quality conditions of the flash memories of the series are determined according to the target flip features of each type.

4. The method of claim 3, wherein, The target flip features of each type are determined from each type of bit flip matrix, including: Preprocessing flip features are screened from the same type of bit flip matrix by using mutual information, and the preprocessing flip features are used for representing the quality of the flash memory to be detected of the type. If the similarity between any two pre-processed flipping features is greater than the similarity threshold, then re-screen the pre-processed flipping features from the bit flipping matrix of the same type until the similarity between any two pre-processed flipping features is less than the similarity threshold to obtain the target flipping features of each type.

5. The method of claim 1, wherein, The quality conditions of each flash memory in the series include at least one of: The read interference index of the to-be-detected flash memory under a specified PE number condition; The write interference index of the to-be-detected flash memory under a specified PE number condition; The data retention capability index of the to-be-detected flash memory under a specified PE number condition; The endurance capability index of the to-be-detected flash memory under a specified PE number condition; The bit flipping inconsistency index of the to-be-detected flash memory under a specified PE number condition.

6. The method of claim 4, wherein, The obtaining of the target flipping features of each type includes: reading voltage information corresponding to the pre-processed flipping features of each type; determining the target flipping features of each type according to the pre-processed flipping features of each type and the voltage information corresponding to the pre-processed flipping features of each type.

7. An apparatus for determining flash memory quality, the apparatus comprising: The method comprises: an acquisition unit configured to set first preconditions for quality detection of N first to-be-detected flash memories; wherein the first preconditions of any two first to-be-detected flash memories are different; the first preconditions are used to represent different programming / erasing PE numbers under different temperatures; the N first to-be-detected flash memories belong to the same series; a processing unit configured to, for any first to-be-detected flash memory, perform read / write operations on M storage blocks of the first to-be-detected flash memory under each preset operation condition to determine a first bit flipping matrix of the M blocks after the read / write operations; the preset operation condition is a temperature condition of read / write; and determine quality conditions of each flash memory in the series according to the first bit flipping matrices of the N first to-be-detected flash memories under each preset operation condition; the acquisition unit is further configured to set second preconditions for quality detection of second to-be-detected flash memories; wherein each second to-be-detected flash memory is accumulated with different PE numbers under the same temperature condition; and perform read / write operations on K blocks of the second to-be-detected flash memory under the same temperature condition under any PE number to determine a second bit flipping matrix of the K blocks after the read / write operations; the processing unit is specifically configured to determine the quality conditions of each flash memory in the series according to the first bit flipping matrices of the N first to-be-detected flash memories under each preset operation condition and the second bit flipping matrices of the second to-be-detected flash memories.

8. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor implements the steps of the method of any one of claims 1-6 when executing the program.

9. A computer-readable storage medium, characterized in that, The computer device stores a computer program executable by the computer device, and when the program runs on the computer device, the computer device executes the steps of the method of any one of claims 1-6.

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