A light-emitting diode

By introducing through holes and multiple electrode block structures in the semiconductor stacking design of the LED chip, the problem of insulation layer breakage caused by insufficient heat dissipation and warping is solved, and the reliability and luminous efficiency of the LED chip are improved.

CN115881879BActive Publication Date: 2025-09-19XIAMEN SANAN OPTOELECTRONICS CO LTD
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Patent Information

Application Number
CN202211661864.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-23
Publication Date
2025-09-19
Estimated Expiration
2042-12-23

AI Technical Summary

Technical Problem

The flat design of existing LED chips leads to insufficient heat dissipation capacity, affecting reliability, and is prone to problems such as insulation layer breakage and local short circuits caused by warping during the packaging process.

Method used

A semiconductor stacking design is adopted, including a through hole, a first insulating layer and a pad structure. By arranging multiple second electrode blocks between the second pad connection parts, the metal coverage area is expanded to improve the heat dissipation capacity, and the current distribution is optimized through the transparent conductive layer and the reflective layer.

Benefits of technology

The heat dissipation capacity of the LED chip and the firmness of the package welding are improved, and the reliability and luminous efficiency of the light-emitting diode are enhanced.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a light-emitting diode (LED), comprising a semiconductor stack, a through-hole disposed on the semiconductor stack, and a first insulating layer, and a first pad, a second pad, and a second electrode block disposed on the first insulating layer. The semiconductor stack comprises a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The first insulating layer comprises a first opening and a second opening. The first pad is electrically connected to the first semiconductor layer via the first opening, and the second pad is electrically connected to the second semiconductor layer via the second opening. The second pad comprises a second pad connection portion and a plurality of second pad extensions extending toward the first pad. The second electrode block is disposed between adjacent second pad extensions. The plurality of second electrode blocks disposed between the second pad connection portions improves the heat dissipation capability and reliability of the LED.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor-related technology, and in particular to a light emitting diode. Background Art

[0002] Light-emitting diodes (LEDs) are widely used in automotive, backlighting, horticultural lighting, and high-power lighting applications due to their low cost, high light efficiency, and energy-saving and environmentally friendly characteristics. Due to their high drive current, strict heat dissipation requirements, low chip internal resistance, and high reflectivity in the yellow and red wavelengths, Ag, a metal with the highest reflectivity, is often used as the primary material for the metal reflective layer.

[0003] Traditional LED chips are designed to be flat, and since the surface pads are in contact with the insulating layer over a large area, during the subsequent packaging reflow process, the surface pads and the insulating layer are prone to breakage or separation due to the warping of the packaging substrate, which in turn causes metal layers of different polarities to be interconnected and cause local short circuits. The solution to the existing technology is to flatten the LED chip design, that is, to separate the P electrode and the N electrode, form a through hole extending from the P-type layer to the N-type layer at a local position of the epitaxial structure, and set the surface pads of the P electrode and the N electrode on the same horizontal plane, thereby avoiding the warping of the substrate causing the insulation layer to break, resulting in leakage or dead light abnormalities. However, in order to meet the flattening design requirements, the annular design of the P electrode current injection method will compress the area of ​​the P-side surface pad, which will directly affect the heat dissipation capacity of the LED chip, and thus affect the reliability of the LED chip.

[0004] Therefore, how to provide a light emitting diode that can further improve the heat dissipation capability of the LED chip and improve the reliability of the light emitting diode has become an urgent problem to be solved in this field. Summary of the Invention

[0005] The purpose of this application is to provide a light emitting diode, which can further improve the heat dissipation capability of the LED chip and improve the reliability of the light emitting diode.

[0006] In a first aspect, the present application provides a light emitting diode, comprising:

[0007] A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence;

[0008] a through hole, penetrating the second semiconductor layer and the light-emitting layer, exposing a portion of the surface of the first semiconductor layer;

[0009] a first insulating layer, disposed on the semiconductor stack, having a first opening and a second opening, wherein the first opening exposes a portion of the surface of the first semiconductor layer;

[0010] a first pad formed on the semiconductor stack and electrically connected to the first semiconductor layer through the first opening, wherein a projection of the first pad does not overlap with a projection of the through hole on a plane perpendicular to a direction of the semiconductor stack;

[0011] A second solder pad is formed on the semiconductor stack, arranged opposite to the first solder pad, and electrically connected to the second semiconductor layer through the second opening; the second solder pad includes a second solder pad connecting portion and a plurality of second solder pad extensions extending toward the first solder pad, and a second electrode block is provided between adjacent second solder pad extensions. On a plane perpendicular to the direction of the semiconductor stack, the projections of the second solder pad, the through hole and the second electrode block do not overlap with each other.

[0012] In one possible embodiment, the first pad includes a first pad connecting portion and a plurality of first pad extensions extending toward the second pad, a first electrode block is provided between adjacent first pad extensions, and on a plane perpendicular to the direction of the semiconductor stacking, the projections of the first pad, the through hole and the first electrode block do not overlap with each other.

[0013] In a possible implementation, the light emitting diode further includes a first connecting electrode and a second connecting electrode, the first connecting electrode being electrically connected to the first semiconductor layer through the first opening, and the second connecting electrode being electrically connected to the second semiconductor layer through the second opening.

[0014] In a possible implementation, the first insulating layer includes a first insulating portion and a second insulating portion, wherein the first insulating portion surrounds the second insulating portion and is separated by a ring-shaped second opening.

[0015] In one possible embodiment, the first connecting electrode is located on the first insulating portion, the second connecting electrode is located on the second insulating portion, and partially fills the second opening portion; on a plane perpendicular to the direction of the semiconductor stacking, the projection of the first connecting electrode is located within the projection plane of the first insulating portion, and the projection of the second insulating portion is located within the projection plane of the second connecting electrode.

[0016] In one possible embodiment, the second opening portion includes an outer edge close to the first insulating portion and an inner edge close to the second insulating portion, the minimum distance between the first connecting electrode and the outer edge is between 1 μm and 15 μm, and the second connecting electrode covers the inner edge and the minimum distance from the inner edge is between 1 μm and 15 μm.

[0017] In a possible implementation, the first insulating layer includes a plurality of second openings, and on a plane perpendicular to the direction of the semiconductor stack, projections of the second openings are located within a projection plane of the second connecting electrode.

[0018] In a possible embodiment, the second connecting electrode includes a second electrode connecting portion and a plurality of second electrode extension portions extending toward the first pad, and on a plane perpendicular to the direction of the semiconductor stack, a projection of the second opening portion is located within a projection plane of the second electrode extension portion.

[0019] In a possible implementation, the first insulating layer includes a plurality of second openings, and on a plane perpendicular to the direction of the semiconductor stacking, projections of the second openings are located between projections of the first pad and the second pad.

[0020] In a possible implementation manner, the number of the second openings is the same as the number of the second pad extensions.

[0021] In a possible implementation manner, the second connecting electrode covers the second opening and completely fills the interior of the second opening.

[0022] In one possible embodiment, the light-emitting diode also includes a second insulating layer, which is formed on the first connecting electrode and the second connecting electrode. The second insulating layer includes a third opening portion to expose a portion of the surface of the first connecting electrode and a fourth opening portion to expose a portion of the surface of the second connecting electrode. On a plane perpendicular to the direction of the semiconductor stack, the projection of the third opening portion is located within the projection plane of the first connecting electrode, and the projection of the fourth opening portion is located within the projection plane of the second connecting electrode.

[0023] In a possible implementation manner, a minimum distance between an edge of the second connection electrode and an edge of the fourth opening is in a range of 4 μm to 12 μm.

[0024] In a possible implementation manner, the first pad is located in the third opening, and the second pad is located in the fourth opening.

[0025] In one possible embodiment, the light-emitting diode further includes a metal layer, the metal layer includes a reflective layer and a barrier layer, the reflective layer is arranged on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer, and partially exposes the barrier layer at the second opening, and the second connecting electrode is electrically connected to the barrier layer through the second opening.

[0026] In one possible embodiment, the light-emitting diode further includes a third insulating layer, which covers the edge and part of the surface of the semiconductor stack and is located between the second semiconductor layer and the reflective layer, and has a plurality of discontinuous fifth openings, and the reflective layer is electrically connected to the second semiconductor layer through the fifth openings.

[0027] In a possible implementation, the light emitting diode further includes a transparent conductive layer, the transparent conductive layer is located between the second semiconductor layer and the third insulating layer, and the transparent conductive layer, the reflective layer, and the blocking layer all avoid the through hole.

[0028] In a possible implementation, on a plane perpendicular to the direction of the semiconductor stack, a vertical projection area of ​​the transparent conductive layer is larger than a vertical projection area of ​​the reflective layer.

[0029] In a possible implementation, on a plane perpendicular to the direction of the semiconductor stack, projections of the transparent conductive layer, the reflective layer, and the blocking layer are all located within a projection plane of the second semiconductor layer.

[0030] In a possible implementation, the reflective layer includes a silver metal reflective layer.

[0031] In a possible implementation, on a plane perpendicular to the direction of the semiconductor stack, a projection surface of the first opening is located within a projection of the through hole.

[0032] In a possible implementation manner, the second electrode block is higher than the second pad.

[0033] In a possible implementation manner, the number of the second electrode blocks is the same as the number of the through holes close to the second pad.

[0034] In a possible implementation manner, the area of ​​the first pad is larger than that of the second pad.

[0035] In a second aspect, the present application further provides a light emitting diode, comprising:

[0036] A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence;

[0037] a through hole passing through the second semiconductor layer and the light-emitting layer to expose a portion of the surface of the first semiconductor layer;

[0038] a metal layer, located on the second semiconductor layer;

[0039] a first insulating layer formed on the semiconductor stack, comprising a first opening and a second opening, wherein the first opening exposes a portion of the surface of the first semiconductor layer, and the second opening exposes a portion of the surface of the metal layer;

[0040] a first connecting electrode formed on the first insulating layer and contacting the first semiconductor layer through the first opening;

[0041] a second connecting electrode formed on the first insulating layer and contacting the metal layer through the second opening;

[0042] a plurality of electrode blocks, located on the first connecting electrode;

[0043] In which, the first connecting electrode includes a first electrode connecting portion and a plurality of first electrode extension portions extending toward the second connecting electrode. On a plane perpendicular to the direction of the semiconductor stack, the projections of the through hole and the electrode block are both located within the projection plane of the first electrical connecting electrode, and the projections of the electrode block and the through hole do not overlap.

[0044] In a possible implementation, the light emitting diode further includes a second insulating layer, where the second insulating layer is formed on the first connecting electrode and the second connecting electrode, and the electrode block is formed on the second insulating layer.

[0045] In one possible embodiment, the electrode block includes a first electrode block and a second electrode block, the second electrode block is located on the second insulating layer, and on a plane perpendicular to the direction of the semiconductor stack, the projection of the second electrode block is located within the projection plane of the first electrode extension portion and is electrically insulated from the first electrode extension portion.

[0046] In a possible implementation manner, the first electrode block is located on the second insulating layer and is electrically insulated from the first connecting electrode; or, the first electrode block passes through the second insulating layer and is electrically connected to the first connecting electrode.

[0047] In one possible embodiment, the second insulating layer includes a third opening portion to expose a portion of the surface of the first connecting electrode and a fourth opening portion to expose a portion of the surface of the second connecting electrode. On a plane perpendicular to the direction of the semiconductor stack, the projection of the third opening portion is located within the projection plane of the first connecting electrode, and the projection of the fourth opening portion is located within the projection plane of the second connecting electrode.

[0048] In a possible embodiment, the light-emitting diode further includes a first solder pad and a second solder pad, the first solder pad is formed in the third opening portion, and the second solder pad is formed in the fourth opening portion, and on a plane perpendicular to the direction of the semiconductor stacking, the projection of the second opening portion does not overlap with the projection of the second solder pad.

[0049] In a possible implementation, the second connecting electrode includes a second electrode connecting portion and a plurality of second electrode extending portions extending toward the first connecting electrode, and the first electrode extending portions are staggered with the second electrode extending portions.

[0050] In one possible embodiment, the second connecting electrode completely fills the second opening, and the edge of the second connecting electrode is located on the upper surface of the first insulating layer. On a plane perpendicular to the direction of the semiconductor stacking, the projection of the second opening is located within the projection plane of the second electrode extension.

[0051] In a possible implementation manner, the second connecting electrode partially fills the second opening, and an edge of the second connecting electrode is located in the second opening.

[0052] In one possible embodiment, the metal layer includes a reflective layer and a blocking layer, the reflective layer is arranged on the second semiconductor layer, the blocking layer covers the reflective layer, the first insulating layer covers the blocking layer, and partially exposes the blocking layer at the second opening, and the second connecting electrode is electrically connected to the blocking layer through the second opening.

[0053] Compared with the prior art, the present invention has at least the following advantages:

[0054] The present application provides a light-emitting diode (LED), comprising a semiconductor stack, a through-hole disposed on the semiconductor stack, and a first insulating layer, and a first pad, a second pad, and a second electrode block disposed on the first insulating layer. The semiconductor stack comprises a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The first insulating layer comprises a first opening and a second opening. The first pad is electrically connected to the first semiconductor layer via the first opening, and the second pad is electrically connected to the second semiconductor layer via the second opening. The second pad comprises a second pad connection portion and a plurality of second pad extensions extending toward the first pad. The second electrode block is disposed between adjacent second pad extensions. The plurality of second electrode blocks disposed between the second pad connection portions improves the heat dissipation capability and reliability of the LED.

[0055] The present application provides a light-emitting diode, comprising a plurality of second openings provided in a first insulating layer, and a second connecting electrode formed on the first insulating layer and completely filled with the second openings, the second connecting electrode comprising a second electrode connecting portion and a plurality of second electrode extensions extending toward the first electrode. On a plane perpendicular to the direction of the semiconductor stack, the projections of the second openings are arranged within the projection plane of the second electrode extensions and between the projections of the first and second solder pads. This further increases the area of ​​the second solder pads, improves the heat dissipation capability of the light-emitting diode, enhances the robustness of the package soldering, and further enhances the reliability of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0057] Figure 1 Schematic diagram of a light emitting diode structure according to an embodiment of the present application.

[0058] Figure 2 According to the embodiment of the present application Figure 1 Schematic diagram of the cross-sectional structure taken along the interception line AA.

[0059] Figure 3 Schematic diagram of another light emitting diode structure according to an embodiment of the present application.

[0060] Figure 4 According to the embodiment of the present application Figure 3 Schematic diagram of the cross-sectional structure taken along the cutting line BB.

[0061] Figures 5 to 35 The present invention is a structural schematic diagram showing a process for preparing a light emitting diode according to an embodiment of the present application.

[0062] Illustration:

[0063] 100 substrate; 110 semiconductor stack; 110a through hole; 111 first semiconductor layer; 112 light emitting layer; 113 second semiconductor layer; 120 first insulating layer; 121 first insulating portion; 1211 outer edge; 122 second insulating portion; 1221 inner edge; 131 first connecting electrode; 1311 first electrode connecting portion; 1312 first electrode extension; 132 second connecting electrode; 1321 second electrode connecting portion; 1322 second electrode extension; 141 first pad, 1411 first pad connecting portion Connecting portion; 1412 first pad extension portion; 1413 electrode block; 142 second pad; 1421 second pad connecting portion; 1422 second pad extension portion; 150 transparent conductive layer; 160 reflective layer; 170 blocking layer; 180 third insulating layer; 190 second insulating layer; 201 first electrode block; 202 second electrode block; OP1 first opening portion; OP2 second opening portion; OP3 third opening portion; OP4 fourth opening portion; OP5 fifth opening portion; OP6 sixth opening portion; OP7 seventh opening portion. DETAILED DESCRIPTION

[0064] The following describes the implementation of the present application through specific embodiments. Those skilled in the art will readily understand the other advantages and benefits of the present application from the disclosure herein. The present application may also be implemented or operated through various other specific implementations, and the details of the present application may be modified or altered based on different viewpoints and applications without departing from the spirit of the present application.

[0065] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be internal communication between two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances. In addition, the terms "first" and "second" are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0066] According to one aspect of the present application, a light emitting diode is provided. Figures 1 to 4 , including a substrate 100 , a semiconductor stack 110 disposed on the substrate 100 , a through hole 110 a and a first insulating layer 120 disposed on the semiconductor stack 110 , and a first pad 141 and a second pad 142 disposed on the first insulating layer 120 .

[0067] The semiconductor stack 110 includes a first semiconductor layer 111, a light-emitting layer 112, and a second semiconductor layer 113 stacked in sequence from bottom to top. The through hole 110a extends downward from the surface of a preset position of the second semiconductor layer 113 and penetrates the second semiconductor layer 113 and the light-emitting layer 112 until a hole structure is exposed on a portion of the surface of the first semiconductor layer 111.

[0068] The first insulating layer 120 is disposed on the upper surface of the semiconductor stack 110, on the edge steps of the semiconductor stack 110, and on a portion of the surface of the substrate 100 adjacent to the semiconductor stack 110. The first insulating layer 120 also fills the through hole 110a. The first insulating layer 120 includes a first opening OP1 and a second opening OP2. The first opening OP1 is located within the through hole 110a and exposes a portion of the surface of the first semiconductor layer 111.

[0069] The first solder pad 141 and the second solder pad 142 are formed relatively to each other on the semiconductor stack 110. The first solder pad 141 is electrically connected to the first semiconductor layer 111 through the first opening portion OP1, and the second solder pad 142 is electrically connected to the second semiconductor layer 112 through the second opening portion OP2. The second solder pad 142 includes a second solder pad connecting portion 1421 and a plurality of second solder pad extension portions 1422 extending toward the first solder pad 141.

[0070] Several electrode blocks include a first electrode block 201 and a second electrode block 202. The second electrode block 202 is arranged between two adjacent second pad extensions. On a plane perpendicular to the direction of the semiconductor stack 110, the projections of the first pad 141, the second pad 142, the through hole 110a and the second electrode block 202 do not overlap with each other.

[0071] The light-emitting diode provided in the present application adds a plurality of second electrode blocks 202 on a side close to the second solder pad 142, and the second electrode blocks 202 are arranged between the second solder pad extensions 1422, so as to expand the surface metal coverage area of ​​the light-emitting diode, thereby improving the surface heat diffusion capacity of the light-emitting diode and increasing the reliability of the light-emitting diode.

[0072] In one embodiment, the substrate 100 serves as a growth base for the epitaxial layer 110 and may be a conductive material, an insulating material, or a light-transmitting material with excellent thermal conductivity, such as a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a zinc oxide substrate, a silicon substrate, a gallium arsenide substrate, or a gallium phosphide substrate. Among them, a sapphire substrate is a preferred substrate material for growing the epitaxial layer 110.

[0073] Preferably, the substrate 100 can be removed by a separation process in a subsequent process, for example, by using a laser lift-off (LLO) method or a chemical lift-off (CLO) method.

[0074] See also Figure 5 and Figure 6 In one embodiment, the semiconductor stack 110 can be formed on the substrate 100 using methods including metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), etc. The first semiconductor layer 111, the light emitting layer 112, and the second semiconductor layer 113 include compound semiconductors of the group III gallium nitride series, such as GaN, AlN, InGaN, AlGaN, InAlGaN, and at least one of these groups. The first semiconductor layer 111 is connected to the substrate 100 and can be a semiconductor layer doped with an N-type dopant, such as Si, Ge, Se, Te, C, etc., which is used to provide electrons. The second semiconductor layer 113 can be a semiconductor layer doped with a P-type dopant, such as Mg, Zn, Be, Ca, Sr, Ba, etc., which is used to provide holes. The light-emitting layer 112 is located between the first semiconductor layer 111 and the second semiconductor layer 113. It is a layer that recombines the electrons provided by the first semiconductor layer 111 and the holes provided by the second semiconductor layer 113 and outputs light of a constant wavelength. It can be composed of alternatingly stacked potential well layers and barrier layers, or a semiconductor film with a multi-layer quantum well structure.

[0075] In one embodiment, the number of through holes 110a includes multiple shapes, including but not limited to polygons such as circles, rectangles, or hexagons, and can be distributed with uniform or non-uniform spacing. For example, in this embodiment, the shapes of through holes 110a include circles and squares with curved corners. The through hole 110a near the side of the second pad 142 is a square with curved corners, and the remaining through holes 110a are all circles. The different shapes of the through holes are more conducive to quickly distinguishing one side of the first pad 141 from the other side of the second pad 142 in subsequent processes. After power is applied, the multiple spaced through holes 110a can improve the current spreading capability and improve the luminous efficiency of the light-emitting diode.

[0076] It should be noted that the specific number and distribution of through holes 110a in the semiconductor stack can be flexibly set according to the size of the LED. The larger the LED size, the more through holes 110a are required to ensure voltage requirements. For example, in this embodiment, the through holes 110a on the side near the first pad 141 and the through holes 110a on the side near the second pad 142 are arranged in an asymmetrical manner.

[0077] See also Figure 7 and Figure 8In one embodiment, the light-emitting diode further includes a transparent conductive layer 150. The transparent conductive layer 150 is formed on the second semiconductor layer 113 by physical vapor deposition or chemical vapor deposition, forming an ohmic contact with the second semiconductor layer 113 and configured to disperse and transmit externally injected current horizontally to the surface of the second semiconductor layer 113 in contact therewith. The transparent conductive layer 150 has excellent light transmittance, and the light emitted by the light-emitting layer 112 substantially does not cause energy loss when passing through the transparent conductive layer 150. The transparent conductive layer 150 may include indium tin oxide, zinc indium tin oxide, zinc tin oxide, gallium indium tin oxide, indium gallium oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide, and the like.

[0078] Preferably, the transparent conductive layer 150 is located within the vertical projection of the second semiconductor layer 113 and covers an area between 80% and 95% of the vertical projection of the second semiconductor layer 113, substantially covering the entire second semiconductor layer 113. Increasing the contact area between the transparent conductive layer 150 and the second semiconductor layer 113 allows for more uniform transfer of externally injected current to the entire second semiconductor layer 113 of the light-emitting diode, thereby reducing voltage. The transparent conductive layer 150 is located within the vertical projection of the second semiconductor layer 113, which means that the coverage of the transparent conductive layer 150 does not extend into the through-hole 110a or into the edge steps of the semiconductor stack 110, thereby avoiding the risk of short circuits caused by direct contact between the first semiconductor layer 111 and the second semiconductor layer 113.

[0079] See also Figure 9 and Figure 10 In one embodiment, the light-emitting diode further includes a third insulating layer 180. The third insulating layer 180 is formed on the semiconductor stack 110 and includes a first portion covering the surface of the transparent conductive layer 150, and a second portion extending to cover the edge step of the semiconductor stack 110 and the interior of the through-hole 110a. The first portion and the second portion are continuous with each other. The subsequently formed first insulating layer 120 directly contacts the second portion within the edge step and the through-hole 110a of the semiconductor stack 110 and is located above the second portion. Within the vertical projection range of the transparent conductive layer 150, the first portion may be provided with a plurality of discontinuous fifth openings OP5 to expose a portion of the surface of the transparent conductive layer 150. The fifth openings OP5 may be circular or polygonal in shape, and may also be distributed in a parallel, juxtaposed, or cross-alternating manner.

[0080] See also Figure 11 In another embodiment, the third insulating layer 180 only covers the transparent conductive layer 150 and covers the side of the transparent conductive layer 150, that is, the first part, and the subsequently formed first insulating layer 120 directly contacts the edge step of the semiconductor stack 110 and the second semiconductor layer 113 at the bottom of the through hole 110a.

[0081] Preferably, the first portion of the third insulating layer 180 can be patterned by photolithography or etching to form the fifth opening OP5. The third insulating layer 180 can include a multi-layer structure. For example, a Bragg reflector (DBR) can be formed by alternately stacking dielectric layers with different refractive indices by physical vapor deposition or chemical vapor deposition. The material of the third insulating layer 180 can include at least one of SiO2, SiN, SiOxNy, TiO2, Si3N4, Al2O3, TiN, AlN, ZrO2, TiAlN, TiSiN, HfO, TaO2, and MgF2.

[0082] See also Figures 12 to 14 In one embodiment, the light-emitting diode further includes a metal layer composed of a stacked reflective layer 160 and a barrier layer 170. The reflective layer 160 is disposed on the third insulating layer 180 and plays a role in light reflection, which can further improve the light extraction efficiency of the light-emitting diode. The barrier layer 170 is disposed on the reflective layer 160 and covers the edge of the reflective layer 160 to avoid the problem of degradation of the reflectivity of the reflective layer 160 due to oxidation of the surface of the reflective layer 160. At the same time, the barrier layer 170 can also block the metal migration of the reflective layer 160. The edge of the reflective layer 160 can be disposed on the outside, inside or overlapped with the edge of the transparent conductive layer 150, and form an electrical contact with the transparent conductive layer 150 through the fifth opening OP5, diffusing the current through the transparent conductive layer 150 to the second semiconductor layer 113. Alternatively, see Figure 15 In another embodiment, the reflective layer may be directly disposed on the transparent conductive layer 150 and form electrical contact with the transparent conductive layer 150 , that is, the third insulating layer 180 is no longer formed on the transparent conductive layer 150 .

[0083] In one embodiment, the reflective layer 160 is located within the vertical projection of the transparent conductive layer 150. That is, the edge of the reflective layer 160 is located within the transparent conductive layer 150. This further increases the contact area between the transparent conductive layer 150 and the second semiconductor layer 113, thereby reducing the voltage. The barrier layer 170 covers the edge of the reflective layer 160 and is also located within the vertical projection of the transparent conductive layer 150. In other words, the transparent conductive layer 150, the reflective layer 160, and the barrier layer 170 are all located within the vertical projection of the second semiconductor layer 113, avoiding the location of the through hole 110a.

[0084] In another embodiment, the step of forming the barrier layer 170 on the reflective layer 160 can be eliminated, and at the same time, the area of ​​the reflective layer 160 can be further increased to further increase the light reflecting area of ​​the reflective layer 160. For example, see Figure 16The reflective layer 160 may be larger than the transparent conductive layer 150 in area, so that the transparent conductive layer 150 is covered under the reflective layer 160 .

[0085] Reflective layer 160 and barrier layer 170 are composed of metallic materials. Reflective layer 160 can include one or more combinations of metals such as Ag, Al, Ti, W, and Ni, and has the property of reflecting light. The light reflectivity of reflective layer 140 is as high as over 90%. Preferably, reflective layer 160 is formed of metallic silver. Barrier layer 170 can include one or more combinations of metals such as Cr, Ti, Ni, Au, Al, and Pt, and has the property of blocking ion migration and diffusion.

[0086] Specifically, when silver metal is used as the material for the reflective layer 160 and electricity is applied, the silver metal reflective layer 160 may undergo metal migration due to factors such as heat or electricity. This migration may diffuse into the interior of the semiconductor stack 110, causing local leakage and, in turn, leading to failure of the light-emitting diode. Furthermore, the silver metal reflective layer 160 is also susceptible to corrosion and oxidation by water vapor, resulting in degradation of the reflectivity of the reflective layer 160. Therefore, a barrier layer 170 is required to cover the surface and edges of the reflective layer 160 to protect the reflective layer 160. In other words, the conductive combination of the reflective layer 160 and the barrier layer 170 can effectively prevent the diffusion of silver metal into the light-emitting diode, while also utilizing the excellent conductivity of silver metal to reduce the voltage drop across the transparent conductive layer 150. Furthermore, the high reflectivity of silver metal can be utilized to improve the light extraction efficiency of the light-emitting diode.

[0087] See also Figures 17 to 25 In one embodiment, the first insulating layer 120 is formed on the blocking layer 170 and covers the edge steps and the through hole 110a of the semiconductor stack 110, and then the first insulating layer 120 is patterned to form a first opening OP1 and a second opening OP2 by light irradiation and etching.

[0088] There are multiple first openings OP1, corresponding one to one with the through holes 110a. The first openings OP1 vertically penetrate the first insulating layer 120 and the third insulating layer 180 to expose a portion of the surface of the first semiconductor layer 111, providing a conductive path for the subsequently formed first connection electrode 131 to contact and electrically connect with the first semiconductor layer 111.

[0089] Preferably, the projection of the first opening OP1 lies within the projection of the through-hole 110a on a plane perpendicular to the semiconductor stack 110. In other words, the opening area of ​​the through-hole 110a must be larger than the opening area of ​​the first opening OP1. This ensures that the subsequently formed connecting electrode 130 is electrically connected only to the bottom first semiconductor layer 111, while being electrically isolated from the other conductive layers by the first insulating layer 120. The other conductive layers include the second semiconductor layer 113, the transparent conductive layer 150, the reflective layer 160, and the barrier layer 170.

[0090] The second opening OP2 vertically penetrates the second insulating layer 190 to expose a portion of the surface of the barrier layer 170. Its function is to provide a conductive path for the electrical connection between the subsequently formed second connection electrode 132 and the second semiconductor layer 113. Therefore, the second opening OP2 must at least partially overlap with the projection coverage of the subsequently formed second connection electrode 132. Accordingly, the second opening OP2 may also be arranged in a square, circular, annular, or other irregular shape, with one or more openings provided, and may be arranged symmetrically or staggered.

[0091] See also Figures 17 to 20 In one embodiment, the second opening OP2 is an annular opening that divides the first insulating layer 120 into a first insulating portion 121 and a second insulating portion 122, with the first insulating portion 121 surrounding the second insulating portion 122. The first connecting electrode 131 is located on the first insulating portion 121 and fills the first opening OP1 to electrically connect to the first semiconductor layer 111. The second connecting electrode 132 is located on the second insulating portion 122 and partially fills the second opening OP2 to electrically connect to the second semiconductor layer 113. On a plane perpendicular to the direction of the semiconductor stack 110, the projection of the first connecting electrode 131 is located within the projection plane of the first insulating portion 121, and the projection of the second insulating portion 122 is located within the projection plane of the second connecting electrode 132.

[0092] Preferably, see Figure 21 , Figure 21 for Figure 20 In the enlarged view of the local area C, the second opening portion OP2 includes an outer edge 1211 close to the first insulating portion 121 and an inner edge 1221 close to the second insulating portion 122. The minimum distance between the first connecting electrode 131 and the outer edge 1211 is between 1μm and 15μm, and the second connecting electrode 132 covers the inner edge 1221 and the minimum distance from the inner edge 1221 is between 1μm and 15μm.

[0093] See also Figures 22 to 25In another embodiment, the second opening portion OP2 is a plurality of discontinuous irregular openings distributed in the middle of the first insulating layer. The first connecting electrode 131 is located on the first insulating layer 120 and fills the first opening portion OP1 to be electrically connected to the first semiconductor layer 111. The second connecting electrode 132 is located on the first insulating layer 120 and fills the second opening portion OP2 to be electrically connected to the second semiconductor layer 113. That is, in a direction perpendicular to the semiconductor stack 110, the projection of the second opening portion OP2 is located within the projection plane of the second connecting electrode 132, so that the second connecting electrode 132 can completely fill the interior of the second opening portion OP2, and the edge of the second connecting electrode 132 can be located on the first insulating layer.

[0094] Preferably, the second connection electrode 132 includes a second electrode connection portion 1321 and a plurality of second electrode extensions 1322 extending toward the first connection electrode 131. On a plane perpendicular to the semiconductor stack 110, the projection of the second opening OP2 is located within the projection plane of the second electrode extensions, and the number of the second openings OP2 is the same as the number of the second electrode extensions 1322. The second openings OP2 are located closer to the second electrode extensions 1322 of the first electrode 131. The closer the second openings OP2 are to the horizontal centerline of the light-emitting diode, the more effectively they can reduce the current transmission path during current injection, thereby reducing the current congestion effect.

[0095] It should be noted that in any of the above-described embodiments, the first connecting electrode 131 and the second connecting electrode 132 are separated by the annular sixth opening OP6, exposing a portion of the surface of the first insulating layer 120, thereby isolating the first connecting electrode 131 from the second connecting electrode 132. Furthermore, the minimum opening size of the sixth opening OP6 may vary depending on the configuration of the second opening OP2. For example, when the second opening OP2 is a continuous annular opening, the minimum spacing between the sixth openings OP6 should be no less than 13 μm to ensure that the edge of the second connecting electrode 132 is within the second opening OP2 and that the first connecting electrode 131 is electrically insulated from the second connecting electrode 132 by being spaced away from the second opening OP2. When the second opening OP2 is a plurality of discontinuous openings, the second connecting electrode 132 covers and completely fills the second opening OP2. The minimum spacing between the sixth openings OP6 can be further reduced to 10 μm, thereby increasing the projected area of ​​the second connecting electrode 132 on the semiconductor stack.

[0096] See also Figure 19 and Figure 24In one embodiment, the first connecting electrode 131 includes a first electrode connecting portion 1311 and a plurality of first electrode extension portions 1312 extending toward the second connecting electrode 132. The first electrode extension portions 1312 and the second electrode extension portions 1322 are staggered, and the width of the first electrode extension portions 1312 is smaller than the width of the second electrode extension portions 1322, thereby enabling the second electrode extension portions 1322 to avoid the position of the through hole 110a.

[0097] Preferably, the first connection electrode 131 and the second connection electrode 132 may be a single-layer or stacked-layer structure, including conductive metal materials or alloy materials such as Au, Ti, Ni, Al, Ag, Cr, and Pt.

[0098] See also Figures 26 to 29 In one embodiment, the light-emitting diode further includes a second insulating layer 190. The second insulating layer 190 is formed on the first connecting electrode 131 and the second connecting electrode 132. The second insulating layer 190 is patterned by light irradiation and etching to form a third opening OP3 and a fourth opening OP4. The third opening OP3 is located on the first connecting electrode 131 and exposes a portion of the surface of the first connecting electrode 131. The fourth opening OP4 is located on the second connecting electrode 132 and exposes a portion of the surface of the second connecting electrode 132. The third opening OP3 and the fourth opening OP4 provide channels for the light-emitting diode to achieve external electrical connection.

[0099] Preferably, on a plane perpendicular to the semiconductor stack 110 , the projection of the third opening OP3 is located within the projection of the first connection electrode 131 , and the projection of the fourth opening OP4 is located within the projection of the second connection electrode 132 .

[0100] Preferably, the second insulating layer 190 covers the through hole 110a and fills the sixth opening OP6, further electrically isolating the first connection electrode 131 from the second connection electrode 132. Furthermore, the second insulating layer 190 extends to cover the edge step of the semiconductor stack 110 to protect the first connection electrode 131 located at the edge step of the semiconductor stack 110.

[0101] It should be noted that all through holes 110a are located within the coverage range of the first connecting electrode 131. Although the projection of the third opening portion OP3 is located within the projection of the first connecting electrode 131, it does not include the range covered by the through hole 110a. That is to say, the formation of the third opening portion OP3 and the fourth opening portion OP4 needs to avoid the through hole 110a.

[0102] See also Figures 26 to 33In one embodiment, the first solder pad 141 is arranged in the third opening portion OP3, and the second solder pad 142 is arranged in the fourth opening portion OP4. That is, the projections of the first solder pad 141 and the second solder pad 142 on the plane perpendicular to the direction of the semiconductor stack 110 do not overlap with the projection of the through hole 110a, thereby improving the surface flatness of the first solder pad 141 and the second solder pad 142.

[0103] Preferably, the vertical projection area of ​​the first solder pad 141 accounts for a proportion of the vertical projection area of ​​the third opening portion OP3 in a range between 90% and 100%, and the vertical projection area of ​​the second solder pad 142 accounts for a proportion of the vertical projection area of ​​the fourth opening portion OP4 in a range between 90% and 100%, so as to further expand the actual area of ​​the first solder pad 141 and the second solder pad 142.

[0104] Preferably, the first pad 141 and the second pad 142 may be composed of a single layer or multiple layers, and may include conductive metal materials such as Au, Ti, Ni, Al, Ag, Cr, and Pt.

[0105] It should be noted that further expanding the actual area of ​​the first solder pad 141 and the second solder pad 142 is more conducive to increasing the bonding area between the light-emitting diode and the packaging substrate in the subsequent packaging process, thereby improving the heat dissipation performance. Expanding the opening range of the third opening OP3 and the fourth opening OP4 can expand the actual area of ​​the first solder pad 141 and the second solder pad 142, which is more conducive to improving the heat dissipation performance of the light-emitting diode.

[0106] In this embodiment, if the second opening OP2 is changed from a continuous ring to a plurality of discontinuous through holes, the minimum distance between the fourth opening OP4 and the second connection electrode 132 can be reduced, thereby increasing the actual area of ​​the fourth opening OP4. Figure 30 for Figure 29 A partial enlarged view of the middle area D, see Figure 30 The minimum distance d1 between the edge of the second connection electrode 132 close to the second opening OP2 and the edge of the fourth opening OP4 is between 1um and 10um, which makes the area ratio between the fourth opening OP4 and the second connection electrode 132 reach more than 80%. When the second opening OP2 is a continuous ring opening, see Figure 31 , Figure 31 for Figure 27The partial enlarged view of the middle area E shows that the second connection electrode 132 needs to be partially filled in the second opening OP2 to maintain electrical connection with the second semiconductor layer 113, and thus the minimum distance d2 between the fourth opening OP4 and the second connection electrode 132 is limited to a range of not less than 20 μm, which means that the area ratio between the fourth opening OP4 and the second connection electrode 132 is only less than 70%. Figure 32 and Figure 33 That is to say, through multiple discontinuous second openings OP2, the actual area of ​​the fourth opening OP4 can be directly expanded, thereby expanding the area of ​​the second pad 142, and increasing the effective contact area between the external electrode and the second pad 142 in the subsequent packaging process.

[0107] See also Figure 32 and Figure 33 In one embodiment, the second pad 142 includes a second pad connecting portion 1421 and a plurality of second pad extensions 1422 extending toward the first pad 141, and also includes a second electrode block 202 located between two adjacent second pad extensions 1422. That is, the second electrode block 202 is formed above the second insulating layer 190 between the second pad extensions 1422, and is electrically insulated from the second connecting electrode 132. The surface height of the second electrode block 202 is higher than that of the second pad 142.

[0108] See also Figure 33 Preferably, the projection of the second opening portion OP2 is located outside the projection plane of the second pad extension portion 1422, and at the same time is located within the projection plane of the second connection electrode 132. That is to say, the second opening portion OP2 is arranged between the first pad 141 and the second pad extension portion 1422, close to the horizontal center line of the light-emitting diode, thereby effectively reducing the current transmission path when current is injected, thereby reducing the current congestion effect.

[0109] Preferably, the number of second opening portions OP2 is the same as the number of second pad extensions 1422, the number of second electrode blocks 202 is the same as the number of through holes 110a close to the side of the second pad 142, and on a plane perpendicular to the direction of the semiconductor stack 110, the projection of the second electrode blocks 202 is located within the projection plane of the first electrode extension 1322.

[0110] See also Figure 32 and Figure 33In one embodiment, first pad 141 includes a first pad connecting portion 1411 and multiple first pad extensions 1412 extending toward second pad 142. Also included is a first electrode block 201 positioned between two adjacent first pad extensions 1412 to further enhance the heat dissipation capability of the LED. On a plane perpendicular to semiconductor stack 110, the projections of first pad 141, through-hole 110a, and first electrode block 201 do not overlap.

[0111] See also Figure 26 and Figure 28 Preferably, before forming the first electrode block 201, the method further includes etching a seventh opening OP7 on the second insulating layer 190 to match the second electrode block 201. The seventh opening OP7 exposes a portion of the surface of the first connection electrode 131, and the position of the through hole 110a also needs to be avoided during the formation process. Figure 32 and Figure 33 The second electrode block 201 is formed in the seventh opening OP7 so that the second electrode block 201 can be flush with the surface of the first pad 141 .

[0112] See also Figure 34 and Figure 35 In another embodiment, the first pad 141 is disposed around the periphery of a portion of the through-hole 110a, fully utilizing the area between the first pad extensions 1412. This eliminates the need for an additional step of forming the first electrode block 201, further increasing the actual area of ​​the first pad 141. Correspondingly, during the etching process, the third opening OP3 is also formed around the periphery of a portion of the through-hole 110a, allowing the first pad 141 to be formed within the third opening.

[0113] It should be noted that the specific structure of the first pad 141 and the second pad 142 will directly affect the selection of the welding method and the welding yield rate in the subsequent packaging process. Figure 30 and Figure 31 In this embodiment, the first pad 141 and the second pad 142 have the same area, and can be soldered using solder paste, flux combined with reflow soldering or hot pressing soldering. Figure 34 and Figure 35 In this embodiment, the area of ​​the first pad 141 is significantly larger than that of the second pad 142. If solder paste bonding is continued, the amount of tin absorbed by the first pad 141 will be greater than that of the second pad 142, which may cause the core particle to be skewed. However, by using flux in combination with reflow soldering and hot pressing soldering processes, normal soldering can be maintained without affecting the soldering quality even when the areas of the first pad 1141 and the second pad 142 are not equal.

[0114] See also Figures 32 to 35 Preferably, while increasing the actual area of ​​the first and second solder pads 141, 142, it is also necessary to maintain the minimum spacing between the first and second solder pads 141, 142 within a preset safety threshold to avoid the risk of shorting electrodes of different electrical properties during the packaging process. Preferably, the minimum distance between the first and second solder pads 141, 142 ranges from 50μm to 150μm, with 50μm, 80μm, 100μm, and 150μm being preferred distances between the first and second solder pads 141, 142.

[0115] The present application provides a light-emitting diode (LED) comprising a semiconductor stack 110, a through hole 110a disposed on the semiconductor stack 110, and a first insulating layer 120, as well as a first pad 141, a second pad 142, and a second electrode block 202 disposed on the first insulating layer 120. The semiconductor stack 110 comprises a first semiconductor layer 111, a light-emitting layer 112, and a second semiconductor layer 113. The first insulating layer 120 comprises a first opening OP1 and a second opening OP2. The first pad 141 is electrically connected to the first semiconductor layer 111 via the first opening OP1, and the second pad 142 is electrically connected to the second semiconductor layer 113 via the second opening OP2. The second pad 142 comprises a second pad connecting portion 1421 and a plurality of second pad extensions 1422 extending toward the first pad 141. The second electrode block 202 is disposed between adjacent second pad extensions 1422. The plurality of second electrode blocks 202 disposed between the second pad connecting portions 1422 improves the heat dissipation capability and reliability of the LED.

[0116] The present application provides a light-emitting diode (LED), comprising a plurality of second openings OP2 provided in a first insulating layer 120, and a second connecting electrode 132 formed on the first insulating layer 120 and completely filling the second openings OP2. The second connecting electrode 132 comprises a second electrode connecting portion 1321 and a plurality of second electrode extensions 1322 extending toward the first connecting electrode 131. On a plane perpendicular to the semiconductor stack 110, the projection of the second openings OP2 is positioned within the projection plane of the second electrode extensions 1322 and between the projections of the first solder pad 141 and the second solder pad 142. This further increases the area of ​​the second solder pad 142, improves the heat dissipation capability of the LED, enhances the robustness of the package soldering, and further enhances the reliability of the LED.

[0117] The above is only a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and replacements can be made without departing from the technical principles of the present application. These improvements and replacements should also be regarded as the scope of protection of the present application.

Claims

1. A light emitting diode, characterized in that: include: A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence; a through hole, penetrating the second semiconductor layer and the light-emitting layer, exposing a portion of the surface of the first semiconductor layer; a first insulating layer, disposed on the semiconductor stack, having a first opening and a second opening, wherein the first opening exposes a portion of the surface of the first semiconductor layer; a first pad formed on the semiconductor stack and electrically connected to the first semiconductor layer through the first opening, wherein a projection of the first pad does not overlap with a projection of the through hole on a plane perpendicular to a direction of the semiconductor stack; A second solder pad is formed on the semiconductor stack, arranged opposite to the first solder pad, and electrically connected to the second semiconductor layer through the second opening; the second solder pad includes a second solder pad connecting portion and a plurality of second solder pad extensions extending toward the first solder pad, and a second electrode block is provided between adjacent second solder pad extensions. On a plane perpendicular to the direction of the semiconductor stack, the projections of the second solder pad, the through hole and the second electrode block do not overlap with each other.

2. The light emitting diode according to claim 1, characterized in that The first pad includes a first pad connecting portion and a plurality of first pad extension portions extending toward the second pad, and a first electrode block is provided between adjacent first pad extension portions. On a plane perpendicular to the direction of the semiconductor stacking, the projections of the first pad, the through hole and the first electrode block do not overlap with each other.

3. The light emitting diode according to claim 1, characterized in that The device further includes a first connecting electrode and a second connecting electrode. The first connecting electrode is electrically connected to the first semiconductor layer through the first opening, and the second connecting electrode is electrically connected to the second semiconductor layer through the second opening.

4. The light emitting diode according to claim 3, characterized in that The first insulating layer includes a first insulating portion and a second insulating portion. The first insulating portion surrounds the second insulating portion and is separated by a ring-shaped second opening.

5. The light emitting diode according to claim 4, characterized in that The first connecting electrode is located on the first insulating portion, the second connecting electrode is located on the second insulating portion, and partially fills the second opening portion; on a plane perpendicular to the direction of the semiconductor stacking, the projection of the first connecting electrode is located within the projection plane of the first insulating portion, and the projection of the second insulating portion is located within the projection plane of the second connecting electrode.

6. The light emitting diode according to claim 4, characterized in that The second opening portion includes an outer edge close to the first insulating portion and an inner edge close to the second insulating portion, the minimum distance between the first connecting electrode and the outer edge ranges from 1 μm to 15 μm, and the second connecting electrode covers the inner edge and the minimum distance from the inner edge ranges from 1 μm to 15 μm.

7. The light emitting diode according to claim 3, characterized in that The first insulating layer includes a plurality of second openings. On a plane perpendicular to the direction of the semiconductor stacking, projections of the second openings are located within a projection plane of the second connecting electrode.

8. The light emitting diode according to claim 7, characterized in that The second connection electrode includes a second electrode connection portion and a plurality of second electrode extensions extending toward the first pad. On a plane perpendicular to the direction of the semiconductor stack, a projection of the second opening is located within a projection plane of the second electrode extensions.

9. The light emitting diode according to claim 7, characterized in that The first insulating layer includes a plurality of second openings. On a plane perpendicular to the direction of the semiconductor stacking, projections of the second openings are located between projections of the first pad and the second pad.

10. The light emitting diode according to claim 7, characterized in that The number of the second openings is the same as the number of the second pad extensions.

11. The light emitting diode according to any one of claims 7 to 10, characterized in that: The second connection electrode covers the second opening and completely fills the inside of the second opening.

12. The light emitting diode according to claim 3, characterized in that It also includes a second insulating layer, which is formed on the first connecting electrode and the second connecting electrode. The second insulating layer includes a third opening portion to expose a portion of the surface of the first connecting electrode and a fourth opening portion to expose a portion of the surface of the second connecting electrode. On a plane perpendicular to the direction of the semiconductor stack, the projection of the third opening portion is located within the projection plane of the first connecting electrode, and the projection of the fourth opening portion is located within the projection plane of the second connecting electrode.

13. The light emitting diode according to claim 12, characterized in that The minimum distance between the edge of the second connection electrode and the edge of the fourth opening is between 4 μm and 12 μm.

14. The light emitting diode according to claim 12, characterized in that The first pad is located in the third opening, and the second pad is located in the fourth opening.

15. The light emitting diode according to claim 3, characterized in that It also includes a metal layer, which includes a reflective layer and a barrier layer. The reflective layer is arranged on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer, and a portion of the barrier layer is exposed at the second opening, and the second connecting electrode is electrically connected to the barrier layer through the second opening.

16. The light emitting diode according to claim 15, characterized in that It also includes a third insulating layer, which covers the edge and part of the surface of the semiconductor stack and is located between the second semiconductor layer and the reflective layer. It has a plurality of discontinuous fifth openings, and the reflective layer is electrically connected to the second semiconductor layer through the fifth openings.

17. The light emitting diode according to claim 16, characterized in that The invention also includes a transparent conductive layer, which is located between the second semiconductor layer and the third insulating layer. The transparent conductive layer, the reflective layer and the blocking layer all avoid the through hole.

18. The light emitting diode according to claim 17, characterized in that On a plane perpendicular to the direction of the semiconductor stack, a vertical projection area of ​​the transparent conductive layer is larger than a vertical projection area of ​​the reflective layer.

19. The light emitting diode according to claim 17, characterized in that On a plane perpendicular to the direction of the semiconductor stacking layer, the projections of the transparent conductive layer, the reflective layer and the blocking layer are all located within the projection plane of the second semiconductor layer.

20. The light emitting diode according to any one of claims 15 to 19, characterized in that: The reflective layer includes a silver metal reflective layer.

21. The light emitting diode according to claim 1, characterized in that On a plane perpendicular to the direction of the semiconductor stacking, a projection surface of the first opening is located within a projection of the through hole.

22. The light emitting diode according to claim 1, characterized in that The second electrode block is higher than the second pad.

23. The light emitting diode according to claim 1, characterized in that The number of the second electrode blocks is the same as the number of the through holes on a side close to the second pad.

24. The light emitting diode according to claim 1, characterized in that The first pad has a larger area than the second pad.

25. A light emitting diode, characterized in that: include: A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence; a through hole passing through the second semiconductor layer and the light-emitting layer to expose a portion of the surface of the first semiconductor layer; a metal layer, located on the second semiconductor layer; a first insulating layer formed on the semiconductor stack, comprising a first opening and a second opening, wherein the first opening exposes a portion of the surface of the first semiconductor layer, and the second opening exposes a portion of the surface of the metal layer; a first connecting electrode formed on the first insulating layer and contacting the first semiconductor layer through the first opening; a second connecting electrode formed on the first insulating layer and contacting the metal layer through the second opening; a plurality of electrode blocks, located on the first connecting electrode; In which, the first connecting electrode includes a first electrode connecting portion and a plurality of first electrode extension portions extending toward the second connecting electrode. On a plane perpendicular to the direction of the semiconductor stack, the projections of the through hole and the electrode block are both located within the projection plane of the first electrical connecting electrode, and the projections of the electrode block and the through hole do not overlap.

26. The light emitting diode according to claim 25, characterized in that The device further includes a second insulating layer formed on the first connecting electrode and the second connecting electrode.

27. The light emitting diode according to claim 26, characterized in that The electrode block includes a first electrode block and a second electrode block. The second electrode block is located on the second insulating layer. On a plane perpendicular to the direction of the semiconductor stack, the projection of the second electrode block is located within the projection plane of the first electrode extension portion and is electrically insulated from the first electrode extension portion.

28. The light emitting diode according to claim 27, characterized in that The first electrode block is located on the second insulating layer and is electrically insulated from the first connecting electrode; or the first electrode block passes through the second insulating layer and is electrically connected to the first connecting electrode.

29. The light emitting diode according to claim 26, characterized in that The second insulating layer includes a third opening portion to expose a portion of the surface of the first connecting electrode and a fourth opening portion to expose a portion of the surface of the second connecting electrode. On a plane perpendicular to the direction of the semiconductor stack, the projection of the third opening portion is located within the projection plane of the first connecting electrode, and the projection of the fourth opening portion is located within the projection plane of the second connecting electrode.

30. The light emitting diode according to claim 29, characterized in that It also includes a first solder pad and a second solder pad, the first solder pad is formed in the third opening portion, and the second solder pad is formed in the fourth opening portion. On a plane perpendicular to the direction of the semiconductor stacking, the projection of the second opening portion does not overlap with the projection of the second solder pad.

31. The light emitting diode according to claim 25, characterized in that The second connecting electrode includes a second electrode connecting portion and a plurality of second electrode extending portions extending toward the first connecting electrode, and the first electrode extending portions are staggered with the second electrode extending portions.

32. The light emitting diode according to claim 31, characterized in that The second connecting electrode completely fills the second opening, and the edge of the second connecting electrode is located on the upper surface of the first insulating layer. On a plane perpendicular to the direction of the semiconductor stacking, the projection of the second opening is located within the projection plane of the second electrode extension.

33. The light emitting diode according to claim 31, characterized in that The second connecting electrode partially fills the second opening, and an edge of the second connecting electrode is located in the second opening.

34. The light emitting diode according to claim 25, characterized in that The metal layer includes a reflective layer and a barrier layer, the reflective layer is arranged on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer, and partially exposes the barrier layer at the second opening, and the second connecting electrode is electrically connected to the barrier layer through the second opening.

Citation Information

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