Low voltage difference linear voltage regulator circuit and its chip, electronic equipment

Abstract

The present application discloses a low-voltage-difference linear voltage regulator circuit, its chip, and electronic device. The low-voltage-difference linear voltage regulator circuit includes: a power tube and a sampling resistor, which are connected in series between a power supply voltage and a ground terminal, and the connection node between the power tube and the sampling resistor outputs an output voltage; a first error amplifier, whose first input terminal receives the output voltage, whose second input terminal receives a first reference voltage, and whose output terminal is connected to the control terminal of the power tube; a compensation module, which is used to generate an exponential current to compensate for the leakage current generated by the power tube when the ambient temperature of the low-voltage-difference linear voltage regulator circuit is higher than a first threshold value, and the compensation module is shut down when the ambient temperature is lower than the first threshold value. The present application uses a compensation module to generate an exponential current to release the leakage current when the ambient temperature is higher than the first threshold value, and shut down when the ambient temperature is lower than the first threshold value, so that the low-voltage-difference linear voltage regulator circuit can both work normally and meet the requirements of low static power consumption.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a low voltage difference linear voltage stabilization circuit, a chip thereof, and electronic equipment. Background Art

[0002] A low-dropout linear regulator is an integrated circuit regulator that provides functions such as overcurrent protection, overtemperature protection, precision reference source, differential amplifier, and delay circuit. It usually has very low self-noise and high power supply rejection ratio.

[0003] A low-dropout (LDO) linear regulator (LDO) typically consists of a feedback loop consisting of a power transistor and an error amplifier to provide an output voltage equal to the target voltage. Currently, power transistors are relatively large, especially PMOS transistors within the f process corner range. When the temperature reaches a certain level, significant leakage current will be generated between the source and drain of the power transistor. Excessive leakage current will increase the output voltage, causing the error amplifier in the feedback loop to output an error voltage to shut down the power transistor. However, the presence of leakage current will still raise the output voltage of the LDO, causing the LDO to malfunction.

[0004] Conventional approaches typically involve connecting a constant, high-current source to the output of a low-dropout linear regulator (LDO) to absorb leakage current. However, even when leakage current is absent or has no effect on the output, this approach still provides a constant, high-current source, increasing the LDO's static power consumption.

[0005] Therefore, an improved low voltage difference linear voltage regulator circuit, chip thereof, and electronic device are desired. Summary of the Invention

[0006] In view of the above problems, the object of the present invention is to provide a low voltage difference linear voltage regulator circuit and its chip, and electronic equipment that can both work normally and meet the requirements of low static power consumption.

[0007] According to one aspect of the present invention, there is provided a low voltage difference linear voltage regulator circuit, comprising:

[0008] The power tube and the sampling resistor are connected in series between the power supply voltage and the ground terminal, and the connection node between the power tube and the sampling resistor outputs the output voltage;

[0009] a first error amplifier, having a first input terminal receiving the output voltage, a second input terminal receiving the first reference voltage, and an output terminal connected to the control terminal of the power tube; and

[0010] The compensation module is connected to the connection node between the power tube and the sampling resistor, and is used to generate an exponential current to compensate for the leakage current generated by the power tube when the ambient temperature of the low voltage difference linear voltage regulator circuit is higher than a first threshold.

[0011] The compensation module is shut down when the ambient temperature is lower than a first threshold.

[0012] Optionally, the compensation module includes:

[0013] a first transistor having a drain connected to a gate and connected to a ground terminal; and

[0014] A compensation control unit is connected to the source terminal of the first transistor to provide a second reference voltage, and is connected to the substrate terminal of the first transistor to provide a reference voltage with a negative temperature coefficient, so that the first transistor operates in a cutoff region when the ambient temperature is lower than a first threshold, and operates in a subthreshold region when the ambient temperature is higher than the first threshold to generate the exponential current between the connection node between the power transistor and the sampling resistor and the ground terminal.

[0015] Optionally, the compensation control unit includes:

[0016] a negative feedback unit connected to the source of the first transistor to provide a second reference voltage; and

[0017] a bias unit connected to the substrate terminal of the first transistor to provide a bias voltage, wherein the bias voltage decreases as the ambient temperature increases;

[0018] The first transistor and the power tube are PMOS tubes manufactured using the same process, and the channel size of the first transistor is smaller than the channel size of the power tube.

[0019] Optionally, the first reference voltage and the second reference voltage are divided voltages of a bandgap reference voltage.

[0020] Optionally, the bias unit includes:

[0021] a current source; and

[0022] The triode has a collector connected to the power supply voltage via the current source, a base connected to the collector and to the substrate end of the first transistor, and an emitter connected to the ground end.

[0023] Optionally, the negative feedback unit includes:

[0024] a second error amplifier having a first input terminal connected to the source of the first transistor and a second input terminal receiving the second reference voltage; and

[0025] a second transistor connected between a connection node between the power transistor and the sampling resistor and the source of the first transistor, and providing the second reference voltage to the source of the first transistor according to voltage regulation at the output terminal of the second error amplifier;

[0026] Wherein, the second transistor is an NMOS transistor.

[0027] Optionally, the magnitude of the first threshold is negatively correlated with the magnitude of the second reference voltage, or the magnitude of the first threshold is negatively correlated with the channel size of the transistor.

[0028] According to another aspect of the present invention, a chip is provided, comprising the low voltage difference linear voltage regulator circuit as described above.

[0029] According to yet another aspect of the present invention, an electronic device is provided, comprising the chip as described above.

[0030] The low-voltage-difference linear voltage regulator circuit, its chip, and electronic device provided in the embodiments of the present application, by adding a compensation module at the connection node between the power tube and the sampling resistor, generates an exponential current to release the leakage current when the ambient temperature is higher than a first threshold, and shuts down when the ambient temperature is lower than the first threshold, so that the low-voltage-difference linear voltage regulator circuit can both work normally and meet the requirements of low static power consumption.

[0031] Furthermore, the compensation module of the present application includes a first transistor and a compensation control unit. The manufacturing process of the first transistor is consistent with that of the power tube, and the channel size of the first transistor is smaller than the channel size of the power tube. The compensation control unit is connected to the source of the first transistor to provide a second reference voltage, and is connected to the substrate end of the first transistor to provide a reference voltage with a negative temperature coefficient, so that the first transistor operates in the cutoff region when the ambient temperature is lower than the first threshold, and operates in the subthreshold region and generates an exponential current when the ambient temperature is higher than the first threshold. That is, the present application can improve the performance of the low voltage difference linear voltage regulator circuit through the above-mentioned simple compensation module and reduce the manufacturing cost.

[0032] Furthermore, the magnitude of the first threshold is negatively correlated with the magnitude of the second reference voltage provided by the compensation control unit, or the magnitude of the first threshold is negatively correlated with the channel size of the transistor in the compensation control unit. In other words, the present application can more flexibly ensure the normal operation of the low-dropout linear voltage regulator circuit by adjusting the magnitude of the second reference voltage or the channel size of the transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0034] Figure 1 A schematic diagram of a low voltage difference linear voltage stabilization circuit provided according to an embodiment of the present invention is shown;

[0035] Figure 2 A waveform diagram of a compensation module in a low voltage difference linear voltage regulator circuit provided according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0036] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical components or modules are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0037] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by programmable circuits. When an element or circuit is said to be "connected" to another element or to be "connected" between two nodes, it may be directly coupled or connected to the other element or there may be an intermediate element. The connection between the elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0038] Furthermore, certain terms are used in this patent specification and claims to refer to specific components. Those skilled in the art will appreciate that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not distinguish components based on differences in name, but rather on differences in their functionality.

[0039] In addition, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0040] Figure 1 A schematic diagram of a low voltage difference linear voltage regulator circuit provided according to an embodiment of the present invention is shown. Figure 2 A waveform diagram of a compensation module in a low voltage difference linear voltage regulator circuit provided according to an embodiment of the present invention is shown.

[0041] like Figure 1 As shown, the low voltage difference linear voltage regulator circuit 100 includes a power tube Mpwr, a sampling resistor R, a first error amplifier EA1, and a compensation module 110.

[0042] The power transistor Mpwr and the sampling resistor R are connected in series between the power supply voltage VCC and ground. The connection node between the power transistor Mpwr and the sampling resistor R (e.g., the output terminal out) outputs the output voltage. A first input terminal of a first error amplifier EA1 receives the output voltage, a second input terminal of the first error amplifier EA1 receives a first reference voltage Vref1, and an output terminal of the first error amplifier EA1 is connected to the control terminal of the power transistor Mpwr. Furthermore, the first error amplifier EA1 generates an amplified error voltage based on the output voltage, the first reference voltage Vref1, and the output voltage. The power transistor Mpwr is regulated based on the amplified error voltage to generate the output voltage. When the leakage current of the power transistor Mpwr is large (i.e., the leakage current is greater than the current Ifb on the sampling voltage R, where Ifb = Vref1 / R), the amplified error voltage generated by the first error amplifier EA1 controls the power transistor Mpwr to shut down. However, the large leakage current can still raise the output voltage of the low-dropout linear regulator, causing the low-dropout linear regulator to malfunction. When the leakage current of the power transistor Mpwr is non-existent or small (i.e., the leakage current is less than the current Ifb on the sampling voltage R, where current Ifb = Vref1 / R), the output voltage of the low-dropout linear regulator is equal to the first reference voltage Vref1, and the low-dropout linear regulator operates normally. For example, when the power transistor Mpwr is a PMOS transistor within the f process corner range, and the ambient temperature of the low-dropout linear regulator circuit 100 is higher than a first threshold, the power transistor Mpwr will generate a large leakage current (the leakage current is greater than the current Ifb on the sampling voltage R), causing the low-dropout linear regulator to malfunction.

[0043] The compensation module 110 is connected to the connection node between the power transistor Mpwr and the sampling resistor R and is configured to generate an exponential current to compensate for leakage current when the ambient temperature is above a first threshold. Furthermore, the compensation module 110 is shut down when the ambient temperature is below the first threshold. Specifically, the compensation module 110 generates an exponential current to dissipate leakage current when the power transistor Mpwr generates leakage current, and shuts down when the power transistor Mpwr generates no leakage current or when the leakage current generated does not affect the output voltage. This allows the low-dropout linear voltage regulator circuit 100 to operate normally while meeting the requirements for low static power consumption.

[0044] Furthermore, the compensation module 110 includes a first transistor M1 and a compensation control unit 111. The drain and gate of the first transistor M1 are connected to the ground terminal. The compensation control unit 111 is connected to the substrate terminal of the first transistor M1 to provide a bias voltage with a negative temperature coefficient, and is connected to the source terminal of the first transistor M1 to provide a second reference voltage. This causes the first transistor M1 to operate in a cutoff region when the ambient temperature is below a first threshold, and to operate in a subthreshold region when the ambient temperature is above the first threshold, thereby generating an exponential current between the connection node between the power transistor Mpwr and the sampling resistor R and the ground terminal. Furthermore, the first transistor M1 and the power transistor Mpwr are PMOS transistors manufactured using the same process, and the channel size of the first transistor M1 is smaller than the channel size of the power transistor Mpwr. That is, the first transistor M1 and the power transistor Mpwr have the same process corner. Furthermore, the first transistor M1 and the power transistor Mpwr are, for example, PMOS transistors within the process corner range of f. When the ambient temperature is below the first threshold, the power transistor Mpwr does not generate leakage current or the leakage current generated does not affect the output voltage of the low-voltage dropout linear voltage regulator circuit 100. The bias voltage received by the substrate terminal of the first transistor M1 does not decrease with the ambient temperature, causing it to operate in the cut-off region, thereby shutting down the compensation module 110. When the ambient temperature is above the first threshold, the power transistor Mpwr generates a large leakage current and increases the output voltage of the low-voltage dropout linear voltage regulator circuit 100. As the ambient temperature increases, the threshold voltage of the first transistor M1 decreases compared to when the ambient temperature is below the first threshold, causing the first transistor M1 to operate in the subthreshold region and generate an exponential current between the connection node between the power transistor Mpwr and the sampling resistor R and the ground terminal, thereby compensating for the leakage current. This, in turn, causes the output voltage of the low-voltage dropout linear voltage regulator circuit 100 to be equal to the first reference voltage Vref1, thereby ensuring that the low-voltage dropout linear voltage regulator circuit 100 can operate normally. Furthermore, the compensation method provides a bias voltage (voltage at point B) having a negative temperature coefficient (which decreases as the ambient temperature increases) when the ambient temperature is higher than a first threshold value, thereby further reducing the threshold voltage of the first transistor M1. This allows the first transistor M1, which has a smaller channel size (relative to the channel size of the power transistor), to generate an exponential current greater than the leakage current, thereby preventing the circuit area of the compensation module 110 from being too large.

[0045] Furthermore, the compensation control unit 111 includes a negative feedback unit 113 and a bias unit 112. The negative feedback unit 113 is connected to the source (node A) of the first transistor M1 to provide a second reference voltage Vref2. The bias unit 112 is connected to the substrate terminal (node B) of the first transistor M1 to provide a bias voltage with a negative temperature coefficient, meaning that the bias voltage decreases as the ambient temperature increases. Furthermore, the first reference voltage Vref1 and the second reference voltage Vref2 are divided voltages of a bandgap reference voltage. The bandgap reference voltage varies minimally with process angle, so the first reference voltage Vref1 and the second reference voltage Vref2 also vary minimally with process angle. In other words, the magnitudes of the first reference voltage Vref1 and the second reference voltage Vref2 are essentially unaffected by the device process. It should be noted that the second reference voltage Vref2 received by the source of the first transistor M1 is unaffected by process angle and ambient temperature. The gate of the first transistor M1 is grounded, meaning that the gate-source voltage of the first transistor M1 is virtually invariant to process angle and ambient temperature. As the ambient temperature rises and the voltage at point B decreases, the threshold voltage of the first transistor M1 decreases, causing the first transistor M1 to enter the subthreshold region from the cut-off region. Otherwise, the first transistor M1 remains in the cut-off region.

[0046] Furthermore, the bias unit 112 includes a current source I1 and a transistor Q. The collector of transistor Q is connected to the power supply voltage VCC via the current source I1. The base and collector of transistor Q are connected to the substrate terminal of the first transistor M1. The emitter of transistor Q is connected to ground. That is, the bias voltage with a negative temperature coefficient received by the substrate terminal (node B) of the first transistor M1 is the voltage Vbe of transistor Q. The voltage Vbe of transistor Q is substantially unaffected by the process corner. Furthermore, the negative feedback unit 113 includes a second error amplifier EA2 and a second transistor M2. The first input of the second error amplifier EA2 is connected to the source of the first transistor M1, and the second input of the second error amplifier EA2 receives a second reference voltage Vref2. The second transistor M2 is connected between the connection node between the power transistor Mpwr and the sampling resistor R and the source of the first transistor M1. The second reference voltage Vref2 is provided to the source of the first transistor M1 by adjusting the voltage at the output of the second error amplifier EA2.

[0047] For example, in combination Figure 2As shown, the second transistor M2 is an NMOS transistor. The source of the second transistor M2 is connected to the source of the first transistor M1, the drain of the second transistor M2 is connected to the connection node between the power transistor Mpwr and the sampling resistor R, and the gate of the second transistor M2 is connected to the output of the second error amplifier EA2. Specifically, the transistor Q is, for example, a PNP transistor. The first input terminals of the first error amplifier EA1 and the second error amplifier EA2 are positive input terminals, and the second input terminals are negative input terminals. In other words, the bias voltage provided by the transistor Q in the bias unit 112 to the substrate terminal (node B) of the first transistor M1 has a negative temperature coefficient and decreases as the ambient temperature increases. The second reference voltage Vref2 provided by the negative feedback unit 113 is essentially unaffected by the process. Since the gate of the first transistor M1 is fixed, the back gate (substrate) acts as a gate to adjust the current generated by the first transistor M1. When the ambient temperature is lower than the first threshold value T1, the bias voltage and the second reference voltage Vref provided by the compensation control unit 111 cause the first transistor M1 to operate in the cut-off region. During this period, the current Ihot generated by the first transistor M1 is approximately zero. When the ambient temperature is higher than the first threshold value T1, the threshold voltage of the first transistor M1 decreases, and the bias voltage provided by the compensation control unit 111 decreases relative to when the ambient temperature is lower than the first threshold value. This, combined with the second reference voltage Vref, causes the first transistor M1 to operate in the subthreshold region. During this period, the current Ihot generated by the first transistor M1 is an exponential current.

[0048] Furthermore, the magnitude of the first threshold is negatively correlated with the magnitude of the second reference voltage Vref2, or the magnitude of the first threshold is negatively correlated with the channel size of the transistor Q. That is, when the value of the second reference voltage Vref2 set when the first threshold is T1 is reduced, the first transistor M1 generates an exponential current when the ambient temperature is a certain temperature higher than the first threshold, and when the value of the second reference voltage Vref2 set when the first threshold is T1 is increased, the first transistor M1 generates an exponential current when the ambient temperature is a certain temperature lower than the first threshold. Alternatively, when the channel size of the transistor Q selected when the first threshold is T1 is reduced, the first transistor M1 generates an exponential current when the ambient temperature is a certain temperature higher than the first threshold, and when the channel size of the transistor Q selected when the first threshold is T1 is increased, the first transistor M1 generates an exponential current when the ambient temperature is a certain temperature lower than the first threshold.

[0049] The embodiment of the present application further provides a chip, comprising the above-mentioned low voltage dropout linear voltage regulator circuit 100. Furthermore, the above-mentioned chip may be, for example, a low voltage dropout linear regulator.

[0050] An embodiment of the present application also provides an electronic device, comprising the chip described above.

[0051] The chip and electronic device provided in this application improve the performance of the chip and electronic device based on the low voltage difference linear voltage regulator circuit 100.

[0052] It should be noted that persons of ordinary skill in the art will understand that the terms "during," "when," and "when..." used herein in connection with circuit operation are not strict terms indicating that an action occurs immediately upon the start of an initiation action, but rather that there may be some small but reasonable delay or delays between that action and the reaction initiated by the initiation action, such as various transmission delays. The terms "approximately" or "substantially" are used herein to indicate that an element has a parameter that is expected to be close to the stated value or position. However, as is well known in the art, there are always minor deviations that make it difficult for a value or position to be exactly the stated value. It is well established in the art that a deviation of at least ten percent (10%) (or at least twenty percent (20%) for semiconductor doping concentrations) is a reasonable deviation from the desired target of accuracy as described. When used in conjunction with a signal state, the actual voltage value or logic state (e.g., "1" or "0") of the signal depends on whether positive or negative logic is used.

[0053] The embodiments of the present invention are as described above, but these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and modify and use it based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention and their equivalents.

Claims

1. A low voltage difference linear voltage regulator circuit, wherein: include: The power tube and the sampling resistor are connected in series between the power supply voltage and the ground terminal, and the connection node between the power tube and the sampling resistor outputs the output voltage; a first error amplifier, having a first input terminal receiving the output voltage, a second input terminal receiving the first reference voltage, and an output terminal connected to the control terminal of the power tube; as well as A compensation module is connected to the connection node between the power tube and the sampling resistor, and is used to generate an exponential current to compensate for the leakage current generated by the power tube when the ambient temperature of the low-voltage difference linear voltage regulator circuit is higher than a first threshold. The compensation module is turned off when the ambient temperature is lower than the first threshold. The compensation module includes: a first transistor having a drain connected to a gate and connected to a ground terminal; and A compensation control unit is connected to the source terminal of the first transistor to provide a second reference voltage, and is connected to the substrate terminal of the first transistor to provide a reference voltage with a negative temperature coefficient, so that the first transistor operates in a cutoff region when the ambient temperature is lower than a first threshold, and operates in a subthreshold region when the ambient temperature is higher than the first threshold to generate the exponential current between the connection node between the power transistor and the sampling resistor and the ground terminal.

2. The low voltage difference linear voltage regulator circuit according to claim 1, wherein: The compensation control unit includes: a negative feedback unit connected to the source of the first transistor to provide a second reference voltage; and a bias unit connected to the substrate terminal of the first transistor to provide a bias voltage, wherein the bias voltage decreases as the ambient temperature increases; The first transistor and the power tube are PMOS tubes manufactured using the same process, and the channel size of the first transistor is smaller than the channel size of the power tube.

3. The low voltage difference linear voltage regulator circuit according to claim 2, wherein: The first reference voltage and the second reference voltage are divided voltages of a bandgap reference voltage.

4. The low voltage difference linear voltage regulator circuit according to claim 2 or 3, wherein: The bias unit includes: a current source; and The triode has a collector connected to the power supply voltage via the current source, a base connected to the collector and to the substrate end of the first transistor, and an emitter connected to the ground end.

5. The low voltage difference linear voltage regulator circuit according to claim 3, wherein: The negative feedback unit comprises: a second error amplifier having a first input terminal connected to the source of the first transistor and a second input terminal receiving the second reference voltage; and a second transistor connected between a connection node between the power transistor and the sampling resistor and the source of the first transistor, and providing the second reference voltage to the source of the first transistor according to voltage regulation at the output terminal of the second error amplifier; Wherein, the second transistor is an NMOS transistor.

6. The low voltage difference linear voltage regulator circuit according to claim 4, wherein: The magnitude of the first threshold is negatively correlated with the magnitude of the second reference voltage, or the magnitude of the first threshold is negatively correlated with the channel size of the transistor.

7. A chip, wherein: The invention comprises the low voltage difference linear voltage stabilizing circuit according to any one of claims 1 to 6.

8. An electronic device, wherein: Comprising the chip according to claim 7.

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