A test device, method, apparatus and storage medium for testing network synchronization

Abstract

An embodiment of this specification provides a test device, method, apparatus, and storage medium for testing network synchronization. The test device includes: a bidirectional driver, a counter, a first register, and a second register; the bidirectional driver is used to drive the test device to receive a first synchronization signal sent by a switching device and to drive the test device to send a second synchronization signal to the switching device; the counter is used to determine a first time when receiving the first synchronization signal and to determine a second time when sending the second synchronization signal; the first register is used to store the first time; the second register is used to store the second time. The technical solution provided by this application is used to solve the problems of time-consuming, laborious, and prone to misjudgment in the existing test methods.

Description

Technical Field

[0001] This document relates to the field of hypersonic pulses, and particularly to a test device, method, apparatus, and storage medium for testing network synchronization. Background Art

[0002] The industrial community has improved the Ethernet technology of IEEE802.3 by adding a real-time mechanism to obtain a deterministic network. In a deterministic network, all nodes of the network must be synchronized in time. Therefore, the synchronization accuracy determines the performance of the deterministic network.

[0003] Traditional synchronization accuracy testing methods require a signal output port to be set on each node of the system. After each node reaches the synchronization state, it outputs a synchronization pulse or periodically outputs pulses according to an agreement. At this time, the user connects each signal to an oscilloscope to view the alignment of each signal, so as to more accurately know the alignment and alignment accuracy of each node.

[0004] However, judging the alignment situation based on the waveforms on the oscilloscope wastes time and manpower, and is prone to misjudgment. Summary of the Invention

[0005] In view of the above analysis, the present application aims to provide a test device, method, apparatus, and storage medium for testing network synchronization to improve the accuracy of testing network synchronization.

[0006] In a first aspect, one or more embodiments of this specification provide a test device for testing network synchronization, including: a bidirectional driver, a counter, a first register, and a second register;

[0007] The bidirectional driver is used to drive the test device to receive a first synchronization signal sent by a switching device, and drive the test device to send a second synchronization signal to the switching device;

[0008] The counter is used to determine a first moment when receiving the first synchronization signal and a second moment when sending the second synchronization signal;

[0009] The first register is used to store the first moment;

[0010] The second register is used to store the second moment.

[0011] Further, the test device further includes: a processor;

[0012] The processor is used to read the first moment from the first register, read the second moment from the second register; calculate the difference between the first moment and the second moment; and determine the synchronization accuracy according to the difference.

[0013] Further, the test device further includes: a signal terminal;

[0014] The test device is connected to the oscilloscope or the switching device through the signal terminal.

[0015] In a second aspect, one or more embodiments of this specification provide a method for testing network synchronization. Based on the test device described in any item of the first aspect, the method includes:

[0016] Receiving a synchronization message sent by a switching device;

[0017] Receiving a first synchronization signal sent by the switching device;

[0018] Determining and storing a first moment when the first synchronization signal is received;

[0019] Sending a second synchronization signal to the switching device;

[0020] Determining and storing a second moment when the second synchronization signal is sent.

[0021] Further, reading the first moment and the second moment;

[0022] Determining the difference between the first moment and the second moment;

[0023] Determining the synchronization accuracy according to the difference.

[0024] Further, the test device further includes: a signal terminal;

[0025] The test device is connected to the oscilloscope through the signal terminal;

[0026] The method further includes:

[0027] Transmitting the first synchronization signal and the second synchronization signal to the oscilloscope through the signal terminal.

[0028] In a third aspect, one or more embodiments of this specification provide a device for testing network synchronization, including: a receiving module, a data processing module, and a sending module;

[0029] The receiving module is configured to receive a synchronization message sent by a switching device; receive the first synchronization signal sent by the switching device;

[0030] The sending module is configured to send a second synchronization signal to the switching device;

[0031] The data processing module is configured to determine and store a first moment when the first synchronization signal is received; determine and store a second moment when the second synchronization signal is sent.

[0032] Further, the data processing module is further configured to read the first moment and the second moment; determine the difference between the first moment and the second moment; and determine the synchronization accuracy according to the difference.

[0033] Further, the test device further includes: signal terminals;

[0034] The test device is connected to the oscilloscope through the signal terminals;

[0035] The sending module is configured to transmit the first synchronization signal and the second synchronization signal to the oscilloscope through the signal terminals.

[0036] In a fourth aspect, one or more embodiments of the present specification provide a storage medium, including:

[0037] Computer-executable instructions for storage, and the computer-executable instructions, when executed, implement the method described in the second aspect.

[0038] Compared with the prior art, the present application can at least achieve the following technical effects:

[0039] In the prior art, the test device cannot receive the synchronization signal sent by the switching device. Therefore, the present application realizes that the test device receives the synchronization signal sent by the switching device based on bidirectional driving. Since the first synchronization signal and the second synchronization signal need to be processed and the interval between them is very short, the interval between the first moment and the second moment recorded by the counter is also very short or even synchronous. Based on the above situation, in order to ensure the test result and improve the test accuracy, two registers are used to store the first moment and the second moment respectively. In this way, the dataization of the synchronization accuracy detection is realized, thereby replacing manual judgment to improve the accuracy of the test network synchronization. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in one or more embodiments of the present specification or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the present specification. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0041] Figure 1 It is a schematic structural diagram of a system for testing synchronization accuracy in the prior art provided by one or more embodiments of the present specification;

[0042] Figure 2 It is a schematic structural diagram of a test device for testing network synchronization provided by one or more embodiments of the present specification;

[0043] Figure 3 Flowchart of a method for testing network synchronization provided for one or more embodiments of this specification. Detailed implementation manners

[0044] In order to enable those skilled in the art to better understand the technical solutions in one or more embodiments of this specification, the following will clearly and completely describe the technical solutions in one or more embodiments of this specification in conjunction with the accompanying drawings in one or more embodiments of this specification. Obviously, the described embodiments are only a part of the embodiments of this specification, rather than all of the embodiments. Based on one or more embodiments of this specification, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this document.

[0045] During the research and development stage or deployment stage of a deterministic network end node or switching node, it is usually necessary to verify whether the synchronization mechanism of the deterministic network is effective. The main criterion for judging the synchronization mechanism is the synchronization accuracy.

[0046] The existing synchronization method is that the switching node serves as the master device for synchronization, and the terminal node (such as the test device in the figure) serves as the slave device for synchronization. They achieve synchronization by exchanging synchronization protocol messages. The corresponding test method for synchronization accuracy is as Figure 1 shown.

[0047] Each node (test instrument and switch) outputs a synchronization pulse from the signal terminal, touches these terminals with the probe of an oscilloscope, and then displays the waveform on the oscilloscope, and manually reads the interval between each synchronization signal. It can be seen that the assembly of the above devices wastes time, and it is easy to misjudge by relying on manual judgment of synchronization accuracy.

[0048] In view of the above problems, the embodiments of the present application provide a test device for testing network synchronization, as Figure 2 shown, including: a bidirectional driver 101, a first register 102, a second register 103, and a counter 104.

[0049] The bidirectional driver 101 is used to drive the test device to receive the first synchronization signal sent by the switching device, and drive the test device to send the second synchronization signal to the switching device. Among them, the switching device includes a switch. In the prior art, only an output driver is provided in the test device. Therefore, the existing test device can only send a synchronization signal to the switch through the synchronization processing module (slave), and cannot receive the synchronization signal sent by the switching device. By setting the bidirectional driver, the synchronization processing module (master) in the switch can send the output pulse signal (synchronization signal) to the test device.

[0050] The first register 102 is used to store the first moment, and the second register 103 is used to store the second moment.

[0051] The counter 104 is used to determine the first moment when receiving the first synchronization signal and the second moment when sending the second synchronization signal.

[0052] Specifically, the counter 104 is a timestamp counter. When receiving the synchronization pulse signal (the first synchronization signal) from the switch, the timestamp counter latches the counted value into the first register 102, denoted as T0. When the test device completes synchronization through the exchange of synchronization data packets, it also outputs an internal synchronization completion signal (the second synchronization signal), which also triggers the timestamp counter to latch the counted value into the second time register 103, denoted as T1.

[0053] Through the above method, the present application realizes the conversion of the test synchronization problem into the problem of comparing T0 and T1, and successfully realizes the dataization of the test synchronization process. Based on the above device, the tester only needs to read T0 and T1 to judge the synchronization accuracy, without assembling Figure 1 the test system therein, thus saving the test time; nor does it need to judge the synchronization accuracy based on experience to prevent misjudgment.

[0054] In the embodiment of the present application, when reading the first moment and the second moment, the first moment and the second moment can be exported from the test device to other terminal devices. However, the above method is not simple enough. Therefore, a processor is set in the test device. The processor is used to read the first moment from the first register, read the second moment from the second register; calculate the difference between the first moment and the second moment; and determine the synchronization accuracy according to the difference. Generally, when the absolute value of the difference is less than 100 ns, it is considered that the synchronization accuracy meets the requirements.

[0055] In the embodiment of the present application, in order to meet the needs of customers, signal terminals are set on the test device.

[0056] The test device can be connected to an oscilloscope or the switching device through the signal terminals. In this way, the customer can either choose to view the waveform or test the synchronization accuracy according to the method of the present application. Among them, the model of the signal terminal is BNC (Bayonet Neill-Concelman) or SMA (SubMiniature version A).

[0057] The embodiment of the present application also provides a method for testing network synchronization. Based on the test device described in the above embodiment, as Figure 3 shown, it includes the following steps:

[0058] Step 1, receive the synchronization message sent by the switching device.

[0059] In the embodiment of the present application, when a synchronization message sent by a switching device is received, it means that the switching device and the test device enter the synchronization mode. At this time, the counter is ready to start counting, and the test device is ready to send a second synchronization signal.

[0060] Step 2: Receive a first synchronization signal sent by the switching device.

[0061] In the embodiment of the present application, after sending the synchronization message, the synchronization processing module (master) of the switching device sends a first synchronization signal to the test device. The test device receives the first synchronization signal based on two-way driving.

[0062] Step 3: Determine and store the first moment when the first synchronization signal is received.

[0063] In the embodiment of the present application, after receiving the first synchronization signal, the counter counts and stores the value in the first register to obtain the first moment.

[0064] Step 4: Send a second synchronization signal to the switching device.

[0065] In the embodiment of the present application, when the preset transmission period is reached, the test device sends a second synchronization signal to the switching device through the synchronization processing module (slave).

[0066] Step 5: Determine and store the second moment when the second synchronization signal is sent.

[0067] In the embodiment of the present application, when the second synchronization signal is sent, the counter is triggered to count, and the value is stored in the second register to obtain the second moment.

[0068] In the embodiment of the present application, the synchronization accuracy is determined based on the first moment and the second moment.

[0069] Specifically, the first moment and the second moment are read, and the difference between the first moment and the second moment is determined. According to the difference, the synchronization accuracy is determined. This process can be completed by the test device or on other terminal devices.

[0070] In the embodiment of the present application, in order to meet customer requirements, signal terminals are provided on the test device.

[0071] The test device is connected to an oscilloscope through the signal terminal, so that the first synchronization signal and the second synchronization signal can be transmitted to the oscilloscope through the signal terminal to implement determining the synchronization accuracy through the oscilloscope.

[0072] The embodiment of the present application provides a storage medium, including:

[0073] For storing computer-executable instructions that, when executed, implement the methods described in the above embodiments.

[0074] The foregoing has described particular embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the acts or steps recited in the claims can be performed in a different order than in the embodiments and still achieve the desired result. Additionally, the processes depicted in the figures do not necessarily require the particular order shown or sequential order to achieve the desired result. In certain implementations, multitasking and parallel processing are also possible or may be advantageous.

[0075] In the 1930s, it was obvious to distinguish whether an improvement to a technology was a hardware improvement (e.g., improvement to circuit structures such as diodes, transistors, switches, etc.) or a software improvement (improvement to method processes). However, with the development of technology, many method process improvements today can be regarded as direct improvements to hardware circuit structures. Almost all designers obtain the corresponding hardware circuit structure by programming the improved method process into the hardware circuit. Therefore, it cannot be said that an improvement to a method process cannot be implemented with a hardware entity module. For example, a Programmable Logic Device (PLD) (e.g., a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logical function is determined by the user programming the device. Designers can program by themselves to "integrate" a digital system on a piece of PLD without having to ask a chip manufacturer to design and fabricate a dedicated integrated circuit chip. Moreover, nowadays, instead of manually fabricating integrated circuit chips, this programming is mostly implemented using "logic compiler" software, which is similar to the software compiler used in program development and writing. The original code before compilation also has to be written in a specific programming language, which is called a Hardware Description Language (HDL). And there is not only one type of HDL, but many types, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, RHDL (Ruby Hardware Description Language), etc. The most commonly used ones currently are VHDL (Very-High-Speed Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should also be aware that by simply performing a little logical programming on the method process with the above-mentioned several hardware description languages and programming it into the integrated circuit, it is easy to obtain the hardware circuit that implements the logical method process.

[0076] The controller can be implemented in any suitable manner. For example, the controller can take the form of, for example, a microprocessor or a processor and a computer-readable medium storing computer-readable program code (such as software or firmware) executable by the (micro)processor, logic gates, switches, an application specific integrated circuit (ASIC), a programmable logic controller, and an embedded microcontroller. Examples of the controller include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320. The memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art also know that in addition to implementing the controller in the form of pure computer-readable program code, it is entirely possible to logically program the method steps to enable the controller to be implemented in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers, etc. to achieve the same function. Therefore, such a controller can be considered a hardware component, and the devices included therein for implementing various functions can also be regarded as the structures within the hardware component. Or even, the devices for implementing various functions can be regarded as either software modules for implementing the method or structures within the hardware component.

[0077] The systems, devices, modules, or units illustrated in the above embodiments can be specifically implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, the computer can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or any combination of these devices.

[0078] For the convenience of description, when describing the above devices, they are described separately as various units according to their functions. Of course, when implementing the embodiments of this specification, the functions of each unit can be implemented in the same or multiple software and / or hardware.

[0079] Those skilled in the art should understand that one or more embodiments of this specification can be provided as a method, a system, or a computer program product. Therefore, one or more embodiments of this specification can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, this specification can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memory, CD-ROM, optical memory, etc.) containing computer-usable program code.

[0080] This specification is described with reference to the flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the specification. It should be understood that each flow and / or block in the flowchart and / or block diagram, and combinations of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions executed by the processor of the computer or other programmable data processing device generate means for implementing the functions specified in one Figure 1 flow or multiple flows and / or blocks Figure 1 or multiple blocks.

[0081] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable memory produce a manufacture including instruction means that implement the functions specified in one Figure 1 flow or multiple flows and / or blocks Figure 1 or multiple blocks.

[0082] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operational steps are performed on the computer or other programmable device to produce a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one Figure 1 flow or multiple flows and / or blocks Figure 1 or multiple blocks.

[0083] In a typical configuration, a computing device includes one or more processors (CPUs), an input / output interface, a network interface, and memory.

[0084] The memory may include non-permanent memory in the form of computer-readable media, random access memory (RAM), and / or non-volatile memory such as read-only memory (ROM) or flash RAM. The memory is an example of computer-readable media.

[0085] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0086] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0087] One or more embodiments of the present specification may be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. One or more embodiments of the present specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules may be located in local and remote computer storage media, including storage devices.

[0088] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0089] The above are only examples of this document and are not intended to limit this document. For those skilled in the art, various changes and modifications can be made to this document. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of this document shall be included within the scope of the claims of this document.

Claims

1. A test device for testing network synchronization, characterized in that, Comprising: Bi-directional drive, counter, first register, and second register; The bi-directional drive is used to drive the test device to receive the first synchronization signal sent by the switching device, and to drive the test device to send the second synchronization signal to the switching device; The counter is used to determine the first moment of receiving the first synchronization signal, and to determine the second moment of sending the second synchronization signal; The first register is used to store the first moment; The second register is used to store the second moment; The test device further includes: a processor; The processor is used to read the first moment from the first register, and read the second moment from the second register; calculate the difference between the first moment and the second moment; and determine the synchronization accuracy according to the difference.

2. The device according to claim 1, wherein The test device further includes: signal terminals; The test device is connected to an oscilloscope or the switching device through the signal terminals.

3. A method for testing network synchronization, based on the testing device according to claim 1 or 2, characterized in that, Comprising: Receiving a synchronization message sent by a switching device; Receiving the first synchronization signal sent by the switching device; Determining and storing the first moment of receiving the first synchronization signal; Sending a second synchronization signal to the switching device; Determining and storing the second moment of sending the second synchronization signal; Reading the first moment and the second moment; Determining the difference between the first moment and the second moment; Determining the synchronization accuracy according to the difference.

4. The method according to claim 3, wherein The test device further includes: signal terminals; The test device is connected to an oscilloscope through the signal terminals; The method further includes: Transmitting the first synchronization signal and the second synchronization signal to the oscilloscope through the signal terminals.

5. A device for testing network synchronization, based on the test equipment described in claim 1 or 2, characterized in that, Comprising: Receiving module, data processing module, and sending module; The receiving module is used to receive a synchronization message sent by a switching device; Receiving the first synchronization signal sent by the switching device; The sending module is used to send a second synchronization signal to the switching device; The data processing module is used to determine and store the first moment of receiving the first synchronization signal; determine and store the second moment of sending the second synchronization signal; The data processing module is further used to read the first moment and the second moment; determine the difference between the first moment and the second moment; Determining the synchronization accuracy according to the difference.

6. The apparatus according to claim 5, wherein The test device further includes: signal terminals; The test device is connected to an oscilloscope through the signal terminals; The sending module is used to transmit the first synchronization signal and the second synchronization signal to the oscilloscope through the signal terminals.

7. A storage medium, characterized in that, Comprising: For storing computer-executable instructions, which when executed implement the method according to claim 3 or 4.

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