An integrated drive circuit and switching power supply system
By generating three-level or two-level drive signals through the control module and drive module in the integrated drive circuit, the reliability and applicability issues of GaN power transistor drive circuits are solved, and the reliability and topology adaptability of high-frequency switching power supply systems are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SOUTHERN UNIVERSITY OF SCIENCE AND TECHNOLOGY
- Filing Date
- 2022-10-08
- Publication Date
- 2026-05-08
AI Technical Summary
Existing GaN power transistor drive circuits have poor reliability and limited applicability. In particular, they are prone to false triggering and device damage due to parasitic capacitance spike pulses in high-frequency switching power supply systems. Furthermore, traditional discrete component designs cannot be applied to different switching power supply topologies.
Design an integrated drive circuit, including a control module and at least two drive modules. By generating three-level or two-level drive signals, the gate voltage of the GaN power transistor is controlled by a preset negative voltage to reduce parasitic capacitance spike pulses. The control module generates corresponding control signals according to the operating state of the external power transistor to adapt to different topologies.
This improves the reliability of GaN power transistors, avoids false triggering and device damage, and expands the applicability of the drive circuit, making it suitable for various switching power supply topologies.
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Figure CN115987062B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power electronics technology, and in particular to an integrated drive circuit and switching power supply system. Background Technology
[0002] GaN power transistors exhibit superior conduction and switching performance due to their lower on-resistance and gate charge. Using GaN power transistors in switching power converters can effectively improve system efficiency and power density, offering significant advantages in high-power and high-frequency applications. GaN power transistors are primarily used in power adapters and automotive charging, and show great potential in applications such as data center power supplies and 5G base station power supplies.
[0003] Currently, switching power supplies using GaN power transistors typically operate at high switching frequencies, with voltage change rates (dv / dt) at the switching nodes of the GaN power transistors reaching 100V / ns. Due to the low threshold voltage and poor gate reliability of GaN devices, excessively high dv / dt can cause spike pulses at the gate of the GaN device through its parasitic capacitance, easily leading to mis-conduction or even device damage. This poses a significant challenge to the reliability of GaN device drive circuits. Furthermore, with the development of electronic technology, switching power supply systems are becoming increasingly integrated. Currently, drive circuits are mainly based on discrete component designs, which, once integrated, cannot be applied to different switching power supply topologies. Therefore, designing a highly reliable, widely applicable drive circuit tailored to different switching power supply topologies is the main development direction for drive circuit design. Summary of the Invention
[0004] This application provides a driving circuit, an integrated driving circuit, and a switching power supply system to solve the problems of poor reliability and limited applicability of existing driving circuits.
[0005] The technical solutions provided in this application are as follows:
[0006] On one hand, embodiments of this application provide an integrated driving circuit, including: a control module and at least two driving modules;
[0007] Each drive module's first and second input terminals are respectively connected to two output terminals of the control module's plurality of output terminals. Each drive module's first and second output terminals are respectively connected to the gates of two power transistors from a plurality of external power transistors. Each drive module's first voltage input terminal serves as one of the multiple bootstrap voltage terminals of the integrated drive circuit, and each drive module's second voltage input terminal serves as one of the multiple switching node voltage terminals of the integrated drive circuit. Each drive module's third voltage input terminal is connected to the first voltage terminal of the integrated drive circuit, and each drive module's fourth voltage input terminal is connected to the second voltage terminal of the integrated drive circuit. Each drive module is used to determine whether a first-time event occurs based on the first secondary control signal received from its first input terminal. If a preset negative voltage is generated, a three-level drive signal is generated based on the first main control signal and the preset negative voltage, and the three-level drive signal is sent to the gate of the external power transistor connected to the first output terminal. If not, a two-level drive signal is generated based on the first main control signal, and the two-level drive signal is sent to the gate of the external power transistor connected to the first output terminal. Each drive module is also used to determine whether a preset negative voltage is generated in the first time according to the second auxiliary control signal received from the second input terminal. If so, a three-level drive signal is generated based on the second main control signal and the preset negative voltage, and the three-level drive signal is sent to the gate of the external power transistor connected to the second output terminal. If not, a two-level drive signal is generated based on the first main control signal, and the two-level drive signal is sent to the gate of the external power transistor connected to the second output terminal.
[0008] The input terminal of the control module is connected to an external waveform generator. The control module generates a first main control signal and a first auxiliary control signal, and sends the first main control signal and the first auxiliary control signal to the drive module through the first input terminal. It also generates a second main control signal and a second auxiliary control signal, and sends the second main control signal and the second auxiliary control signal to the drive module through the second input terminal. The first auxiliary control signal and the second auxiliary control signal are used to control the drive module to generate a preset negative voltage in the first time when the external power transistor connected to the drive module is in the freewheeling state. When the external power transistor connected to the drive module is in a working state other than the freewheeling state, the drive module does not generate the preset negative voltage.
[0009] On the other hand, embodiments of this application provide a switching power supply system, including an integrated drive circuit, an auxiliary circuit, a waveform generator, and a main power supply circuit provided in embodiments of this application. The output terminal of the integrated drive circuit is connected to the main power supply circuit, and the input terminal of the integrated drive circuit is connected to the auxiliary circuit and the waveform generator, respectively.
[0010] The beneficial effects of the embodiments of this application are as follows:
[0011] In this embodiment, by generating a negative voltage in the driving module connected to the power transistor in the freewheeling state within a first time, the driving module generates a three-level driving signal based on the received control signal and the preset negative voltage and sends it to the gate of the power transistor in the freewheeling state. The negative voltage in the three-level driving signal can effectively reduce the excessively high voltage change rate (dv / dt) and the spike pulse generated by the parasitic capacitance of the GaN power transistor at the gate of the GaN power transistor, so that the voltage input to the gate will not exceed the threshold voltage. This avoids the problem of the generated spike pulse causing the GaN power transistor to mis-turn on or even damage the device, thus improving the reliability of the integrated driving circuit. Moreover, by integrating at least two driving modules into the driving circuit, the number of driving modules can be set according to the external power transistors that need to be driven. The control module generates corresponding control signals for the external power transistors respectively, which can realize the application of the integrated driving module to different switching power supply topologies and expand the applicability of the integrated driving circuit.
[0012] Other features and advantages of this application will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description
[0013] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0014] Figure 1 This is a schematic diagram of the first circuit structure of the integrated driving circuit in the embodiments of this application;
[0015] Figure 2 This is a schematic diagram of a second circuit structure for the integrated driving circuit in an embodiment of this application;
[0016] Figure 3 This is a schematic diagram of the first circuit structure in the embodiments of this application when the integrated driving circuit includes two driving modules;
[0017] Figure 4 This is a schematic diagram of a second circuit structure in an embodiment of this application when the integrated driving circuit includes two driving modules;
[0018] Figure 5 This is a schematic diagram of a third circuit structure in an embodiment of this application when the integrated driving circuit includes two driving modules;
[0019] Figure 6 This is a schematic diagram of a third circuit structure for the integrated driving circuit in an embodiment of this application;
[0020] Figure 7 This is a schematic diagram of a fourth circuit structure in an embodiment of this application when the integrated driving circuit includes two driving modules;
[0021] Figure 8 This is a schematic diagram of the integrated driver circuit applied in a two-phase BUCK circuit in an embodiment of this application;
[0022] Figure 9 This is a driving waveform diagram of the integrated driver applied in a two-phase BUCK circuit in the embodiments of this application;
[0023] Figure 10 This is a schematic diagram of the integrated driver circuit structure applied in a two-phase BOOST circuit in an embodiment of this application;
[0024] Figure 11 This is a schematic diagram of the circuit structure used in the BUCK-BOOST circuit operating in BUCK mode in the embodiments of this application;
[0025] Figure 12 This is a schematic diagram of the circuit structure used in the BUCK-BOOST circuit operating in BOOST mode in the embodiments of this application;
[0026] Figure 13 This is a schematic diagram of the circuit structure applied in the full-bridge circuit in this application embodiment, which makes the motor rotate in the forward direction;
[0027] Figure 14 This is a schematic diagram of the circuit structure applied in the full-bridge circuit and causing the motor to reverse in an embodiment of this application;
[0028] Figure 15 This is a schematic diagram of the switching power supply circuit structure in an embodiment of this application. Detailed Implementation
[0029] To make the objectives, technical solutions, and beneficial effects of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0030] It should be noted that the terms "first," "second," etc., used in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. Furthermore, the term "and / or" used in this application describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.
[0031] To address the issues of poor reliability and limited applicability of existing drive circuits, embodiments of this application provide an integrated drive circuit, see below. Figure 1 As shown, the driving circuit 100 provided in this application embodiment includes at least: a control module 110 and at least two driving modules 120;
[0032] Each drive module 120 has its first and second input terminals connected to two output terminals of the control module 110, respectively. Each drive module 120 also has its first and second output terminals connected to the gates of two power transistors of the external power transistors. Each drive module 120's first voltage input terminal serves as one of the bootstrap voltage terminals Vc1, Vc2...Vcn of the integrated drive circuit. Each drive module 120's second voltage input terminal serves as one of the switching node voltage terminals Vm1, Vm2...Vmn of the integrated drive circuit. Each drive module 120's third voltage input terminal is connected to the first voltage terminal of the integrated drive circuit, and each drive module 120's fourth voltage input terminal is connected to the second voltage terminal of the integrated drive circuit. Each drive module 120 is used to adjust the voltage input based on the first input voltage. The first secondary control signal received at the input terminal determines whether a preset negative voltage is generated within a first time period. If so, a three-level drive signal is generated based on the first main control signal and the preset negative voltage, and the three-level drive signal is sent to the gate of the external power transistor connected to the first output terminal. If not, a two-level drive signal is generated based on the first main control signal, and the two-level drive signal is sent to the gate of the external power transistor connected to the first output terminal. Each drive module 120 is also used to determine whether a preset negative voltage is generated within a first time period based on the second secondary control signal received from the second input terminal. If so, a three-level drive signal is generated based on the second main control signal and the preset negative voltage, and the three-level drive signal is sent to the gate of the external power transistor connected to the second output terminal. If not, a two-level drive signal is generated based on the first main control signal, and the two-level drive signal is sent to the gate of the external power transistor connected to the second output terminal.
[0033] The input terminal of the control module 110 is connected to an external waveform generator. The control module 110 generates a first main control signal and a first auxiliary control signal, sends the first main control signal and the first auxiliary control signal to the drive module 120 through the first input terminal, and generates a second main control signal and a second auxiliary control signal, sends the second main control signal and the second auxiliary control signal to the drive module 120 through the second input terminal. The first auxiliary control signal and the second auxiliary control signal are respectively used to control the drive module 120 to generate a preset negative voltage in the first time when the external power transistor connected to the drive module is in the freewheeling state, and to control the drive module 120 not to generate the preset negative voltage when the external power transistor connected to the drive module is in a working state other than the freewheeling state.
[0034] In practical applications, the external power transistors can be GaN power transistors. The number of drive modules 120 in the integrated drive circuit 100 can be determined based on the number of external power transistors connected to the integrated drive circuit 100. After receiving a square wave signal from an external waveform generator, the control module 110 processes the square wave signal according to the operating conditions of the power transistors connected to the first output terminals of each of the at least two drive modules 120 to obtain a first main control signal, and processes the square wave signal according to the operating conditions of the power transistors connected to the second output terminals of each of the at least two drive modules 120 to obtain a second main control signal. The first main control signal is a control signal corresponding to the operating conditions of the external power transistors connected to the first output terminals of each drive module 120, and the second main control signal is a control signal corresponding to the operating conditions of the external power transistors connected to the first output terminals of each drive module 120. The second output terminal is connected to the main control signal corresponding to the working state of the external power transistor. The working conditions of the power transistor may include information such as working frequency, duty cycle, on time, off time, and dead time. The control module 110 can also generate a first auxiliary control signal according to the working state of the power transistor connected to the first output terminal of each of the at least two drive modules 120, and generate a second auxiliary control signal according to the working state of the power transistor connected to the second output terminal of each of the at least two drive modules 120. The working state of the power transistor may include freewheeling state, main switch state, normally open state, and normally closed state. For each of the at least two drive modules 120, when the external power transistor connected to the drive module 120 through the first output terminal or the second output terminal is in the freewheeling state, the control module 110 generates a first auxiliary control signal or a second auxiliary control signal and sends it to the control module 110. The control module 110 provides a preset negative voltage to the gate of the corresponding external power transistor within a first time period and generates a three-level drive signal to drive the corresponding external power transistor. When the external power transistor connected to the drive module 120 through the first output terminal or the second output terminal is in the main switch state, normally open state, or normally closed state, the control module 110 generates a first auxiliary control signal or a second auxiliary control signal and sends it to the control module 110. The control module does not provide a preset negative voltage within a first time period and generates a two-level drive signal to drive the corresponding external power transistor.
[0035] In specific implementation, control module 110 generates the first main control signal PWM1, the first auxiliary control signal X1, the second main control signal PWM2, and the second auxiliary control signal X2 for the first drive module; control module 110 generates the first main control signal PWM3, the first auxiliary control signal X3, the second main control signal PWM4, and the second auxiliary control signal X4 for the second drive module; control module 110 generates the first main control signal PWM(2n-1), the first auxiliary control signal X(2n-1), the second main control signal PWM2n, and the second auxiliary control signal X2n for the nth drive module. When at least two drive modules 120 have power transistors connected to their output terminals in a freewheeling state, specifically, taking the example of one drive module 120 having its first output terminal connected to a power transistor in a main switching state and its second output terminal connected to a power transistor in a freewheeling state, drive module 120 receives the second main control signal PW generated by control module 110 through its second input terminal. After M2 and the second auxiliary control signal X2, based on the second auxiliary control signal X2, it is determined that a preset negative voltage is provided to the gate of the power transistor connected to the second output terminal of the drive module 120 within the first time. The drive module 120 superimposes the preset negative voltage with the second main control signal PWM2 to generate a three-level drive signal to drive the power transistor connected to the second output terminal of the drive module 120. After receiving the first main control signal PWM1 and the first auxiliary control signal X1 generated by the control module 110 through the first input terminal, the drive module 120 determines not to provide the preset negative voltage based on the first auxiliary control signal, and generates a dual-level drive signal according to the first main control signal to drive the power transistor connected to the first output terminal of the drive module 120. In this example, the power transistor can not only be in the main switch state, but also in the normally open state or normally closed state. The first auxiliary control signal X1 of the power transistor is the same, which is to make the drive module 120 determine not to provide the preset negative voltage. The difference is that the first main control signal is different. The first main control signal generated according to the working conditions corresponds to the working state. Similarly, when the power transistor connected to the first output terminal is in freewheeling mode and the power transistor connected to the second output terminal is in main switching mode, the drive module 120 superimposes a preset negative voltage with the first main control signal to generate a three-level drive signal to drive the power transistor connected to the first output terminal of the drive module 120. The drive module 120 then generates a two-level drive signal based on the second main control signal to drive the power transistor connected to the second output terminal of the drive module 120. Here, the first time refers to the high-level time in either the first or second auxiliary control signal. This high-level time is the period between the moment the power transistor in freewheeling mode begins to turn off and the moment the power transistor in main switching mode turns on. The duration of this high-level time is determined by the operating frequency of the power transistor.It is worth mentioning that the drive signal generated by each drive module 120 is determined by the operating state of the two connected external power transistors. There is no limiting relationship between the two drive signals generated by each drive module 120. One of the two power transistors can be in the main switching state and the other in the freewheeling state, or one power transistor can be in the normally open state and the other in the normally closed state. Moreover, the operating state of the external power transistor connected to each of the at least two drive modules 120 is also determined by the operating state of the power supply topology of the switching transistor in which the connected external power transistor is located. There is no limiting relationship between the drive signals generated by each of the at least two drive modules 120. For example, the drive signals between different drive modules 120 can be set to be the same, or they can be set to be staggered by a preset angle, or they can be set to be completely different. There are no restrictions here. When the voltage change rate of the switching node of the power transistor is very high, by generating a negative voltage in the driving module connected to the external power transistor in the freewheeling state in the first time, the driving module connected to the power transistor in the freewheeling state generates a three-level driving signal according to the received control signal and the preset negative voltage and sends it to the gate of the power transistor in the freewheeling state. The negative voltage in the three-level driving signal can effectively reduce the peak pulse generated by the parasitic capacitance of the GaN power transistor at the gate of the GaN power transistor, so that the voltage input to the gate will not exceed the threshold voltage, avoiding the problem of false turn-on of the GaN power transistor or even device damage due to peak pulse, and improving the reliability of the switching power supply where the power transistor is located. Moreover, by integrating at least two driving modules 120 into the driving circuit, the number of driving modules 120 can be set according to the external power transistor to be driven. The control module 110 generates corresponding control signals for the external power transistor according to its operating conditions and operating state. This can effectively avoid the problem that the integrated driving circuit based on discrete components cannot be applied to different switching power supply topologies after integration, and realize the application of the integrated driving module 120 to different switching power supply topologies, thus expanding the applicability of the integrated driving circuit.
[0036] In one possible implementation, see [reference] Figure 2 As shown, each drive module 120 includes two drive sub-modules;
[0037] The first terminal of the first driving submodule of the two driving submodules serves as the first input terminal of the driving module 120, the second terminal of the first driving submodule serves as the first output terminal of the driving module 120, and the third and fourth terminals of the first driving submodule serve as the first voltage input terminal and the second voltage input terminal of the driving module 120, respectively.
[0038] The first end of the second driving submodule of the two driving submodules serves as the second input end of the driving module 120, the second end of the second driving submodule serves as the second output end of the driving module 120, and the third and fourth ends of the second driving submodule serve as the third voltage input end and the fourth voltage input end of the driving module 120, respectively.
[0039] In practical applications, each drive module 120 may include two drive sub-modules. The first drive sub-module generates a drive signal based on a first main control signal and a first auxiliary control signal sent from the control module 110 to the first input terminal of the drive module 120, driving an external power transistor connected to the first output terminal of the drive module 120. The second drive sub-module generates a drive signal based on a second main control signal and a second auxiliary control signal sent from the control module 110 to the second input terminal of the drive module 120, driving an external power transistor connected to the second output terminal of the drive module 120. By providing two drive sub-modules in the drive module 120, the control module 110 can control each sub-module independently, thereby achieving independent control of the power transistor connected to the drive module 120.
[0040] In one possible implementation, each of the two drive submodules includes: a voltage adjustment module, a power adjustment module, a capacitor, and three switches;
[0041] The first end of the voltage adjustment module serves as the first end of the drive submodule. The second end of the voltage adjustment module is connected to the third end of the drive submodule. The third end of the voltage adjustment module is connected to the first end of the first switch among the three switches and the fourth end of the drive submodule. The fourth end of the voltage adjustment module is connected to the first end of the capacitor. The fifth end of the voltage adjustment module is connected to the second end of the capacitor. The sixth end of the voltage adjustment module is connected to the first end of the power adjustment module.
[0042] The second terminal of the power adjustment module is connected to the fourth terminal of the voltage adjustment module, the third terminal of the power adjustment module is connected to the fifth terminal of the voltage adjustment module and the first terminal of the second switch among the three switches, and the fourth terminal of the power adjustment module is connected to the second terminal of the drive submodule.
[0043] The second terminal of the first of the three switches is connected to the first terminal of the capacitor.
[0044] The second terminal of the second of the three switches is connected to the second voltage input terminal;
[0045] The first terminal of the third switch of the three switches is connected to the third terminal of the drive submodule, and the second terminal of the third switch of the three switches is connected to the first terminal of the capacitor.
[0046] In practical applications, the power adjustment module receives the control signal sent by the control module 110 and, in conjunction with the potential of the lower plate of the capacitor, performs voltage reduction and shift adjustment on the output drive signal; the power adjustment module performs power matching on the drive signal input by the voltage adjustment module and outputs it to the gate of the external power transistor after matching; the three switches adjust the switch state according to the first or second control signal of the control module 110 to change the potential of the upper plate of the capacitor; the capacitor, based on the characteristic that the voltage across the capacitor cannot change abruptly, generates a negative potential through the lower plate of the capacitor when the potential of the upper plate of the capacitor changes abruptly.
[0047] In specific implementation, taking an integrated drive circuit containing two drive modules 120 as an example, refer to... Figure 3 As shown, power transistor Q H1 Power transistor Q H2 Power transistor Q L1 Power transistor Q L2 Each drive module uses an external second power transistor. The first drive submodule includes a power adjustment module, a voltage adjustment module, capacitor C1, and switches S1, S2, and S3. The second drive submodule includes a power adjustment module, a voltage adjustment module, capacitor C2, and switches S4, S5, and S6. The third drive submodule includes a power adjustment module, a voltage adjustment module, capacitor C3, and switches S7, S8, and S9. The fourth drive submodule includes a power adjustment module, a voltage adjustment module, capacitor C4, and switches S10, S11, and S12. The first voltage terminal V1 of the integrated drive circuit can be connected to the external power supply terminal VDD. The second voltage terminal V2 of the integrated drive circuit is connected to the ground terminal VSS, so that the third voltage of each drive module is VDD and the fourth voltage is VSS. The power transistor Q... H1 The operating state is the main switch state while the power transistor Q L1 Taking the freewheeling mode as an example, the control module 110 generates a first main control signal PWM1 and a second main control signal PWM2, which are respectively input to the first drive submodule and the second drive submodule. It also generates a first auxiliary control signal X1, which is input to the first drive submodule, causing switch S1 in the first drive submodule to open and switches S2 and S3 to close. At this time, the first drive submodule, through the first adjustment module, performs voltage reduction, shift adjustment, and power matching adjustment on the first main control signal PWM1 sent by the control module, and then generates a dual-level drive signal to drive the power transistor Q. H1 At the same time, the control module 110 generates a second control signal X2 and inputs it to the second drive submodule to enable the power transistor Q to... H1 Dead time before conduction to power transistor Q H1Within the first hour after activation, switch S4 in the second drive submodule switches from open to closed, while switches S5 and S6 switch from closed to open. The potential of the upper plate of capacitor C2 changes from the third voltage VDD to the fourth voltage VSS. Since the voltage across the capacitor cannot change abruptly, the potential of the lower plate of capacitor C2 changes from the fourth voltage VSS to VSS-VC, where VC is the voltage across capacitor C2 after VDD charges it. Because VSS is less than VDD, VSS-VC is negative if the charging time of capacitor C2 is designed reasonably. At times other than the first hour, switch S4 in the second drive submodule is open, while switches S5 and S6 are closed. The second drive submodule, through the second adjustment module, performs voltage reduction and shift adjustment and power matching adjustment based on the second main control signal PWM2 sent by the control module 110 and the negative potential VSS-VC of the lower plate of capacitor C2 within the first hour, and then generates a three-level drive signal to drive the power transistor Q. L1 Thus, in the power transistor Q... H1 The operating state is the main switch state, and the power transistor Q... L1 During the first moment of operation in freewheeling mode, the potential of the upper plate of capacitor C2 changes abruptly by controlling switches S4, S5, and S6. After the potential of the lower plate of capacitor C2 becomes negative, the power transistor Q, which acts as the freewheeling diode, is activated. L1 The gate of the transistor is provided with a negative voltage, which can effectively reduce the power transistor Q. H1 At the moment of conduction, its parasitic capacitance in power transistor Q L1 The gate generates a spike pulse, causing the input to the power transistor Q to... L1 The gate voltage will not exceed the threshold voltage, thus avoiding spike pulses that could damage the power transistor's Q. L1 This addresses the issue of mis-conduction or even device damage, improving the reliability of the switching power supply containing the power transistor. Similarly, in the power transistor Q... L1 The operating state is the main switch state while the power transistor Q H1 When the operating state is continuous current mode, the same effect can be achieved by setting the control signals of the first and second drive submodules. Furthermore, the second control module 110 can also operate in the same manner as needed, which will not be elaborated further here.
[0048] In one possible implementation, the second switch and the third switch have the same switching state, and the first switch has the opposite switching state to the second switch.
[0049] For specific implementation, please refer to Figure 3As shown, for one of the two drive modules, in the first drive submodule of this drive module, when the first auxiliary control signal controls switches S2 and S3 to close and switch S1 to open, the potential of the upper plate of the capacitor is Vc1, and the potential of the lower plate of the capacitor is Vm1. When the first auxiliary control signal controls switches S2 and S3 to open and switch S1 to close, the potential of the upper plate of the capacitor is the voltage input to the drive module through the first voltage input terminal, and the potential of the lower plate of the capacitor is the difference between Vm1 and the voltage of capacitor C1 after charging through Vc1. In the second drive submodule of this drive module, when the second auxiliary control signal controls switches S5 and S6 to close and switch S7 to open, the potential of the upper plate of the capacitor is V1, and the potential of the lower plate of the capacitor is VSS. When the second auxiliary control signal controls switches S5 and S6 to open and switch S7 to close, the potential of the upper plate of the capacitor is VSS, and the potential of the lower plate of the capacitor is the difference between VSS and the voltage of capacitor C1 after charging through V1.
[0050] In one possible implementation, the control module 110 includes logic gate circuits;
[0051] The input terminal of the logic gate circuit is connected to an external waveform generating device, the first output terminal of the logic gate circuit is connected to the first terminal of the first driving submodule, and the second output terminal of the logic gate circuit is connected to the first terminal of the second driving submodule.
[0052] In practical applications, taking a driver integrated circuit containing two driver modules 120 as an example, please refer to... Figure 4 As shown, after receiving a square wave signal from an external waveform generator, the logic gate circuit can perform operations such as frequency adjustment, dead time setting, level flipping, and duty cycle adjustment on the square wave signal, ultimately generating the first main control signal, the first secondary control signal, the second main control signal, and the second secondary control signal.
[0053] In one possible implementation, the voltage adjustment module includes: a buck shifter;
[0054] The first terminal of the buck shifter serves as the first terminal of the driver submodule. The second terminal of the buck shifter is connected to the third terminal of the driver submodule. The third terminal of the buck shifter is connected to the first terminal of the first switch among the three switches and the fourth terminal of the driver submodule. The fourth terminal of the buck shifter is connected to the first terminal of the capacitor. The fifth terminal of the buck shifter is connected to the second terminal of the capacitor. The sixth terminal of the buck shifter is connected to the first terminal of the power adjustment module.
[0055] In practical applications, taking a driver integrated circuit containing two driver modules 120 as an example, please refer to... Figure 5As shown, the step-down shifter is mainly used to adjust the voltage range of the first main control signal or the second main control signal input to the control module 110, and output a three-level signal or a two-level signal to the buffer according to the potential of the lower plate of the capacitor.
[0056] In one possible implementation, the power adjustment module includes: a buffer;
[0057] The first end of the buffer is connected to the sixth end of the voltage adjustment module, the second end of the buffer is connected to the fourth end of the voltage adjustment module, the third end of the buffer is connected to the fifth end of the voltage adjustment module and the first end of the second switch among the three switches, and the fourth end of the buffer is connected to the first output end of the drive submodule.
[0058] In practical applications, taking a driver integrated circuit containing two driver modules 120 as an example, please refer to... Figure 5 As shown, the buffer is used to perform signal shaping and power adjustment based on the received three-level or two-level signal to generate a three-level or two-level drive signal that matches the required drive power of the external power transistor.
[0059] In one possible implementation, see [reference] Figure 6 As shown, the integrated drive circuit 100 also includes at least two bootstrap power supply modules 130;
[0060] The number of bootstrap power supply modules 130 is the same as the number of drive modules 120 and they are configured in a one-to-one correspondence. For each bootstrap power supply module 130 and the drive module 120 configured in a one-to-one correspondence with each bootstrap power supply module 130, the first terminal of the bootstrap power supply module 130 is connected to the first voltage input terminal of the drive module 120, the second terminal of the bootstrap power supply module 130 is connected to the second voltage input terminal of the drive module 120, and the third terminal of the bootstrap power supply module 130 is connected to the third voltage input terminal of the drive module 120. Each bootstrap power supply module 130 is used to provide a first voltage to the drive module 120 configured in a one-to-one correspondence with each bootstrap power supply module 130.
[0061] In practical applications, the first voltage input to the first voltage input terminal of each of the at least two drive modules 120 in the integrated drive circuit can be provided by an external auxiliary power supply or by an internal bootstrap power supply module 130. Each drive module 120 can be equipped with a corresponding bootstrap power supply unit. The bootstrap power supply module 130 superimposes the discharge voltage of the energy storage element inside the module with the third voltage input to the third voltage input terminal of the drive module 120, thereby boosting the voltage and using the boosted voltage as the first voltage input from the first voltage input terminal to the drive module 120. By setting up the bootstrap power supply module 130, the number of external power supplies can be reduced, the wiring complexity with external circuits can be reduced, and the integration of the drive circuit can be further improved.
[0062] In one possible implementation, each of the at least two bootstrap power supply modules 130 includes: a bootstrap capacitor and a bootstrap switch;
[0063] The first end of the bootstrap capacitor is connected to the first voltage input terminal of the drive module 120, which is configured one-to-one with the bootstrap power supply module 130, and the second end of the bootstrap capacitor is connected to the second voltage input terminal of the drive module 120, which is configured one-to-one with the bootstrap power supply module 130.
[0064] The first end of the boot switch is connected to the first voltage input terminal of the drive module 120, which is configured one-to-one with the boot power supply module 130, and the second end of the boot switch is connected to the third voltage input terminal of the drive module 120, which is configured one-to-one with the boot power supply module 130.
[0065] In specific implementation, taking a driver integrated circuit containing two driver modules 120 as an example, refer to... Figure 7 As shown, for one of the two drive modules 120, a bootstrap capacitor C5 and a bootstrap switch S13 controlled by the second main control signal PWM2 are set. The bootstrap switch S13 is closed under the control of the second main control signal PWM2, and the power transistor Q is controlled by the drive signal generated based on the second main control signal. L1 When the circuit is turned on, the bootstrap capacitor C5 can pass through the bootstrap switch S13, the bootstrap capacitor C5, and the power transistor Q. L1 The circuit is charged between the third and fourth voltage input terminals of the drive module 120, while the bootstrap switch S13 is turned off under the control of the second main control signal PWM2, and the power transistor Q is controlled based on the drive signal generated by the second main control signal PWM2. L1When turned off, the bootstrap capacitor C5 discharges between the first and second voltage input terminals of the drive module 120. At this time, the bootstrap voltage provided by the bootstrap capacitor C5 to the first voltage input terminal of the drive module 120 is the sum of the voltage input at the second voltage input terminal and the voltage of the bootstrap capacitor after charging between the third and fourth voltage input terminals of the drive module 120. This allows the bootstrap voltage to be provided to the drive module 120 through the internal bootstrap power supply module 130, and ensures that the first voltage difference between the first and second voltage input terminals of the drive module 120 is consistent with the second voltage difference between the third and fourth voltage input terminals of the drive module 120. The first and second voltage differences are generally set to 5V. For the other drive module of the two drive modules 120, the same method can be used. The bootstrap switch S14 is controlled according to the second main control signal PWM4 of the module to realize the charging and discharging of the bootstrap capacitor C4 to achieve the effect of bootstrap power supply to the control module 110 connected to it. The specific process will not be described in detail here.
[0066] Next, we will provide a detailed introduction to the integrated driver circuit, which includes two driver modules.
[0067] In one possible implementation, the integrated drive circuit 100, including two drive modules, can be applied to a two-phase BUCK circuit, see [reference]. Figure 8 As shown, in a two-phase buck circuit structure, the power transistor Q... H1 Port T1 of the transistor and port T3 of the power transistor QH2 are connected to the power supply of the main circuit as input terminals. H1 and power transistor Q L1 Between port T2 and power transistor Q H2 and power transistor Q L2 Port T4 is used as an output connection to the load. Power transistor Q H1 and power transistor Q H2 Power transistor Q L1 and power transistor Q L2 A two-phase buck converter can be achieved by interleaving the conduction of each phase by 180°. Specifically, in state ①, the power transistor Q... H1 and power transistor Q H2 As the main switch, it conducts alternately at 180° and charges the inductor L; in state ②, the power transistor Q... L1 and power transistor Q L2 As the freewheeling diodes alternately conduct at 180°, they discharge the inductor L. Therefore, the driving module of the integrated driving circuit 100 is the power transistor Q. H1 and power transistor Q H2 The gate generates a dual-level drive signal for the power transistor Q. L1 and power transistor QL2 The gate generates a three-level drive signal. Specifically, based on Figure 3 The structure of the two drive modules in the integrated drive circuit shown is as follows: The drive waveform of the integrated drive circuit in the two-phase buck circuit is shown in the figure. Figure 9 As shown.
[0068] In one possible implementation, the integrated drive circuit 100, including two drive modules, can be applied to a two-phase BOOST circuit, see [reference]. Figure 10 As shown, in the two-phase boost circuit structure, the power transistor Q... H1 Port T1 and power transistor Q H2 Port T3 is used as the output to connect the load, and power transistor Q... H1 and power transistor Q L1 Between port T2 and power transistor Q H2 and power transistor Q L2 Port T4 is connected to the main circuit power supply as an input terminal. Specifically, in state ①, Q... L1 and Q L2 As the main switch transistor, it conducts alternately at 180°, charging the inductor L; in state ②, Q H1 and Q H2 As the freewheeling diodes alternately conduct at 180°, they discharge the inductor L. Therefore, the driving module of the integrated driving circuit 100 is the power transistor Q. L1 and power transistor Q L2 The gate generates a dual-level drive signal for the power transistor Q. H1 and power transistor Q H2 The gate generates a three-level drive signal.
[0069] In one possible implementation, the integrated drive circuit 100, including two drive modules, can be applied to a BUCK-BOOST circuit, see [reference]. Figure 11 and Figure 12 As shown, in the BUCK-BOOST circuit, the power transistor Q... H1 Port T1 is connected to the power supply of the main circuit as an input terminal, and the power transistor Q... H1 and power transistor Q L1 Port T2 is set between them, and power transistor Q is connected. H2 and power transistor Q L2 Port T4 is provided, and ports T2 and T4 are connected via inductor L. Power transistor Q... H2 Port T3 is used as the output to connect the load. The BUCK-BOOST circuit can operate in either BUCK mode (functioning as a BUCK converter) or BOOST mode (functioning as a BOOST converter). Figure 11When the BUCK-BOOST circuit shown is operating in BUCK mode, the power transistor Q... H2 Always on, power transistor Q L2 The operation is always cut off, and its working process is as follows: In state ①, the power transistor Q... H1 As the main switch is turned on, the inductor L is charged; in state ②, the power transistor Q... L1 As the freewheeling diode is turned on, it discharges through the inductor L. Therefore, in this mode, the driving module of the integrated driving circuit 100 is the power transistor Q. H1 The gate generates a dual-level drive signal for the power transistor Q. L1 The gate generates a three-level drive signal. In such a case... Figure 12 The BUCK-BOOST circuit shown operates in BOOST mode, with power transistor Q... H1 Always on, power transistor Q L1 The operation is always cut off, and its working process is as follows: In state ①, the power transistor Q... L2 As the main switch is turned on, inductor L is charged; in state ②, Q H2 As the freewheeling diode is turned on, it discharges through the inductor L. Therefore, in this mode, the driving module of the integrated driving circuit 100 is the power transistor Q. H2 The gate generates a three-level drive signal for the power transistor Q. L2 The gate generates a dual-level drive signal.
[0070] In one possible implementation, the integrated drive circuit 100, including two drive modules, can be applied in a full-bridge circuit, see reference. Figure 13 and Figure 14 As shown, in a full-bridge circuit, the power transistor Q... H1 Port T1 and power transistor Q H2 Port T3 is connected to the main circuit power supply as an input terminal, and the power transistor Q... H1 and power transistor Q L1 Port T2 is set between them, and power transistor Q is connected. H2 and power transistor Q L2 Port T4 is provided, and ports T2 and T4 are connected via motor winding M. Forward and reverse rotation of the motor can be achieved by charging the motor windings in both directions using a full-bridge circuit. For example... Figure 13 During the forward rotation of the motor shown, in state ①, the power transistor Q... H1 and power transistor Q L2 As the main switch is turned on, it forward charges the inductor L; in state ②, the power transistor Q L1 and power transistor Q H2 As the freewheeling diode is turned on, it forward discharges through the inductor L. Therefore, when the motor rotates forward, the drive module of the integrated drive circuit 100 is the power transistor Q. H1 and power transistor QL2 The gate generates a dual-level drive signal for the power transistor Q. L1 and power transistor Q H2 The gate generates a three-level drive signal. For example... Figure 14 During the reverse operation of the motor shown, in state ①, the power transistor Q... H2 and power transistor Q L1 As the main switch is turned on, it reverse-charges the inductor L; in state ②, power transistors QL2 and Q H1 As the freewheeling diode is turned on, it discharges in reverse to the inductor L. Therefore, when the motor reverses, the drive module of the integrated drive circuit 100 uses the power transistor Q. H2 and power transistor Q L1 The gate generates a dual-level drive signal for the power transistor Q. L2 and power transistor Q H1 The gate generates a three-level drive signal.
[0071] It is worth mentioning that the integrated driver circuit containing two driver modules can be applied not only to the circuit with four power transistors in the above embodiments, but also to other circuits with four power transistors, without limitation. The integrated driver circuit can also contain more than two driver modules, the number of which is related to the number of power transistors in the applied circuit. In this way, the integrated driver circuit can be extended to circuit structures with more power transistors.
[0072] Based on the same inventive concept, embodiments of the present invention also provide a switching power supply system, see below. Figure 15 As shown, the switching power supply system 200 includes an integrated drive circuit 100, an auxiliary circuit 210, a waveform generator 220, and a main power supply circuit 230 provided in this embodiment of the invention. The output terminal of the integrated drive circuit 100 is connected to the main power supply circuit 230, and the input terminal of the integrated drive circuit 100 is connected to the auxiliary circuit 210 and the waveform generator 220 respectively. Its functions are detailed in the above-described embodiments of the drive circuit or integrated drive circuit, and will not be repeated here.
[0073] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.
[0074] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this application without departing from the spirit and scope of the embodiments of this application. Therefore, if these modifications and variations to the embodiments of this application fall within the scope of the claims of this application and their equivalents, this application also intends to include these modifications and variations.
Claims
1. An integrated driving circuit, characterized in that, include: Control module and at least two drive modules; Each driving module has its first and second input terminals connected to two output terminals of the control module, respectively. Each driving module also has its first and second output terminals connected to the gates of two power transistors of a plurality of external power transistors. Each driving module's first voltage input terminal serves as one of the bootstrap voltage terminals of the integrated driving circuit, and its second voltage input terminal serves as one of the switching node voltage terminals of the integrated driving circuit. Each driving module's third voltage input terminal is connected to the first voltage terminal of the integrated driving circuit, and its fourth voltage input terminal is connected to the second voltage terminal of the integrated driving circuit. Each driving module is used to determine whether to perform a first-time operation based on the first secondary control signal received from the first input terminal. A preset negative voltage is generated. If so, a three-level drive signal is generated based on the first main control signal and the preset negative voltage, and the three-level drive signal is sent to the gate of the external power transistor connected to the first output terminal. If not, a two-level drive signal is generated based on the first main control signal, and the two-level drive signal is sent to the gate of the external power transistor connected to the first output terminal. Each drive module is further configured to determine whether a preset negative voltage is generated within a first time period based on a second auxiliary control signal received from the second input terminal. If so, a three-level drive signal is generated based on the second main control signal and the preset negative voltage, and the three-level drive signal is sent to the gate of the external power transistor connected to the second output terminal. If not, a two-level drive signal is generated based on the second main control signal, and the two-level drive signal is sent to the gate of the external power transistor connected to the second output terminal. The input terminal of the control module is connected to an external waveform generating device. The control module is used to generate the first main control signal and the first auxiliary control signal, and send the first main control signal and the first auxiliary control signal to the drive module through the first input terminal. It also generates the second main control signal and the second auxiliary control signal, and sends the second main control signal and the second auxiliary control signal to the drive module through the second input terminal. The first auxiliary control signal and the second auxiliary control signal are respectively used to control the drive module to generate a preset negative voltage in the first time when the external power transistor connected to the drive module is in the freewheeling state, and to control the drive module not to generate the preset negative voltage when the external power transistor connected to the drive module is in a working state other than the freewheeling state.
2. The integrated driving circuit as described in claim 1, characterized in that, Each of the aforementioned drive modules includes two drive sub-modules; The first terminal of the first driving submodule of the two driving submodules serves as the first input terminal of the driving module, the second terminal of the first driving submodule serves as the first output terminal of the driving module, and the third and fourth terminals of the first driving submodule serve as the first voltage input terminal and the second voltage input terminal of the driving module, respectively. The first end of the second driving submodule of the two driving submodules serves as the second input end of the driving module, the second end of the second driving submodule serves as the second output end of the driving module, and the third and fourth ends of the second driving submodule are the third voltage input end and the fourth voltage input end of the driving module, respectively.
3. The driving circuit as described in claim 2, characterized in that, Each of the two drive submodules includes: a voltage adjustment module, a power adjustment module, a capacitor, and three switches; The first end of the voltage adjustment module serves as the first end of the drive submodule. The second end of the voltage adjustment module is connected to the third end of the drive submodule. The third end of the voltage adjustment module is connected to the first end of the first switch among the three switches and the fourth end of the drive submodule. The fourth end of the voltage adjustment module is connected to the first end of the capacitor. The fifth end of the voltage adjustment module is connected to the second end of the capacitor. The sixth end of the voltage adjustment module is connected to the first end of the power adjustment module. The second terminal of the power adjustment module is connected to the fourth terminal of the voltage adjustment module, the third terminal of the power adjustment module is connected to the fifth terminal of the voltage adjustment module and the first terminal of the second switch among the three switches, and the fourth terminal of the power adjustment module is connected to the second terminal of the drive submodule. The second terminal of the first of the three switches is connected to the first terminal of the capacitor. The second terminal of the second switch of the three switches is connected to the second voltage input terminal; The first terminal of the third switch of the three switches is connected to the third terminal of the drive submodule, and the second terminal of the third switch of the three switches is connected to the first terminal of the capacitor.
4. The driving circuit as described in claim 3, characterized in that, The second switch has the same switching state as the third switch, and the first switch has the opposite switching state to the second switch.
5. The driving circuit as described in claim 3, characterized in that, The control module includes logic gate circuits; The input terminal of the logic gate circuit is connected to the external waveform generating device, the first output terminal of the logic gate circuit is connected to the first terminal of the first driving submodule, and the second output terminal of the logic gate circuit is connected to the first terminal of the second driving submodule.
6. The driving circuit as described in claim 3, characterized in that, The voltage adjustment module includes a step-down level shifter; The first terminal of the buck-shift level converter serves as the first terminal of the driving submodule. The second terminal of the buck-shift level converter is connected to the third terminal of the driving submodule. The third terminal of the buck-shift level converter is connected to the first terminal of the first switch among the three switches and the fourth terminal of the driving submodule. The fourth terminal of the buck-shift level converter is connected to the first terminal of the capacitor. The fifth terminal of the buck-shift level converter is connected to the second terminal of the capacitor. The sixth terminal of the buck-shift level converter is connected to the first terminal of the power adjustment module.
7. The driving circuit as described in claim 3, characterized in that, The power adjustment module includes a buffer; The first end of the buffer is connected to the sixth end of the voltage adjustment module, the second end of the buffer is connected to the fourth end of the voltage adjustment module, the third end of the buffer is connected to the fifth end of the voltage adjustment module and the first end of the second switch among the three switches, and the fourth end of the buffer is connected to the first output end of the drive submodule.
8. The driving circuit according to any one of claims 1-7, characterized in that, It also includes at least two bootstrap power supply modules; The number of bootstrap power supply modules is the same as the number of drive modules and they are configured in a one-to-one correspondence. For each of the at least two bootstrap power supply modules and the drive module configured in a one-to-one correspondence with each bootstrap power supply module, the first terminal of the bootstrap power supply module is connected to the first voltage input terminal of the drive module, the second terminal of the bootstrap power supply module is connected to the second voltage input terminal of the drive module, and the third terminal of the bootstrap power supply module is connected to the third voltage input terminal of the drive module. Each of the at least two bootstrap power supply modules is used to provide a first voltage to the drive module configured in a one-to-one correspondence with each bootstrap power supply module.
9. The driving circuit as described in claim 8, characterized in that, Each of the at least two bootstrap power supply modules includes: a bootstrap capacitor and a bootstrap switch; The first end of the bootstrap capacitor is connected to the first voltage input terminal of the drive module that is configured one-to-one with the bootstrap power supply module, and the second end of the bootstrap capacitor is connected to the second voltage input terminal of the drive module that is configured one-to-one with the bootstrap power supply module. The first end of the boot switch is connected to the first voltage input terminal of the drive module, which is configured one-to-one with the boot power supply module, and the second end of the boot switch is connected to the third voltage input terminal of the drive module, which is configured one-to-one with the boot power supply module.
10. A switching power supply system, characterized in that, include: The integrated drive circuit, auxiliary circuit, waveform generator, and main power supply circuit as described in any one of claims 1-9, wherein the output terminal of the integrated drive circuit is connected to the main power supply circuit, and the input terminal of the integrated drive circuit is connected to the auxiliary circuit and the waveform generator, respectively.
Citation Information
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