Digital-to-analog conversion correction device

Abstract

The present application provides a digital-to-analog conversion correction device capable of reducing static mismatch error of a digital-to-analog converter (DAC), comprising a digital code generating circuit, the DAC, an analog-to-digital converter (ADC), a filter circuit, an indication circuit and a statistics circuit. The digital code generating circuit generates a digital code, which is one of N digital codes. The DAC generates an analog signal according to the digital code, which corresponds to one of N signal levels. The ADC generates a digital signal according to the analog signal. The filter circuit generates a gradient value according to the difference between the digital code and the digital signal, which reflects the static mismatch error. The indication circuit generates a selection signal according to the digital code. The statistics circuit learns that the gradient value is a Kth gradient value, which corresponds to a Kth digital code of the N digital codes, according to the selection signal, and determines whether to require the digital code generating circuit to adjust the Kth digital code according to the Kth gradient value.

Description

Technical Field

[0001] This invention relates to a digital-to-analog converter correction device, and more particularly to a correction device capable of reducing static mismatch errors in local digital-to-analog converters. Background Technology

[0002] Process, voltage, and temperature (PVT) drift can cause mismatches in the output of digital-to-analog converters (DACs), such as those using current-mode DACs, in terms of both bit scale and pulse shape. The bit scale mismatch is called static mismatch error, while the pulse shape mismatch is called dynamic mismatch error. Static mismatch error can severely impact the performance of a circuit system. When the DAC is a local-side DAC, the circuit system is a local-side system that includes the local-side DAC. Summary of the Invention

[0003] One object of the present invention is to provide a digital-to-analog converter correction device to reduce the static mismatch error of a local digital-to-analog converter.

[0004] An embodiment of the digital-to-analog converter correction device of the present invention includes a digital code generation circuit, a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), a filter circuit, an indicator circuit, and a statistical circuit. The digital code generation circuit generates a digital code, which is one of N digital codes, wherein the N initial values ​​of the N digital codes are discontinuous digital values, and N is an integer greater than 1. The DAC generates an analog signal based on the digital code, wherein the DAC is a local DAC, and the analog signal corresponds to one of N signal levels (e.g., voltage levels). The ADC generates a digital signal based on the analog signal. The filter circuit is coupled to the digital code generation circuit and the ADC, and generates a gradient value based on the difference between the digital code and the digital signal, wherein the difference reflects the static mismatch error. The indicator circuit generates a selection signal based on the digital code. The statistical circuit is used to determine, based on the selection signal, that the gradient value is a Kth gradient value corresponding to a Kth digital code of the N digital codes, and to determine whether to require the digital code generation circuit to adjust the Kth digital code based on the Kth gradient value, where K is a positive integer not greater than N.

[0005] The features, implementation, and effects of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0006] Figure 1 An embodiment of the digital-to-analog conversion correction device of the present invention is shown; and

[0007] Figure 2 An embodiment of a filter circuit is shown. Detailed Implementation

[0008] This invention includes a digital-to-analog converter (DAC) correction device capable of reducing static mismatch error in a local digital-to-analog converter (DAC). Static mismatch error refers to the situation where the output signal level of the local DAC ideally equals a preset signal level; however, due to process, voltage, and temperature drift, the actual output signal level is equal to the preset signal level plus an offset. This can make it difficult for a remote signal receiving device to determine the output signal level. The correction device of this invention can be used in a wired signal transmission device, such as a 2.5GBase-T Ethernet network device.

[0009] Figure 1 An embodiment of the digital-to-analog conversion correction device of the present invention is shown, wherein the correction operation is a closed-loop operation. Figure 1 The correction device 100 includes a digital code generation circuit 110, a digital-to-analog converter (DAC) 120, an analog-to-digital converter (ADC) 130, a filter circuit 140, an indicator circuit 150, and a statistical circuit 160. These circuits are described below.

[0010] Please see Figure 1 The digital code generation circuit 110 is used to generate a digital code Code#, which is one of N digital codes, wherein the N initial values ​​of the N digital codes are non-consecutive digital values, and N is an integer greater than 1. In one embodiment, the N digital codes are N values ​​from M consecutive digital values, where M is not less than 2 to the power of X (e.g., 2^X). 8 The integer N is not less than 3; the integer N is not less than 2 raised to the power of Y (e.g., 2). 4 Y is a positive integer not greater than (X-2). In one embodiment, the N initial values ​​of the N numeric codes are equally spaced. For example, N equals 17, the N numeric codes are Code#1 to Code#17; M equals 256, the M consecutive numeric values ​​are 0 to 255; the interval between any two of the N initial values ​​is 15; the minimum value among the N initial values ​​is 9; therefore, the N initial values ​​are: Code#1 = 009; Code#2 = 024; Code#3 = 039; ...; Code#16 = 234; Code#17 = 249.

[0011] Please see Figure 1The DAC120 is used to generate an analog signal S based on the digital code Code#. A DAC120 is the aforementioned local DAC. The analog signal S A This corresponds to one of N signal levels (e.g., N voltage levels); each of these N signal levels corresponds to one of the N digital codes. In one embodiment, the N digital codes are N values ​​from M consecutive digital values, where M equals 2 to the power of X (e.g., 2^X). 8 DAC 120 is an X-bit DAC (e.g., an 8-bit DAC). DAC 120 is a known / self-developed circuit, the details of which are beyond the scope of this invention.

[0012] Please see Figure 1 The ADC130 is used to determine the analog signal S. A Generate a digital signal S D The ADC130, in its entirety, is a known / self-developed circuit, the details of which are beyond the scope of this invention.

[0013] Please see Figure 1 The filter circuit 140 is coupled to the digital code generation circuit 110 and the ADC 130 to generate a digital code Code# and the digital signal S. D The difference between them produces a gradient value S G This difference reflects the static mismatch error of the DAC120. In one embodiment, the filter circuit 140 employs the Least Mean Squares (LMS) algorithm to generate the error signal S, which will be described later. ERR The minimum mean square value. The LMS algorithm is a known algorithm, and its details are beyond the scope of this invention.

[0014] Figure 2 An embodiment of the filter circuit 140 is shown, including an echo canceller 210, an error signal generation circuit 220, and a filter 230. The echo canceller 210 is used to generate a cancellation signal S according to the digital code Code#. CXL Error signal generation circuit 220 (e.g., adder or subtractor) is used to generate an error signal based on the cancellation signal and the digital signal S. D Generate an error signal S ERR Filter 230 is used to adjust the error signal S. ERR The aforementioned gradient value S is generated. GIn one embodiment, echo canceller 210 is another filter, and the coefficients of filter 230 are mirror images of the coefficients of this other filter. Since each of echo canceller 210, error signal generation circuit 220, and filter 230 is individually a known / self-developed circuit, the details of which are beyond the scope of this invention.

[0015] Please see Figure 1 The indicator circuit 150 is used to generate a selection signal S based on the digital code Code#. SEL The selection signal S SEL This indicates which of the N digit codes Code# is being referred to. For example, the indicator circuit 150 includes a delay circuit (not shown) that delays the digit code Code# to generate a delayed digit code as the selection signal S. SEL The delay amount of the delay circuit is equal to the delay amount caused by the filter circuit 140. The indicator circuit 150 is a known / self-developed circuit, the details of which are beyond the scope of this invention. It is worth noting that the indicator circuit 150 may be included in or separate from the digital code generation circuit 110.

[0016] Please see Figure 1 The statistical circuit 160 is used to determine the selection signal S. SEL Knowing the gradient value S G Let K be a Kth gradient value, corresponding to a Kth digit code of the N digit codes, and determine whether the digit code generation circuit 110 is required to adjust the Kth digit code based on the Kth gradient value, where K is a positive integer not greater than N. It is worth noting that the statistical circuit 160 may be included in the digit code generation circuit 110 or independent of the digit code generation circuit 110.

[0017] As described above, in one embodiment, the statistical circuit 160 updates a Kth cumulative gradient value (GradAcc#K) based on the Kth gradient value (Grad#K), and then determines whether the Kth cumulative gradient value is greater than a Kth positive threshold value (+THD#K) or less than a Kth negative threshold value (-THD#K). When the Kth cumulative gradient value is greater than the Kth positive threshold value or less than the Kth negative threshold value, the statistical circuit 160 requests the digital code generation circuit 110 to adjust the Kth digital code and reset the Kth cumulative gradient value or update the Kth positive threshold value and the Kth negative threshold value. It is worth noting that the absolute value of the Kth positive threshold value can be equal to the absolute value of the Kth negative threshold value; however, the implementation of the present invention is not limited thereto. In addition, it is worth noting that all positive threshold values ​​(i.e., +THD#1 to +THD#N) can be the same value, and all negative threshold values ​​(i.e., -THD#1 to -THD#N) can be the same value; however, the implementation of the present invention is not limited thereto.

[0018] In one embodiment, the statistical circuit 160 subtracts a coefficient (Mu) (e.g., 2) from a current value of the Kth cumulative gradient value. -10 Multiplying the Kth gradient value (Grad#K) by the Kth gradient value (Grad#K) to update the Kth cumulative gradient value (GradAcc#K) can be expressed as follows:

[0019] GradAcc#K=GradAcc#K-Mu×Grad#K (Formula 1)

[0020] In one embodiment, when the Kth cumulative gradient value is greater than the Kth positive threshold value, this indicates that the Kth digit code (Code#K) is too large. Therefore, the statistical circuit 160 requests the digit code generation circuit 110 to reduce the Kth digit code and reset the Kth cumulative gradient value or update the Kth positive threshold value and the Kth negative threshold value. For example, the digit code generation circuit 110 subtracts 1 from a current value of the Kth digit code to reduce the Kth digit code (Code#K), which can be expressed as follows:

[0021] GradAcc#K≥+THD#K→Code#K=Code#K-1 (Equation 2)

[0022] In one embodiment, when the Kth cumulative gradient value is less than the Kth negative threshold value, this indicates that the Kth digit code (Code#K) is too small. Therefore, the statistical circuit 160 requests the digit code generation circuit 110 to increase the Kth digit code and reset the Kth cumulative gradient value or update the Kth positive threshold value and the Kth negative threshold value. For example, the digit code generation circuit 110 increments a current value of the Kth digit code by 1 to increase the Kth digit code (Code#K), which can be expressed as follows:

[0023] GradAcc#K≤-THD#K→Code#K=Code#K+1 (Equation 3)

[0024] In one embodiment, after adjusting the Kth digit code, the statistical circuit 160 resets the Kth cumulative gradient value to zero or a preset value to reset the Kth cumulative gradient value. In another embodiment, after adjusting the Kth digit code, the statistical circuit 160 adds or subtracts an initial Kth value (e.g., |+THD#K|) to each of the Kth positive threshold value and the Kth negative threshold value to update the Kth positive threshold value (e.g., +THD#K+(+THD#K)=+THD#K) and the Kth negative threshold value (e.g., -THD#K+(+THD#K)=0).

[0025] It is worth noting that the output of DAC120 (or ADC130) and the output of filter circuit 140 may change in the same direction due to mutual influence, which may cause hardware overflow. In one embodiment, at least two of the N digit codes (e.g., the Nth digit code (the largest digit code) and the first digit code (the smallest digit code)) are fixed to achieve an anchoring effect and avoid hardware overflow; in this embodiment, K is less than N and greater than 1.

[0026] In one embodiment, the N numeric codes are 17 values ​​out of 256 consecutive numeric values. The initial values ​​of the 17 numeric codes (Code#1 to Code#17) are 009, 024, 039, 054, 069, 084, 099, 114, 129, 144, 159, 174, 189, 204, 219, 234, and 249, respectively. The first numeric code (009) and the 17th numeric code (249) remain unchanged to achieve the aforementioned anchoring effect. Table 1 shows the 17 numeric codes and their adjustment methods, where THD is the aforementioned positive threshold value and -THD is the aforementioned negative threshold value.

[0027] Table 1

[0028]

[0029]

[0030] In one embodiment, if the aforementioned Kth digit code is adjusted to a specific value the most times or stays at that specific value the longest within a preset time period, the statistics circuit 160 may selectively request the digit code generation circuit 110 to set the Kth digit code to the specific value and stop / pause updating the Kth digit code; thereby, all N digit codes can be set to appropriate values.

[0031] Please note that, provided that implementation is feasible, those skilled in the art may selectively implement some or all of the technical features in any of the foregoing embodiments, or selectively implement a combination of some or all of the technical features in the foregoing multiple embodiments, thereby increasing the flexibility of implementing the present invention.

[0032] In summary, the present invention can reduce the static mismatch error of a local digital-to-analog converter.

[0033] While the embodiments of the present invention have been described above, these embodiments are not intended to limit the present invention. Those skilled in the art can make changes to the technical features of the present invention based on the explicit or implicit content of the present invention, and these changes may all fall within the scope of patent protection claimed by the present invention. In other words, the scope of patent protection of the present invention shall be determined by the claims of the present invention.

[0034] Explanation of reference numerals in the attached figures:

[0035] 100: Calibration device

[0036] 110: Digital code generation circuit

[0037] 120: Digital-to-Analog Converter

[0038] 130: Analog-to-Digital Converter

[0039] 140: Filtering circuit

[0040] 150: Indicator Circuit

[0041] 160: Statistical Circuits

[0042] Code#: Numeric code

[0043] S A :analog signal

[0044] S D Digital signals

[0045] S G gradient value

[0046] S SEL Selection signal

[0047] 210: Echo Canceller

[0048] 220: Error signal generation circuit

[0049] 230: Filter

[0050] S CXL Cancel signal

[0051] SERR Error signal

Claims

1. A digital-to-analog conversion correction device capable of reducing a static mismatch error of a local digital-to-analog converter, the digital-to-analog conversion correction device comprising: a digital code generating circuit configured to generate a digital code, the digital code being one of N digital codes, wherein N initial values of the N digital codes are discontinuous digital values, and N is an integer greater than 1 ; a digital-to-analog converter configured to generate an analog signal according to the digital code, wherein the digital-to-analog converter is the local digital-to-analog converter, and the analog signal corresponds to one of N signal levels; an analog-to-digital converter configured to generate a digital signal according to the analog signal; a filter circuit coupled to the digital code generating circuit and the analog-to-digital converter, and configured to generate a gradient value according to a difference between the digital code and the digital signal, wherein the difference reflects the static mismatch error; an indication circuit configured to generate a selection signal according to the digital code; and a statistics circuit configured to determine, according to the selection signal, that the gradient value is a Kth gradient value corresponding to a Kth digital code of the N digital codes, and to determine, according to the Kth gradient value, whether to require the digital code generating circuit to adjust the Kth digital code, K being a positive integer not greater than N and greater than 1.

2. The digital-to-analog correction apparatus of claim 1, wherein A first digital code and an Nth digital code of the N digital codes are fixed, the Nth digital code being a maximum digital code of the N digital codes, and the first digital code being a minimum digital code of the N digital codes, K being less than N and greater than 1.

3. The digital-to-analog correction apparatus of claim 1, wherein The filter circuit employs a least mean square algorithm.

4. The digital-to-analog correction apparatus of claim 1, wherein The filter circuit comprises: an echo canceller configured to generate a cancellation signal according to the digital code; an error signal generating circuit configured to generate an error signal according to the cancellation signal and the digital signal; and a filter configured to generate the gradient value according to the error signal.

5. The digital-to-analog correction apparatus of claim 4, wherein The echo canceller is another filter, and coefficients of the filter are mirror images of coefficients of the another filter.

6. The digital-to-analog correction apparatus of claim 1, wherein The indication circuit comprises a delay circuit, and a delay amount of the delay circuit is equal to a delay amount caused by the filter circuit.

7. The digital-to-analog correction apparatus of claim 1, wherein The statistics circuit updates a Kth accumulated gradient value according to the Kth gradient value, and then determines whether the Kth accumulated gradient value is greater than a Kth positive threshold value or less than a Kth negative threshold value; when the Kth accumulated gradient value is greater than the Kth positive threshold value or less than the Kth negative threshold value, the statistics circuit requires the digital code generating circuit to adjust the Kth digital code, and resets the Kth accumulated gradient value or updates the Kth positive threshold value and the Kth negative threshold value.

8. The digital-to-analog correction apparatus of claim 7, wherein The statistics circuit updates the Kth accumulated gradient value by subtracting a coefficient multiplied by the Kth gradient value from a current value of the Kth accumulated gradient value.

9. The digital-to-analog correction apparatus of claim 7, wherein When the Kth accumulated gradient value is greater than the Kth positive threshold value, the statistics circuit requires the digital code generating circuit to decrease the Kth digital code.

10. The digital-to-analog correction apparatus of claim 7, wherein When the Kth accumulated gradient value is less than the Kth negative threshold value, the statistics circuit requires the digital code generating circuit to increase the Kth digital code.

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