Method for manufacturing a fine line circuit board

Abstract

A manufacturing method of a fine line circuit board, comprising the following steps: providing a metal substrate, including laminated insulating layers and a metal foil; opening at least one through hole in the laminated direction to communicate with the insulating layers; forming a seed layer on the side of the insulating layers away from the metal foil and the inner wall of the through hole, wherein each through hole corresponds to a via hole; covering a first photosensitive film on the seed layer, and exposing and developing the first photosensitive film to form a window corresponding to each via hole; electroplating the via hole through the window to form a conductive column to fill the via hole; after removing the first photosensitive film after exposure and development, covering a second photosensitive film on the side of the seed layer away from the insulating layers, and exposing and developing the second photosensitive film to form a circuit groove; electroplating the circuit groove to form a circuit pattern; and after removing the second photosensitive film after exposure and development, removing the part of the seed layer not covered by the circuit pattern, thereby obtaining a conductive circuit layer on the side of the insulating layers away from the metal foil.

Description

Technical Field

[0001] This invention relates to the field of circuit boards, and more particularly to a method for manufacturing a fine-line circuit board. Background Technology

[0002] With the rapid development of electronic products, printed circuit boards, which serve as the support for components and the carrier for transmitting electrical signals, should gradually move towards miniaturization, lightweighting, high density, and multifunctionality, which in turn places higher demands on the fabrication of fine circuits on printed circuit boards.

[0003] In conventional printed circuit board (PCB) manufacturing processes, the formation of conductive vias and the electroplating of circuits are often carried out simultaneously, resulting in a relatively thick copper layer for forming the circuits. However, the linewidth is limited by the copper layer thickness; the thinner the copper layer, the finer the circuit. Therefore, using thick copper to create fine circuits has limitations and is not conducive to increasing circuit density or miniaturizing PCBs. Summary of the Invention

[0004] In view of this, the present invention provides a method for manufacturing a fine-line circuit board, which is beneficial for improving line density and miniaturizing the circuit board.

[0005] As one embodiment of this application, a method for manufacturing a fine-line circuit board includes the following steps:

[0006] A metal substrate is provided, including an insulating layer and a metal foil stacked together;

[0007] At least one through-hole is formed along the aforementioned stacking direction, penetrating the insulating layer;

[0008] A seed layer is formed on the side of the insulating layer opposite to the metal foil and on the inner wall of the connecting hole, wherein each connecting hole corresponds to a guide hole.

[0009] A first photosensitive film is covered on the side of the seed layer away from the insulating layer, and the first photosensitive film is exposed and developed to form a window corresponding to each of the guide holes to expose the guide holes.

[0010] Electroplating is performed on the guide hole through the opening to form a conductive pillar that fills the guide hole;

[0011] After removing the first photosensitive film after exposure and development, a second photosensitive film is covered on the side of the seed layer away from the insulating layer, and the second photosensitive film is exposed and developed to form a plurality of circuit grooves.

[0012] Electroplating is performed on the corresponding line grooves to form a line pattern; and

[0013] After removing the second photosensitive film after exposure and development, the portion of the seed layer not covered by the circuit pattern is removed, thereby obtaining a conductive circuit layer located on the side of the insulating layer opposite to the metal foil.

[0014] As one embodiment of this application, the insulating layer is ABF.

[0015] As one embodiment of this application, in any direction perpendicular to the stacking direction, the width of the window is smaller than the opening width of the guide hole.

[0016] As one embodiment of this application, the portion of the seed layer not covered by the circuit pattern is removed by rapid etching.

[0017] As one embodiment of this application, the seed layer is formed by chemical plating or sputtering.

[0018] As one embodiment of this application, the metal substrate further includes a conductive circuit layer, which is covered by the insulating layer and spaced apart from the metal foil in the stacking direction.

[0019] The method for manufacturing a fine-line circuit board disclosed in this application separates the electroplating of the conductive pillars from the electroplating of the circuit pattern. This allows for a thinner conductive line layer, resulting in finer lines. It also improves the uniformity of the electroplating of the circuit pattern, further facilitating the manufacturing of fine lines and, consequently, the miniaturization of the circuit board. Attached Figure Description

[0020] Figure 1 This is a cross-sectional schematic diagram of a metal substrate according to an embodiment of this application.

[0021] Figure 2 In order to be in Figure 1 The diagram shows a cross-sectional view of a metal substrate with interconnecting holes.

[0022] Figure 3 In order to be in Figure 2 The diagram shows a cross-sectional view of a metal substrate with a seed layer and corresponding conductive holes.

[0023] Figure 4 In order to be in Figure 3 The diagram shows a cross-sectional view of a first photosensitive film with windows set on a seed layer.

[0024] Figure 5 In order to be in Figure 4 The diagram shows a cross-sectional view of a conductive post formed in a conductive hole.

[0025] Figure 6 To be Figure 5A cross-sectional schematic diagram of a second photosensitive film with circuit grooves after the first photosensitive film is removed.

[0026] Figure 7 In order to be in Figure 6 The diagram shows a cross-sectional view of the circuit pattern formed in the circuit groove.

[0027] Figure 8 This is a cross-sectional schematic diagram of a fine-line circuit board according to an embodiment of this application.

[0028] Explanation of main component symbols

[0029] Metal substrate 10

[0030] Insulation layer 11

[0031] Metal foil 13

[0032] Connecting hole 110

[0033] Seed layer 20

[0034] Conductor hole 113

[0035] First photosensitive film 31

[0036] 310 windows

[0037] Conductive post 115

[0038] Second photosensitive film 33

[0039] 330 cable tray

[0040] Circuit pattern 50

[0041] Conductive circuit layer 55

[0042] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0043] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0045] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0046] Please see Figures 1 to 8 This application provides a method for manufacturing a fine-line circuit board according to one embodiment, which includes the following steps:

[0047] Step S1, please refer to Figure 1 A metal substrate 10 is provided, including an insulating layer 11 and a metal foil 13 stacked together.

[0048] In this embodiment, preferably, the insulating layer 11 can be ABF (Aginomoto Build-up Film).

[0049] The metal foil 13 may be, but is not limited to, copper foil.

[0050] In some embodiments, the metal substrate 10 may further include a conductive line layer (not shown), which is covered by the insulating layer 11 and is spaced apart from the metal foil 13 in the aforementioned stacking direction.

[0051] For step S2, please refer to [link / reference]. Figure 2 At least one through hole 110 is formed along the aforementioned stacking direction, penetrating the insulating layer 11. Each through hole 110 exposes a portion of the metal foil 13.

[0052] Step S3, please refer to Figure 3 A seed layer 20 is formed on the side of the insulating layer 11 opposite to the metal foil 13 and on the inner wall of the connecting hole 110, wherein each of the connecting holes 110 corresponds to a guide hole 113.

[0053] The seed layer 20 can be formed by, but is not limited to, chemical plating, sputtering, etc.

[0054] For step S4, please refer to [link / reference]. Figure 4 A first photosensitive film 31 is covered on the side of the seed layer 20 away from the insulating layer 11, and the first photosensitive film 31 is exposed and developed to form a window 310 corresponding to each of the guide holes 113 to expose the guide holes 113.

[0055] In this embodiment, preferably, in any direction perpendicular to the stacking direction, the width of the window 310 is smaller than the opening width of the guide hole 113.

[0056] For step S5, please refer to [link / reference]. Figure 4 and Figure 5 Electroplating is performed on the guide hole 113 through the window 310 to form a conductive pillar 115 that fills the guide hole 113.

[0057] For step S6, please refer to [link / reference]. Figure 6After removing the first photosensitive film 31 after exposure and development, a second photosensitive film 33 is covered on the side of the seed layer 20 away from the insulating layer 11, and the second photosensitive film 33 is exposed and developed to form a plurality of line grooves 330.

[0058] In this embodiment, there are multiple line slots 330, which may include line slots corresponding to the conductive post 115 and line slots not corresponding to the conductive post 115.

[0059] For step S7, please refer to [link / reference]. Figure 7 Electroplating is performed on the corresponding line groove 330 to form a line pattern 50.

[0060] Step S8, please refer to Figure 7 and Figure 8 After removing the second photosensitive film 33 after exposure and development, the portion of the seed layer 20 not covered by the circuit pattern 50 is removed, thereby obtaining the conductive circuit layer 55 located on the side of the insulating layer 11 opposite to the metal foil 13.

[0061] The portion of the seed layer 20 not covered by the circuit pattern 50 can be removed by, but is not limited to, rapid etching.

[0062] In some embodiments, the method for manufacturing the fine-line circuit board may further include fabricating circuitry on the metal foil 13 to form a corresponding circuit layer. In some embodiments, additional layers may be added on the circuit layer formed by the metal foil 13.

[0063] In some embodiments, the method for manufacturing the fine-line circuit board may further include adding layers on the conductive line layer 55.

[0064] The method for manufacturing a fine-line circuit board of this application separates the electroplating of the conductive pillars 115 from the electroplating of the circuit pattern 50, which is beneficial to making the conductive circuit layer 55 thinner, thereby obtaining finer lines. At the same time, it is also beneficial to the uniformity of the electroplating of the circuit pattern 50, which is further beneficial to the manufacturing of fine lines, and thus beneficial to the miniaturization of the circuit board.

[0065] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above as a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A method for manufacturing a fine-line circuit board, comprising the following steps: A metal substrate is provided, including an insulating layer and a metal foil stacked together; At least one through-hole is formed along the aforementioned stacking direction, penetrating the insulating layer; A seed layer is formed on the side of the insulating layer opposite to the metal foil and on the inner wall of the connecting hole, wherein each connecting hole corresponds to a guide hole. A first photosensitive film is covered on the side of the seed layer away from the insulating layer, and the first photosensitive film is exposed and developed to form a window corresponding to each of the guide holes to expose the guide holes. Electroplating is performed on the guide hole through the opening to form a conductive pillar that fills the guide hole; After removing the first photosensitive film after exposure and development, a second photosensitive film is covered on the side of the seed layer away from the insulating layer, and the second photosensitive film is exposed and developed to form a plurality of circuit grooves. Electroplating is performed on the corresponding line grooves to form a line pattern; and After removing the second photosensitive film after exposure and development, the portion of the seed layer not covered by the circuit pattern is removed, thereby obtaining a conductive circuit layer located on the side of the insulating layer opposite to the metal foil.

2. The method for manufacturing a fine-line circuit board as described in claim 1, characterized in that, The insulating layer is ABF.

3. The method for manufacturing a fine-line circuit board as described in claim 1, characterized in that, In any direction perpendicular to the stacking direction, the width of the window is smaller than the opening width of the guide hole.

4. The method for manufacturing a fine-line circuit board as described in claim 1, characterized in that, The portion of the seed layer not covered by the circuit pattern is removed by rapid etching.

5. The method for manufacturing a fine-line circuit board as described in claim 1, characterized in that, The seed layer is formed by chemical plating or sputtering.

6. The method for manufacturing a fine-line circuit board as described in claim 1, characterized in that, The metal substrate further includes a conductive circuit layer, which is covered by the insulating layer and spaced apart from the metal foil in the stacking direction.

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