Relevant demodulation device applicable to single-photon detectors

By designing a demodulation device suitable for single-photon detectors, using technical means such as weighted summing, inter-frame correlation detection, distribution characteristic statistics and common-mode noise suppression, the problem of single-photon detectors being susceptible to background noise interference and resource consumption is solved, the background light suppression ability and measurement frame rate are improved, and more reliable measurement results are obtained.

CN116008963BActive Publication Date: 2025-06-10XIDIAN UNIV
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Patent Information

Application Number
CN202211732360.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-30
Publication Date
2025-06-10
Estimated Expiration
2042-12-30

AI Technical Summary

Technical Problem

Single-photon detectors are susceptible to background noise, their ability to suppress background light is limited, and traditional spatial domain accumulation algorithms lead to increased resource consumption.

Method used

A demodulation device suitable for a single photon detector is designed, including a single photon detector readout circuit, a nonlinear accumulator based on inter-frame correlation, a histogram statistical algorithm unit based on synchronous sampling, and a common mode suppression unit. The device improves the background light suppression ability and measurement frame rate of the single-photon detector through technical means such as weighted summing, inter-frame correlation detection, distribution characteristic statistics and common mode noise suppression.

Benefits of technology

The background light suppression capability and measurement frame rate of the single-photon detector are improved, the resource consumption of the histogram statistics algorithm is reduced, and more reliable target measurement results are obtained.

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Abstract

The present invention discloses a correlation demodulation device applicable to a single-photon detector, comprising: a single-photon detector; a single-photon detector readout circuit, including a first encoding circuit and a first accumulator, wherein the input end of the first encoding circuit is electrically connected to the output end of the single-photon detector, and the output end of the first encoding circuit is electrically connected to the input end of the first accumulator; a non-linear accumulator based on inter-frame correlation, whose input end is electrically connected to the output end of the first accumulator; a histogram statistical algorithm unit based on synchronous sampling, whose input end is electrically connected to the output end of the non-linear accumulator based on inter-frame correlation; a common-mode rejection unit, whose input end is electrically connected to the output end of the histogram statistical algorithm unit based on synchronous sampling, and the output end of the common-mode rejection unit is electrically connected to the input end of the histogram statistical algorithm unit based on synchronous sampling. The present invention can improve the signal-to-noise ratio of the measurement result of the single-photon detector.
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Description

Technical Field

[0001] The present invention belongs to the field of digital signal processing of single - photon detectors, and particularly relates to a correlation demodulation device suitable for single - photon detectors. Background Art

[0002] A single - photon detector is a core component at the receiving end of a solid - state lidar system. It is mainly used to convert photons received by the single - photon detector into electrical pulse signals and simultaneously measure the time interval between the emitted laser and the received laser. Among them, the solid - state lidar system based on single - photon detectors has high measurement accuracy, high reliability, and high frame rate, and is currently widely used in fields such as intelligent vehicles and military.

[0003] In the prior art, due to the large gain of single - photon detectors, compared with traditional APDs, single - photon detectors are more easily interfered by background noise. In addition, in traditional spatial - domain accumulation and time - domain accumulation algorithms, the summation weights of the effective outputs of each single - photon detector at any sampling moment are the same, resulting in limited background light suppression ability of single - photon detectors. At the same time, using the spatial - domain accumulation method will increase the output data volume of a single macro - pixel of the single - photon detector, leading to an increase in the resources required for the histogram statistical algorithm.

[0004] Therefore, it is urgent to improve the above - mentioned defects in the prior art. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a correlation demodulation device suitable for single - photon detectors. The technical problems to be solved by the present invention are realized through the following technical solutions:

[0006] In a first aspect, the present invention provides a correlation demodulation device suitable for single - photon detectors, including:

[0007] A single - photon detector, configured to convert the received optical signal into an electrical pulse signal;

[0008] A single - photon detector readout circuit, including a first encoding circuit and a first accumulator. The input end of the first encoding circuit is electrically connected to the output end of the single - photon detector, and the output end of the first encoding circuit is electrically connected to the input end of the first accumulator. The first encoding circuit is configured to perform non - linear encoding on the electrical pulse signal, and the first accumulator is configured to perform weighted summation on the electrical pulse signal processed by the first encoding circuit;

[0009] A frame - to - frame correlation - based non - linear accumulator, the input end of the frame - to - frame correlation - based non - linear accumulator is electrically connected to the output end of the first accumulator; the frame - to - frame correlation - based non - linear accumulator is configured to perform weighted summation again on the electrical pulse signal processed by the first accumulator;

[0010] Histogram statistical algorithm unit based on synchronous sampling. The input end of the histogram statistical algorithm unit based on synchronous sampling is electrically connected to the output end of the non-linear accumulator based on inter-frame correlation. The histogram statistical algorithm unit based on synchronous sampling is used to measure the flight time of the electrical pulse signal processed by the non-linear accumulator based on inter-frame correlation, and is also used to statistically analyze the distribution characteristics of the measurement results.

[0011] Common-mode rejection unit. The input end of the common-mode rejection unit is electrically connected to the output end of the histogram statistical algorithm unit based on synchronous sampling, and the output end of the common-mode rejection unit is electrically connected to the input end of the histogram statistical algorithm unit based on synchronous sampling. The common-mode rejection unit is used to suppress the common-mode noise output by the histogram statistical algorithm unit based on synchronous sampling.

[0012] Advantages of the present invention:

[0013] A correlation demodulation device suitable for single-photon detectors provided by the present invention improves the background light suppression ability and measurement frame rate of single-photon detectors by performing weighted summation on the outputs of multiple single-photon detectors included in a single macro-pixel. By using a non-linear accumulator based on inter-frame correlation, inter-frame correlation detection is achieved and non-linear modulation is performed on the measurement results, further improving the measurement frame rate of single-photon detectors. By using a histogram statistical algorithm unit based on synchronous sampling, the distribution characteristics of multiple measurement results of single-photon detectors are obtained, and reliable measurement results of the target object are obtained based on the distribution characteristics. A common-mode rejection unit is used to suppress the DC noise in the histogram statistical results of single-photon detectors, reducing the resource consumption of the histogram statistical algorithm.

[0014] The following will further elaborate on the present invention in conjunction with the accompanying drawings and embodiments. Description of the drawings

[0015] Figure 1 is a schematic diagram of a correlation demodulation device suitable for single-photon detectors provided by an embodiment of the present invention;

[0016] Figure 2 is a schematic diagram of a single-photon detector readout circuit provided by an embodiment of the present invention;

[0017] Figure 3 is a schematic diagram of a non-linear accumulator based on inter-frame correlation provided by an embodiment of the present invention;

[0018] Figure 4 is a schematic diagram of a histogram statistical algorithm unit based on synchronous sampling provided by an embodiment of the present invention;

[0019] Figure 5 is a schematic diagram of a common-mode rejection unit provided by an embodiment of the present invention. Detailed implementation manners

[0020] The present invention will be further described in detail below in conjunction with specific embodiments, but the implementation manners of the present invention are not limited thereto.

[0021] Please refer to Figure 1 and Figure 2 as shown in Figure 1 FIG. is a schematic diagram of a correlation demodulation device applicable to a single-photon detector provided by an embodiment of the present invention. Figure 2 FIG. is a schematic diagram of a readout circuit of a single-photon detector provided by an embodiment of the present invention. A correlation demodulation device applicable to a single-photon detector provided by the present invention includes:

[0022] A single-photon detector 100, configured to convert a received optical signal into an electrical pulse signal;

[0023] A single-photon detector readout circuit 200 includes a first encoding circuit 210 and a first accumulator 220. The input end of the first encoding circuit 210 is electrically connected to the output end of the single-photon detector 100, and the output end of the first encoding circuit 210 is electrically connected to the input end of the first accumulator 220; the first encoding circuit 210 is configured to perform non-linear encoding on the electrical pulse signal, and the first accumulator 220 is configured to perform weighted summation on the electrical pulse signal processed by the first encoding circuit 210;

[0024] A frame-interval correlation-based non-linear accumulator 300, the input end of the frame-interval correlation-based non-linear accumulator 300 is electrically connected to the output end of the first accumulator 220; the frame-interval correlation-based non-linear accumulator 300 is configured to perform weighted summation on the electrical pulse signal processed by the first accumulator 220 again;

[0025] A synchronization-sampling-based histogram statistical algorithm unit 400, the input end of the synchronization-sampling-based histogram statistical algorithm unit 400 is electrically connected to the output end of the frame-interval correlation-based non-linear accumulator 300; the synchronization-sampling-based histogram statistical algorithm unit 400 is configured to measure the flight time of the electrical pulse signal processed by the frame-interval correlation-based non-linear accumulator 300, and is also configured to statistically analyze the distribution characteristics of the measurement results;

[0026] A common-mode rejection unit 500, the input end of the common-mode rejection unit 500 is electrically connected to the output end of the synchronization-sampling-based histogram statistical algorithm unit 400, and the output end of the common-mode rejection unit 500 is electrically connected to the input end of the synchronization-sampling-based histogram statistical algorithm unit 400; the common-mode rejection unit 500 is configured to suppress the common-mode noise output by the synchronization-sampling-based histogram statistical algorithm unit 400.

[0027] Specifically, please continue to refer to Figure 1 and Figure 2As shown in the figure, a correlation demodulation device applicable to a single-photon detector provided in this embodiment performs weighted summation on the outputs of multiple single-photon detectors 100 included in a single macro-pixel, improving the background light suppression ability and measurement frame rate of the single-photon detector 100; a non-linear accumulator 300 based on inter-frame correlation is adopted to implement inter-frame correlation detection and non-linearly modulate the measurement results, further improving the measurement frame rate of the single-photon detector 100; a histogram statistical algorithm unit 400 based on synchronous sampling is adopted to obtain the distribution characteristics of multiple measurement results of the single-photon detector 100, and a reliable measurement result of the target object is obtained based on the distribution characteristics; a common-mode suppression unit 500 is adopted to suppress the DC noise in the histogram statistical result of the histogram statistical algorithm unit 400 based on synchronous sampling, reducing the resource consumption of the histogram statistical algorithm.

[0028] In an alternative embodiment of the present invention, multiple single-photon detectors 100 corresponding to the same macro-pixel convert optical signals into electrical pulse signals and drive the single-photon detector readout circuit 200; a first coding circuit 210 in the single-photon detector readout circuit 200 performs non-linear coding on the electrical pulse signals, and a first accumulator 220 in the single-photon detector readout circuit 200 performs weighted summation on the electrical pulse signals processed by the first coding circuit; the non-linear accumulator 300 based on inter-frame correlation is used to mark whether the BIN corresponding to the histogram statistical result is continuously triggered within a continuous plurality of measurement periods, so as to perform weighted summation on the electrical pulse signals processed by the first accumulator 220, improving the signal-to-noise ratio of the measurement results of the single-photon detector 100; the histogram statistical algorithm unit 400 based on synchronous sampling is used to measure the flight time of the pulsed laser signal and simultaneously statistically analyze the distribution characteristics of the measurement results, and the distance of the target object can be obtained based on the distribution characteristics of the statistical results; the common-mode suppression unit 500 is used to suppress the common-mode noise output by the histogram statistical algorithm unit, thereby reducing the resource consumption of the histogram statistical algorithm unit.

[0029] In an alternative embodiment of the present invention, please continue to refer to Figure 2 As shown in the figure, the single-photon detector readout circuit 200 processes the electrical pulse signals output by multiple single-photon detectors 100 included in the same macro-pixel.

[0030] Specifically, a single macro-pixel includes multiple single-photon detectors 100, equivalently reducing the measurement dead time of the single-photon detector 100 and improving the measurement frame rate of the single-photon detector 100.

[0031] It should be noted that a single macro-pixel corresponds to multiple single-photon detectors 100, and the single-photon detector readout circuit 200 is used to process the electrical pulse signals output by multiple single-photon detectors 100 corresponding to the same macro-pixel.

[0032] In an alternative embodiment of the present invention, please continue to refer to Figure 1 As shown, the first encoding circuit 210 non-linearly encodes the electrical pulse signal according to the current measurement time and the number of triggers of multiple single-photon detectors 100 included in the same macro pixel.

[0033] In an alternative embodiment of the present invention, the non-linear encoding is exponential encoding.

[0034] In an alternative embodiment of the present invention, please refer to Figure 3 As shown, Figure 3 is a schematic diagram of a non-linear accumulator based on inter-frame correlation provided by an embodiment of the present invention. The non-linear accumulator 300 based on inter-frame correlation includes a storage unit 310, a second encoding circuit 320, and a second accumulator 330; the input end of the storage unit 310 is electrically connected to the output end of the first accumulator 220, the output end of the storage unit 310 is electrically connected to the input end of the second encoding circuit 320, and the output end of the second encoding circuit 320 is electrically connected to the input end of the second accumulator 330; the storage unit 310 is used to record the number of times the single-photon detector 100 is triggered at any sampling time within adjacent multiple measurement periods; the second encoding circuit 320 is used to encode the electrical pulse signal processed by the storage unit 310; the second accumulator 330 is used to perform weighted summation on the electrical pulse signal processed by the second encoding circuit 320.

[0035] Specifically, please continue to refer to Figure 3 As shown, in this embodiment, the storage unit 310 is used to record the number of times the single-photon detector 100 is triggered at any sampling time within adjacent multiple measurement periods. The second encoding circuit 320 encodes the output result of the single-photon detector readout circuit 200 according to the output result of the storage unit 310. The second accumulator 330 sums and weights the output of the second encoding circuit 320 and outputs the result to the histogram statistical algorithm unit 400 based on synchronous sampling.

[0036] In an alternative embodiment of the present invention, please refer to Figure 4 As shown, Figure 4 is a schematic diagram of a histogram statistical algorithm unit based on synchronous sampling provided by an embodiment of the present invention. The histogram statistical algorithm unit 400 based on synchronous sampling includes a first RAM read / write controller 410, a first RAM address generation circuit 420, a first RAM unit 430, and a first adder 440;

[0037] The input end of the first RAM read / write controller 410 is connected to an external control system, and the output end of the first RAM read / write controller 410 is electrically connected to the read enable port and the write enable port of the first RAM unit 430; the first RAM read / write controller 410 is used to control the read enable port and the write enable port of the first RAM unit 430;

[0038] The input end of the first RAM address generation circuit 420 is connected to an external control system, and the output end of the first RAM address generation circuit 420 is electrically connected to the read address port and the write address port of the first RAM unit 430; the first RAM address generation circuit 420 is used to transmit the required address signals to the read address port and the write address port of the first RAM unit 430;

[0039] The input end of the first RAM unit 430 is also electrically connected to the output end of the first adder 440, and the first RAM unit 430 is used to store the weighted total number of times that the single-photon detector 100 included in a single macro-pixel is triggered at any sampling moment;

[0040] The input end of the first adder 440 is electrically connected to the output end of the first RAM unit 430, and the input end of the first adder 440 is also electrically connected to the output end of the inter-frame correlation-based non-linear accumulator 300; the first adder 440 is used to sum the output of the first RAM unit 430 and the output of the inter-frame correlation-based non-linear accumulator 300 at any sampling moment.

[0041] Specifically, please continue to refer to Figure 4 As shown, in this embodiment, the first RAM read / write controller 410 is used to control the read / write enable ports of the RAM unit. The input end of the first RAM read / write controller 410 is electrically connected to an external control system, so that the enable moment of the first RAM unit 430 is synchronized with the emission of the pulsed laser signal by the laser; the first RAM address generation circuit 420 is used to transmit the current write and read addresses to the first RAM unit 430. The input end of the first RAM address generation circuit 420 is electrically connected to an external control system, so that the address increment moment of the first RAM unit 430 is synchronized with the emission of the pulsed laser signal by the laser; the first RAM unit 430 is used to store the weighted total number of times that the single-photon detector 100 included in a single macro-pixel of the single-photon detector 100 is triggered at any sampling moment. The address of the first RAM unit 430 corresponds one-to-one with the magnitude of the flight time. The data stored in any address of the first RAM unit 430 represents the current sampling moment, when the weighted total number of times that the photon detector included in a single macro-pixel of the photon detector is triggered; the first adder 440 mainly realizes the sum of the output of the first RAM unit 430 and the output of the inter-frame correlation-based non-linear accumulator 300 at any sampling moment.

[0042] In an alternative embodiment of the present invention, please refer to Figure 5 as shown in Figure 5 which is a schematic diagram of a common-mode rejection unit provided by an embodiment of the present invention. The common-mode rejection unit 500 includes a second RAM read / write controller 510, a second RAM address generation circuit 520, a second RAM unit 530, a second adder 540, a standard deviation calculation unit 570, a subtractor 550, and an average value calculation module 560;

[0043] The input end of the second RAM read / write controller 510 is connected to an external control system, and the output end of the second RAM read / write controller 510 is electrically connected to the read enable port and the write enable port of the second RAM unit 530; the second RAM read / write controller 510 is used to control the read enable port and the write enable port of the second RAM unit 530;

[0044] The input end of the second RAM address generation circuit 520 is connected to an external control system, and the output end of the second RAM address generation circuit 520 is electrically connected to the read address port and the write address port of the second RAM unit 530; the second RAM address generation circuit 520 is used to transmit the required address signals to the read address port and the write address port of the second RAM unit 530;

[0045] The input end of the second RAM unit 530 is further electrically connected to the output end of the second adder 540. The second RAM unit 530 is used to store the trigger times of each BIN in the histogram statistical algorithm unit 400 based on synchronous sampling. The correspondence between the address of the second RAM unit 530 and the trigger times is related to the average number of times the single-photon detector 100 is triggered per unit time;

[0046] The input end of the second adder 540 is electrically connected to the output end of the second RAM unit 530; the second adder 540 is used to perform an increment operation on the output of the second RAM unit 530 at any sampling moment;

[0047] The input end of the standard deviation calculation unit 570 is electrically connected to the output end of the second RAM unit 530, and the input end of the standard deviation calculation unit 570 is further electrically connected to the output end of the second adder 540; the standard deviation calculation unit 570 is used to obtain the peak value of the data stored in each address in the second RAM unit 530, the address corresponding to the peak value, and the address corresponding to the half-peak value, and is further used to obtain the standard deviation of the measurement result of the histogram statistical algorithm based on synchronous sampling;

[0048] The input terminal of the subtractor 550 is electrically connected to the output terminal of the standard deviation calculation unit 570, and the input terminal of the subtractor 550 is also electrically connected to the output terminal of the mean calculation module 560; the subtractor 550 is configured to subtract a common mode point from each BIN in the histogram statistical algorithm unit 400 based on synchronous sampling at a specific moment, and the common mode size is related to the output of the mean calculation module 560 and the output of the standard deviation calculation unit 570, so as to suppress the DC noise of the histogram statistical result.

[0049] The input terminal of the mean calculation module 560 is electrically connected to the output terminal of the inter-frame correlation-based non-linear accumulator 300; the mean calculation module 560 is configured to calculate the average number of times that the single-photon detector 100 included in a single macro-pixel is triggered per unit time.

[0050] It should be noted that the BIN in the histogram statistical algorithm unit 400 based on synchronous sampling is the interval width value corresponding to the minimum time resolution.

[0051] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant are intended to cover non-exclusive inclusion, so that an article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the article or device including the element. "Connection" or "connected" and other similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The orientation or positional relationship indicated by "up", "down", "left", "right", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of the present invention.

[0052] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

[0053] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. A correlation demodulation device applicable to a single-photon detector, characterized in that, it includes: A single-photon detector for converting the received optical signal into an electrical pulse signal; A single-photon detector readout circuit including a first encoding circuit and a first accumulator, the input end of the first encoding circuit is electrically connected to the output end of the single-photon detector, and the output end of the first encoding circuit is electrically connected to the input end of the first accumulator; The first encoding circuit is used for non-linearly encoding the electrical pulse signal, and the first accumulator is used for performing weighted summation on the electrical pulse signal processed by the first encoding circuit; A non-linear accumulator based on inter-frame correlation, the input end of the non-linear accumulator based on inter-frame correlation is electrically connected to the output end of the first accumulator; the non-linear accumulator based on inter-frame correlation is used for performing weighted summation on the electrical pulse signal processed by the first accumulator again; A histogram statistical algorithm unit based on synchronous sampling, the input end of the histogram statistical algorithm unit based on synchronous sampling is electrically connected to the output end of the non-linear accumulator based on inter-frame correlation; the histogram statistical algorithm unit based on synchronous sampling is used for measuring the flight time of the electrical pulse signal processed by the non-linear accumulator based on inter-frame correlation, and is also used for statistically analyzing the distribution characteristics of the measurement results; A common-mode suppression unit, the input end of the common-mode suppression unit is electrically connected to the output end of the histogram statistical algorithm unit based on synchronous sampling, and the output end of the common-mode suppression unit is electrically connected to the input end of the histogram statistical algorithm unit based on synchronous sampling; the common-mode suppression unit is used for suppressing the common-mode noise output by the histogram statistical algorithm unit based on synchronous sampling.

2. The correlation demodulation device applicable to a single-photon detector according to claim 1, characterized in that, The single-photon detector readout circuit processes the electrical pulse signals output by multiple single-photon detectors included in the same macro-pixel.

3. The correlation demodulation device applicable to a single-photon detector according to claim 2, characterized in that, The first encoding circuit non-linearly encodes the electrical pulse signal according to the current measurement time and the trigger numbers of multiple single-photon detectors included in the same macro-pixel.

4. The correlation demodulation device applicable to a single-photon detector according to claim 1, characterized in that, The non-linear accumulator based on inter-frame correlation includes a storage unit, a second encoding circuit and a second accumulator; the input end of the storage unit is electrically connected to the output end of the first accumulator, the output end of the storage unit is electrically connected to the input end of the second encoding circuit, and the output end of the second encoding circuit is electrically connected to the input end of the second accumulator; the storage unit is used for recording the number of times the single-photon detector is triggered at any sampling time within adjacent multiple measurement periods; The second encoding circuit is used for encoding the electrical pulse signal processed by the storage unit; The second accumulator is used for performing weighted summation on the electrical pulse signal processed by the second encoding circuit.

5. The relevant demodulation device applicable to a single-photon detector according to claim 1, characterized in that, the histogram statistical algorithm unit based on synchronous sampling includes a first RAM read / write controller, a first RAM address generation circuit, a first RAM unit, and a first adder; the input end of the first RAM read / write controller is connected to an external control system, and the output end of the first RAM read / write controller is electrically connected to the read enable port and the write enable port of the first RAM unit; the first RAM read / write controller is used to control the read enable port and the write enable port of the first RAM unit; the input end of the first RAM address generation circuit is connected to an external control system, and the output end of the first RAM address generation circuit is electrically connected to the read address port and the write address port of the first RAM unit; the first RAM address generation circuit is used to transmit the required address signals to the read address port and the write address port of the first RAM unit; the input end of the first RAM unit is further electrically connected to the output end of the first adder, and the first RAM unit is used to store the weighted total number of times the single-photon detector included in a single macro-pixel is triggered at any sampling moment; the input end of the first adder is electrically connected to the output end of the first RAM unit, and the input end of the first adder is further electrically connected to the output end of the non-linear accumulator based on inter-frame correlation; the first adder is used to sum the output of the first RAM unit and the output of the non-linear accumulator based on inter-frame correlation at any sampling moment.

6. The relevant demodulation device applicable to a single-photon detector according to claim 1, characterized in that, the common-mode rejection unit includes a second RAM read / write controller, a second RAM address generation circuit, a second RAM unit, a second adder, a standard deviation calculation unit, a subtractor, and a mean calculation module; the input end of the second RAM read / write controller is connected to an external control system, and the output end of the second RAM read / write controller is electrically connected to the read enable port and the write enable port of the second RAM unit; the second RAM read / write controller is used to control the read enable port and the write enable port of the second RAM unit; the input end of the second RAM address generation circuit is connected to an external control system, and the output end of the second RAM address generation circuit is electrically connected to the read address port and the write address port of the second RAM unit; the second RAM address generation circuit is used to transmit the required address signals to the read address port and the write address port of the second RAM unit; the input end of the second RAM unit is further electrically connected to the output end of the second adder, and the second RAM unit is used to store the trigger times of each BIN in the histogram statistical algorithm unit based on synchronous sampling; the input end of the second adder is electrically connected to the output end of the second RAM unit; the second adder is used to perform an increment operation on the output of the second RAM unit at any sampling moment. The input end of the standard deviation calculation unit is electrically connected to the output end of the second RAM unit, and the input end of the standard deviation calculation unit is also electrically connected to the output end of the second adder; the standard deviation calculation unit is configured to obtain the peak value of the data stored in each address in the second RAM unit, the address corresponding to the peak value, and the address corresponding to the half-peak value, and is further configured to obtain the standard deviation of the measurement result of the histogram statistical algorithm based on synchronous sampling. The input end of the subtractor is electrically connected to the output end of the standard deviation calculation unit, and the input end of the subtractor is also electrically connected to the output end of the mean value calculation module; the subtractor is configured to subtract a common-mode point from each BIN in the histogram statistical algorithm unit based on synchronous sampling at a specific moment. The input end of the mean value calculation module is electrically connected to the output end of the inter-frame correlation-based non-linear accumulator; the mean value calculation module is configured to calculate the average number of times that the single-photon detectors included in a single macro-pixel are triggered per unit time.