A digital capacitive isolator

Abstract

The application discloses a kind of digital capacitive isolators, including signal modulation sending module, isolation capacitor module, common-mode transient immunity enhancement module, signal receiving demodulation module, wherein signal modulation sending module is in first voltage domain, for input signal modulation conversion is converted into full differential signal after, isolation capacitor module is transmitted to common-mode transient immunity enhancement module and signal receiving demodulation module in second voltage domain simultaneously, common-mode transient immunity enhancement module is used to reduce common-mode interference in full differential signal, receiving demodulation module is used to demodulate original input signal into full differential signal restoration.The application can effectively improve the common-mode transient pulse immunity of isolator, i.e. CMTI, can improve CMTI to 500kV / us, i.e. under the CMTI of 500kV / us, input signal can also be normally transmitted.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of isolating device design, and particularly relates to a digital capacitive isolator. BACKGROUND

[0002] According to the difference of the isolation medium, the digital isolator can be divided into optical coupling isolator, magnetic coupling isolator and capacitive isolator. The capacitive isolator with SiO2 as the isolation medium adopts the standard CMOS process, has the advantages of high transmission rate, low delay, long service life and high voltage resistance.

[0003] The digital isolator generally includes a sending end (i.e. a modulation module), a receiving end (i.e. a demodulation module) and an isolation capacitor module. The sending end modulates the transmission signal into a signal that can pass through the isolation capacitor. The receiving end demodulates the signal passing through the isolation capacitor back into the transmission signal. The isolation capacitor connects the signal transmitting and receiving ends. The modulation and demodulation scheme is generally divided into two schemes, i.e. pulse modulation and OOK modulation.

[0004] CMTI refers to the common-mode transient signal suppression degree. The isolator is in different voltage domains at both ends. The signal transfer from one side voltage domain to the other side voltage domain exists voltage domain transfer, which will generate a common-mode transient signal at the receiving end. Different voltage rising rates will generate common-mode transient signals of different sizes. This common-mode transient signal will generate common-mode differential mode at the receiving end and affect the direct current working point, thereby causing misjudgment.

[0005] In order to avoid misjudgment, improving the CMTI index of the isolator has become one of the key indexes of the isolator design. For example, the Chinese patent with the publication number CN114244347A proposes a CMT suppression circuit for a four-port isolator and a four-port isolator. It also reacts by detecting CMT events, but its detection is complex and time-consuming, and it cannot respond to instantaneous CMT. In addition, it only has a discharge circuit but no supplement circuit. For example, the Chinese patent application with the publication number CN112019206A proposes a digital isolator, which reduces low-frequency CMT signals through filtering, but has no effect on high-frequency CMT signals. SUMMARY

[0006] In view of the above, the present application provides a digital capacitive isolator, which can effectively improve the common-mode transient pulse immunity of the isolator, i.e. CMTI.

[0007] A digital capacitive isolator includes a signal modulation and sending module, an isolation capacitor module, a common-mode transient immunity enhancement module and a signal receiving and demodulation module.

[0008] The signal modulation and sending module is in a first voltage domain and is used to modulate and convert an input signal into a full-differential signal, which is then transmitted to the common-mode transient immunity enhancement module and the signal receiving and demodulation module in a second voltage domain through the isolation capacitor module.

[0009] The common-mode transient immunity enhancement module is used to reduce common-mode interference in the full-differential signal.

[0010] The receiving demodulation module is used to demodulate and restore the full-differential signal to the original input signal.

[0011] Further, the common-mode transient immunity enhancement module comprises:

[0012] A common-mode transient signal detection circuit is used to detect common-mode transient pulse signals (i.e. common-mode current) in the full-differential signal.

[0013] A common-mode transient signal processing circuit is used to determine the size and positive and negative of the common-mode transient pulse signals and control the working state of the common-mode transient immunity enhancement execution circuit based on the determination result.

[0014] A common-mode transient immunity enhancement execution circuit is used to reduce the common-mode current flowing into the signal receiving demodulation module or compensate the common-mode current flowing out of the signal receiving demodulation module.

[0015] Further, when there is no common-mode transient pulse signal, the common-mode transient signal detection circuit, the common-mode transient signal processing circuit and the common-mode transient immunity enhancement execution circuit are all in the off state; when the common-mode transient pulse signal appears, the common-mode transient signal detection circuit, the common-mode transient signal processing circuit and the common-mode transient immunity enhancement execution circuit can be started instantaneously and respond.

[0016] Further, the common-mode transient signal detection circuit comprises a positive common-mode transient signal detection circuit and a negative common-mode transient signal detection circuit; the common-mode transient signal detection circuit has a working threshold value, the positive common-mode transient signal detection circuit has a positive threshold value, and the negative common-mode transient signal detection circuit has a negative threshold value; when the positive common-mode transient signal detection circuit detects a positive common-mode transient pulse signal lower than the positive threshold value, it is considered that the signal is not detected; when the positive common-mode transient pulse signal is detected to be higher than the positive threshold value, the positive common-mode transient signal detection circuit outputs the signal; when the negative common-mode transient signal detection circuit detects a negative common-mode transient pulse signal higher than the negative threshold value, it is considered that the signal is not detected; when the negative common-mode transient pulse signal is detected to be lower than the negative threshold value, the negative common-mode transient signal detection circuit outputs the signal; therefore, the common-mode transient signal detection circuit can detect the positive common-mode transient pulse signal and the negative common-mode transient pulse signal respectively.

[0017] Further, the common mode transient signal detection circuit adopts two comparators as the detection devices of positive common mode transient signal and negative common mode transient signal respectively; the positive input end of the comparator for detecting positive common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end is connected with a fixed bias positive threshold voltage, and the output end is connected with the common mode transient signal processing circuit; when the positive common mode transient pulse signal higher than the positive threshold voltage appears, the comparator outputs the flip-flop signal to the common mode transient signal processing circuit; when the positive common mode transient pulse signal higher than the positive threshold voltage does not appear, the comparator keeps the normal signal output to the common mode transient signal processing circuit; the positive input end of the comparator for detecting negative common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end is connected with a fixed bias negative threshold voltage, and the output end is connected with the common mode transient signal processing circuit; when the negative common mode transient pulse signal lower than the negative threshold voltage appears, the comparator outputs the flip-flop signal to the common mode transient signal processing circuit; when the negative common mode transient pulse signal lower than the negative threshold voltage does not appear, the comparator keeps the normal signal output to the common mode transient signal processing circuit.

[0018] Further, the common mode transient signal processing circuit includes positive common mode transient processing circuit and negative common mode transient processing circuit containing anti-jitter circuit; the positive common mode transient processing circuit receives and processes the signal output by the positive common mode transient pulse signal detection circuit, and the negative common mode transient processing circuit receives and processes the signal output by the negative common mode transient pulse signal detection circuit; when the positive common mode transient pulse signal detection circuit detects the positive common mode transient pulse signal, the corresponding positive common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and makes it enter the working state through the internal anti-jitter circuit and exit the working state after keeping for a fixed time; when the negative common mode transient pulse signal detection circuit detects the negative common mode transient pulse signal, the corresponding negative common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and makes it enter the working state through the internal anti-jitter circuit and exit the working state after keeping for a fixed time; in addition, the common mode transient signal processing circuit can also make it enter the working state through the anti-jitter circuit and exit the working state when the detected common mode transient pulse signal disappears.

[0019] Further, the common mode transient signal processing circuit controls the working state of the common mode transient immunity enhancement execution circuit through the current switch; when the common mode transient pulse signal detection circuit detects the common mode transient pulse signal, the common mode transient signal processing circuit controls to open the current switch to increase the current flowing through the common mode transient immunity enhancement execution circuit, so as to realize the function of the common mode transient immunity enhancement execution circuit to pull current or to pour current.

[0020] Further, the common mode transient immunity enhancement execution circuit comprises a positive common mode transient signal variable impedance and a negative common mode transient signal variable impedance; when a positive common mode transient pulse signal is detected, the common mode transient immunity enhancement execution circuit pulls down the common mode current from the input end of the signal receiving and demodulating module to the ground through the positive common mode transient signal variable impedance, so as to reduce the common mode current flowing into the signal receiving and demodulating module; when a negative common mode transient pulse signal is detected, the common mode transient immunity enhancement execution circuit pours the common mode current from the power supply to the input end of the signal receiving and demodulating module through the negative common mode transient signal variable impedance, so as to compensate the common mode current flowing out of the signal receiving and demodulating module.

[0021] Further, the current size pulled down or poured down by the common mode transient signal variable impedance can dynamically change with the common mode transient pulse signal size.

[0022] Further, the common mode transient signal variable impedance has the characteristics of low DC impedance and high AC impedance, and can be implemented by a controlled current source.

[0023] Further, the common mode transient immunity enhancement execution circuit adopts two controlled current sources H1 and H2 as the positive common mode transient signal variable impedance and the negative common mode transient signal variable impedance respectively, the positive end of the controlled current source H1 is connected to the input end of the signal receiving and demodulating module, and the negative end is connected to the ground; when the positive common mode transient signal detection circuit detects a positive common mode transient pulse signal, the positive common mode transient processing circuit increases the current flowing into the controlled current source H1, the controlled current source H1 amplifies the current and pulls down the current from the input end of the signal receiving and demodulating module to the ground; the positive end of the controlled current source H2 is connected to the power supply, and the negative end is connected to the input end of the signal receiving and demodulating module; when the negative common mode transient signal detection circuit detects a negative common mode transient pulse signal, the negative common mode transient processing circuit increases the current flowing into the controlled current source H2, the controlled current source H2 amplifies the current and pours the current from the power supply to the input end of the signal receiving and demodulating module; the current sizes of the controlled current sources H1 and H2 dynamically change with the sizes of the positive common mode transient pulse signal and the negative common mode transient pulse signal respectively.

[0024] Further, due to the differential structure, the common mode transient immunity enhancement module comprises two sets of symmetrical common mode transient signal detection circuits, common mode transient signal processing circuits and common mode transient immunity enhancement execution circuits connected in sequence and connected to the positive phase input end and the inverting input end of the signal receiving and demodulating module respectively, and the currents flowing through the positive phase input end and the inverting input end are the copied common mode currents.

[0025] Further, the current from the signal receiving demodulation module positive input end pulled down to the ground and the current from the signal receiving demodulation module negative input end pulled down to the ground are the copied common-mode current, which are pulled down simultaneously and have the same size; the current from the power supply poured to the signal receiving demodulation module positive input end and the current from the power supply poured to the signal receiving demodulation module negative input end are the copied common-mode current, which are poured simultaneously and have the same size.

[0026] Further, the signal receiving demodulation module is composed of a preamplifier, an envelope comparator and a front porch blanking circuit connected in sequence, the preamplifier is used to suppress common-mode signal amplification differential-mode signal, adopts full differential gate cross-coupling connection method, can make the equivalent transconductance become twice of the original, improve the differential-mode gain, at the same time offset the common-mode gain, the full differential gate cross-coupling improves the gain and the CMTI performance of the isolator; the envelope comparator is used to demodulate the amplified full differential signal to the input signal received by the signal modulation and transmission module, and the front porch blanking circuit is used to eliminate the front porch burr in the signal.

[0027] Further, the signal modulation and transmission module adopts OOK modulation scheme, and converts the input signal into full differential signal for transmission, and the full differential signal can greatly improve the common-mode rejection ratio.

[0028] The present application can effectively improve the common-mode transient pulse immunity of the isolator, i.e. CMTI, and can improve the CMTI to 500kV / us, i.e. under the CMTI of 500kV / us, the input signal can be normally transmitted. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 It is the functional block diagram of the digital isolator.

[0030] Figure 2 It is the principle diagram of CMTI.

[0031] Figure 3 It is the structure diagram of the common-mode transient immunity enhancement module.

[0032] Figure 4 It is a waveform diagram of the common-mode transient signal processing circuit.

[0033] Figure 5 It is another waveform diagram of the common-mode transient signal processing circuit.

[0034] Figure 6 It is the structure diagram of the signal modulation and demodulation module. DETAILED DESCRIPTION

[0035] In order to describe the present application more specifically, the technical solutions of the present application are described in detail below in combination with the drawings and specific embodiments.

[0036] As shown in Figure 1 , the digital isolator of the present application mainly consists of a signal modulation and transmission module, an isolation capacitor module, a common-mode transient immunity enhancement module, and a signal receiving and demodulation module. The signal modulation and transmission module is connected with the isolation capacitor module, and the isolation capacitor module is simultaneously connected with the common-mode transient immunity enhancement module and the signal receiving and demodulation module. The input signal is converted into a full-differential signal by the signal modulation and transmission module TX and transmitted to the isolation capacitor module. The full-differential signal is transmitted to the common-mode transient immunity enhancement module through the isolation capacitor module. The common-mode transient immunity enhancement module processes the common-mode current and simultaneously transmits the differential-mode signal to improve the CMTI of the digital isolator. The full-differential signal is further transmitted to the signal receiving and demodulation module. The signal receiving and demodulation module suppresses the common-mode signal, amplifies the differential-mode signal, and restores the signal through an envelope comparator.

[0037] Figure 2 The schematic diagram shows the principle of CMTI. The schematic diagram is composed of a voltage difference V CM between different voltage domains, an input signal, and an output signal. The isolator is in different voltage domains. The signal transfer from one side voltage domain to the other side voltage domain will generate a common-mode transient pulse at the receiving end. Different voltage rising rates will generate common-mode transient pulses of different sizes. The common-mode transient pulse can be equivalent to a voltage difference excitation model. The common-mode transient pulse will produce a differential-mode effect, thereby causing an error code or even damaging the circuit. Figure 2 The schematic diagram shows that when the voltage domains at both ends of the isolator, i.e., the voltage difference excitation V CM , rises and falls at a certain rate, the input high-level signal is high, the output signal is also high, and the error code is within the requirement, i.e., the common-mode transient signal suppression degree can meet the voltage domain change at this rate.

[0038] As shown in Figure 3 , the common-mode transient immunity enhancement module mainly consists of a common-mode transient signal detection circuit, a common-mode transient signal processing circuit, and a common-mode transient immunity enhancement execution circuit. The common-mode transient signal detection circuit can be composed of comparators COMP1, COMP2, COMP3, and COMP4, as well as a positive fixed threshold and a negative fixed threshold. The common-mode transient signal processing circuit is composed of digital processing P1 and P2. The common-mode transient immunity enhancement execution circuit is composed of controlled sources I1, I2, I3, and I4. The signal transmission relies on the isolation capacitors C1 and C2 and the sampling resistors R1 and R2 in the signal receiving and demodulation module.

[0039] When a positive common-mode transient signal occurs, positive high voltage is accumulated on the sampling resistors R1, R2 simultaneously, if the positive high voltage is lower than the positive fixed threshold, the comparator COMP3, COMP4 output remains unchanged, the digital processing P2 does not work, the controlled current source I3, I4 is not opened, at this time the whole common-mode transient immunity enhancement module shielding, the full differential signal is transmitted normally to the signal receiving demodulation module; if the positive high voltage is higher than the positive fixed threshold, the comparator COMP3, COMP4 output flips, the digital processing P2 works, the controlled current source I3, I4 is opened, at the same time the current of the controlled current source I3, I4 dynamically changes with the size of the positive high voltage on the sampling resistors R1, R2, at this time the common-mode current component in the full differential signal is pulled away, the rest of the full differential signal is transmitted to the signal receiving demodulation module. The pull-down current of the controlled current source I3, I4 and the same size are pulled down at the same time.

[0040] When a negative common-mode transient signal occurs, negative high voltage is accumulated on the sampling resistors R1, R2 simultaneously, if the negative high voltage is higher than the negative fixed threshold, the comparator COMP1, COMP2 output remains unchanged, the digital processing P1 does not work, the controlled current source I1, I2 is not opened, at this time the whole common-mode transient immunity enhancement module shielding, the full differential signal is transmitted normally to the signal receiving demodulation module; if the negative high voltage is lower than the negative fixed threshold, the comparator COMP1, COMP2 output flips, the digital processing P1 works, the controlled current source I1, I2 is opened, at the same time the current of the controlled current source I1, I2 dynamically changes with the size of the positive high voltage on the sampling resistors R1, R2, at this time the common-mode current component in the full differential signal is pulled away, the rest of the full differential signal is transmitted to the signal receiving demodulation module. The pull-down current of the controlled current source I1, I2 and the same size are pulled down at the same time.

[0041] Figure 4The common mode transient signal processing circuit waveform is shown, the signal receiving demodulation input end voltage is the voltage accumulated on the sampling resistor R1, R2, when there is common mode transient signal, the voltage accumulated on R1, R2 will change, when there is positive common mode transient signal, the voltage accumulated on R1, R2 is positive voltage, when there is negative common mode transient signal, it is negative voltage, at the same time, the voltage is compared with positive fixed threshold and negative fixed threshold; The input end of the positive common mode transient signal processing circuit, that is, the output end of the comparator COMP3, COMP4, when the voltage accumulated on the sampling resistor R1, R2 is higher than the positive fixed threshold, the comparator COMP3, COMP4 outputs high level, at the same time, there will be some glitch jitter; The output end of the positive digital processing circuit, that is, the output end of the digital processing P2, which includes anti-jitter circuit and current switch control circuit, when detecting high level signal, the current switch control signal of the controlled current source I3, I4 is opened for fixed T time, at the same time, the glitch is filtered and jitter is prevented; The input end of the negative common mode transient signal processing circuit, that is, the output end of the comparator COMP1, COMP2, when the voltage accumulated on the sampling resistor R1, R2 is lower than the negative fixed threshold, the comparator COMP1, COMP2 outputs high level, at the same time, there will be some glitch jitter; The output end of the negative digital processing circuit, that is, the output end of the digital processing P1, which includes anti-jitter circuit and current switch control circuit, when detecting high level signal, the current switch control signal of the controlled current source I1, I2 is opened for fixed T time, at the same time, the glitch is filtered and jitter is prevented.

[0042] Figure 5The other common mode transient signal processing circuit waveform is shown. The signal receiving demodulation input end voltage is the voltage accumulated on the sampling resistor R1, R2. When there is a common mode transient signal, the voltage accumulated on R1, R2 will change. When there is a positive common mode transient signal, the voltage accumulated on R1, R2 is a positive voltage. When there is a negative common mode transient signal, it is a negative voltage. At the same time, the voltage is compared with the positive fixed threshold and the negative fixed threshold. The input end of the positive common mode transient signal processing circuit, that is, the output end of the comparator COMP3, COMP4. When the voltage accumulated on the sampling resistor R1, R2 is higher than the positive fixed threshold, the comparator COMP3, COMP4 outputs a high level, and there will be some glitch jitter. The output end of the positive digital processing circuit, that is, the output end of the digital processing P2, which includes an anti-jitter circuit and a current switch control circuit. When a high level signal is detected, the current switch control signal of the controlled current source I3, I4 is opened for a time following the duration of the common mode transient signal. When the common mode transient signal ends, the current switch control signal of the controlled current source I3, I4 is closed, and the glitch is filtered to prevent jitter. The input end of the negative common mode transient signal processing circuit, that is, the output end of the comparator COMP1, COMP2. When the voltage accumulated on the sampling resistor R1, R2 is lower than the negative fixed threshold, the comparator COMP1, COMP2 outputs a high level, and there will be some glitch jitter. The output end of the negative digital processing circuit, that is, the output end of the digital processing P1, which includes an anti-jitter circuit and a current switch control circuit. When a high level signal is detected, the current switch control signal of the controlled current source I1, I2 is opened for a time following the duration of the common mode transient signal. When the common mode transient signal ends, the current switch control signal of the controlled current source I1, I2 is closed, and the glitch is filtered to prevent jitter.

[0043] As shown in Figure 6 The signal receiving demodulation module includes a preamplifier, an envelope comparator, and a front porch blanking circuit. The preamplifier circuit suppresses common mode signals and amplifies differential mode signals. The envelope comparator demodulates the full differential signal amplified by the preamplifier to restore the input signal received by the modulation and transmission module. The front porch blanking circuit filters the front porch glitch.

[0044] The above description of the embodiments is to facilitate those of ordinary skill in the art to understand and apply the present application. Those skilled in the art can easily make various modifications to the above embodiments, and apply the general principles described herein to other embodiments without creative labor. Therefore, the present application is not limited to the above embodiments, and any improvements and modifications made to the present application by those skilled in the art based on the disclosure of the present application should be within the scope of protection of the present application.

Claims

1. A digital capacitive isolator, characterized by: The signal modulation and transmission module, the isolation capacitor module, the common-mode transient immunity enhancement module, and the signal receiving and demodulation module are included. The signal modulation and transmission module is in a first voltage domain, and is configured to modulate and convert an input signal into a full-differential signal, and then transmit the full-differential signal to the common-mode transient immunity enhancement module and the signal receiving and demodulation module in a second voltage domain through the isolation capacitor module. The common-mode transient immunity enhancement module is configured to reduce common-mode interference in the full-differential signal. The receiving and demodulation module is configured to demodulate and restore the full-differential signal to the original input signal. The common-mode transient immunity enhancement module includes: A common-mode transient signal detection circuit configured to detect a common-mode transient pulse signal in the full-differential signal. A common-mode transient signal processing circuit configured to determine the size and polarity of the common-mode transient pulse signal, and control the working state of a common-mode transient immunity enhancement execution circuit based on the determination result. The common-mode transient immunity enhancement execution circuit is configured to reduce the common-mode current flowing into the signal receiving and demodulation module or compensate for the common-mode current flowing out of the signal receiving and demodulation module. The common-mode transient immunity enhancement execution circuit uses two controlled current sources H1 and H2 as positive and negative common-mode transient signal variable impedances, respectively. The positive terminal of the controlled current source H1 is connected to the input terminal of the signal receiving and demodulation module, and the negative terminal is connected to the ground. When the positive common-mode transient signal detection circuit detects a positive common-mode transient pulse signal, the positive common-mode transient processing circuit increases the current flowing into the controlled current source H1, and the controlled current source H1 amplifies the current and pulls down the current from the input terminal of the signal receiving and demodulation module to the ground. The positive terminal of the controlled current source H2 is connected to the power supply, and the negative terminal is connected to the input terminal of the signal receiving and demodulation module. When the negative common-mode transient signal detection circuit detects a negative common-mode transient pulse signal, the negative common-mode transient processing circuit increases the current flowing into the controlled current source H2, and the controlled current source H2 amplifies the current and pours the current from the power supply to the input terminal of the signal receiving and demodulation module. The current of the controlled current sources H1 and H2 dynamically changes with the size of the positive and negative common-mode transient pulse signals, respectively.

2. The digital capacitive isolator of claim 1, wherein: The common-mode transient signal detection circuit includes a positive common-mode transient signal detection circuit and a negative common-mode transient signal detection circuit. The common-mode transient signal detection circuit has a working threshold, the positive common-mode transient signal detection circuit has a positive threshold, and the negative common-mode transient signal detection circuit has a negative threshold. When the positive common-mode transient signal detection circuit detects a positive common-mode transient pulse signal lower than the positive threshold, it is considered that the signal is not detected. When the positive common-mode transient signal detection circuit detects a positive common-mode transient pulse signal higher than the positive threshold, it is considered that the signal is detected. When the negative common-mode transient signal detection circuit detects a negative common-mode transient pulse signal higher than the negative threshold, it is considered that the signal is not detected. When the negative common-mode transient signal detection circuit detects a negative common-mode transient pulse signal lower than the negative threshold, it is considered that the signal is detected. Therefore, the common-mode transient signal detection circuit can detect the positive and negative common-mode transient pulse signals, respectively.

3. The digital capacitive isolator of claim 2, wherein: The common mode transient signal detection circuit adopts two comparators as the detection devices of positive common mode transient signal and negative common mode transient signal respectively; the positive input end of the comparator for detecting positive common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end is connected with a fixed bias positive threshold voltage, and the output end is connected with the common mode transient signal processing circuit; when the positive common mode transient pulse signal higher than the positive threshold voltage appears, the comparator outputs the flip-flop signal to the common mode transient signal processing circuit; when the positive common mode transient pulse signal higher than the positive threshold voltage does not appear, the comparator keeps the normal signal output to the common mode transient signal processing circuit. The positive input end of the comparator for detecting negative common mode transient pulse signal is connected with the input end of the signal receiving demodulation module, the negative input end is connected with a fixed bias negative threshold voltage, and the output end is connected with the common mode transient signal processing circuit; when the negative common mode transient pulse signal lower than the negative threshold voltage appears, the comparator outputs the flip-flop signal to the common mode transient signal processing circuit; when the negative common mode transient pulse signal lower than the negative threshold voltage does not appear, the comparator keeps the normal signal output to the common mode transient signal processing circuit.

4. The digital capacitive isolator of claim 1, wherein: The common mode transient signal processing circuit includes positive common mode transient processing circuit and negative common mode transient processing circuit containing anti-jitter circuit; the positive common mode transient processing circuit receives and processes the signal output by the positive common mode transient pulse signal detection circuit, and the negative common mode transient processing circuit receives and processes the signal output by the negative common mode transient pulse signal detection circuit; when the positive common mode transient pulse signal detection circuit detects the positive common mode transient pulse signal, the corresponding positive common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and makes it enter the working state through the internal anti-jitter circuit and exit the working state after keeping a fixed time; when the negative common mode transient pulse signal detection circuit detects the negative common mode transient pulse signal, the corresponding negative common mode transient processing circuit controls the common mode transient immunity enhancement execution circuit to work, and makes it enter the working state through the internal anti-jitter circuit and exit the working state after keeping a fixed time; in addition, the common mode transient signal processing circuit can also enter the working state through the anti-jitter circuit and exit the working state when the common mode transient pulse signal disappears.

5. The digital capacitive isolator of claim 1, wherein: The common mode transient signal processing circuit controls the working state of the common mode transient immunity enhancement execution circuit through the current switch; when the common mode transient pulse signal is detected by the common mode transient signal detection circuit, the common mode transient signal processing circuit controls the current switch to be opened to increase the current flowing through the common mode transient immunity enhancement execution circuit, so as to realize the function of the common mode transient immunity enhancement execution circuit to pull current or fill current.

6. The digital capacitive isolator of claim 2, wherein: The common-mode transient immunity enhancement execution circuit includes a positive common-mode transient signal variable impedance and a negative common-mode transient signal variable impedance; when a positive common-mode transient pulse signal is detected, the common-mode transient immunity enhancement execution circuit pulls down the common-mode current from the input end of the signal receiving and demodulating module to the ground through the positive common-mode transient signal variable impedance, so as to reduce the common-mode current flowing into the signal receiving and demodulating module; when a negative common-mode transient pulse signal is detected, the common-mode transient immunity enhancement execution circuit pours the common-mode current from the power supply to the input end of the signal receiving and demodulating module through the negative common-mode transient signal variable impedance, so as to compensate the common-mode current flowing out of the signal receiving and demodulating module.

7. The digital capacitive isolator of claim 1, wherein: The current pulled down from the positive phase input end of the signal receiving and demodulating module to the ground and the current pulled down from the negative phase input end of the signal receiving and demodulating module to the ground are the copied common-mode currents, which are simultaneously pulled down and have the same size; the current poured from the power supply to the positive phase input end of the signal receiving and demodulating module and the current poured from the power supply to the negative phase input end of the signal receiving and demodulating module are the copied common-mode currents, which are simultaneously poured and have the same size.

8. The digital capacitive isolator of claim 1, wherein: The signal receiving and demodulating module is composed of a preamplifier, an envelope comparator and a front edge blanking circuit in sequence, the preamplifier is used to suppress common-mode signal amplification differential-mode signal, adopts full differential gate cross coupling connection, can make equivalent transconductance become twice of original, improve differential-mode gain, at the same time offset common-mode gain, full differential gate cross coupling not only improve gain, but also improve CMTI performance of isolator; the envelope comparator is used to demodulate the amplified full differential signal to the input signal received by the signal modulation and sending module, and the front edge blanking circuit is used to eliminate the front edge burr in the signal.

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