A SAR ADC linearity compensation method, compensation system and chip

Abstract

The application provides a SARADC linearity compensation method, a compensation system and a chip. The compensation method comprises the following steps: obtaining a SARADC error curve, segmenting the SARADC error curve to obtain a plurality of first error sub-curves, fitting each first error sub-curve to obtain a second error sub-curve after fitting, obtaining a compensation curve according to the second error sub-curve, finding a corresponding compensation curve corresponding to the second error sub-curve according to actual conversion result data of a SARADC to be compensated, and obtaining a corresponding compensation error value in the compensation curve, and compensating the actual conversion result data of the SARADC to be compensated based on the corresponding compensation error value to obtain compensated conversion result data. According to the internal structure of the SARADC, the error curve of the SARADC is segmented and linearly fitted and compensated.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of converter error compensation, and more particularly, to a SAR ADC linearity compensation method, a compensation system and a chip. BACKGROUND

[0002] Analog-to-digital converter (ADC) is a core module for converting analog signals into digital signals, which is widely used in various electronic fields to complete the analog-to-digital conversion. ADCs can be divided into pipeline, sigma-delta and successive approximation register (SAR) types according to different working modes. Different ADCs are applied to different fields and have different performances. Among them, SAR ADC achieves a good balance in power consumption, speed and accuracy, and is widely used in the field of medium-high accuracy, low power consumption and small size.

[0003] In the production and manufacturing process of SAR ADC, a certain degree of capacitor mismatch will inevitably occur due to process deviation, resulting in changes in ADC linearity and measurement error. In high-precision and advanced process design, the influence is more obvious. Therefore, it is necessary to use correction or compensation algorithm to correct the error caused by capacitor mismatch.

[0004] Currently, there are two ways to correct the error caused by capacitor mismatch:

[0005] (1) Two-point correction: two known reference voltages are provided during IC production or use, and the ADC is corrected by a linear correction algorithm.

[0006] (2) trim voltage / current correction: the internal reference voltage or current is corrected according to the preset channel during IC production.

[0007] Among them, the two-point correction method can reduce the linear error caused by capacitor mismatch, but cannot improve the linearity of ADC.

[0008] (2) trim voltage / current can reduce the error between the actual reference source and the ideal reference source, but cannot remove the bias error of ADC and cannot improve the linearity. SUMMARY

[0009] The present application provides a SAR ADC linearity compensation method, a compensation system and a chip to solve the technical problems in the prior art. According to the internal structure of SAR ADC, the linearity of ADC is improved by piecewise fitting, and the error of ADC is compensated.

[0010] According to a first aspect of the present application, a SAR ADC linearity compensation method is provided, comprising:

[0011] obtaining a SARADC error curve, segmenting the SARADC error curve to obtain a plurality of first error sub-curves;

[0012] fitting each first error sub-curve to obtain a fitted second error sub-curve of each first error sub-curve;

[0013] obtaining a compensation curve according to the second error sub-curves;

[0014] finding a corresponding compensation curve corresponding to the second error sub-curve according to actual conversion result data of a SARADC to be compensated, and obtaining a corresponding compensation error value in the compensation curve;

[0015] compensating the actual conversion result data of the SARADC to be compensated based on the corresponding compensation error value to obtain compensated conversion result data

[0016] On the basis of the above technical solutions, the application can also be improved as follows.

[0017] Optionally, the SARADC error curve is an integral nonlinearity (INL) curve of the SARADC, the horizontal axis of the INL curve is an encoding value, the vertical axis is an integral nonlinearity error, and the units of the horizontal axis and the vertical axis are both LSB.

[0018] Optionally, segmenting the SARADC error curve to obtain a plurality of first error sub-curves comprises:

[0019] determining a segment interval of the SARADC error curve, the segment interval being 2 n LSB, n being determined according to the number of bits of an ADC to be compensated, n being a positive integer;

[0020] segmenting the SARADC error curve along the horizontal axis direction based on the segment interval to obtain a plurality of first error sub-curves.

[0021] Optionally, fitting each first error sub-curve to obtain a fitted second error sub-curve of each first error sub-curve comprises:

[0022] obtaining a plurality of error points on each first error sub-curve, fitting each first error sub-curve into a corresponding type of second error sub-curve based on the plurality of error points, wherein the type of each fitted second error sub-curve is determined based on the internal structure of an ADC to be compensated.

[0023] Optionally, the compensation curve is a complementary curve corresponding to each first error sub-curve one by one, and the type of the compensation curve is the same as that of the corresponding second error sub-curve.

[0024] Optionally, the second error sub-curve is a linear curve or a quadratic curve.

[0025] Optionally, the method further comprises:

[0026] measuring actual conversion result data of the same analog signal converted by the SAR ADC multiple times;

[0027] averaging the actual conversion result data to obtain average actual conversion result data;

[0028] finding a corresponding second error sub-curve segment in the multiple second error sub-curves and finding a corresponding compensation error value in a compensation curve segment corresponding to the second error sub-curve segment, with the average actual conversion result data as the horizontal axis data.

[0029] According to a second aspect of the present application, a SAR ADC linearity compensation method is provided, comprising:

[0030] when the influence of the ambient temperature on the linearity error of the ADC is greater than a set degree threshold, compensating actual conversion result data of the ADC at each temperature point based on the SAR ADC linearity compensation method to obtain compensated conversion result data.

[0031] According to a third aspect of the present application, a SAR ADC linearity compensation system is provided, comprising:

[0032] a segmentation module configured to obtain a SAR ADC error curve, segment the SAR ADC error curve, and obtain multiple first error sub-curves;

[0033] a fitting module configured to fit each first error sub-curve to obtain a fitted second error sub-curve;

[0034] an acquisition module configured to acquire a corresponding compensation curve based on the second error sub-curve;

[0035] a search module configured to find a compensation curve corresponding to a corresponding second error sub-curve based on actual conversion result data of a SAR ADC to be compensated, and acquire a corresponding compensation error value in the compensation curve;

[0036] a compensation module configured to compensate actual conversion result data of the SAR ADC to be compensated based on the corresponding compensation error value to obtain compensated conversion result data.

[0037] According to a fourth aspect of the present application, a chip for linearity compensation is provided, comprising a processor and a memory, the processor being configured to execute the SAR ADC linearity compensation method.

[0038] The present application provides a SAR ADC linearity compensation method, a compensation system and a chip. The SAR ADC error curve is obtained, and the SAR ADC error curve is segmented to obtain a plurality of first error sub-curves. Each first error sub-curve is fitted to obtain a second error sub-curve after fitting. The compensation curve is obtained according to the second error sub-curve. The corresponding compensation curve corresponding to the second error sub-curve is found according to the actual conversion result data of the SAR ADC to be compensated, and the corresponding compensation error value is obtained in the compensation curve. The actual conversion result data of the SAR ADC to be compensated is compensated based on the corresponding compensation error value, and the compensated conversion result data is obtained. The present application segments the error curve of the SAR ADC according to the internal structure of the SAR ADC, and performs linear fitting compensation. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1 Fig. 1 is a schematic diagram of the INL curve of the SAR ADC;

[0040] Figure 2 Fig. 2 is a schematic diagram of the INL curve of the SAR ADC; Figure 1

[0041] Figure 3 Fig. 3 is a schematic diagram of the internal structure of the SAR ADC;

[0042] Figure 4 Fig. 4 is a flowchart of the SAR ADC linearity compensation method provided by the present application;

[0043] Figure 5 Fig. 5 is a schematic diagram of the SAR ADC error curve after linearity compensation;

[0044] Figure 6 Fig. 6 is a schematic diagram of the structure of the SAR ADC linearity compensation system provided by the present application. DETAILED DESCRIPTION

[0045] ​In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application. In addition, the technical features in each of the embodiments or in a single embodiment provided by the present application can be combined with each other at will to form a feasible technical solution, and such combination is not restricted by the sequence of steps and / or the mode of structural composition, but should be based on the fact that it can be realized by those of ordinary skill in the art. When the combination of technical solutions appears contradictory or cannot be realized, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope of the present application.

[0046] In a scenario of using a SARADC, there is an application scenario with high precision and high linearity requirements. According to the internal structure of the SARADC, the linearity of the ADC is improved by a segmented fitting manner, and the error is compensated.

[0047] The linearity of the ADC is generally measured by the maximum and minimum values of INL (integral nonlinearity) index. The INL curve of a SARADC is generally similar to Figure 1 , wherein, Figure 1 is an INL curve of a 12-bit SARADC, wherein the horizontal axis is the code value of the ADC, and the vertical axis is the integral nonlinearity error corresponding to the code value, with a unit of 1 code value of the ADC, or LSB (Least Signification Bit). The closer the error is to 0, the smaller the error of the corresponding code value is.

[0048] The middle part in Figure 1 is expanded, and it can be seen that the error curve is as shown in Figure 2 , and it can be found from Figure 2 that the error curve presents a periodic linear characteristic. This is because there is a bit-by-bit comparison circuit in the SARADC, and the internal structure of a 10-bit SARADC is generally similar to Figure 3 .

[0049] When the error in IC manufacturing causes the deviation of the capacitor here, the error of the SARADC conversion result will appear due to the error of the proportional relationship of the capacitor. However, the same capacitor will be used at different code values of the ADC, such as Figure 3The capacitor C at S1 in the 10-bit SAR ADC structure in the figure may change from 1 to 0 when the input signal is greater than but very close to VREF / 2, provided that the capacitor value is actually slightly smaller than C. The above bit comparison error may occur in each bit comparison circuit, and the comparison circuits are periodically used in the input signal range from 0 to VREF, so that the final INL curve has a certain degree of periodicity.

[0050] In addition, during the design and manufacture of the ADC, there are inevitably external pins to internal ADC pins and related circuits, and the part of the circuit has a parasitic capacitor. During the use of the ADC, this part of the capacitor is superimposed into the above comparison circuit, causing the change of the capacitor ratio relationship, and affecting the A / D conversion result. And this part of the deviation is basically the same among different ICs, thereby causing the INL curve of different ICs to have a certain similarity.

[0051] Based on the above characteristics, Figure 4 A SAR ADC linearity compensation method flowchart provided by the application is shown in the figure, and the linearity compensation method mainly includes the following steps: Figure 4

[0052] S1, obtaining the error curve of the SAR ADC, and segmenting the error curve of the SAR ADC to obtain a plurality of first error sub-curves.

[0053] It can be understood that first, the preparation work of SAR ADC compensation data is carried out, and the error curve of the SAR ADC is obtained. The error curve of the SAR ADC is the integral nonlinearity INL curve of the SAR ADC, or the error curve after removing the linear error (i.e. when the input signal changes from 0 to VREF, the error curve of the SAR ADC, the unit needs to be converted to LSB). The horizontal axis of the INL curve is the code value, and the vertical axis is the integral nonlinearity error. The units of the horizontal axis and the vertical axis are both LSB.

[0054] As an embodiment, the error curve of the SAR ADC is segmented to obtain a plurality of first error sub-curves, including: determining the segment interval of the error curve of the SAR ADC, the segment interval is 2 n LSB, n is determined according to the number of bits of the ADC to be compensated, and n is a positive integer; based on the segment interval, the error curve of the SAR ADC is segmented along the horizontal axis direction to obtain a plurality of first error sub-curves.

[0055] ​It can be understood that the SARADC error curve is segmented according to the characteristics of the SARADC error curve. The segmentation needs to be segmented along the horizontal axis direction in the power of 2, that is, to follow the internal circuit structure of the SARADC, such as 256 LSBs per segment or 128 LSBs per segment. The segment length can be segmented according to the actual comparison obvious period, for example, 64 or 128 LSBs per segment is more appropriate. It should be noted that the internal circuit structure of the SARADC is related to the number of bits of the SARADC, that is, the segment length is determined according to the number of bits of the SARADC. Figure 2

[0056] It should be noted that since the comparison circuit inside the SARADC is composed of fixed ratio capacitors, when performing AD conversion, it starts from the highest bit in binary, for example, 10-bit SARADC, and the first conversion result is the result of binary bit 10. If the circuit corresponding to the current bit 5 has an error when judging between 0 and 1, then when the voltage to be measured is near the bit 5 boundary point each time, the error at bit 5 will be superimposed, regardless of whether the current value of other bits is 0 or 1, the error of bit 5 will be superimposed, so the INL curve will show a certain periodicity, and therefore when segmenting, the circuit characteristics also need to be segmented in powers of 2, such as 32, 64, and 128 codes per segment.

[0057] In addition, since the higher the number of bits of the circuit, the greater the impact of the capacitor error, and the smaller the number of bits of the circuit, the smaller the impact of the capacitor error, therefore, when segmenting, according to the characteristics of the INL curve, only the high-bit SARADC with greater impact is selected for segmentation to simplify the calculation process and overhead.

[0058] After determining the segment length, the SARADC error curve is divided into a plurality of first error sub-curves along the horizontal axis direction of the SARADC error curve.

[0059] S2, fitting each first error sub-curve to obtain a fitted second error sub-curve for each first error sub-curve.

[0060] As an embodiment, the fitting each first error sub-curve to obtain a fitted second error sub-curve for each first error sub-curve comprises: obtaining a plurality of error points on each first error sub-curve, fitting each first error sub-curve into a corresponding type of second error sub-curve based on the plurality of error points, wherein the type of the fitted second error sub-curve is determined based on the number of bits of the SARADC.

[0061] ​It can be understood that after the SARADC error curve is divided into a plurality of first error sub-curves, for each first error sub-curve, a plurality of error points on each first error sub-curve are obtained, and based on the plurality of error points, a corresponding second error sub-curve is fitted. The type of the second error sub-curve can be determined according to the internal structure of the SARADC. The most common type of the second error sub-curve is a linear curve and a quadratic curve, i.e. a straight line. Of course, other types of curves can also be selected as the type of the second error sub-curve according to the internal structure of the SARADC, which is not limited here.

[0062] S3, obtaining a compensation curve according to the second error sub-curve.

[0063] It can be understood that the above step S2 obtains a corresponding second error sub-curve according to each first error sub-curve, and this step obtains a corresponding compensation curve according to each second error sub-curve, wherein the compensation curve is a curve complementary to the second error sub-curve, so as to compensate the error of the second error sub-curve, so that the output value precision and linearity are sufficient. The compensation curve and each segment of the second error sub-curve are one-to-one corresponding and complementary, and the compensation curve type is the same as the second error sub-curve, which can be a linear curve, a quadratic curve and other curve types.

[0064] S4, finding a corresponding second error sub-curve according to actual conversion result data of the SARADC to be compensated, and obtaining a corresponding compensation error value in a compensation curve corresponding to the second error sub-curve.

[0065] As an embodiment, finding a corresponding second error sub-curve according to actual conversion result data of the SARADC to be compensated, and obtaining a corresponding compensation error value in a compensation curve corresponding to the second error sub-curve, comprises: measuring actual conversion result data of a same analog signal to be converted converted by the SARADC to be compensated multiple times; averaging the actual conversion result data obtained by multiple measurements to obtain average actual conversion result data; taking the average actual conversion result data as horizontal axis data, finding a corresponding second error sub-curve segment in a plurality of second error sub-curves, and finding a corresponding compensation error value in a compensation curve segment corresponding to the second error sub-curve segment.

[0066] It can be understood that the SARADC is used to convert an analog signal into a digital signal, and the actual conversion result data output by the SARADC is input into the SARADC to be compensated, and the converted digital signal (referred to as actual conversion result data) is output. Because the actual conversion result data of the SARADC to be compensated fluctuates at different times, the SARADC to be compensated is input multiple times, and multiple actual conversion result data are output, and the multiple actual conversion result data are averaged to obtain an average value (referred to as average actual conversion result data).

[0067] The average actual conversion result data is taken as the horizontal axis data, and the corresponding second error sub-curve segment is found in the multiple second error sub-curve segments, and then the average actual conversion result data is taken as the horizontal axis data, and the corresponding compensation error value is obtained in the corresponding compensation curve segment corresponding to the corresponding second error sub-curve segment.

[0068] S5, based on the corresponding compensation error value, the actual conversion result data of the SARADC to be compensated is compensated to obtain the compensated conversion result data.

[0069] It can be understood that after the compensation error value corresponding to the actual conversion result data output by the SARADC to be compensated is obtained, the actual conversion result data is compensated based on the compensation error value, for example, the average actual conversion result data output by the SARADC is 1536LSB, and the corresponding compensation error value is obtained in the compensation curve segment corresponding to the second error sub-curve segment corresponding to 1536LSB, for example, -1LSB, and the conversion result data after error compensation is (1536+(-1))LSB=1535LSB. Referring to Figure 5 It can be seen that the error at different code values of the linear compensation error curve is close to 0.

[0070] The application also provides a SARADC linearity compensation method, comprising: when the influence degree of the environmental temperature on the linearity error of the ADC to be compensated is greater than a set degree threshold, the actual conversion result data of the SARADC to be compensated at each temperature point is compensated based on the SARADC linearity compensation method of the above embodiment to obtain the compensated conversion result data.

[0071] It can be understood that the present application can be used for calibration of SARADC when it is shipped, such as INL curve test when it is shipped, and generation of linear compensation parameters of corresponding sections, and recording to the designated area of the chip, reading of the compensation parameters in the use process, and compensation of SARADC conversion results.

[0072] Referring to Figure 6 A SARADC linearity compensation system provided by the present application mainly comprises a segmentation module 601, a fitting module 602, an acquisition module 603, a lookup module 604 and a compensation module 605, wherein:

[0073] The segmentation module 601 is used for acquiring a SARADC error curve, and segmenting the SARADC error curve to obtain a plurality of first error sub-curves;

[0074] The fitting module 602 is used for fitting each first error sub-curve to obtain a fitted second error sub-curve of each section;

[0075] The acquisition module 603 is used for acquiring a corresponding compensation curve according to the second error sub-curve;

[0076] The lookup module 604 is used for finding a compensation curve corresponding to the second error sub-curve according to actual conversion result data of a SARADC to be compensated, and acquiring a corresponding compensation error value in the compensation curve;

[0077] The compensation module 605 is used for compensating the actual conversion result data of the SARADC to be compensated based on the corresponding compensation error value to obtain compensated conversion result data.

[0078] It can be understood that the SARADC linearity compensation system provided by the present application corresponds to the SARADC linearity compensation method provided by the foregoing embodiments, and the related technical features of the SARADC linearity compensation system can refer to the related technical features of the SARADC linearity compensation method, which will not be described here.

[0079] The present application further provides a chip for SARADC linearity compensation, comprising a processor and a memory, wherein the processor is used for executing the SARADC linearity compensation method.

[0080] The SARADC linearity compensation method, the compensation system and the chip provided by the embodiment of the present application obtain a SARADC error curve, segment the SARADC error curve to obtain a plurality of first error sub-curves, fit each first error sub-curve to obtain each second error sub-curve after fitting, obtain a compensation curve according to the second error sub-curve, find the compensation curve corresponding to the second error sub-curve corresponding to the actual conversion result data of the SARADC to be compensated according to the actual conversion result data of the SARADC to be compensated, and obtain a compensation error value in the compensation curve, and compensate the actual conversion result data of the SARADC to be compensated based on the compensation error value to obtain compensated conversion result data. The present application segments the error curve of the SARADC according to the internal structure of the SARADC and performs linear fitting compensation.

[0081] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0082] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0083] The present application is described with reference to flowcharts and / or block diagrams of the method, device (system), and computer program product according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded computer, or other programmable data processing devices to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices produce a device that implements the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that carries out the function specified in the flow or the block.

[0084] These computer program instructions can also be stored in a computer-readable storage medium that can guide the computer or other programmable data processing devices to work in a specific manner, so that the instructions stored in the computer-readable storage medium produce a manufactured product including instruction apparatus, which implements the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1the function specified in the one or more blocks.

[0085] These computer program instructions can also be loaded into computer or other programmable data processing devices, so that a series of operation steps are performed on the computer or other programmable data processing devices to generate computer-implemented processes, thus the instructions executed on the computer or other programmable data processing devices provide a process for implementing the flowchart Figure 1 the flowchart or flowcharts and / or a block diagram block Figure 1 the function specified in the one or more blocks.

[0086] Although preferred embodiments of the application have been described, those skilled in the art will recognize that additional modifications and variations may be made thereto without departing from the spirit and scope of the application. It is therefore intended that the appended claims cover all such modifications and variations as fall within the scope of the application.

[0087] It is apparent that a person skilled in the art can make a variety of modifications and variations to the application without departing from the spirit and scope of the application. Thus, if these modifications and variations of the application fall within the scope of the claims and their equivalents, the application is also intended to include these modifications and variations.

Claims

1. A SAR ADC linearity compensation method, characterized by, The method comprises the following steps: obtaining a SARADC error curve, segmenting the SARADC error curve to obtain a plurality of first error sub-curves; fitting each first error sub-curve to obtain a fitted second error sub-curve; obtaining a compensation curve according to the second error sub-curve; finding a corresponding compensation curve corresponding to the second error sub-curve according to actual conversion result data of a SARADC to be compensated, and obtaining a corresponding compensation error value in the compensation curve; compensating the actual conversion result data of the SARADC to be compensated based on the corresponding compensation error value to obtain compensated conversion result data; The method comprises the following steps: measuring actual conversion result data of a same analog signal to be converted converted by a SARADC to be compensated multiple times; averaging the actual conversion result data obtained by multiple measurements to obtain average actual conversion result data; finding a corresponding second error sub-curve segment in the plurality of second error sub-curves with the average actual conversion result data as the horizontal axis data, and finding a corresponding compensation error value in the compensation curve segment corresponding to the second error sub-curve segment.

2. The linearity compensation method of claim 1, wherein, The SARADC error curve is an integral nonlinearity (INL) curve of the SARADC, the horizontal axis of the INL curve is an encoding value, the vertical axis is an integral nonlinearity error, and the units of the horizontal axis and the vertical axis are both LSB.

3. The linearity compensation method of claim 2, wherein, The method comprises the following steps: determining a segmentation interval of the SARADC error curve, the segmentation interval is 2n LSB, n is determined according to the number of bits of the ADC to be compensated, and n is a positive integer; segmenting the SARADC error curve along the horizontal axis direction based on the segmentation interval to obtain a plurality of first error sub-curves.

4. The linearity compensation method of claim 1, wherein, The method comprises the following steps: obtaining a plurality of error points on each first error sub-curve, fitting each first error sub-curve into a corresponding type of second error sub-curve based on the plurality of error points, and determining the type of each fitted second error sub-curve based on the internal structure of the ADC to be compensated.

5. The linearity compensation method of claim 1, wherein, The compensation curve is a complementary curve corresponding to each segment of the second error sub-curve, and the type of the compensation curve is the same as the type of the corresponding second error sub-curve.

6. The linearity compensation method according to claim 4 or 5, characterized in that, The type of the second error sub-curve is a first-order linear curve or a quadratic curve.

7. A SAR ADC linearity compensation method, characterized by, The method comprises the following steps: when the degree of influence of the ambient temperature on the linearity error of the SARADC to be compensated is greater than a set degree threshold, compensating actual conversion result data of the ADC to be compensated at each temperature point based on the SARADC linearity compensation method of claim 1 to obtain compensated conversion result data.

8. A SAR ADC linearity compensation system, characterized by, The method comprises the following steps: a segmentation module is configured to obtain a SARADC error curve, segment the SARADC error curve to obtain a plurality of first error sub-curves, and a fitting module, configured to fit each first error sub-curve to obtain a fitted second error sub-curve; an acquisition module, configured to acquire a corresponding compensation curve according to the second error sub-curve; a searching module, configured to find a corresponding compensation curve corresponding to the second error sub-curve according to actual conversion result data of the SARADC to be compensated, and acquire a corresponding compensation error value in the compensation curve; a compensation module, configured to compensate the actual conversion result data of the SARADC to be compensated based on the corresponding compensation error value, and acquire compensated conversion result data; the searching module is specifically configured to: measure actual conversion result data of the same analog signal to be converted converted by the SARADC to be compensated for multiple times; average the actual conversion result data measured multiple times to obtain average actual conversion result data; take the average actual conversion result data as horizontal axis data, find a corresponding second error sub-curve segment in the multiple second error sub-curves, and find a corresponding compensation error value in a compensation curve segment corresponding to the second error sub-curve segment.

9. A chip for linearity compensation, characterized by a processor and a memory, wherein the processor is configured to execute the SARADC linearity compensation method in any one of claims 1-7.

Images