A GPU channelization receiving method based on adaptive bandwidth threshold segmentation

Abstract

The application discloses a GPU channelization receiving method based on adaptive bandwidth threshold segmentation, which comprises the following steps: S1, transmitting wideband input signal data from a host memory buffer to a corresponding device memory buffer, wherein the host is a CPU end, and the device is a GPU end; S2, calculating an optimal bandwidth threshold according to all input signal bandwidths, thereby calculating a polyphase filter extraction multiple, wherein D is the extraction multiple; S3, performing polyphase filter calculation on input data according to the extraction multiple, thereby dividing the input data into D channel data; S4, segmenting the input signal according to the bandwidth threshold: if the signal bandwidth is less than the bandwidth threshold, performing down-conversion calculation on the channel data, otherwise, performing down-conversion calculation on the original input data; S5, performing down-sampling calculation according to the down-converted data, thereby changing the output data sampling rate to a specified size; S6, performing low-pass filter calculation according to the down-sampled data, thereby obtaining final output data; and S7, copying data from the device memory buffer to the corresponding host memory buffer. The technical scheme provided by the application can channelize signals of any size and maximize the use of polyphase filters, so that the channelization performance is optimal. The application is realized based on a CUDA computing platform, and the running speed is obviously improved compared with a CPU platform. The application adopts a software processing flow, is more controllable, has better portability, and meets the requirements of channelization acceleration processing with large bandwidth and high throughput.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of digital baseband signal preprocessing services, and particularly relates to a GPU channelization receiving method based on adaptive bandwidth threshold segmentation. BACKGROUND

[0002] With the continuous progress of modern communication technology, the input bandwidth of digital wideband sampling signals in related channelization processing services is increasingly large, and the target narrowband signals to be processed are increasingly many. Modern channelization adopts advanced polyphase filter technology to implement a channelization method with characteristics such as multi-channel and high throughput. Since the polyphase filter technology has characteristics such as the greater the decimation multiple, the higher the channelization performance, and the smaller the supported signal bandwidth, the polyphase filter cannot meet all signals when there are multiple levels of signal bandwidth sizes.

[0003] The resource consumption of early channelization platform solutions based on special hardware modules is increasingly unacceptable. Moreover, the demand for flexible and variable function design in modern software-defined radio (SDR) promotes channelization processing to be implemented by using program algorithms, which not only reduces the system design complexity, but also makes the later function adjustment more flexible and convenient. SUMMARY

[0004] In order to solve the above problems in the prior art, the present application provides a GPU channelization receiving method based on adaptive bandwidth threshold segmentation, comprising the following steps:

[0005] S1: transmitting wideband input signal data from a host memory buffer to a corresponding device memory buffer, wherein the host is a CPU end, and the device is a GPU end;

[0006] S2: calculating an optimal bandwidth threshold according to all input signal bandwidths, so as to calculate a polyphase filter decimation multiple, wherein D is the decimation multiple;

[0007] S3: performing polyphase filter calculation on input data according to the decimation multiple, so as to divide the input data into D channel data;

[0008] S4: segmenting the input signal according to the bandwidth threshold: performing down-conversion calculation on the channel data if the signal bandwidth is less than the bandwidth threshold, or performing down-conversion calculation on the original input data otherwise;

[0009] S5: performing decimation calculation according to the down-converted data, so as to change the output data sampling rate to a specified size;

[0010] S6: performing low-pass filter calculation on the decimated data, so as to obtain final output data;

[0011] S7: copying data from the device end memory buffer to the corresponding host end memory buffer.

[0012] Preferably, step S2 adaptively calculates the bandwidth threshold according to the input signal bandwidth, so as to obtain the optimal polyphase filter decimation multiple.

[0013] Preferably, the down-conversion calculation is a heterodyne mixing operation of the wideband signal data in the device end memory buffer according to the mixing factor of each signal.

[0014] Preferably, the mixing factor corresponding to each signal is calculated in advance when setting the information of each signal.

[0015] Preferably, the decimation calculation includes integer decimation and fractional interpolation.

[0016] Preferably, the low-pass filtering is a convolution operation of the low-pass filter coefficient designed according to the pre-set parameter.

[0017] The method provided by the application maximizes the advantages of polyphase filtering and covers up the disadvantages, so that the scheme meets the requirement of processing any signal bandwidth. Based on the GPU platform, the running speed is obviously improved compared with the CPU platform. The software processing flow is adopted, and there is no dependence on hardware, so that the system has better portability and good performance. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the application, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the application, but not limit the application.

[0019] Figure 1 The figure is a system structure diagram of the application.

[0020] Figure 2 The figure is a device storage space organization form of the output data distribution in the application.

[0021] Figure 3 The figure is an internal thread calculation resource organization form of the down-conversion, decimation and low-pass filtering modules in the application. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solutions and advantages of the embodiments of the application more clear, the technical solutions of the embodiments of the application will be clearly and completely described below with reference to the drawings of the embodiments of the application. Obviously, the described embodiments are part of the embodiments of the application, but not all the embodiments. Based on the described embodiments of the application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the application.

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0024] like Figure 1 As shown, a GPU channelization receiver based on adaptive bandwidth threshold segmentation is implemented using the CUDA computing platform and programming model. By integrating NVIDIA GPU products into the system platform, it provides auxiliary acceleration processing for related channelization task load processing. The overall algorithm implementation mechanism mainly includes multiphase filtering, downconversion, downsampling, and low-pass filtering modules. Through the streamlined processing of these functional modules, the wideband input signal data (WB_IQ) is finally processed to generate multiple baseband signal output data (NB_IQs).

[0025] The down-conversion, downsampling, and low-pass filtering modules will allocate corresponding computing resources (CUDA's thread grids and thread blocks) to each "narrowband" signal, such as... Figure 2 As shown, the channelized parallel processing of multiple "narrowband" signals is organized into a two-dimensional thread grid. Considering that one-dimensional signals are being processed, the thread blocks are also chosen to be one-dimensional. In the two-dimensional thread grid, all thread blocks with the same y-direction index (blockIdx.y) are responsible for the channelized processing of signals mapped to their corresponding memory space region identifiers (not in the "idle" state). Numerous thread blocks with different x-direction indices (blockIdx.x) are responsible for processing data points from different signal time periods. Through this multi-level data parallelism, the massive thread mechanism in CUDA can fully utilize the powerful parallel computing capabilities of hundreds or thousands of CUDA cores in the GPU hardware.

[0026] Step S1: Transmit the broadband input signal data from the host-side memory buffer to the corresponding device-side memory buffer, where the host-side is the CPU and the device-side is the GPU.

[0027] Broadband input signal data (WB_IQ) is transferred from the host-side memory buffer to the corresponding device-side memory buffer. To speed up data transfer, the host-side memory buffer will use special "page-locked" memory.

[0028] Step S2: Calculate the optimal bandwidth threshold based on the bandwidth of all input signals, and then calculate the multiphase filter decimation factor, where D is the decimation factor.

[0029] Bandwidth threshold calculation method:

[0030] 1) With fs / n as threshold, all signal bandwidth options are classified to get the number (num) less than or equal to the threshold. fs is the wideband data sampling rate, and the initial value of variable n is 1.

[0031] 2) If num / sumNum>0.8, let D=n, and then set n=n+1, repeat step 1. sumNum is the number of all signal bandwidth options, and D is the decimation multiple.

[0032] 3) If num / sumNum<0.8, exit the calculation, and finally output D as the best decimation multiple.

[0033] Step S3: According to the decimation multiple obtained in step S2, the input data is subjected to polyphase filter calculation, so as to divide the input data into D channel data.

[0034] The channel division calculation is carried out according to the following formula 1, which is an IDFT transformation form, so that only the output wk(m) corresponding to each channel is required, and then an IDFT transformation can be carried out to obtain the output value of each channel at m moment. In order to speed up the calculation efficiency, IFFT is used in actual calculation.

[0035]

[0036] The input signal is x(n), the number of divided channels is K, the prototype filter impulse response sequence is h(n), and let

[0037] x r (m-l)=x(K(m-l)-r)

[0038] e r (l)=h(Lk+r)

[0039] u r (m)=x r (m)(-1) (K-1)m *e r (m)

[0040]

[0041] Step S4: According to the bandwidth threshold obtained in step S2, the input signal is segmented: if the signal bandwidth is less than the bandwidth threshold, the channel data obtained in step S3 is subjected to down-conversion calculation, otherwise the input data is subjected to down-conversion calculation.

[0042] Down-conversion calculation: the wideband signal data (WB_IQ) in the device memory buffer in the previous step is heterodyne mixed according to the mixing factor of each signal. In order to improve performance, the mixing factor corresponding to each signal is calculated in advance when the parameter configuration module sets the information of each signal (typical "storage instead of calculation" optimization method). After mixing, the spectrum structure of each target "narrowband" signal is moved to the baseband, that is, the signal center frequency becomes "0". This step divides the input signal, which can maximize the advantages of polyphase filtering and mask the disadvantages, so that any signal bandwidth can be processed.

[0043] Step S5: down-sampling calculation is performed according to the down-converted data obtained in step S4, so that the output data sampling rate becomes a specified size, and the down-sampling calculation includes integer times extraction and fractional times interpolation.

[0044] The down-sampling calculation includes integer times extraction and fractional times interpolation. Specifically, (1) integer times extraction: the intermediate result of the heterodyne mixing calculation of each signal in the previous step is taken as the input for half-band filtering processing. Each signal is configured with a number of half-band filtering cycles according to the relationship between its output sampling rate and the original input sampling rate. Since the half-band filtering coefficient is relatively fixed, it is stored in the "constant memory" of the CUDA programming model to reduce the excessive global memory access operation (long delay and high overhead operation in the CUDA model) during kernel function calculation. In addition, in order to improve performance, the corresponding linear convolution operation in the filtering process will be processed in segments according to the x-direction index organization form of the thread block. The data corresponding to each segment can be stored in the "shared memory" of the CUDA programming model (also to avoid excessive global memory access operations). After half-band filtering processing, most of the "interference" signal components have been filtered out, and the actual sampling rate of the result signal is also very close to the target output sampling rate parameter. (2) Fractional times interpolation: the intermediate result of the down-sampling processing of each signal in the previous step is taken as the input for the interpolation / sampling processing according to the pre-calculated factor. After interpolation processing, the result signal corresponding to each output satisfies the output sampling rate.

[0045] Step S6: low-pass filtering calculation is performed on the down-sampled data obtained in step S5 to obtain the final output data.

[0046] The intermediate result of the down-sampling processing of each signal in the previous step is taken as the input for the final low-pass filtering processing. The low-pass filtering performs convolution operation on the intermediate result according to the FIR low-pass filter coefficient designed according to the pre-set parameter, and adopts the "shared memory" mechanism for performance optimization processing. After low-pass filtering processing, each output signal result has filtered out all signal spectrum components other than the corresponding target "narrowband" signal, and only contains the complete spectrum structure of the target "narrowband" signal itself.

[0047] Step S7: Copy the data from the device-side memory buffer to the corresponding host-side memory buffer.

[0048] Specifically, the low-pass filtered outputs of each signal from the previous step are transferred from the device memory buffer to the corresponding host memory buffer. Because the sampling rate parameters of each target "narrowband" output are different, the final output lengths of each channel vary. If directly following... Figure 3 As shown, when the entire memory region is transferred from the device to the host, a large amount of invalid data will inevitably be transmitted. Therefore, in order to improve the efficiency of data processing result transmission, the core module will perform additional processing to reorganize the channelization processing results of each channel into a continuous storage form with "end-to-end connection" and then transmit it back to the host memory buffer. The caller returns parameters such as the result length and data start address offset to the corresponding host memory buffer index and accesses the final channelization processing result (NB_IQs) corresponding to each signal.

[0049] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A GPU channelization reception method based on adaptive bandwidth threshold segmentation, characterized in that... This includes the following steps: S1: Transmit the broadband input signal data from the host-side memory buffer to the corresponding device-side memory buffer, wherein the host-side is the CPU and the device-side is the GPU; S2: Adaptively calculate the optimal bandwidth threshold based on the bandwidth of all input signals, and then calculate the multiphase filter decimation factor, where D is the decimation factor; The bandwidth threshold calculation method is as follows: 1) with Using the threshold as a criterion, all signal bandwidth options are categorized to obtain the number of options less than or equal to the threshold. ; The sampling rate for broadband data is given by variable n, which is initially set to 1. 2) If ,make Then set Repeat step 1; D represents the total number of signal bandwidth options and the decimation factor. 3) If Exit the calculation, and finally output D as the optimal extraction multiple; S3: Perform polyphase filtering calculation on the input data according to the decimation factor, thereby dividing the input data into D channel data; S4: Segment the input signal according to the bandwidth threshold: if the signal bandwidth is less than the bandwidth threshold, perform down-conversion calculation using the channel data; otherwise, perform down-conversion calculation using the original input data. S5: Perform downsampling calculations based on the downconversion data to change the output data sampling rate to the specified value; S6: Perform low-pass filtering calculations based on the downsampled data to obtain the final output data; S7: Copy the data from the device-side memory buffer to the corresponding host-side memory buffer.

2. The GPU channelization reception method based on adaptive bandwidth threshold segmentation according to claim 1, characterized in that, The downconversion calculation involves performing heterodyne mixing on the broadband signal data in the device's memory buffer based on the mixing factors of each signal.

3. The GPU channelization reception method based on adaptive bandwidth threshold segmentation according to claim 2, characterized in that, The mixing factor corresponding to each signal is calculated in advance when setting the information for each signal.

4. The GPU channelization reception method based on adaptive bandwidth threshold segmentation according to claim 1, characterized in that, The downsampling calculation includes integer multiple sampling and fractional multiple interpolation.

5. The GPU channelization reception method based on adaptive bandwidth threshold segmentation according to claim 1, characterized in that, The low-pass filter is convolved with the FIR low-pass filter coefficients designed according to pre-set parameters.

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