A detection device and a detection system

Abstract

The present invention discloses a detection device and a detection system. The detection device includes: at least three sensor signal sampling modules, a first logic operation chip, a second logic operation chip, and a detection signal output module; the input end of one sensor signal sampling module is used to be connected to one sensor, and the output end of one sensor signal sampling module is electrically connected to one signal input end of the first logic operation chip; the first logic operation chip is configured to output at least two independent first logic signals, and the second logic operation chip is configured to generate a second logic signal according to all the first logic signals; the output end of the second logic operation chip is electrically connected to the detection signal output module, and the detection signal output module is used to convert the second logic signal into a detection signal.

Description

Technical Field

[0001] The embodiments of the present invention relate to detection technologies, and in particular, to a detection device and a detection system. Background Art

[0002] In the control system of a cigarette machine device, the number of cigarettes or cigarette packs to be detected is usually 5 packs of cigarettes, 6 cigarettes, 7 cigarettes, etc. Correspondingly, the same number of sensors are required. Usually, the output signals of the sensors need to be respectively connected to the control system of the device, which will inevitably increase a lot of signal lines.

[0003] Based on the above, for a detection device that needs to configure multiple sensors, currently, there is a lack of a detection device that can preprocess the on-site signals of the sensors and can perform logical operations independently relative to the control system. At the same time, the detection devices based on multiple sensors in the prior art do not have the following characteristics: fewer signal lines, lower risk of signal transmission failure, lower signal transmission delay, and lower false detection failure. Summary of the Invention

[0004] The present invention provides a detection device and a detection system to achieve the purpose of simplifying the wiring when configuring multiple sensors to detect materials.

[0005] In a first aspect, the embodiments of the present invention provide a detection device, including: at least three sensor signal sampling modules, a first logic operation chip, a second logic operation chip, and a detection signal output module;

[0006] The input end of one of the sensor signal sampling modules is used to be connected to a sensor, and the output end of one of the sensor signal sampling modules is electrically connected to a signal input end of the first logic operation chip;

[0007] The first logic operation chip is configured to output at least two independent first logic signals, and the second logic operation chip is configured to generate a second logic signal according to all the first logic signals;

[0008] The output end of the second logic operation chip is electrically connected to the detection signal output module, and the detection signal output module is used to convert the second logic signal into a detection signal.

[0009] Optionally, the sensor signal sampling module includes an interface, a first resistor, a second resistor, a third resistor, and a light-emitting diode;

[0010] The signal end of the interface is grounded through the first resistor and the second resistor, and the connection point of the first resistor and the second resistor is electrically connected to the signal input end of the first logic operation chip;

[0011] The signal terminal of the interface is also grounded through the third resistor and the light-emitting diode.

[0012] Optionally, the detection signal output module includes a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first switching transistor, a second switching transistor, and a clamping diode;

[0013] The power supply terminal is electrically connected to the first end of the first switching transistor through the fourth resistor and the fifth resistor, and the second end of the first switching transistor is grounded;

[0014] The output terminal of the second logic operation chip is electrically connected to the control terminal of the first switching transistor through the sixth resistor;

[0015] The seventh resistor is connected in parallel between the second end and the control terminal of the first switching transistor;

[0016] The power supply terminal is also electrically connected to the first end of the second switching transistor, the second end of the second switching transistor is used to output the detection signal, and the control terminal of the second switching transistor is electrically connected to the connection point of the fourth resistor and the fifth resistor;

[0017] The clamping diode is connected in parallel between the first end and the second end of the second switching transistor.

[0018] Optionally, the first logic operation chip is configured with eight signal input terminals and two independent signal output terminals;

[0019] Among them, four of the signal input terminals correspond to one signal output terminal.

[0020] Optionally, it further includes a detection signal indication module, and the detection signal indication module includes an eighth resistor and a first indication diode;

[0021] The second end of the second switching transistor is also grounded through the eighth resistor and the first indication diode.

[0022] Optionally, it is further configured with a power supply, and the power supply includes a DCDC module;

[0023] The DCDC module is used to supply power to the first logic operation chip and the second logic operation chip.

[0024] Optionally, it further includes a power supply indication module, and the power supply indication module includes a ninth resistor and a second indication diode;

[0025] The output terminal of the DCDC module is also grounded through the ninth resistor and the second indication diode.

[0026] Optionally, the DCDC module inputs 24V electricity and outputs 5V electricity.

[0027] Optionally, the DCDC module is configured with a voltage stabilizing diode;

[0028] The input power supply is electrically connected to the power input terminal of the DCDC module at least through the voltage stabilizing diode, wherein the positive electrode of the voltage stabilizing diode is connected to the input power supply, and the negative electrode of the voltage stabilizing diode is electrically connected to the power input terminal;

[0029] The output voltage of the negative electrode of the voltage stabilizing diode is simultaneously used to supply power to the detection signal output module.

[0030] In a second aspect, an embodiment of the present invention further provides a detection system, including the detection device described in the embodiment of the present invention.

[0031] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention proposes a detection device, which includes a plurality of sampling modules, a first logic operation chip and a second logic operation chip. The first logic operation chip is configured to perform logic operations on multiple groups of sensor signals and output several independent first logic signals. The second logic operation chip generates a second logic signal according to all the first logic signals. The second logic signal is set to determine the state of the detected grouped materials. Based on this detection device, when it is necessary to configure multiple sensors to implement material detection, only one second logic signal is output based on the second logic operation chip. Therefore, only one detection signal output line needs to be configured during wiring, thereby achieving the purpose of simplifying the wiring;

[0032] At the same time, by configuring the first logic operation chip to perform logic operations on the sensor signals of multiple groups of grouped materials respectively, the influence on the logic operation result caused by the sensor jitter resulting in a delay in the sensor signal output can be reduced, thereby reducing the detection error. Description of the Drawings

[0033] Figure 1 is a schematic structural diagram of the detection device in the embodiment;

[0034] Figure 2 is a schematic structural diagram of the sensor signal sampling module in the embodiment;

[0035] Figure 3 is a schematic structural diagram of the detection signal output module in the embodiment;

[0036] Figure 4 is a schematic structural diagram of the detection signal indication module in the embodiment;

[0037] Figure 5 is a schematic structural diagram of the power indication module in the embodiment;

[0038] Figure 6 is a schematic structural diagram of another detection device in the embodiment;

[0039] Figure 7 It is a schematic diagram of the connection method of the detection device sensor in the prior art;

[0040] Figure 8 It is a schematic diagram of the sensor signal time delay in the embodiment. Specific Embodiments

[0041] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only for explaining the present invention and not for limiting the present invention. In addition, it should be noted that for the convenience of description, only parts related to the present invention are shown in the drawings instead of all the structures.

[0042] Embodiment 1

[0043] Figure 1 It is a schematic diagram of the structure of the detection device in the embodiment. Refer to Figure 1 , the detection device includes: at least three sensor signal sampling modules (sensor signal sampling modules 1 to n), as well as a first logic operation chip 100, a second logic operation chip 200, and a detection signal output module 300;

[0044] The input end of a sensor signal sampling module is used to be connected to a sensor, and the output end of a sensor signal sampling module is electrically connected to a signal input end of the first logic operation chip 100;

[0045] The first logic operation chip 100 is configured to output at least two independent first logic signals, and the second logic operation chip 200 is configured to generate a second logic signal according to all the first logic signals;

[0046] The output end of the second logic operation chip 200 is electrically connected to the detection signal output module 300, and the detection signal output module 300 is used to convert the second logic signal into a detection signal.

[0047] Exemplarily, in this embodiment, the type of the sensor connected to the sensor signal sampling module is not specifically limited, and it can be freely selected according to the application scenario.

[0048] Exemplarily, in this embodiment, it is configured that the sensor signal sampling module includes a sampling circuit, and the output signal of the sampling circuit is an analog signal.

[0049] Exemplarily, in this embodiment, it is configured that the first logic operation chip 100 receives the analog signal output by the sensor signal sampling module. For one path of analog signal, it is configured that the first logic operation chip generates a high-level digital signal or a low-level digital signal according to the analog signal.

[0050] Exemplarily, in this embodiment, the first logic operation chip 100 is configured with multiple signal input terminals and multiple signal output terminals, and a specified number of a group of signal input terminals correspond to one signal output terminal;

[0051] For example, the first logic operation chip 100 can be configured with six signal input terminals and two signal output terminals, and three signal input terminals are configured to correspond to one signal output terminal.

[0052] Exemplarily, different signal output terminals in the first logic operation chip 100 are independent of each other. Correspondingly, when the first logic operation chip 100 performs a logic operation on a digital signal (generated based on the acquired analog signal), it performs a logic operation on a group of array signals corresponding to a group of signal input terminals separately;

[0053] For example, the first logic operation chip 100 is configured with a first signal input terminal, a second signal input terminal, a third signal input terminal, a fourth signal input terminal, a first signal output terminal, and a second signal output terminal;

[0054] The first signal input terminal and the second signal input terminal are a group and correspond to the first signal output terminal, and the third signal input terminal and the fourth signal input terminal are a group and correspond to the second signal output terminal;

[0055] It is set that the digital signals corresponding to the first signal input terminal and the second signal input terminal are D1 and D2 respectively, and the digital signals corresponding to the third signal input terminal and the fourth signal input terminal are D3 and D4 respectively;

[0056] When performing a logic operation, the first logic operation chip 100 performs a logic operation on D1 and D2 to generate a first logic signal Y11, and outputs the first logic signal Y11 through the first signal output terminal, and performs a logic operation on D3 and D4 to generate a first logic signal Y22, and outputs the first logic signal Y22 through the second signal output terminal.

[0057] Exemplarily, in this embodiment, the second logic operation chip 200 is configured to include at least two input terminals. Specifically, the number of input terminals of the second logic operation chip 200 is greater than or equal to the number of signal output terminals of the first logic operation chip 100, and one input terminal is used to receive one first logic signal.

[0058] Exemplarily, in this embodiment, the second logic operation chip 200 is configured to include one output terminal. When performing a logic operation, the second logic operation chip 200 generates a second logic signal according to all the first logic signals (output by the first logic operation chip 100).

[0059] Exemplarily, in this embodiment, there is no specific limitation on the selection of the first logic operation chip 100 and the second logic operation chip 200, and they can be selected according to requirements.

[0060] Exemplarily, in this embodiment, the second logic signal is a digital signal. The output end of the detection signal output module 300 is used to be connected to a detection device (or a device such as a control chip for processing detection signals), and the detection signal output module 300 is configured to convert the second logic signal into a detection signal that can be received by the detection device.

[0061] In this embodiment, it is set that the detection device is used to implement the detection of a group of materials to be measured (a group of materials to be measured includes multiple materials) (for example, whether there are problems such as breakage and shortage). Correspondingly, the second logic signal is used to determine whether there are unqualified materials in the group of materials to be measured.

[0062] Exemplarily, in this embodiment, the design method of the detection signal output module 300 is not limited, and the detection signal output module 300 can be designed based on a digital-to-analog conversion chip, a signal conversion circuit, etc.

[0063] This embodiment provides a detection device. The detection device includes a plurality of sampling modules, a first logic operation chip, and a second logic operation chip. Among them, the first logic operation chip is configured to perform logic operations on multiple groups of sensor signals and output a plurality of independent first logic signals. The second logic operation chip generates a second logic signal according to all the first logic signals. Among them, the second logic signal is set to determine the state of the group of materials to be detected. Based on this detection device, when it is necessary to configure multiple sensors to implement material detection, only one second logic signal is output based on the second logic operation chip. Therefore, only one detection signal output line needs to be configured during wiring, thereby achieving the purpose of simplifying the wiring (that is, using this detection device, multiple groups of sensor signals in the industrial field can be preprocessed and then output to the control system connected to the detection device, and thus the number of connection signal lines from the detection device to the control cabinet in the control system can be reduced);

[0064] At the same time, by configuring the first logic operation chip to perform logic operations on the sensor signals of multiple groups of materials respectively, the influence on the logic operation result caused by the sensor jitter resulting in a delay in the sensor signal output can be reduced, thereby reducing the detection error.

[0065] Figure 2 It is a schematic structural diagram of the sensor signal sampling module in the embodiment. Refer to Figure 2 , in Figure 1 Based on the scheme shown, in this scheme, the sensor signal sampling module includes an interface U4, a first resistor R2, a second resistor R1, a third resistor R3, and a light-emitting diode LED1;

[0066] The signal terminal of interface U4 is grounded through the first resistor R2 and the second resistor R1. The connection point of the first resistor and the second resistor is used to output signal D11, and this connection point is electrically connected to the signal input terminal of the first logic operation chip;

[0067] The signal terminal of interface U4 is also grounded through the third resistor R3 and the light-emitting diode LED1.

[0068] Exemplarily, in this solution, terminal 1 of interface U4 is used to connect to the input power supply VCC, terminal 2 is grounded, and terminal 3 is used as the signal terminal to connect to the output signal of the sensor;

[0069] Among them, the first resistor R2 and the second resistor R1 form a voltage dividing circuit. The first resistor R2 also serves as a current limiting resistor. When the sensor outputs output signals with different voltages, the voltage of the D11 signal at the connection point of the first resistor R2 and the second resistor R1 changes accordingly (i.e., an analog signal is generated). When the first logic operation chip collects D11, a high-level digital signal or a low-level digital signal is generated according to the preset logic.

[0070] Exemplarily, in this solution, the third resistor R3 and the light-emitting diode LED1 form a sensor signal indication circuit. Among them, the third resistor R3 serves as a current limiting circuit. Whether the sensor outputs a signal normally can be determined by the lighting or flashing of the light-emitting diode LED1.

[0071] Exemplarily, in this solution, the structures of multiple sensor signal sampling modules are the same. When configuring multiple sensor signal sampling modules, the structures of the remaining sensor signal sampling modules will not be elaborated.

[0072] Figure 3 It is a schematic diagram of the detection signal output module structure in the embodiment. Refer to Figure 3 , on the basis of the solution shown in Figure 1 , the detection signal output module includes a fourth resistor R28, a fifth resistor R25, a sixth resistor R27, a seventh resistor R26, a first switching tube Q2, a second switching tube Q1, and a clamping diode D3;

[0073] The power supply terminal VCC1 is electrically connected to the first end of the first switching tube Q2 through the fourth resistor R28 and the fifth resistor R25, and the second end of the first switching tube Q2 is grounded;

[0074] The output terminal of the second logic operation chip 200 is electrically connected to the control terminal of the first switching tube Q2 through the sixth resistor R27;

[0075] A seventh resistor R26 is connected in parallel between the second end and the control terminal of the first switching tube Q2;

[0076] The power supply terminal VCC1 is also electrically connected to the first terminal of the second switching transistor Q1. The second terminal of the second switching transistor Q1 is used to output a detection signal DOUT. The control terminal of the second switching transistor Q1 is electrically connected to the connection point of the fourth resistor R28 and the fifth resistor R25;

[0077] A clamping diode D3 is connected in parallel between the first terminal and the second terminal of the second switching transistor Q1.

[0078] Exemplarily, in this solution, the first switching transistor Q2 is an NPN transistor, the second switching transistor Q1 is a PNP transistor, the sixth resistor R27 serves as a current limiting resistor, the seventh resistor R26 is used for discharging when the first switching transistor Q2 is cut off, and the fourth resistor R28 and the fifth resistor R25 are used for voltage division to provide a suitable driving voltage for the second switching transistor Q1;

[0079] When the second logic signal output by the second logic operation chip 200 is at a high level, the first switching transistor Q2 is turned on, the control terminal of the second switching transistor Q1 is at a low level, the second switching transistor Q1 is turned on, and the detection signal DOUT is approximately the voltage at the power supply terminal VCC1;

[0080] When the second logic signal output by the second logic operation chip 200 is at a low level, the first switching transistor Q2 is cut off, the control terminal of the second switching transistor Q1 is at a high level, the second switching transistor Q1 is cut off, and the detection signal DOUT is approximately 0;

[0081] Wherein, the detection signal output module is further configured with an interface U3. The interface U3 is used to connect to a control chip. It is configured that the detection signal DOUT is input into the control chip through terminal 3 of the interface U3, and the control chip determines the detection status of each sensor according to the collected detection signal DOUT.

[0082] Figure 4 is a schematic structural diagram of the detection signal indication module in the embodiment. Refer to Figure 4 , in Figure 3 Based on the solution shown, the detection device further includes a detection signal indication module. The detection signal indication module includes an eighth resistor R29 and a first indication diode LED9;

[0083] Combined with Figure 3 , the second terminal of the second switching transistor Q1 is also grounded through the eighth resistor R29 and the first indication diode LED9.

[0084] Exemplarily, in this solution, the eighth resistor R29 serves as a current limiting circuit. By the lighting or flashing of the first indication diode LED9, it can be determined whether the detection signal output module normally outputs the detection signal DOUT.

[0085] In Figure 1On the basis of the shown solution, the detection device can also be configured with a power supply, and the power supply includes a DCDC module;

[0086] The DCDC module is used to supply power to the first logic operation chip and the second logic operation chip.

[0087] Exemplarily, in this solution, the DCDC module is used to perform a primary step-down of the input power supply voltage, and then generate the power supply voltages for the first logic operation chip and the second logic operation chip.

[0088] Exemplarily, in this solution, the input voltage and output voltage of the DCDC module can be determined according to requirements and the operating voltages of the first logic operation chip and the second logic operation chip. For example, the DCDC module can be configured to input 24V electricity and output 5V electricity.

[0089] Figure 5 is a schematic diagram of the power supply indication module structure in the embodiment. Refer to Figure 5 , as an implementable solution, when the detection device is configured with a power supply, the power supply can also include a power supply indication module, and the power supply indication module includes a ninth resistor R30 and a second indicating diode LED10;

[0090] The output terminal (+5V) of the DCDC module is also grounded through the ninth resistor R30 and the second indicating diode LED10.

[0091] Exemplarily, in this solution, the ninth resistor R30 serves as a current limiting circuit, and it can be determined whether the DCDC module normally outputs a (+5V) power signal through the lighting of the second indicating diode LED10.

[0092] As an implementable solution, when the detection device is configured with a power supply and the power supply includes a DCDC module, the DCDC module can be configured with a zener diode;

[0093] The input power supply is electrically connected to the power input terminal of the DCDC module at least through the zener diode. Among them, the positive electrode of the zener diode is connected to the input power supply, and the negative electrode of the zener diode is electrically connected to the power input terminal of the DCDC module;

[0094] The output voltage of the negative electrode of the zener diode is simultaneously used to supply power to the detection signal output module.

[0095] In this solution, it is set that the voltage of the working power supply of the detection signal output module is the same as the voltage of the input power supply. By configuring the zener diode to stabilize the input power supply, and using the stabilized power supply voltage as the working voltage of the detection signal output module, the working stability of the detection signal output module can be improved.

[0096] In this embodiment, the solutions of any of the above detection devices can be freely arranged and combined. Figure 6It is a schematic structural diagram of another detection device in the embodiment, refer to Figure 6 , for example, in an implementable solution, the detection device includes: eight sensor signal sampling modules (respectively used to output signals D11~D18), a first logic operation chip 100, a second logic operation chip 200, and a detection signal output module;

[0097] Among them, the structures of the eight sensor signal sampling modules are the same. Taking the first sensor signal sampling module as an example, the sensor signal sampling module includes an interface U4, a first resistor R2, a second resistor R1, a third resistor R3, and a light-emitting diode LED1;

[0098] The signal terminal of the interface U4 is grounded through the first resistor R2 and the second resistor R1. The connection point of the first resistor and the second resistor is used to output the signal D11, and this connection point is electrically connected to the signal input terminal of the first logic operation chip;

[0099] The input terminal of one sensor signal sampling module is used to be connected to one sensor, and the output terminal of one sensor signal sampling module is electrically connected to one signal input terminal of the first logic operation chip 100;

[0100] The first logic operation chip 100 is configured with eight signal input terminals and two independent signal output terminals. Among them, four signal input terminals correspond to one signal output terminal;

[0101] The first logic operation chip 100 is configured to output two independent first logic signals through two signal output terminals, and the second logic operation chip 200 is configured to generate a second logic signal according to all the first logic signals;

[0102] The output terminal of the second logic operation chip 200 is electrically connected to the detection signal output module, and the detection signal output module is used to convert the second logic signal into a detection signal;

[0103] Among them, the detection signal output module includes a fourth resistor R28, a fifth resistor R25, a sixth resistor R27, a seventh resistor R26, a first switching tube Q2, a second switching tube Q1, and a clamping diode D3;

[0104] The power supply terminal VCC1 is electrically connected to the first end of the first switching tube Q2 through the fourth resistor R28 and the fifth resistor R25, and the second end of the first switching tube Q2 is grounded;

[0105] The output terminal of the second logic operation chip 200 is electrically connected to the control end of the first switching tube Q2 through the sixth resistor R27;

[0106] A seventh resistor R26 is connected in parallel between the second end and the control end of the first switching tube Q2;

[0107] The power supply terminal VCC1 is also electrically connected to the first terminal of the second switching transistor Q1. The second terminal of the second switching transistor Q1 is used to output a detection signal DOUT, and the control terminal of the second switching transistor Q1 is electrically connected to the connection point of the fourth resistor R28 and the fifth resistor R25;

[0108] A clamping diode D3 is connected in parallel between the first terminal and the second terminal of the second switching transistor Q1;

[0109] The detection signal indicating module includes an eighth resistor R29 and a first indicating diode LED9. The second terminal of the second switching transistor Q1 is also grounded through the eighth resistor R29 and the first indicating diode LED9;

[0110] The detection device can also be configured with a power supply, and the power supply includes a DCDC chip U7 (U7 and its peripheral circuits form a DCDC module);

[0111] The input power supply VCC is electrically connected to the power input terminal of the DCDC chip U7 through a voltage stabilizing diode D2. Among them, the positive electrode of the voltage stabilizing diode D2 is connected to the input power supply VCC, and the negative electrode of the voltage stabilizing diode D2 is electrically connected to the power input terminal of the DCDC chip U7;

[0112] The output voltage VCC1 of the negative electrode of the voltage stabilizing diode D2 is simultaneously used to supply power to the detection signal output module;

[0113] The power supply can also include a power supply indicating module, and the power supply indicating module includes a ninth resistor R30 and a second indicating diode LED10;

[0114] The output terminal (+5V) of the DCDC chip U7 is also grounded through the ninth resistor R30 and the second indicating diode LED10.

[0115] Exemplarily, in this solution, the detection device can be configured in the control system of a cigarette machine device to realize the detection of (grouped) cigarette sticks or (grouped) cigarette packs (such as whether there are problems such as damage or shortage). Correspondingly, the adopted sensor is used to generate a detection sampling signal for the cigarette sticks or cigarette packs.

[0116] Exemplarily, in this solution, the first logic calculation chip and the second logic calculation chip adopt AND gate chips. It is set that when all the cigarette sticks in the (grouped) cigarette sticks (or cigarette packs) are defect-free, both of the two first logic signals after the AND operation are 1. Correspondingly, the second logic signal after the AND operation is 1. If there is at least one defective cigarette stick in the (grouped) cigarette sticks (or cigarette packs), the second logic signal is 0. Through the truth value of the second logic signal, it can be judged whether the detected (grouped) cigarette sticks (or cigarette packs) are defective.

[0117] Figure 7 It is a schematic diagram of the connection method of the detection device sensor in the prior art. Refer toFigure 7 , in the prior art, if a detection device is configured with multiple sensors, for example, sensors 1 to 5 are configured, the sensors are connected in the following manner:

[0118] The output of sensor 1 is connected to the positive power supply of sensor 2, the output of sensor 2 is connected to the positive power supply of sensor 3, the output of sensor 3 is connected to the positive power supply of sensor 4, the output of sensor 4 is connected to the positive power supply of sensor 5, the positive power supply of sensor 1 is connected to 24V, and the negative poles of all sensors are connected to 0V;

[0119] When sensor 1 is triggered, the output of sensor 1 has a 24V voltage, and sensor 2 is powered on to work. When sensor 2 is triggered, the output of sensor 2 has a 24V voltage, and sensor 3 is powered on to work. Therefore, when all sensors are triggered, the output of sensor 5 has a 24V voltage. If any one sensor is not triggered, the output of sensor 5 has no voltage;

[0120] Based on the above content, there is a certain delay from when the sensor is powered on to when it works normally, which is 5 - 10MS. If all sensors are triggered, and then sensor 2 due to the jitter of the trigger object causes a non-trigger and a re-trigger, a delay of 20 - 40MS will be generated, and at this time, it may cause misoperation of the control system.

[0121] Figure 8 is the schematic diagram of the sensor signal time delay in the embodiment, refer to Figure 8 , Figure 8 in which QX1 represents the sensor signal time delay curve in the present application, and QX2 represents the sensor signal time delay curve corresponding to the Figure 7 shown scheme;

[0122] Compared with the Figure 7 shown sensor connection method, when the detection device proposed in the present application is adopted, one sensor is connected to one sensor signal sampling module. Based on this, compared with the Figure 7 , the delay from when one sensor is powered on to when it works normally has no influence on the other sensors, and after being powered on, the sensor can output the sensor signal faster (it can output a high-level sensor signal at time T1, earlier than the time when the high-level sensing signal is output in QX2);

[0123] In addition, compared with the Figure 7 , when one sensor jitters, the time delay for re-outputting the sensor signal is small (it can re-output a high-level sensor signal at time T2, earlier than the time when the high-level sensing signal is re-output in QX2).

[0124] Based on the above content, in Figure 1Based on the beneficial effects of the shown solution and the requirements of the application scenario, the detection device in this solution can be flexibly applied to the logical AND operation of 8 or fewer sensor signals. The redundant inputs can be connected to a 24V voltage to achieve bypass, and furthermore, the time delay for collecting sensor signals is small, that is, the calculation delay of the logical AND operation is small, and the risk of false detection is low.

[0125] Embodiment 2

[0126] This embodiment provides a detection system, including any one of the detection devices described in Embodiment 1. Its working process and beneficial effects are the same as the corresponding content described in Embodiment 1, and will not be elaborated here.

[0127] Note that the above is only the preferred embodiment of the present invention and the applied technical principles. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described here. Various obvious changes, re-adjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A detection device, characterized in that, Comprising: At least three sensor signal sampling modules, a first logic operation chip, a second logic operation chip, and a detection signal output module; The input end of one of the sensor signal sampling modules is used to connect to a sensor, and the output end of one of the sensor signal sampling modules is electrically connected to a signal input end of the first logic operation chip; The first logic operation chip is configured to output at least two independent first logic signals, and the second logic operation chip is configured to generate a second logic signal based on all the first logic signals; The output end of the second logic operation chip is electrically connected to the detection signal output module, and the detection signal output module is used to convert the second logic signal into a detection signal; The sensor signal sampling module includes an interface, a first resistor, a second resistor, a third resistor, and a light-emitting diode; The signal end of the interface is grounded through the first resistor and the second resistor, and the connection point of the first resistor and the second resistor is electrically connected to the signal input end of the first logic operation chip; The signal end of the interface is also grounded through the third resistor and the light-emitting diode; The detection signal output module includes a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first switching tube, a second switching tube, and a clamping diode; The power supply end is electrically connected to the first end of the first switching tube through the fourth resistor and the fifth resistor, and the second end of the first switching tube is grounded; The output end of the second logic operation chip is electrically connected to the control end of the first switching tube through the sixth resistor; The seventh resistor is connected in parallel between the second end and the control end of the first switching tube; The power supply end is also electrically connected to the first end of the second switching tube, the second end of the second switching tube is used to output the detection signal, and the control end of the second switching tube is electrically connected to the connection point of the fourth resistor and the fifth resistor; The clamping diode is connected in parallel between the first end and the second end of the second switching tube.

2. The detection device according to claim 1, characterized in that, The first logic operation chip is configured with eight signal input ends and two independent signal output ends; Among them, four of the signal input ends correspond to one signal output end.

3. The detection device according to claim 1, characterized in that, It further includes a detection signal indication module, and the detection signal indication module includes an eighth resistor and a first indication diode; The second end of the second switching tube is also grounded through the eighth resistor and the first indication diode.

4. The detection device according to claim 1, characterized in that, It is also configured with a power supply, and the power supply includes a DCDC module; The DCDC module is used to supply power to the first logic operation chip and the second logic operation chip.

5. The detection device according to claim 4, characterized in that, It further includes a power supply indication module, and the power supply indication module includes a ninth resistor and a second indication diode; The output end of the DCDC module is also grounded through the ninth resistor and the second indication diode.

6. The detection device according to claim 5, characterized in that, The DCDC module inputs 24V electricity and outputs 5V electricity.

7. The detection device according to claim 4, characterized in that, The DCDC module is configured with a voltage stabilizing diode; The input power supply is electrically connected to the power input end of the DCDC module at least through the voltage stabilizing diode, wherein the positive electrode of the voltage stabilizing diode is connected to the input power supply, and the negative electrode of the voltage stabilizing diode is connected to the power input end; The output voltage of the negative electrode of the zener diode is simultaneously used to supply power to the detection signal output module.

8. A detection system, characterized in that, Comprising the detection device according to any one of claims 1 to 7.

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