Wafer test code automatic detection method, device, equipment and medium

Abstract

The present disclosure provides a wafer test code automatic detection method, device, equipment and medium, belonging to the technical field of integrated circuits. The method comprises: receiving a compiled wafer test code through a program simulation running unit, and simulating running the wafer test code by using test software enabled in offline mode; extracting the running parameter value corresponding to the to-be-detected test parameter of the wafer test code in the simulation running process through a monitoring parameter interface and a detection unit; generating a result document through the detection unit, the result document including the to-be-detected test parameter and the corresponding running parameter value, so as to determine whether the setting of the to-be-detected test parameter in the wafer test code meets the parameter requirement in the test requirement according to the result document. The present disclosure detects the unreasonable parameter setting in advance before the on-machine test verification, improves the reliability of the test code, and effectively protects the wafer.

Description

Technical Field

[0001] This disclosure relates to the field of chip testing technology, and more specifically, to a method, apparatus, computer equipment, and computer-readable storage medium for automatic detection of wafer test codes. Background Technology

[0002] During wafer testing, the testing process and relevant parameter requirements need to be provided to the testing department. Chip test engineers then develop test programs (code or programs) based on the performance of the test equipment. Testing the chip using these programs can lead to unreasonable parameters due to various reasons, reducing the reliability of the test code and potentially damaging the wafer under test and / or the test equipment. Summary of the Invention

[0003] The purpose of this disclosure is to provide an automatic detection method for wafer test codes, which can improve the reliability of test codes and thus effectively protect wafers.

[0004] This disclosure provides an automatic detection method for wafer test code. The method is executed by an automatic wafer test code detection device, which installs test software from a wafer tester and includes a program simulation execution unit, a monitoring parameter interface, and a detection unit. The method includes: receiving compiled wafer test code through the program simulation execution unit and simulating the execution of the wafer test code using the test software in offline mode; extracting the running parameter values ​​corresponding to the test parameters to be detected during the simulated execution of the wafer test code through the monitoring parameter interface and the detection unit; and generating a result document through the detection unit, the result document including the test parameters to be detected and their corresponding running parameter values, to determine whether the settings of the test parameters to be detected in the wafer test code meet the parameter requirements in the test requirements based on the result document.

[0005] In some exemplary embodiments of this disclosure, the detection unit includes an identification unit; wherein, extracting the running parameter values ​​corresponding to the test parameters to be tested during the simulated operation of the wafer test code through the monitoring parameter interface and the detection unit includes: obtaining a pre-inspection setting document through the identification unit, the pre-inspection setting document including the name of the item to be tested and the information of the parameter to be tested; checking the format of the pre-inspection setting document through the identification unit, and after the format check of the pre-inspection setting document passes, identifying the strings in the pre-inspection setting document and extracting the name of the item to be tested and the information of the parameter to be tested from the pre-inspection setting document; and extracting the running parameter values ​​corresponding to the test parameters to be tested based on the name of the item to be tested and the information of the parameter to be tested through the detection unit and the monitoring parameter interface.

[0006] In some exemplary embodiments of this disclosure, the detection unit further includes a setting unit and a monitoring unit; the parameter information to be detected includes a function name to be detected and a parameter name to be detected; wherein, extracting the running parameter value corresponding to the test parameter to be detected based on the item name to be detected and the parameter information to be detected through the detection unit and the monitoring parameter interface includes: receiving the item name to be detected and the parameter information to be detected from the identification unit through the setting unit, converting the item name to be detected, the function name to be detected, and the parameter name to be detected into a format recognizable by the monitoring parameter interface, and converting the format-converted item name to be detected... The project name, the name of the function to be tested, and the name of the parameter to be tested are transmitted to the monitoring parameter interface. Based on the project name, the function name, and the parameter name, when the wafer test code simulates execution to the corresponding test parameter, the monitoring parameter interface outputs the project name, the function name, the parameter name, and the running parameter value of the test parameter to the monitoring unit. The monitoring unit outputs the function name, the parameter name, and the running parameter value of the test parameter to the result document, unit by unit, based on the project name.

[0007] In some exemplary embodiments of this disclosure, the detection unit further includes a judgment unit; the parameter information to be detected further includes the target setting value corresponding to the target parameter name in the target function name under the target project name, the target project name includes the target project name, the target function name includes the target function name, and the target parameter name includes the target parameter name; wherein, the method further includes: converting the target project name, the target function name, the target parameter name and their corresponding target setting value into a format recognizable by the judgment unit through the setting unit, and transmitting the format-converted target project name, target function name, target parameter name and their corresponding target setting value to the judgment unit; transmitting the target running parameter value corresponding to the target test parameter to the judgment unit through the monitoring unit, the test parameter to be detected includes the target test parameter, and the running parameter value includes the target running parameter value; judging whether the target running parameter value satisfies the target setting value through the judgment unit, obtaining a judgment result, and outputting the judgment result to the result document.

[0008] In some exemplary embodiments of this disclosure, the wafer testing machine includes a precision measurement unit (PMU); the parameter information to be detected includes PMU parameter information.

[0009] In some exemplary embodiments of this disclosure, the PMU parameter information includes the input current parameter name of the input current driven by the PMU to the chip under test; and / or, the input voltage parameter name of the input voltage.

[0010] In some exemplary embodiments of this disclosure, the PMU parameter information further includes at least one of the range, boundary, and clamping of the input current driven by the PMU to the chip under test; and / or at least one of the range, boundary, and clamping of the input voltage.

[0011] In some exemplary embodiments of this disclosure, the parameter information to be detected also includes PMU parameter limitation information.

[0012] In some exemplary embodiments of this disclosure, the PMU parameter limitation information further includes a set threshold for at least one of the range, boundary, and clamping of the input current driven by the PMU into the chip under test; and / or a set threshold for at least one of the range, boundary, and clamping of the input voltage.

[0013] In some exemplary embodiments of this disclosure, when it is determined that the setting of the test parameter to be tested in the wafer test code meets the parameter requirements in the test requirements, the wafer test code is verified on the wafer tester using a verification wafer; after the wafer test code is verified, the wafer test code is applied to the mass production test of the wafer to be tested.

[0014] According to another aspect of this disclosure, an automatic wafer test code detection device is provided. The device includes test software installed on a wafer tester. The device comprises: a program simulation execution unit for receiving compiled wafer test code and simulating the execution of the wafer test code using the test software in offline mode; a monitoring parameter interface and detection unit for extracting the running parameter values ​​corresponding to the test parameters to be detected during the simulated execution of the wafer test code; and the detection unit for generating a result document, which includes the test parameters to be detected and their corresponding running parameter values, to determine whether the settings of the test parameters to be detected in the wafer test code meet the parameter requirements in the test requirements based on the result document.

[0015] In some exemplary embodiments of this disclosure, the detection unit includes an identification unit; the identification unit is configured to acquire a pre-detection setting document, which includes a name of the item to be detected and information on the parameters to be detected; check the format of the pre-detection setting document, and after the format check of the pre-detection setting document passes, identify the strings in the pre-detection setting document and extract the name of the item to be detected and the information on the parameters to be detected from the pre-detection setting document; the detection unit and the monitoring parameter interface are further configured to extract the running parameter values ​​corresponding to the test parameters to be detected based on the name of the item to be detected and the information on the parameters to be detected.

[0016] In some exemplary embodiments of this disclosure, the detection unit further includes a setting unit and a monitoring unit; the parameter information to be detected includes a function name to be detected and a parameter name to be detected; the setting unit is configured to receive the item name to be detected and the parameter information to be detected from the identification unit, convert the item name to be detected, the function name to be detected, and the parameter name to be detected into a format recognizable by the monitoring parameter interface, and transmit the converted item name to be detected, the function name to be detected, and the parameter name to be detected to the monitoring parameter interface; the monitoring parameter interface is further configured to output the item name to be detected, the function name to be detected, the parameter name to be detected, and the running parameter value of the test parameter to the monitoring unit when the wafer test code simulates running to the corresponding test parameter to be detected, based on the item name to be detected, the function name to be detected, and the parameter name to be detected; the monitoring unit is configured to output the function name to be detected, the parameter name to be detected, and the running parameter value of the test parameter to the result document, unit by item name to be detected.

[0017] In some exemplary embodiments of this disclosure, the detection unit further includes a judgment unit; the parameter information to be detected further includes the target setting value corresponding to the target parameter name in the target function name under the target project name, the target project name includes the target project name, the target function name includes the target function name, and the target parameter name includes the target parameter name; the setting unit is further configured to convert the target project name, the target function name, the target parameter name and their corresponding target setting value into a format recognizable by the judgment unit, and transmit the format-converted target project name, target function name, target parameter name and their corresponding target setting value to the judgment unit; the monitoring unit is further configured to transmit the target running parameter value corresponding to the target test parameter to the judgment unit, the test parameter to be detected includes the target test parameter, and the running parameter value includes the target running parameter value; the judgment unit is configured to judge whether the target running parameter value satisfies the target setting value, obtain a judgment result, and output the judgment result to the result document.

[0018] According to another aspect of this disclosure, a computer device is provided, including a processor, a memory, and an input / output interface; the processor is connected to the memory and the input / output interface respectively, wherein the input / output interface is used to receive data and output data, the memory is used to store a computer program, and the processor is used to call the computer program so that the computer device executes the wafer test code automatic detection method in any embodiment of this disclosure.

[0019] According to another aspect of this disclosure, a computer-readable storage medium is provided that stores a computer program adapted to be loaded and executed by a processor, such that a computer device having the processor performs the wafer test code automatic detection method according to any embodiment of this disclosure.

[0020] According to another aspect of this disclosure, a computer program product is provided that, when executed by a processor, implements the automatic wafer test code detection method of any embodiment of this disclosure.

[0021] The automatic wafer test code detection method, apparatus, device, and medium provided in this disclosure receive compiled wafer test code through a program simulation execution unit and simulate the execution of the wafer test code using test software with offline mode enabled. The method extracts the running parameter values ​​corresponding to the test parameters to be detected during the simulated execution of the wafer test code through a monitoring parameter interface and a detection unit. The detection unit generates a result document, which may include the test parameters to be detected and their corresponding running parameter values. This allows the method to determine whether the settings of the test parameters in the wafer test code meet the parameter requirements of the test specifications. In other words, it detects unreasonable parameter settings in the wafer test code before on-machine testing and verification, improving the reliability of the wafer test code and effectively protecting the wafer under test.

[0022] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0023] Figure 1 This is a flowchart of a wafer test code detection method according to an exemplary embodiment of the present disclosure;

[0024] Figure 2 This is a schematic diagram of the architecture of an automatic wafer test code detection system according to an exemplary embodiment of this disclosure;

[0025] Figure 3 This is a flowchart of an automatic wafer test code detection method according to an exemplary embodiment of this disclosure;

[0026] Figure 4 This is a flowchart illustrating the extraction of runtime parameter values ​​corresponding to the test parameters to be detected in an exemplary embodiment of this disclosure;

[0027] Figure 5 This is a schematic diagram of a pre-screening settings document in an exemplary embodiment of this disclosure;

[0028] Figure 6 This is a flowchart illustrating the extraction of runtime parameter values ​​corresponding to the test parameters to be detected, as shown in another exemplary embodiment of this disclosure.

[0029] Figure 7 This is a schematic diagram of the architecture of an automatic wafer test code detection system in another exemplary embodiment of this disclosure;

[0030] Figure 8 This is a flowchart of an automatic wafer test code detection method in another exemplary embodiment of this disclosure;

[0031] Figure 9 This is a schematic diagram of a result document in an exemplary embodiment of this disclosure;

[0032] Figure 10 This is a flowchart of an automatic wafer test code detection method in another exemplary embodiment of this disclosure;

[0033] Figure 11 This is a schematic diagram of the automatic wafer test code detection device in an embodiment of this disclosure;

[0034] Figure 12 This is a schematic diagram of the structure of a computer device according to an embodiment of this disclosure;

[0035] Figure 13 This is a schematic diagram of a computer-readable storage medium according to an embodiment of the present disclosure. Detailed Implementation

[0036] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0037] Chip testing is divided into two stages: CP (Chip Probing) testing, which is wafer testing, and FT (Final Test) testing, which is performed after the chip is packaged. The purpose of CP testing is to screen out defective chips before packaging, thereby saving packaging costs.

[0038] During wafer DC testing (i.e., DC parameter testing, where DC parameters are DC characteristic parameters such as voltage and current characteristics) in the CP testing phase, the original values ​​of the DC parameters for each chip are different. The DC parameters of each chip must be measured and adjusted to achieve a common target value. The Precision Measurement Unit (PMU) in the test equipment is used for DC parameter measurement. It can drive current into the chip under test to measure voltage, or apply voltage to the chip under test to measure the resulting current, for accurate DC parameter measurement. In practice, this involves input current / voltage settings, range settings, limit settings, and clamp settings. It is important to note that appropriate range settings ensure the accuracy of the test results, while clamp settings protect the test equipment hardware circuitry and the chip under test.

[0039] like Figure 1As shown, in a related technology, the automatic detection method for wafer test codes includes the following steps S101-S105.

[0040] S101, Determine the testing requirements. These requirements may include the testing procedures and related parameters. Generally, the chip design department will provide the testing department with the testing procedures and related parameter requirements based on the chip design.

[0041] S102, Test Code Development. Chip test engineers develop test programs based on the test procedures and relevant parameters, taking into account the performance of the test machine.

[0042] S103, the test code compiles successfully.

[0043] S104: Verify the test code on the test machine using a wafer. If the test code verification passes, execute S105; if the test code verification fails, execute S102.

[0044] S105 is used for mass production testing.

[0045] In related technologies, "related parameters" refer to the design department's requirements for setting various parameters during chip measurement. These can include range, boundaries, clamps, etc. During wafer inspection, the test procedure and related parameters need to be provided to the testing department, where chip test engineers develop test programs based on the performance of the test equipment. Typically, different test equipment have different PMU drivers and measurement ranges, which sometimes cannot be perfectly matched, and the nearest range will be selected. If the test program is set incorrectly, compilation will not report an error, but it may potentially damage the wafer. When porting code to a new test equipment, test program statements that originally used default settings for related parameters may damage the wafer due to differences in the PMU hardware of the new equipment. For example, if the default value of related parameters on the new test equipment is too high, it may damage the wafer.

[0046] Inappropriate parameters reduced the reliability of the test code, leading to wafer damage. The reasons for these inappropriate parameters are as follows:

[0047] Chip testing and design are often done by different people. Sometimes, the tester inputs parameters that exceed the design values, or the input is incorrect or arbitrary. Alternatively, the accuracy of different testing machines may not be sufficient to output the design values. Or, the testing machine parameter settings may be off-target or unstable.

[0048] To address at least one of the aforementioned problems, this disclosure provides an automatic wafer test code detection method, applicable to wafer testing scenarios, such as the testing scenario during the wafer test program development phase. In the technical solution provided by this disclosure, by identifying unreasonable parameter settings in the test program before actual testing on the test machine, code development efficiency can be improved, effectively protecting the wafer.

[0049] The following detailed description of this exemplary implementation method is provided in conjunction with the accompanying drawings and embodiments.

[0050] To facilitate a comprehensive understanding of the technical solutions provided in the embodiments of this disclosure, the automatic wafer test code detection system provided in the embodiments of this disclosure will be described first.

[0051] Figure 2 This is a schematic diagram of the architecture of an automatic wafer test code detection system according to an exemplary embodiment of this disclosure. Figure 2 As shown, the wafer test code automatic detection system may include a program simulation running unit 21, a monitoring parameter interface 22, and a detection unit 23.

[0052] The program simulation execution unit 21 receives the compiled wafer test code and simulates its execution using test software in offline mode. Test program 24 is the program to be tested and needs to be compiled successfully; successful compilation of test program 24 yields the wafer test code. The program simulation execution unit 21 is equipped with the test software from the test machine. This software is used to simulate or run the wafer test code, obtaining runtime parameter values. It should be noted that the program simulation execution unit 21 can simulate and run the wafer test code in offline mode.

[0053] The monitoring parameter interface 22 and the detection unit 23 are used to extract the operating parameter values ​​corresponding to the test parameters to be tested during the simulation operation of the wafer test code. The detection unit 23 can receive a pre-test setting document 25, which may include the name of the test item, the name of the test function, and the name of the test parameter. The name of the test function and the name of the test parameter can be parameter keywords, such as input voltage / current values, ranges, boundary values, clamping values, etc. The pre-test setting document 25 may also include setting warning conditions and error conditions, which can be threshold ranges or set values. The detection unit 23 can extract keywords from the pre-test setting document 25, such as clamping values, and can also extract preset conditions from the pre-test setting document 25, such as warning conditions. The detection unit 23 sends the extracted keywords and / or preset conditions to the monitoring parameter interface 22, which can extract the operating parameter values ​​corresponding to the test parameters to be tested based on the keywords and / or preset conditions. The monitoring parameter interface 22 then sends the extracted operating parameter values ​​to the detection unit 23.

[0054] The detection unit 23 is also used to generate a result document 26, which includes the test parameters to be detected and their corresponding running parameter values, so as to determine whether the setting of the test parameters to be detected in the wafer test code meets the parameter requirements in the test requirements based on the result document 26.

[0055] In this embodiment of the disclosure, it is possible to detect in advance whether the setting of the test parameters to be tested in the wafer test code meets the parameter requirements in the test requirements before on-machine testing and verification, and use the test parameters to be tested that meet the parameter requirements to perform wafer testing, thereby improving the reliability of the test code and effectively protecting the wafer.

[0056] The number of program simulation execution units 21, monitoring parameter interfaces 22, and detection units 23 is merely illustrative. Depending on actual needs, any number of program simulation execution units 21, monitoring parameter interfaces 22, and detection units 23 can be included. This embodiment does not limit this.

[0057] This disclosure provides an automatic wafer test code detection method, which can be executed by any electronic device with computing power. For example, the method can be executed by a controller or a server; this disclosure does not limit the execution of this method.

[0058] Figure 3 This is a flowchart of an automatic wafer test code detection method according to an exemplary embodiment of this disclosure, as follows: Figure 3As shown, the automatic wafer test code detection method is executed by the automatic wafer test code detection device. The automatic wafer test code detection device is equipped with the test software on the wafer tester and includes a program simulation running unit, a monitoring parameter interface and a detection unit. The automatic wafer test code detection method provided in this embodiment may include the following S301 to S303.

[0059] S301 receives the compiled wafer test code through the program simulation execution unit and uses test software with offline mode enabled to simulate the execution of the wafer test code.

[0060] The program simulation unit has the function of simulating the execution of wafer test code. The test software of the test machine is installed on the program simulation unit. When the offline mode is started, the wafer test code is simulated and run to obtain the running parameter values ​​corresponding to the test parameters to be tested.

[0061] S302 extracts the running parameter values ​​corresponding to the test parameters to be tested during the simulation operation of the wafer test code through the monitoring parameter interface and the detection unit.

[0062] The wafer test code contains test parameters to be tested. These test parameters are the relevant parameters that need to be tested. The relevant parameters can be parameter values, such as input voltage and current values, range, boundary values, and clamping values. The relevant parameters can also be preset conditions, such as setting warning conditions and error conditions. This disclosure does not limit what the specific relevant parameters are, as long as they are parameters related to chip performance or operation.

[0063] S303, the detection unit generates a result document, which includes the test parameters to be detected and their corresponding operating parameter values, so as to determine whether the setting of the test parameters to be detected in the wafer test code meets the parameter requirements in the test requirements.

[0064] The results document can be used to display the test parameters to be tested and their corresponding operating parameter values. The results document can also be used to display the test results, which can be pass or fail (qualified or unqualified), and can also show the number of warnings and / or errors.

[0065] The method provided in this disclosure can detect unreasonable parameter settings in advance before on-machine testing and verification, improve the reliability of test code, and effectively protect the wafer under test and / or the testing machine.

[0066] The following describes two exemplary embodiments in combination. Figure 7 This section explains how to extract the runtime parameter values ​​corresponding to the test parameters to be detected:

[0067] In one exemplary embodiment, the detection unit 23 includes an identification unit 231; as shown Figure 4 As shown, the running parameter values ​​corresponding to the test parameters to be detected in the wafer test code during the simulation operation are extracted through the monitoring parameter interface and the detection unit, which may include the following S401 to S403.

[0068] S401, the pre-inspection setting document is obtained through the recognition unit. The pre-inspection setting document includes the name of the item to be detected and the parameter information to be detected.

[0069] The recognition unit has the function of checking the format of the pre-detection setting document, and also has the function of recognizing the strings in the pre-detection setting document. This disclosure does not limit what the strings are. For example, the strings can be one or more of text, numbers, letters and symbols, as long as they can describe the detection content and setting conditions.

[0070] S402, the format of the pre-inspection setting document is checked by the recognition unit. After the format check of the pre-inspection setting document is passed, the strings in the pre-inspection setting document are recognized, and the name of the item to be detected and the parameter information to be detected in the pre-inspection setting document are extracted.

[0071] The item name to be detected can be the name of the item to be detected. The parameter information to be detected can be the name of the parameter to be detected and the name of the function to be detected, for example, such as... Figure 5 The document shown is the pre-test setup documentation for using vsim (constant voltage source to measure current) and isim (constant current source to measure voltage). It is located at [location missing]. Figure 5 The left side lists the names of the items to be tested. For example, monitor_function1 is used to measure current with a constant voltage source, and monitor_function2 is used to measure voltage with a constant current source. Both monitor_function1 and monitor_function2 are names of items to be tested, and the content under each item name contains detection parameter information. For example, the detection parameter information for monitor_function2 is "param1 = dVoltage", "param2 = Range", "param3 = pos_clamp", and "param4 = neg_clamp".

[0072] S403 extracts the running parameter values ​​corresponding to the test parameters to be tested based on the name of the item to be tested and the parameter information to be tested through the detection unit and monitoring parameter interface.

[0073] The runtime parameter values ​​are intermediate and / or final parameter values ​​generated during the simulated execution of the test code, so that the detection unit can determine whether the setting of the test parameters to be tested meets the parameter requirements in the test requirements based on the runtime parameter values.

[0074] The above exemplary embodiment can accurately extract the running parameter values ​​corresponding to the test parameters by using the name of the item to be detected and the detection parameter information, thereby improving the accuracy of detection.

[0075] In another exemplary embodiment, the detection unit 23 further includes a setting unit 232 and a monitoring unit 233; the parameter information to be detected includes the name of the function to be detected and the name of the parameter to be detected; such as Figure 6 As shown, the running parameter values ​​corresponding to the test parameters to be tested can be extracted through the detection unit and monitoring parameter interface according to the name of the item to be tested and the information of the parameter to be tested, which may include the following S601 to S603.

[0076] S601 receives the name of the item to be detected and the parameter information to be detected from the identification unit through the setting unit, converts the name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected into a format that the monitoring parameter interface can recognize, and transmits the converted name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected to the monitoring parameter interface.

[0077] The setting unit has the function of receiving the content to be monitored from the recognition unit, and also has a format conversion function. Format conversion can be between programming and speech formats, between text writing formats, or between file types. This disclosure does not limit the specific type of conversion. For example, the name of the item to be detected, the name of the function to be detected, and the parameters to be detected passed from the recognition unit are converted into a format recognizable by the monitoring parameter interface. If the name of the item to be detected, the name of the function to be detected, and the parameters to be detected are in Word format, the setting unit converts them into an Excel format recognizable by the monitoring parameter interface. As another example, if the name of the item to be detected, the name of the function to be detected, and the parameters to be detected are in C language format, the setting unit converts them into a Python format recognizable by the monitoring parameter interface.

[0078] S602, through the monitoring parameter interface, outputs the name of the item to be tested, the name of the function to be tested, the name of the parameter to be tested, and the running parameter value of the test parameter to be tested to the monitoring unit when the wafer test code simulates running to the corresponding test parameter.

[0079] The monitoring unit has the function of collecting and temporarily storing the data transmitted from the monitoring parameter interface. The data transmitted from the monitoring parameter interface may include the name of the item to be tested, the name of the function to be tested, the name of the parameter to be tested, and the running parameter value of the test parameter to be tested.

[0080] like Figure 5As shown, monitor_function1 is used for constant voltage source to measure current, and monitor_function2 is used for constant current source to measure voltage. monitor_function1 and monitor_function2 are both names of the items to be measured, and the content under each item name contains the detection parameter information. For monitor_function2, the corresponding function names to be measured are param1, param2, param3, and param4; the corresponding parameter names to be measured are dVoltage (input voltage value), Range (range), pos_clamp (upper limit boundary value), and neg_clamp (lower limit boundary value).

[0081] S603, through the monitoring unit, outputs the name of the function to be tested, the name of the parameter to be tested, and the running parameter value of the test parameter to be tested to the result document, in units of the name of the item to be tested.

[0082] like Figure 9 As shown, the results document is used to display the detection results, and displays the name of the function to be detected, the name of the parameter to be detected, and the value of the running parameter in units of the name of the item to be detected.

[0083] The exemplary embodiments described above allow for format conversion through the setting unit, thereby broadening the applicability of this disclosure. Furthermore, the result document can visually display the name of the function to be tested, the name of the parameter to be tested, and the running parameter values ​​of the test parameters, facilitating self-checking and correction of errors in the test code by testing personnel.

[0084] The above two exemplary embodiments illustrate how to extract runtime parameter values. The following section explains how to obtain the judgment result.

[0085] In an exemplary embodiment, the detection unit 23 further includes a judgment unit 234; the parameter information to be detected also includes the target setting value corresponding to the target parameter name in the target function name under the target project name, the target project name includes the target project name, the target function name includes the target function name, and the target parameter name includes the target parameter name; such as Figure 8 As shown, the automatic detection method for wafer test codes also includes the following S801-S803.

[0086] S801 converts the target project name, target function name, target parameter name and their corresponding target settings into a format that the judgment unit can recognize through the setting unit, and transmits the converted target project name, target function name, target parameter name and their corresponding target settings to the judgment unit.

[0087] In this embodiment, the format conversion mainly involves the design of the data structure. For example, the first layer determines the type, such as the parameter limitations of the test machine / memory chip / test requirements. The second layer determines the parameter limitations of the test machine, including the driving capabilities and measurement capabilities of different test machines. The parameter unit for each capability is the third layer. The judgment method is another branch of the third layer. For example, some parameters select a range by taking an upward value, while others select a range by taking a downward value. For example, the judgment of test resource allocation prioritizes saving test machine resources, which may sacrifice test time, such as selecting a measurement unit for serial measurement; or prioritizes saving time, which requires a large amount of test resources, such as selecting multiple measurement power supplies for parallel measurement. The second layer / memory chip parameter limitations refer to different products. The third layer refers to different types of probe pads on the chip, including power supply, address transmission, data transmission, and control signal transmission. Another branch of the third layer is correlation. For example, some probe pads can be externally input or internally driven. If the internal drive is affected by which parameter, and if it is a measurement, can they be measured together to calculate the average value, or measured individually in turn? The second layer of testing requirements consists of the parameters in the test requirements document. The technical implementation involves determining whether the system is based on Linux or Windows, the choice of programming language, and the communication methods. For example, if each unit runs independently as a different process, communication rules can be defined, and communication can be achieved through shared memory and binary data transfer.

[0088] The format that the judgment unit can recognize can be the same as or different from the format that the monitoring parameter interface can recognize. The format that the monitoring parameter interface can recognize has been explained in S601 and will not be repeated here.

[0089] The judgment unit has a judgment function, such as determining whether the target operating parameter value exceeds the range of the target set value. It should be noted that when the setting unit transmits the formatted target project name, target function name, target parameter name and their corresponding target set value to the judgment unit, it also transmits the target project name, target function name and target parameter name to the monitoring parameter interface, so that the monitoring parameter interface can extract the target operating parameter value.

[0090] S802, the monitoring unit transmits the target operating parameter value corresponding to the target test parameter to the judgment unit. The test parameter to be detected includes the target test parameter, and the operating parameter value includes the target operating parameter value.

[0091] S803 determines whether the target operating parameter value meets the target setting value through the judgment unit, obtains the judgment result, and outputs the judgment result to the result document.

[0092] The target setpoint can be a range of values ​​or a set value. For example, when simulating the operation of a constant voltage source to measure current, the target setpoint is an output current of -48mA to 48mA, and the target operating parameter value of the simulated output is -20mA to 20mA. If the target operating parameter value is within the range of the target setpoint, that is, the target operating parameter value meets the target setpoint, the judgment result is qualified.

[0093] This exemplary embodiment can select some of the test parameters to be detected as target test parameters, increasing the targeting and efficiency of the detection. Furthermore, it can also determine whether the target operating parameter value exceeds the target set value and output the determination result in the results document, making the detection results clear and more intuitive.

[0094] The role of the precision measurement unit of the wafer testing machine in this disclosure will be explained below.

[0095] In an exemplary embodiment, the wafer tester may include a precision measurement unit (PMU); the parameter information to be tested includes PMU parameter information. For example, the PMU parameter information may include the name of the input current parameter for the PMU driving the input current into the chip under test; and / or, the name of the input voltage parameter. The PMU parameter information may also include at least one of the range, boundary, and clamping of the input current driven by the PMU into the chip under test; and / or, at least one of the range, boundary, and clamping of the input voltage.

[0096] A PMU can drive current into the chip under test to measure voltage, or apply voltage to the chip under test to measure the resulting current, for precise DC parameter measurement.

[0097] In an exemplary embodiment, the parameter information to be detected may further include PMU parameter limitation information. For example, the PMU parameter limitation information may further include a set threshold value for at least one of the range, boundary, and clamping of the input current input to the chip under test by the PMU drive; and / or a set threshold value for at least one of the range, boundary, and clamping of the input voltage.

[0098] By setting PMU parameter limitation information in the pre-inspection setup document and sending the PMU parameter limitation information to the judgment unit, the judgment unit makes a judgment and outputs the judgment result in the result document, making the detection result clear and more intuitive.

[0099] The role of the precision measurement unit of the wafer testing machine in this disclosure has been explained above. The following describes the wafer verification on the testing machine.

[0100] In an exemplary embodiment, the automatic detection method for wafer test codes further includes: when it is determined that the setting of the test parameters to be tested in the wafer test code meets the parameter requirements in the test requirements, verifying the wafer test code on a wafer tester using a verification wafer; and after the wafer test code is verified, applying the wafer test code to the mass production test of the wafer to be tested.

[0101] It should be noted that when the relevant parameters pass the test, i.e., when the operating parameter values ​​or target operating parameter values ​​meet the requirements, the wafer test code is verified using a verification wafer. If it passes, it indicates that the wafer test code has no problems and can be used for mass production testing. Furthermore, this disclosure can also enable the monitoring of relevant parameters during operation.

[0102] This exemplary embodiment can be used for wafer test code detection, verifying wafer test codes by verifying the wafer itself, thereby ensuring the accuracy and reliability of wafer test codes used for mass production testing.

[0103] The above describes wafer verification on the testing machine. The following section will combine... Figure 7 and Figure 10 The detection process of the automatic detection method for wafer test codes is explained.

[0104] The detection process of the automatic detection method for wafer test codes disclosed herein includes the following steps S1001-S1009.

[0105] S1001, Determine test requirements. Test requirements may include test procedures and related parameters. Generally, the chip design department will provide the test procedures and related parameter requirements to the testing department based on the chip design.

[0106] S1002, Test Code Development. Chip test engineers develop test programs based on the test procedures and relevant parameters, taking into account the performance of the test machine.

[0107] S1003, Test code compilation passed. The test program to be tested is compiled and then uploaded to the automatic test code detection system. This system includes a program simulation execution unit 21, a monitoring parameter interface 22, and a detection unit 23. It should be noted that the test code is uploaded to the program simulation execution unit 21 after successful compilation.

[0108] S1004, the automatic test code detection system detects the runtime parameter values ​​of relevant parameters during actual operation. These relevant parameters are the test parameters to be detected. Before actual testing on the test machine, it identifies unreasonable parameter settings in the test program. This is applied during the wafer test program development stage, improving code development efficiency and effectively protecting the wafer. The specific process for detecting runtime parameter values ​​is as follows:

[0109] like Figure 7As shown, the compiled wafer test code is uploaded to the program simulation execution unit 21. The pre-test setting document 25 is set according to the format, and the names of the items to be tested, the functions to be tested, the parameters to be tested, and the target settings are entered. The target settings can be limited values ​​or preset values ​​can be extracted.

[0110] The test code automatic detection system is started. After the identification unit 231 confirms that the pre-detection setting document 25 is correct, it extracts the key strings in the pre-detection setting document 25 and passes them to the setting unit 232. The key strings can be the name of the item to be detected, the name of the function to be detected, the name of the parameter to be detected, and the target setting value.

[0111] The setting unit 232 transmits the name of the item to be tested, the name of the function to be tested, and the name of the parameter to be tested to the monitoring parameter interface 22. The setting unit 232 transmits the name of the item to be tested, the name of the function to be tested, the name of the parameter to be tested, and the target set value to the judgment unit 234.

[0112] The program simulation execution unit 21 is started. The monitoring parameter interface 22 transmits real-time execution parameter values ​​to the monitoring unit 233. The monitoring unit 233 outputs the execution parameter values ​​to the result document in units of the item to be detected, and transmits the execution parameter values ​​that require detection thresholds to the judgment unit 234. The judgment unit 234 transmits the detection results to the result document. The program simulation execution unit 21 finishes running. View the detection results in the result document.

[0113] S1005 checks if the running parameter values ​​are acceptable. If acceptable, proceed to S1006; otherwise, proceed to S1008 and S1009.

[0114] S1006 is verified using a verification wafer on a testing machine.

[0115] S1007 is used for mass production testing.

[0116] S1008, Test code developers self-check for code errors and correct them, then execute S1004.

[0117] S1009 If the relevant parameter settings do not match the requirements due to hardware limitations of the test machine, the test requirements should be communicated with the designer again, and then S1001 should be executed after completion.

[0118] Based on the same inventive concept, this disclosure also provides an automatic wafer test code detection device, as described in the following embodiments. Since the principle by which this device solves the problem is similar to that of the method embodiments described above, the implementation of this device embodiment can refer to the implementation of the method embodiments described above, and repeated details will not be elaborated further.

[0119] Figure 11This diagram illustrates an automatic wafer test code detection device according to an embodiment of the present disclosure, as shown below. Figure 11 As shown, the wafer test code automatic detection device installs test software from a wafer tester. The device includes a program simulation execution unit 111, a monitoring parameter interface 112, and a detection unit 113. The program simulation execution unit 111 receives compiled wafer test code and simulates its execution using test software in offline mode. The monitoring parameter interface 112 and the detection unit 113 extract the running parameter values ​​corresponding to the test parameters to be detected during the simulation execution of the wafer test code. The detection unit 113 also generates a result document, which includes the test parameters to be detected and their corresponding running parameter values, to determine whether the settings of the test parameters in the wafer test code meet the parameter requirements in the test specifications.

[0120] In an exemplary embodiment, the detection unit 113 includes an identification unit; the identification unit is configured to acquire a pre-inspection setting document, which includes the name of the item to be detected and the parameter information to be detected; check the format of the pre-inspection setting document; after the format check of the pre-inspection setting document passes, identify the strings in the pre-inspection setting document and extract the name of the item to be detected and the parameter information to be detected from the pre-inspection setting document; the detection unit 113 and the monitoring parameter interface 112 are further configured to extract the running parameter values ​​corresponding to the test parameters to be detected based on the name of the item to be detected and the parameter information to be detected.

[0121] In an exemplary embodiment, the detection unit 113 further includes a setting unit and a monitoring unit; the parameter information to be detected includes the name of the function to be detected and the name of the parameter to be detected; the setting unit is used to receive the name of the item to be detected and the parameter information to be detected from the identification unit, convert the name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected into a format that the monitoring parameter interface can recognize, and transmit the converted name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected to the monitoring parameter interface; the monitoring parameter interface is also used to output the name of the item to be detected, the name of the function to be detected, the name of the parameter to be detected and the running parameter value of the test parameter to be detected to the monitoring unit when the wafer test code simulates running to the corresponding test parameter to be detected, based on the name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected; the monitoring unit is used to output the name of the function to be detected, the name of the parameter to be detected and the running parameter value of the test parameter to be detected to the result document in units of the name of the item to be detected.

[0122] In an exemplary embodiment, the detection unit 113 further includes a judgment unit; the parameter information to be detected also includes the target setting value corresponding to the target parameter name in the target function name under the target project name, the target project name includes the target project name, the target function name includes the target function name, and the target parameter name includes the target parameter name; the setting unit is further configured to convert the target project name, target function name, target parameter name and their corresponding target setting value into a format recognizable by the judgment unit, and transmit the format-converted target project name, target function name, target parameter name and their corresponding target setting value to the judgment unit; the monitoring unit is further configured to transmit the target running parameter value corresponding to the target test parameter to the judgment unit, the test parameter to be detected includes the target test parameter, and the running parameter value includes the target running parameter value; the judgment unit is configured to judge whether the target running parameter value meets the target setting value, obtain the judgment result, and output the judgment result to the result document.

[0123] In one exemplary embodiment, the wafer testing machine includes a precision measurement unit (PMU); the parameter information to be tested includes PMU parameter information.

[0124] In one exemplary embodiment, the PMU parameter information includes the input current parameter name of the input current driven by the PMU to the chip under test; and / or, the input voltage parameter name of the input voltage.

[0125] In one exemplary embodiment, the PMU parameter information further includes at least one of the range, boundary, and clamping of the input current driven by the PMU into the chip under test; and / or at least one of the range, boundary, and clamping of the input voltage.

[0126] In one exemplary embodiment, the parameter information to be detected also includes PMU parameter limitation information.

[0127] In one exemplary embodiment, the PMU parameter limiting information further includes a set threshold for at least one of the range, boundary, and clamping of the input current driven by the PMU into the chip under test; and / or a set threshold for at least one of the range, boundary, and clamping of the input voltage.

[0128] In one exemplary embodiment, the wafer test code automatic detection device further includes: when it is determined that the setting of the test parameters to be detected in the wafer test code meets the parameter requirements in the test requirements, verifying the wafer test code on a wafer tester using a verification wafer; and after the wafer test code is verified, applying the wafer test code to the mass production test of the wafer to be tested.

[0129] Before on-machine testing and verification, this disclosure uses an automatic wafer test code detection device to detect unreasonable parameter settings in advance, thereby improving the reliability of the test code and effectively protecting the wafer.

[0130] See Figure 12 , Figure 12 This is a schematic diagram of the structure of a computer device according to an embodiment of this disclosure. Figure 12 As shown, the computer device in this embodiment may include one or more processors 1201, a memory 1202, and an input / output interface 1203. The processor 1201, memory 1202, and input / output interface 1203 are connected via a bus 1204. The memory 1202 stores a computer program, which includes program instructions. The input / output interface 1203 receives and outputs data, such as for data interaction between the host machine and the computer device, or for data interaction between various virtual machines within the host machine. The processor 1201 executes the program instructions stored in the memory 1202.

[0131] The processor 1201 can perform the following operations: receive the compiled wafer test code through the program simulation execution unit, and simulate the execution of the wafer test code using test software with offline mode enabled; extract the running parameter values ​​corresponding to the test parameters to be tested during the simulation execution of the wafer test code through the monitoring parameter interface and the detection unit; generate a result document through the detection unit, the result document including the test parameters to be tested and their corresponding running parameter values, so as to determine whether the setting of the test parameters to be tested in the wafer test code meets the parameter requirements in the test requirements based on the result document.

[0132] In some feasible implementations, the processor 1201 may be a central processing unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0133] The memory 1202 may include read-only memory and random access memory, and provides instructions and data to the processor 1201 and input / output interface 1203. A portion of the memory 1202 may also include non-volatile random access memory. For example, the memory 1202 may also store device type information.

[0134] In practice, the computer device can execute the implementation methods provided by each step in any of the above method embodiments through its built-in functional modules. For details, please refer to the implementation methods provided by each step in the figure shown in the above method embodiments, which will not be repeated here.

[0135] This disclosure provides a computer device including a processor, an input / output interface, and a memory. The processor retrieves a computer program from the memory and executes the steps of the method shown in any of the above embodiments.

[0136] This disclosure also provides a computer-readable storage medium storing a computer program. Figure 13 This illustration shows a schematic diagram of a computer-readable storage medium according to an embodiment of the present disclosure, such as... Figure 13 As shown, the computer-readable storage medium 1300 stores a program product capable of implementing the methods described above. This computer program is adapted to be loaded by the processor and executed by the automatic wafer test code detection method provided in each step of any of the above embodiments. Specific implementations of each step in any of the above embodiments can be found here, and will not be repeated here. Furthermore, the beneficial effects of using the same method will not be repeated here either. For technical details not disclosed in the embodiments of the computer-readable storage medium involved in this disclosure, please refer to the description of the method embodiments of this disclosure. As an example, the computer program can be deployed to execute on a single computer device, or on multiple computer devices located in one location, or on multiple computer devices distributed across multiple locations and interconnected via a communication network.

[0137] The computer-readable storage medium can be the wafer test code automatic detection device provided in any of the foregoing embodiments or the internal storage unit of the computer device, such as the hard disk or memory of the computer device. The computer-readable storage medium can also be an external storage device of the computer device, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., provided on the computer device. Furthermore, the computer-readable storage medium can include both internal storage units and external storage devices of the computer device. The computer-readable storage medium is used to store the computer program and other programs and data required by the computer device. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0138] This disclosure also provides a computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the methods provided in various alternative embodiments described above.

[0139] The terms "first," "second," etc., used in the specification, claims, and drawings of this disclosure are used to distinguish different objects, not to describe a specific order. Furthermore, the term "comprising," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, apparatus, product, or device that includes a series of steps or units is not limited to the listed steps or modules, but may optionally include steps or modules not listed, or may optionally include other step units inherent to these processes, methods, apparatuses, products, or devices.

[0140] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described in terms of functionality. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure.

[0141] The methods and related apparatus provided in this disclosure are described with reference to the method flowcharts and / or structural diagrams provided in this disclosure. Specifically, each block of the method flowchart and / or structural diagram, as well as combinations of blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable application display device to create a machine, such that the instructions, which execute via the processor of the computer or other programmable application display device, generate instructions for implementing the process... Figure 1 A schematic diagram of one or more processes and / or structures. Figure 1 The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable application display device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 A schematic diagram of one or more processes and / or structures. Figure 1The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable application display device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable device for implementing the process. Figure 1 A process or multiple processes and / or structures illustrate the steps of the functions specified in one or more boxes.

[0142] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and concept of this disclosure are indicated by the claims.

Claims

1. A method for automatically detecting wafer test codes, characterized in that, The method is executed by an automatic wafer test code detection device, which installs test software from a wafer tester and includes a program simulation execution unit, a monitoring parameter interface, and a detection unit. The method includes: The program simulation unit receives the compiled wafer test code and uses the test software with offline mode enabled to simulate running the wafer test code. The monitoring parameter interface and the detection unit extract the running parameter values ​​corresponding to the test parameters to be detected during the simulated operation of the wafer test code; The detection unit generates a result document, which includes the test parameters to be detected and their corresponding operating parameter values, so as to determine whether the setting of the test parameters to be detected in the wafer test code meets the parameter requirements in the test requirements based on the result document. The detection unit includes an identification unit; The process of extracting the running parameter values ​​corresponding to the test parameters to be detected during the simulated operation of the wafer test code through the monitoring parameter interface and the detection unit includes: The identification unit obtains a pre-detection setting document, which includes the name of the item to be detected and the parameter information to be detected. The recognition unit checks the format of the pre-detection setting document. After the format check of the pre-detection setting document is passed, the string in the pre-detection setting document is recognized, and the name of the item to be detected and the parameter information to be detected in the pre-detection setting document are extracted. The detection unit and the monitoring parameter interface extract the running parameter values ​​corresponding to the test parameters to be detected based on the name of the item to be detected and the information of the parameters to be detected.

2. The method as described in claim 1, characterized in that, The detection unit further includes a setting unit and a monitoring unit; the parameter information to be detected includes the name of the function to be detected and the name of the parameter to be detected. Specifically, the detection unit and the monitoring parameter interface extract the operating parameter values ​​corresponding to the test parameters to be detected based on the name of the item to be detected and the information of the parameters to be detected, including: The setting unit receives the name of the item to be detected and the parameter information to be detected from the identification unit, converts the name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected into a format that the monitoring parameter interface can recognize, and transmits the converted name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected to the monitoring parameter interface. Based on the name of the item to be tested, the name of the function to be tested, and the name of the parameter to be tested, the monitoring parameter interface outputs the name of the item to be tested, the name of the function to be tested, the name of the parameter to be tested, and the running parameter value of the parameter to be tested to the monitoring unit when the wafer test code simulates running to the corresponding test parameter to be tested. The monitoring unit outputs the name of the function to be tested, the name of the parameter to be tested, and the running parameter value of the test parameter to be tested to the result document, using the name of the item to be tested as the unit.

3. The method as described in claim 2, characterized in that, The detection unit further includes a judgment unit; the parameter information to be detected also includes the target setting value corresponding to the target parameter name in the target function name under the target project name, the target project name includes the target project name, the target function name includes the target function name, and the target parameter name includes the target parameter name; The method further includes: The setting unit converts the target project name, the target function name, the target parameter name and their corresponding target settings into a format that the judgment unit can recognize, and then transmits the converted target project name, target function name, target parameter name and their corresponding target settings to the judgment unit. The monitoring unit transmits the target operating parameter value corresponding to the target test parameter to the judgment unit. The test parameter to be detected includes the target test parameter, and the operating parameter value includes the target operating parameter value. The judgment unit determines whether the target operating parameter value meets the target setting value, obtains the judgment result, and outputs the judgment result to the result document.

4. The method as described in claim 1, characterized in that, The wafer testing machine includes a precision measurement unit (PMU); the parameter information to be tested includes PMU parameter information.

5. The method as described in claim 4, characterized in that, The PMU parameter information includes the input current parameter name of the input current driven by the PMU to the chip under test; and / or, the input voltage parameter name.

6. The method as described in claim 5, characterized in that, The PMU parameter information also includes at least one of the range, boundary, and clamping of the input current driven by the PMU to the chip under test; and / or at least one of the range, boundary, and clamping of the input voltage.

7. The method according to any one of claims 4 to 6, characterized in that, The parameter information to be detected also includes PMU parameter limitation information.

8. The method as described in claim 7, characterized in that, The PMU parameter limitation information also includes a set threshold for at least one of the range, boundary, and clamping of the input current driven by the PMU to the chip under test; and / or a set threshold for at least one of the range, boundary, and clamping of the input voltage.

9. The method as described in claim 1, characterized in that, Also includes: When it is determined that the setting of the test parameters to be tested in the wafer test code meets the parameter requirements in the test requirements, the wafer test code is verified on the wafer tester using a verification wafer; After the wafer test code is verified, it is applied to the mass production test of the wafer under test.

10. An automatic wafer test code detection device, characterized in that, The wafer test code automatic detection device is equipped with test software from a wafer tester. The device includes: The program simulation execution unit is used to receive the compiled wafer test code and simulate the execution of the wafer test code using the test software with offline mode enabled; The monitoring parameter interface and detection unit are used to extract the running parameter values ​​corresponding to the test parameters to be detected during the simulation operation of the wafer test code; The detection unit is also used to generate a result document, which includes the test parameters to be detected and their corresponding running parameter values, so as to determine whether the setting of the test parameters to be detected in the wafer test code meets the parameter requirements in the test requirements based on the result document; The detection unit includes an identification unit; The identification unit is used to acquire a pre-detection setting document, which includes the name of the item to be detected and the parameter information to be detected; check the format of the pre-detection setting document; after the format check of the pre-detection setting document passes, identify the strings in the pre-detection setting document and extract the name of the item to be detected and the parameter information to be detected from the pre-detection setting document. The detection unit and the monitoring parameter interface are also used to extract the running parameter values ​​corresponding to the test parameters to be detected based on the name of the item to be detected and the information of the parameters to be detected.

11. The apparatus as claimed in claim 10, characterized in that, The detection unit further includes a setting unit and a monitoring unit; the parameter information to be detected includes the name of the function to be detected and the name of the parameter to be detected. The setting unit is used to receive the name of the item to be detected and the information of the parameter to be detected from the identification unit, convert the name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected into a format that the monitoring parameter interface can recognize, and transmit the converted name of the item to be detected, the name of the function to be detected and the name of the parameter to be detected to the monitoring parameter interface. The monitoring parameter interface is also used to output the name of the item to be tested, the name of the function to be tested, the name of the parameter to be tested, and the running parameter value of the test parameter to be tested to the monitoring unit when the wafer test code simulates running to the corresponding test parameter to be tested, based on the name of the item to be tested, the name of the function to be tested, and the name of the parameter to be tested. The monitoring unit is used to output the name of the function to be detected, the name of the parameter to be detected, and the running parameter value of the test parameter to be detected to the result document, in units of the name of the item to be detected.

12. The apparatus as claimed in claim 11, characterized in that, The detection unit further includes a judgment unit; the parameter information to be detected also includes the target setting value corresponding to the target parameter name in the target function name under the target project name, the target project name includes the target project name, the target function name includes the target function name, and the target parameter name includes the target parameter name; The setting unit is further configured to convert the target project name, the target function name, the target parameter name and their corresponding target settings into a format that the judgment unit can recognize, and transmit the converted target project name, target function name, target parameter name and their corresponding target settings to the judgment unit; The monitoring unit is also used to transmit the target operating parameter value corresponding to the target test parameter to the judgment unit, wherein the test parameter to be detected includes the target test parameter, and the operating parameter value includes the target operating parameter value; The judgment unit is used to determine whether the target operating parameter value meets the target setting value, obtain the judgment result, and output the judgment result to the result document.

13. A computer device, characterized in that, Includes processor, memory, and input / output interfaces; The processor is connected to the memory and the input / output interface respectively, wherein the input / output interface is used to receive data and output data, the memory is used to store computer programs, and the processor is used to call the computer programs so that the computer device executes the method according to any one of claims 1-9.

14. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program adapted to be loaded and executed by a processor to cause a computer device having the processor to perform the method of any one of claims 1-9.

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