Servers, server components, and server clusters

Abstract

The application provides a server, a server component and a server cluster. The server is electrically connected with a switching module. The server comprises a controller, a chip module and a signal processing module. The chip module, the signal processing module and the switching module are electrically connected in sequence. The controller is electrically connected with the switching module and the signal processing module respectively. The controller is configured to acquire the type of the switching module, configure the signal processing module according to the type of the switching module, and enable the chip module to communicate with the switching module through the signal processing module. Thus, the signal transmission mode between the chip module and the switching module is not locked, and the same server mainboard can be adapted to different types of chip modules, which is beneficial to saving the development cost of the server mainboard and facilitating the maintenance and production of the server mainboard.

Description

Technical Field

[0001] This application relates to the field of server technology, and in particular to a server, server component, and server cluster. Background Technology

[0002] With the continuous development of Internet technology and the increasing demand for parallel computing, graphics processing units (GPUs) can effectively relieve computing pressure and significantly improve the computing efficiency and competitiveness of products with their excellent graphics processing capabilities and high-performance computing capabilities. As a result, GPU servers have gradually emerged and are showing an increasingly strong trend.

[0003] To fully leverage the computing performance of GPUs, GPU servers have shifted from the traditional plug-in GPU design to onboard GPUs. Unlike plug-in GPUs, onboard GPUs require multiple high-speed bus signals to enable data transmission. Furthermore, GPU servers also have interconnected application scenarios.

[0004] However, because different GPU interconnects have different bandwidths, different server motherboards need to be developed to adapt to different GPUs. Summary of the Invention

[0005] This application provides a server, server component, and server cluster that can use the same server motherboard to adapt to different GPUs.

[0006] In a first aspect, embodiments of this application provide a server for electrically connecting to a switching module; the server includes a controller, a chip module, and a signal processing module; the chip module, the signal processing module, and the switching module are electrically connected in sequence; the controller is electrically connected to both the switching module and the signal processing module, and the controller is configured to acquire the type of the switching module and configure the signal processing module according to the type of the switching module, so that the chip module communicates with the switching module through the signal processing module.

[0007] The server provided in this embodiment is electrically connected to the adapter module. The server includes a controller, a chip module, and a signal processing module. By sequentially and electrically connecting the chip module, signal processing module, and adapter module, and electrically connecting the controller to both the adapter module and the signal processing module, the controller is configured to obtain the type of the adapter module and configure the signal processing module accordingly. This allows the chip module to communicate with the adapter module through the signal processing module. This prevents signal transmission between the chip module and the adapter module from becoming locked. For different chip modules, the controller can configure the signal processing module according to the adapter module type to achieve communication between the chip module and the adapter module.

[0008] On the one hand, it allows the same server motherboard to be compatible with different types of chip modules, thereby saving on server motherboard development costs and facilitating server motherboard maintenance and production. On the other hand, it enables chip modules supporting multiple signal transmission methods to communicate and connect with different adapter modules, thereby facilitating the selection of a better topology and helping to save costs.

[0009] In one possible implementation, the server further includes a programmable logic device connected in series between the controller and the switching module, the programmable logic device being configured to detect the type of the switching module and transmit this information to the controller.

[0010] By connecting a programmable logic device (PLD) in series between the controller and the adapter module, the PLD can not only detect the type of the adapter module and transmit the information to the controller, but also add fault detection functionality to improve the reliability of the server.

[0011] In one possible implementation, the controller is also electrically connected to the chip module, and the controller is configured to acquire the type of the chip module and configure the signal processing module according to the type of the chip module and the type of the adapter module, so that the chip module communicates with the adapter module through the signal processing module.

[0012] By configuring the controller to be electrically connected to the chip module, the controller can directly detect the type of the chip module, thus eliminating the need to pre-set the type of the chip module in the controller. This not only simplifies the controller setup process but also improves the flexibility of the server motherboard in adapting to the chip module.

[0013] In one possible implementation, the server further includes a first circuit board and a second circuit board, with the controller disposed on the first circuit board and the programmable logic device, the chip module, and the signal processing module all disposed on the second circuit board.

[0014] In one possible implementation, the first circuit board and the second circuit board are an integral structure.

[0015] In one possible implementation, the number of chip modules is at least two, and the number of signal processing modules is at least two; the at least two chip modules and the at least two signal processing modules are electrically connected in a one-to-one correspondence.

[0016] In one possible implementation, the signal processing module includes one of a digital signal processing chip and a logic device.

[0017] In one possible implementation, the chip module includes one of a central processing unit and a graphics processing unit.

[0018] In one possible implementation, the controller includes a substrate management controller.

[0019] In one possible implementation, the programmable logic device includes a complex programmable logic device.

[0020] Secondly, embodiments of this application provide a server component, including a switching module and a server as described in any of the first aspects; the signal processing module and the controller of the server are both electrically connected to the switching module.

[0021] Since the server component provided in this application includes the server of the first aspect, the server component of this application also has the same effects as the server of the first aspect, which will not be repeated here.

[0022] In one possible implementation, the switching module includes at least two types, and each of the at least two types of switching modules supports at least two transmission protocols; the server's chip module supports at least one of the at least two transmission protocols.

[0023] This configuration ensures that the chip module can communicate with at least one type of adapter module through the signal processing module.

[0024] In one possible implementation, the switching module includes a first type of switching module and a second type of switching module; the first type of switching module is configured to support a four-level pulse amplitude modulation transmission protocol; the second type of switching module is configured to support a non-return-to-zero transmission protocol; and the chip module supports at least one of the four-level pulse amplitude modulation transmission protocol and the non-return-to-zero transmission protocol.

[0025] This configuration ensures that the chip module can communicate with either the first type of adapter module or the second type of adapter module through the signal processing module.

[0026] In one possible implementation, when the chip module simultaneously supports the four-level pulse amplitude modulation transmission protocol and the non-return-to-zero transmission protocol, the adapter module is a first type of adapter module.

[0027] This configuration allows the chip module to exchange signals with the first type of adapter module via a four-level pulse amplitude modulation transmission protocol, thereby reducing the number of cables between the signal processing module and the first type of adapter module, which helps save costs and facilitates operation and maintenance.

[0028] In one possible implementation, the number of the switching modules is at least two, and the at least two switching modules are electrically connected to at least two signal processing modules of the server in a one-to-one correspondence.

[0029] Thirdly, embodiments of this application provide a server cluster, including a server as described in the first aspect, and a server component as described in the second aspect; the server is electrically connected to a switching module of the server component.

[0030] The server cluster provided in this application includes a server in the first aspect and a server component in the second aspect. By electrically connecting the server and the server component through a switching module, the server and the server component can communicate with each other to obtain higher computing speed and performance.

[0031] Since the server cluster provided in this application embodiment includes the server of the first aspect, the server cluster of this application embodiment also has the same effects as the server of the first aspect, which will not be repeated here.

[0032] In addition to the technical problems solved by the embodiments of this application, the technical features constituting the technical solutions, and the beneficial effects brought about by the technical features of these technical solutions described above, other technical problems that can be solved by the servers, server components, and server clusters provided by the embodiments of this application, other technical features included in the technical solutions, and the beneficial effects brought about by these technical features will be further explained in detail in the specific implementation methods. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1A schematic diagram of the structure of a server component provided in an embodiment of this application. Figure 1 ;

[0035] Figure 2 A schematic diagram of the structure of a server component provided in an embodiment of this application. Figure 2 ;

[0036] Figure 3 A schematic diagram of the structure of a server component provided in an embodiment of this application. Figure 3 ;

[0037] Figure 4 A schematic diagram of the structure of a server component provided in an embodiment of this application. Figure 4 ;

[0038] Figure 5 A schematic diagram of the server structure provided in an embodiment of this application Figure 1 ;

[0039] Figure 6 A schematic diagram of the server structure provided in an embodiment of this application Figure 2 ;

[0040] Figure 7 This is a schematic diagram of the structure of a server cluster provided in an embodiment of this application.

[0041] Figure label:

[0042] 100A, 100B - Servers;

[0043] 110 - Motherboard;

[0044] 111 - Controller;

[0045] 112 - Chip Module;

[0046] 113 - Signal Processing Module;

[0047] 114 - Programmable logic devices;

[0048] 200-Adapter Module;

[0049] 210 - Type 1 Adapter Module;

[0050] 220 - Type II Adapter Module;

[0051] 300 - Server Components. Detailed Implementation

[0052] The terminology used in the implementation section of this application is for the purpose of explaining specific embodiments of this application only, and is not intended to limit this application.

[0053] The Baseboard Management Controller (BMC) is a small, dedicated processor primarily used for the management and remote monitoring of motherboards in servers.

[0054] Programmable logic devices (PLDs) are general-purpose integrated circuits whose logic functions are determined by the user's programming of the device. Typical PLDs have a high degree of integration, sufficient to meet the needs of designing general digital systems.

[0055] Complex Programmable Logic Devices (CPLDs) are high-density, high-speed, and low-power programmable logic devices mainly composed of three parts: logic blocks, programmable interconnect channels, and input / output blocks.

[0056] Management Data Input / Output (MDIO) is the serial communication bus used for Gigabit Ethernet.

[0057] Inter-Integrated Circuit (I2C) is a synchronous, half-duplex communication bus.

[0058] Four-level pulse amplitude modulation (PAM4) is a modulation technique that uses four different signal levels for signal transmission and is currently widely used in the field of high-speed signal interconnection.

[0059] Non-Return-to-Zero (NRZ) coding is a binary signal code in which 1 and 0 are represented by different salient electronic states. There are no neutral states or other states.

[0060] Local Bus is an open bus architecture.

[0061] A digital signal processing chip (Retimer chip) is a chip with internal data clock recovery. After the data is recovered, the signal is sent out through a serial channel.

[0062] As described in the background section, servers also have interconnection applications, requiring adapter modules. Currently, due to the varying bandwidth of different GPUs, specific GPUs need to be mounted on specific server motherboards. These motherboards are then matched with specific adapter modules to lock the signal transmission between the GPU and the adapter. This not only results in different GPUs needing to be compatible with different server motherboards, leading to high development costs and inconvenience in maintenance and production, but also limits GPUs to supporting only one specific signal transmission method, hindering topology optimization.

[0063] In view of this, embodiments of this application provide a server, a server component, and a server cluster. The server is electrically connected to a switching module. The server includes a controller, a chip module, and a signal processing module. By sequentially and electrically connecting the chip module, signal processing module, and switching module, and electrically connecting the controller to both the switching module and the signal processing module, and configuring the controller to obtain the type of the switching module and configure the signal processing module according to the type of the switching module, the chip module can communicate with the switching module through the signal processing module. This prevents signal transmission between the chip module and the switching module from locking up. For different chip modules, the controller can configure the signal processing module according to the type of the switching module to achieve communication between the chip module and the switching module.

[0064] On the one hand, it allows the same server motherboard to be compatible with different types of chip modules, thereby saving on server motherboard development costs and facilitating server motherboard maintenance and production. On the other hand, it enables chip modules supporting multiple signal transmission methods to communicate and connect with different adapter modules, thereby facilitating the selection of a better topology and helping to save costs.

[0065] To make the above-mentioned objectives, features, and advantages of the embodiments of this application more apparent and understandable, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0066] Reference Figure 1As shown in the figure, this application embodiment provides a server component 300. The server component 300 includes a server 100A and a switching module 200. The server 100A includes a controller 111, a chip module 112, and a signal processing module 113. In one possible implementation, the server 100A may further include a first circuit board and a second circuit board. The controller 111 may be disposed on the first circuit board, and both the chip module 112 and the signal processing module 113 may be disposed on the second circuit board. The second circuit board may be the motherboard 110 of the server 100A. In other possible implementations, the first circuit board and the second circuit board are an integral structure, that is, the first circuit board and the second circuit board are combined into a single circuit board, which may be the motherboard 110 of the server 100A.

[0067] For example, controller 111 may be a baseboard management controller 111, or controller 111 may be other control devices that meet the requirements of the embodiments of this application. Chip module 112 may be a central processing unit module, or chip module 112 may be a graphics processing unit module, or chip module 112 may be other chip devices that meet the requirements of the embodiments of this application. Signal processing module 113 may be a digital signal processing chip (retimer chip), or signal processing module 113 may be a logic device, or signal processing module 113 may be other signal processing devices that meet the requirements of the embodiments of this application.

[0068] The chip module 112 in this embodiment of the application takes a graphics processor module as an example. The graphics processor module may include a graphics processor substrate and a graphics processor chip disposed on the graphics processor substrate. The graphics processor module is installed in an onboard manner, that is, the graphics processor substrate is provided with a female connector (male connector), and the motherboard 110 of the server 100A is provided with a male connector (female connector). The female connector and the male connector are plugged into each other to install the graphics processor module on the motherboard 110 of the server 100A, and the graphics processor substrate and the motherboard 110 of the server 100A are parallel to each other.

[0069] Chip module 112, signal processing module 113, and adapter module 200 are electrically connected in sequence. For example, chip module 112 can be electrically connected to the motherboard 110 of server 100A by soldering or other methods, and signal processing module 113 can be electrically connected to the motherboard 110 of server 100A by soldering or other methods. Chip module 112 and signal processing module 113 can be electrically connected via cables or wiring embedded within the motherboard 110 of server 100A. Signal processing module 113 and adapter module 200 can be electrically connected via cables.

[0070] The adapter module 200 may include a first type adapter module 210 and a second type adapter module 220. The first type adapter module 210 may be configured to support a four-level pulse amplitude modulation transmission protocol, and the second type adapter module 220 may be configured to support a non-return-to-zero transmission protocol.

[0071] The chip module 112 and the signal processing module 113 can transmit signals through 16 channels. The signal processing module 113 and the first type adapter module 210 can transmit signals through 8 channels, which helps reduce the number of cables, save costs, and facilitates operation and maintenance. The signal processing module 113 and the second type adapter module 220 can transmit signals through 16 channels.

[0072] In the first example, when the chip module 112 supports the four-level pulse amplitude modulation transmission protocol, the adapter module 200 can select the first type adapter module 210 so that the signal processing module 113 and the first type adapter module 210 can transmit 8 channels of signals, and the transmission protocol is the four-level pulse amplitude modulation transmission protocol.

[0073] In the second example, when the chip module 112 supports the non-return-to-zero transmission protocol, the adapter module 200 can select the second type adapter module 220 to enable 16-channel signal transmission between the signal processing module 113 and the second type adapter module 220, with the transmission protocol being the non-return-to-zero transmission protocol.

[0074] In the third example, when chip module 112 simultaneously supports both four-level pulse amplitude modulation (PTM) transmission protocol and non-return-to-zero (NRZ) transmission protocol, adapter module 200 can select the first type adapter module 210 to enable 8-channel signal transmission between signal processing module 113 and the first type adapter module 210, using the four-level pulse amplitude modulation (PTM) transmission protocol. Alternatively, adapter module 200 can select the second type adapter module 220 to enable 16-channel signal transmission between signal processing module 113 and the second type adapter module 220, using the NRZ transmission protocol. It is understood that adapter module 200 preferentially selects the first type adapter module 210, which helps save cables, facilitates maintenance, and thus reduces material and maintenance costs, resulting in a better topology.

[0075] The controller 111 is electrically connected to both the adapter module 200 and the signal processing module 113. For example, the controller 111 can be electrically connected to the motherboard 110 of the server 100A via soldering or other methods. The controller 111 and the signal processing module 113 can be electrically connected via cables or wiring embedded within the motherboard 110 of the server 100A. Alternatively, the controller 111 can be electrically connected to other circuit boards via soldering or other methods, and the controller 111 and the signal processing module 113 can be electrically connected via cables. The controller 111 and the adapter module 200 can be electrically connected directly or indirectly via cables.

[0076] The controller 111 is configured to acquire the type of the adapter module 200 and configure the signal processing module 113 according to the type of the adapter module 200, enabling the chip module 112 to communicate with the adapter module 200 through the signal processing module 113. For example, when the controller 111 acquires information that the adapter module 200 is a first-type adapter module 210, the controller 111 can configure the signal processing module 113 to switch its internal signal transmission to 8 channels and support a four-level pulse amplitude modulation transmission protocol. When the controller 111 acquires information that the adapter module 200 is a second-type adapter module 220, the controller 111 can configure the signal processing module 113 to switch its internal signal transmission to 16 channels and support a non-return-to-zero transmission protocol.

[0077] It should be noted that the types of the adapter module 200 include, but are not limited to, the two types mentioned above, and the transmission protocols include, but are not limited to, the two transmission protocols mentioned above. For example, the adapter module 200 may include at least two types, and each of the at least two types of adapter modules 200 can support at least two transmission protocols. The chip module 112 can support at least one of the at least two transmission protocols to ensure that the chip module 112 can select an appropriate adapter module 200 from the at least two types of adapter modules 200. This allows the controller 111 to configure the signal processing module 113 according to the type of the adapter module 200, enabling the chip module 112 to communicate with the adapter module 200 through the signal processing module 113.

[0078] The signal transmission method between the chip module and the adapter module in this embodiment is not locked. For different chip modules, the controller can configure the signal processing module according to the type of the adapter module to achieve communication between the chip module and the adapter module. On the one hand, this allows the same server motherboard to be compatible with different types of chip modules, thereby saving server motherboard development costs and facilitating server motherboard maintenance and production. On the other hand, it allows chip modules supporting multiple signal transmission methods to communicate and connect with different adapter modules, thereby facilitating the selection of a better topology and saving labor and maintenance costs.

[0079] Optionally, in this embodiment of the application, the number of chip modules 112 can be at least two, the number of signal processing modules 113 can be at least two, and the number of adapter modules 200 can be at least two. At least two chip modules 112, at least two signal processing modules 113, and at least two adapter modules 200 are electrically connected sequentially in a one-to-one correspondence. For example, the number of chip modules 112, the number of signal processing modules 113, and the number of adapter modules 200 can all be eight, with each of these eight modules electrically connected sequentially in a one-to-one correspondence. Of course, the number of chip modules 112, the number of signal processing modules 113, and the number of adapter modules 200 can also be set to four (as shown in the figure) or other values ​​according to actual needs, which will not be elaborated here.

[0080] Reference Figure 2 and Figure 3 As shown, the server 100A in the server component 300 of this application embodiment may further include a programmable logic device 114, which may be disposed on a second circuit board.

[0081] A programmable logic device (PLD) 114 is connected in series between the controller 111 and the adapter module 200. The PLD 114 is configured to detect the type of the adapter module 200 and transmit this information to the controller 111. For example, the PLD 114 can be electrically connected to the motherboard 110 of the server 100A via soldering or other means. When the controller 111 is electrically connected to the motherboard 110 of the server 100A, the PLD 114 and the controller 111 can be electrically connected via a cable or traces embedded within the motherboard 110 of the server 100A; alternatively, when the controller 111 is electrically connected to another circuit board, the PLD 114 and the controller 111 can be electrically connected via a cable. The PLD 114 and the adapter module 200 can also be electrically connected via a cable.

[0082] Reference Figure 2 As shown, in the server component 300 of this embodiment, the adapter module 200 is a first-type adapter module 210, and the chip module 112 is a chip module 112 supporting a four-level pulse amplitude modulation transmission protocol. A programmable logic device 114 is electrically connected to the adapter module 200 to detect the type of the adapter module 200. The programmable logic device 114 is also electrically connected to the controller 111 to transmit the type of the adapter module 200 to the controller 111. For example, the programmable logic device 114 can transmit the type of the adapter module 200 to the controller 111 via I2C, Local Bus, or other protocols.

[0083] The controller 111 is also electrically connected to the signal processing module 113 to configure the signal processing module 113 according to the type of the adapter module 200. For example, the controller 111 can configure the signal processing module 113 via MDIO, I2C, or other protocols. The chip module 112 is electrically connected to the signal processing module 113, and signal transmission between the chip module 112 and the signal processing module 113 occurs via 16 channels. Signal transmission between the signal processing module 113 and the first type adapter module 210 occurs via an 8-channel, four-level pulse amplitude modulation transmission protocol. The first type adapter module 210 also has an external interface for electrical connection to other servers or electronic devices.

[0084] Reference Figure 3 As shown, in the server component 300 of this embodiment, the switching module 200 is a second-type switching module 220, and the chip module 112 is a chip module 112 that supports the non-return-to-zero (NRZ) protocol. A programmable logic device 114 is electrically connected to the switching module 200 to detect the type of the switching module 200. The programmable logic device 114 is also electrically connected to the controller 111 to transmit the type of the switching module 200 to the controller 111. For example, the programmable logic device 114 can transmit the type of the switching module 200 to the controller 111 via I2C, Local Bus, or other protocols.

[0085] Controller 111 is also electrically connected to signal processing module 113 to configure signal processing module 113 according to the type of adapter module 200. For example, controller 111 can configure signal processing module 113 via MDIO, I2C, or other protocols. Chip module 112 is electrically connected to signal processing module 113, and signal transmission between chip module 112 and signal processing module 113 occurs via 16 channels. Signal processing module 113 also transmits signals with second-type adapter module 220 via 16 channels using a non-return-to-zero (NRZ) protocol. Second-type adapter module 220 also has an external interface for electrical connection to other servers or electronic devices.

[0086] Reference Figure 4 As shown, the controller 111 in the server component 300 of this application embodiment can also be electrically connected to the chip module 112. For example, when the controller 111 is electrically connected to the motherboard 110 of the server 100A, the controller 111 and the chip module 112 can be electrically connected through a cable or a trace embedded in the motherboard 110 of the server 100A; or, when the controller 111 is electrically connected to other circuit boards, the controller 111 and the chip module 112 can be electrically connected through a cable.

[0087] The controller 111 can be configured to acquire the type of the chip module 112 and configure the signal processing module 113 according to the type of the chip module 112 and the type of the adapter module 200, so that the chip module 112 can communicate with the adapter module 200 through the signal processing module 113. For example, the type of the chip module 112 can be classified according to the transmission protocol supported by the chip module 112.

[0088] Reference Figure 5 As shown, this application embodiment provides a server 100B, which has the same features as the server 100A in the server component 300 described above. The server 100B includes a controller 111, a chip module 112, and a signal processing module 113. In one possible implementation, the server 100B may further include a first circuit board and a second circuit board. The controller 111 may be disposed on the first circuit board, and both the chip module 112 and the signal processing module 113 may be disposed on the second circuit board. The second circuit board may be the motherboard 110 of the server 100B. In other possible implementations, the first circuit board and the second circuit board are an integral structure, that is, the first circuit board and the second circuit board are combined into a single circuit board, which may be the motherboard 110 of the server 100B.

[0089] For example, controller 111 may be a baseboard management controller 111, or controller 111 may be other control devices that meet the requirements of the embodiments of this application. Chip module 112 may be a central processing unit module, or chip module 112 may be a graphics processing unit module, or chip module 112 may be other chip devices that meet the requirements of the embodiments of this application. Signal processing module 113 may be a digital signal processing chip (retimer chip), or signal processing module 113 may be a logic device, or signal processing module 113 may be other signal processing devices that meet the requirements of the embodiments of this application.

[0090] The chip module 112 in this embodiment of the application takes a graphics processor module as an example. The graphics processor module may include a graphics processor substrate and a graphics processor chip disposed on the graphics processor substrate. The graphics processor module is installed in an onboard manner, that is, the graphics processor substrate is provided with a female connector (male connector), and the motherboard 110 of the server 100B is provided with a male connector (female connector). The female connector and the male connector are plugged into each other to install the graphics processor module on the motherboard 110 of the server 100B, and the graphics processor substrate and the motherboard 110 of the server 100B are parallel to each other.

[0091] Chip module 112 and signal processing module 113 are electrically connected. For example, chip module 112 can be electrically connected to the motherboard 110 of server 100B by means of soldering or similar methods, and signal processing module 113 can be electrically connected to the motherboard 110 of server 100B by means of soldering or similar methods. Chip module 112 and signal processing module 113 can be electrically connected via cables or traces embedded within the motherboard 110 of server 100B. Signal processing module 113 also has an external interface for electrical connection with adapter module 200. Up to 16 channels of signal transmission are possible between chip module 112 and signal processing module 113.

[0092] The controller 111 is electrically connected to the signal processing module 113. For example, the controller 111 can be electrically connected to the motherboard 110 of the server 100B by means of soldering or other methods. The controller 111 and the signal processing module 113 can be electrically connected via cables or traces embedded within the motherboard 110 of the server 100B. Alternatively, the controller 111 can be electrically connected to other circuit boards by means of soldering or other methods. The controller 111 and the signal processing module 113 can be electrically connected via cables. The controller 111 is also used to be electrically connected directly or indirectly to the adapter module 200. The controller 111 is configured to obtain the type of the adapter module 200 and configure the signal processing module 113 according to the type of the adapter module 200, enabling the chip module 112 to communicate with the adapter module 200 through the signal processing module 113.

[0093] Optionally, in this embodiment of the application, the number of chip modules 112 can be at least two, and the number of signal processing modules 113 can be at least two. The at least two chip modules 112 and the at least two signal processing modules 113 are electrically connected sequentially in a one-to-one correspondence. The at least two signal processing modules 113 are also used to be electrically connected sequentially in a one-to-one correspondence with the at least two adapter modules 200. For example, the number of chip modules 112 and the number of signal processing modules 113 can both be eight. The eight chip modules and the eight signal processing modules are electrically connected sequentially in a one-to-one correspondence, and the eight signal processing modules are also used to be electrically connected sequentially in a one-to-one correspondence with the eight adapter modules. Of course, the number of chip modules 112 and the number of signal processing modules 113 can also be set to four (as shown in the figure) or other values ​​according to actual needs, which will not be elaborated here.

[0094] Continue to refer to Figure 5 As shown, the server 100B in this embodiment may further include a programmable logic device 114, which may be disposed on a second circuit board.

[0095] A programmable logic device 114 is connected in series between the controller 111 and the adapter module 200. The programmable logic device 114 is configured to detect the type of the adapter module 200 and transmit this information to the controller 111. For example, the programmable logic device 114 can be electrically connected to the motherboard 110 of the server 100B by means of soldering or other methods. When the controller 111 is electrically connected to the motherboard 110 of the server 100B, the programmable logic device 114 and the controller 111 can be electrically connected via a cable or wiring embedded within the motherboard 110 of the server 100B; alternatively, when the controller 111 is electrically connected to another circuit board, the programmable logic device 114 and the controller 111 can be electrically connected via a cable. The programmable logic device 114 can also be used to electrically connect to the adapter module 200 via a cable.

[0096] Reference Figure 6 As shown, the controller 111 in the server 100B of this application embodiment can also be electrically connected to the chip module 112. For example, when the controller 111 is electrically connected to the motherboard 110 of the server 100B, the controller 111 and the chip module 112 can be electrically connected through a cable or a trace embedded in the motherboard 110 of the server 100B; or, when the controller 111 is electrically connected to other circuit boards, the controller 111 and the chip module 112 can be electrically connected through a cable.

[0097] The controller 111 can be configured to acquire the type of the chip module 112 and configure the signal processing module 113 according to the type of the chip module 112 and the type of the adapter module 200, so that the chip module 112 can communicate with the adapter module 200 through the signal processing module 113. For example, the type of the chip module 112 can be classified according to the transmission protocol supported by the chip module 112.

[0098] Since the server 100B provided in this application embodiment includes the server 100A in the server component 300 described above, the server 100B in this application embodiment also has the same effects as the server 100A in the server component 300 described above, which will not be repeated here.

[0099] Reference Figure 7 As shown, this application embodiment provides a server cluster. The server cluster includes the server component 300 and the server 100B described above. The adapter module of the server component 300 can be electrically connected to the server 100B. For example, the adapter module of the server component 300 can be electrically connected to the server 100B via a cable.

[0100] The server cluster provided in this application embodiment includes server component 300 and server 100B. By electrically connecting the adapter module of server component 300 to server 100B, server component 300 and server 100B can communicate with each other to obtain higher computing speed and performance.

[0101] Since the server cluster provided in this application embodiment includes the aforementioned server component 300, the server cluster in this application embodiment also has the same effects as the aforementioned server component 300, which will not be repeated here.

[0102] In the description of the embodiments of this application, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, an indirect connection through an intermediate medium, or the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of this application according to the specific circumstances.

[0103] The devices or elements referred to in the embodiments of this application or implied herein must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the embodiments of this application. In the description of the embodiments of this application, "a plurality of" means two or more, unless otherwise precisely specified.

[0104] The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the present application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms "may include" and "have," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0105] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of this application, and are not intended to limit them. Although the embodiments of this application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A server, characterized in that, Used for electrical connection with the adapter module; The server includes a controller, a chip module, and a signal processing module; The chip module, the signal processing module, and the adapter module are electrically connected in sequence; The controller is electrically connected to the adapter module and the signal processing module respectively. The controller is configured to obtain the type of the adapter module and configure the signal processing module according to the type of the adapter module, so that the chip module communicates with the adapter module through the signal processing module. The controller is also electrically connected to the chip module. The controller is configured to obtain the type of the chip module and configure the signal processing module according to the type of the chip module and the type of the adapter module, so that the chip module communicates with the adapter module through the signal processing module.

2. The server according to claim 1, characterized in that, It also includes a programmable logic device connected in series between the controller and the adapter module, the programmable logic device being configured to detect the type of the adapter module and transmit it to the controller.

3. The server according to claim 2, characterized in that, It also includes a first circuit board and a second circuit board, with the controller disposed on the first circuit board and the programmable logic device, the chip module and the signal processing module disposed on the second circuit board.

4. The server according to claim 3, characterized in that, The first circuit board and the second circuit board are an integral structure.

5. The server according to any one of claims 1-4, characterized in that, The number of chip modules is at least two, and the number of signal processing modules is at least two; the at least two chip modules and the at least two signal processing modules are electrically connected in a one-to-one correspondence.

6. The server according to any one of claims 1-4, characterized in that, The signal processing module includes one of a digital signal processing chip and a logic device; And / or, the chip module includes one of a central processing unit and a graphics processing unit.

7. The server according to claim 2, characterized in that, The controller includes a baseboard management controller; and / or, the programmable logic device includes a complex programmable logic device.

8. A server component, characterized in that, It includes a switching module and a server as described in any one of claims 1-7; the signal processing module and the controller of the server are both electrically connected to the switching module.

9. The server component according to claim 8, characterized in that, The switching module includes at least two types, and each of the at least two types of switching modules supports at least two transmission protocols. The server's chip module supports at least one of the two transmission protocols.

10. The server component according to claim 9, characterized in that, The switching module includes a first type of switching module and a second type of switching module; The first type of adapter module is configured to support a four-level pulse amplitude modulation transmission protocol; The second type of switching module is configured to support non-return-to-zero (NRZ) transmission protocols; The chip module supports at least one of the four-level pulse amplitude modulation transmission protocol and the non-return-to-zero transmission protocol.

11. The server component according to claim 10, characterized in that, When the chip module simultaneously supports the four-level pulse amplitude modulation transmission protocol and the non-return-to-zero transmission protocol, the adapter module is a first type of adapter module.

12. The server component according to any one of claims 8-11, characterized in that, The number of the adapter modules is at least two, and the at least two adapter modules are electrically connected to at least two signal processing modules of the server in a one-to-one correspondence.

13. A server cluster, characterized in that, Includes a server as described in any one of claims 1-7, and a server component as described in any one of claims 8-12; the server is electrically connected to the adapter module of the server component.

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