An in-situ interconnected sensing, storage and computing integrated device and its preparation method

Abstract

The present invention discloses an in-situ interconnected sensing, storage, and computing integrated device and a method for preparing the same. The in-situ interconnected sensing, storage, and computing integrated device comprises: a substrate having a first groove structure arranged at intervals; a neuromorphic device comprising a bottom electrode, a functional layer, and a top electrode, which are sequentially formed in the first groove structure; a first isolation layer formed on the top electrode of the neuromorphic device and having a plurality of spaced through holes; a second isolation layer formed on the substrate surface between the first groove structures; a bottom electrode of the sensor device, which fills the through holes and covers the surface of the first isolation layer and the substrate surface between the second isolation layer; second groove structures arranged at intervals, formed on the bottom electrode of the sensor device, the positions of the second groove structures corresponding to the positions of the through holes; a functional layer of the sensor device, formed on the bottom and sidewalls of the second groove structure; and a top electrode of the photoelectric sensor, formed on the functional layer of the sensor device and filling the second groove structure.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an in-situ interconnected sensing, storage and computing integrated device and a preparation method thereof. Background Art

[0002] Traditional storage and computing chips, both based on the von Neumann-style operating model, face the dilemma of physically separating the storage and information processing chips. On the one hand, there is a significant speed mismatch between the two, limiting further increases in processing speed. On the other hand, information needs to be transferred between the storage and information processing chips via a bus. Large amounts of data need to be frequently transferred between the two, significantly increasing transmission power consumption and limiting overall processing efficiency. This problem is particularly pronounced when processing large amounts of data. Inspired by the human brain, neuromorphic devices, with their integrated storage and computing capabilities and analog signal processing capabilities, can combine storage and computing functions within the same device unit and directly process analog signals. This has the potential to break through the limitations of traditional von Neumann-style chips, significantly improving storage and computing efficiency while reducing chip energy consumption. Therefore, the development of novel neuromorphic storage and computing devices is crucial for the design of low-power chips.

[0003] Traditional computing chips require interconnection with sensor units via external interconnects such as copper wires when processing signals. These two elements must undergo direct digital-to-analog conversion before information can be exchanged. This design significantly reduces chip processing efficiency and, as interconnect length increases, leads to additional power consumption and signal loss during signal transmission. Designing a novel in-situ interconnect and sensing-storage-computing integrated mode chip, coupled with the analog signal processing capabilities of neuromorphic devices, enables in-situ information transmission without additional signal conversion, significantly shortens the working distance between sensors and memory, and reduces chip energy consumption during information perception, processing, and storage. This approach has significant application value in the development of highly efficient integrated circuit chips. Summary of the Invention

[0004] The present invention discloses an integrated sensing, storage, and computing device with in-situ interconnection and a method for fabricating the same. This device utilizes in-situ interconnection to establish a direct, leadless connection between a neuromorphic device and a photoelectric sensor, enabling instant interaction between sensor signals and storage and computing signals. Leveraging the neuromorphic device's ability to directly process analog signals, it enables delay-free processing of sensor signals captured by the photoelectric sensor, significantly improving the chip's detection, processing, and storage efficiency. The device is suitable for building a novel integrated sensing, storage, and computing chip system.

[0005] The method for preparing an in-situ interconnected sensing, storage and computing integrated device includes the following steps: forming a first groove structure arranged at intervals in a substrate; sequentially growing a bottom electrode, a functional layer and a top electrode of a neuromorphic device, and a first isolation layer in the first groove structure to complete the filling of the first groove structure; forming a second isolation layer on the substrate surface between the first groove structures; etching a plurality of through holes distributed at intervals in the first isolation layer so that they penetrate the first isolation layer; forming a bottom electrode of the sensor device so that it fills the through holes and covers the surface of the first isolation layer and the substrate surface between the second isolation layer; forming a second groove structure arranged at intervals on the bottom electrode of the sensor device, the position of the second groove structure corresponding to the position of the through holes; forming a functional layer of the sensor device on the bottom and sidewalls of the second groove structure; forming a top electrode of a photoelectric sensor on the functional layer of the sensor device so that it fills the second groove structure, thereby completing the preparation of the in-situ interconnected sensing, storage and computing integrated device, and the photoelectric sensor directly vertically inputs the light signal into the neuromorphic device for processing and storage after collecting the light signal, thereby realizing the function of sensing, storage and computing integration.

[0006] In the method for preparing an in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the functional layer of the neuromorphic device is a hafnium-doped film.

[0007] In the method for preparing an in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the functional layer of the sensor device includes a first functional layer and a second functional layer, wherein the first functional layer is a nanosheet and the second functional layer is an inorganic perovskite nanocrystal.

[0008] In the method for preparing the in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the nanosheet is PtTe2, PtSe2, PdTe2, PdSe2, SnTe2 or SnSe2.

[0009] In the method for preparing the in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the inorganic perovskite nanocrystals are CsPbBr quantum dots, CsPbCl quantum dots or CsPbI quantum dots.

[0010] An in-situ interconnected sensing, storage and computing integrated device includes: a substrate, which is formed with a first groove structure arranged at intervals; a neuromorphic device, including a bottom electrode, a functional layer and a top electrode, which are formed in the first groove structure in sequence; a first isolation layer, which is formed on the top electrode of the neuromorphic device, completely fills the first groove structure, and is formed with a plurality of spaced through holes; a second isolation layer, which is formed on the substrate surface between the first groove structures; the bottom electrode of the sensor device, which fills the through holes and covers the substrate surface between the first isolation layer and the second isolation layer; the second groove structure is arranged at intervals, which is formed on the bottom electrode of the sensor device, and the position of the second groove structure corresponds to the position of the through holes; the functional layer of the sensor device is formed on the bottom and sidewalls of the second groove structure; the top electrode of the photoelectric sensor is formed on the functional layer of the sensor device and fills the second groove structure. After the photoelectric sensor collects the optical signal, it directly inputs it vertically into the neuromorphic device for processing and storage, thereby realizing the function of sensing, storage and computing integration.

[0011] In the in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the functional layer of the neuromorphic device is a hafnium-doped thin film.

[0012] In the in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the functional layer of the sensor device includes a first functional layer and a second functional layer, wherein the first functional layer is a nanosheet and the second functional layer is an inorganic perovskite nanocrystal.

[0013] In the in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the nanosheet is PtTe2, PtSe2, PdTe2, PdSe2, SnTe2 or SnSe2.

[0014] In the in-situ interconnected sensing, storage and computing integrated device of the present invention, preferably, the inorganic perovskite nanocrystals are CsPbBr quantum dots, CsPbCl quantum dots or CsPbI quantum dots.

[0015] Beneficial effects:

[0016] (1) Breaking the traditional von Neumann computing architecture, neuromorphic devices are introduced to achieve the effect of storage and computing integration, and analog signals can be directly calculated without adding additional digital-to-analog converters between sensors, which greatly improves the processing efficiency of the chip.

[0017] (2) Through in-situ interconnection, a leadless direct connection is achieved between the neuromorphic device and the optoelectronic sensor device, avoiding additional lead design and energy transmission loss, further improving the information processing efficiency of the system, and reducing the wiring complexity and energy consumption of the system.

[0018] (3) By constructing an integrated sensing, storage and computing device with in-situ interconnection, the expansion and integration of functions can be completed through three-dimensional interconnection without changing the physical position of the integrated circuit chip, realizing new information perception, transmission, processing and storage compatible with CMOS process, and opening up a new direction for high-performance instant interactive neuromorphic chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a flow chart of the method for preparing an in-situ interconnected sensing, storage and computing integrated device.

[0020] Figures 2 to 12 It is a structural schematic diagram of each stage of the in-situ interconnected sensing, storage and computing integrated device preparation method. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solutions and advantages of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. The described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0022] In the description of the present invention, it should be noted that the terms "upper," "lower," "vertical," and "horizontal," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0023] In addition, many specific details of the present invention are described below, such as device structure, materials, dimensions, processing techniques, and technologies, to facilitate a clearer understanding of the present invention. However, as will be appreciated by those skilled in the art, the present invention may be practiced without following these specific details. Unless otherwise noted below, various components of the device may be constructed from materials known to those skilled in the art, or materials with similar functions developed in the future may be used.

[0024] Figure 1 This is a flow chart of the method for preparing an in-situ interconnected sensing, storage and computing integrated device. Figure 1 As shown, the method for preparing an in-situ interconnected sensing, storage and computing integrated device includes the following steps:

[0025] Step S1: low-doped silicon is selected as the substrate 100, and a regularly arranged first groove structure 101 is etched on the substrate 100 by photolithography and reactive ion etching, deep plasma etching, ion milling etching, laser ablation or wet etching, etc., for preparing an in-situ interconnected sensing, storage and computing integrated device, such as Figure 2 The groove depth is 100-500nm, and the groove width is 100-300nm. The etching gas is preferably CF4, HBr, HCl, CHF3, SF4, etc.

[0026] Step S2, using photolithography and physical vapor deposition, electron beam evaporation, thermal evaporation, etc. to grow 10-20 nm of Pd in ​​the first groove structure 101 as the bottom electrode 102 of the neuromorphic device, as shown in FIG. Figure 3 As shown in the figure, the bottom electrode can be made of Pd, Pt, Au, Ti, Cr, Ni, Cu, Al, Zn, Ag, etc.

[0027] In step S3, a hafnium-doped thin film HfZrOx with a thickness of 5-10 nm is grown on the bottom electrode 102 by photolithography and atomic layer deposition, chemical vapor deposition, physical vapor deposition or pulsed laser deposition as the functional layer 103 of the neuromorphic device for realizing storage and computing, such as Figure 4 As shown in FIG. 4 , hafnium-based doped films may include HfZrOx, HfTiOx, HfAlOx, HfZnOx, HfLaOx, etc.

[0028] Step S4, using photolithography and physical vapor deposition, electron beam evaporation, thermal evaporation, etc., a 10-20 nm thick TiN is grown on the functional layer 103 of the neuromorphic device in the first groove structure as the top electrode 104 of the neuromorphic device to complete the preparation of the lower neuromorphic device. Figure 5 As shown in the figure, the top electrode can be made of TiN, TaN, MoN, WN, etc.

[0029] In step S5, a 75-550 nm thick aluminum oxide is grown on the top electrode 104 of the neuromorphic device as the first isolation layer 105 between the sensor device and the neuromorphic device by photolithography and atomic layer deposition, chemical vapor deposition, physical vapor deposition or pulsed laser deposition, etc., to complete the filling of the groove. Figure 6 As shown, the isolation layer film may be made of aluminum oxide, hafnium oxide, silicon dioxide, silicon nitride, silicon oxynitride, etc.

[0030] Step S6, using photolithography and atomic layer deposition, chemical vapor deposition, physical vapor deposition or pulsed laser deposition, etc., a layer of aluminum oxide with a thickness of 100-500 nm is grown between adjacent first groove structures on the silicon wafer substrate as a second isolation layer 106 for different integrated device units. Figure 7As shown, the isolation layer film may be made of aluminum oxide, hafnium oxide, silicon dioxide, silicon nitride, silicon oxynitride, etc.

[0031] In step S7, three through holes are etched on the first isolation layer 105 between the sensor device and the neuromorphic device by using photolithography and reactive ion etching, deep plasma etching, ion milling etching, laser ablation or wet etching. The through holes penetrate the first isolation layer and expose part of the top electrode 104 of the neuromorphic device, so as to realize in-situ interconnection between the sensor device and the neuromorphic device. Figure 8 The through-hole width is 30-90 nm, and the through-hole depth is 75-550 nm, which is consistent with the thickness of the first isolation layer between the sensor device and the neuromorphic device. The etching gas is preferably CF4, HBr, HCl, CHF3, SF4, etc.

[0032] Step S8, using organic vapor deposition, inkjet printing, spin coating, or pulsed laser deposition, etc., to grow a PEDOT:PSS layer with a thickness of 100-500 nm on the surface of the silicon wafer substrate and in the interconnected through-holes as the bottom electrode 107 of the sensor, so that it completely fills the through-holes and covers the surface of the silicon wafer substrate and the surface of the first isolation layer, as shown in FIG. Figure 9 The thickness of the sensor's bottom electrode must be less than or equal to the thickness of the second isolation layer. Electrode materials can include organic conductive polymers such as PEDOT:PSS, polyacetylene, polythiophene, polypyrrole, polyparaphenylene, polyaniline, and poly(p-phenylene vinylene).

[0033] Step S9, three second groove structures are etched on the bottom electrode 107 of the sensor device by photolithography and reactive ion etching, deep plasma etching, ion milling, laser ablation or wet etching. The positions of the second groove structures correspond to the positions of the through holes. The depth of the second groove structure is controlled to be 80-400nm, and the width is controlled to be 30-60nm. Then, PtTe2 nanosheets with a thickness of 10-20nm are grown on the bottom and sidewalls of the second groove structure by atomic layer deposition or chemical vapor deposition as the first functional layer 108 of the sensor device. Figure 10 The material of the first functional layer is PtTe2, PtSe2, PdTe2, PdSe2, SnTe2, SnSe2, etc.

[0034] Step S10, using photolithography and evaporation method, inkjet printing method, etc. to grow CsPbBr quantum dots with a thickness of 10-20nm on the first functional layer 108 of the sensor device as the second functional layer 109 of the sensor device, as shown in FIG. Figure 11As shown. The stack of the first functional layer 108 and the second functional layer 109 together serves as the functional layer material of the sensor. The material of the second functional layer is at least one or a mixture of inorganic perovskite nanocrystal materials such as CsPbBr quantum dots, CsPbCl quantum dots, and CsPbI quantum dots.

[0035] In step S11, a transparent ITO electrode is grown on the surface of the second groove and the sensor functional layer by photolithography, physical vapor deposition, electron beam evaporation, thermal evaporation, etc. as the top electrode 110 of the photoelectric sensor, thereby completing the preparation of an in-situ interconnected sensing, storage and computing integrated device. Figure 12 As shown. The highest point of the electrode's height exceeds the highest point of the second functional layer by 20-50nm, and the horizontal width of the electrode is guaranteed not to exceed the width of the second functional layer to prevent direct contact and leakage between the top and bottom electrodes of the sensor. After collecting the light signal, the photoelectric sensor directly inputs it vertically into the neuromorphic device for processing and storage, realizing the integrated function of sensing, storage and computing. The electrode can be a transparent thin film electrode such as ITO, In2O3, or Ag nanowire.

[0036] The present invention utilizes neuromorphic chips as integrated storage and computing devices, avoiding the problem of separation of storage devices and computing devices in traditional von Neumann chips, and directly constructs in-situ interconnected photoelectric sensor chips on the neuromorphic chip, greatly shortening the physical distance between the sensing unit and the computing unit, completing the design of an integrated device with integrated sensing, storage and computing, realizing direct information interaction, greatly improving the information processing efficiency of the device, and reducing the information conversion cost between different units and the energy consumption of the chip.

[0037] The above description is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with this technical field within the technical scope disclosed in the present invention should be covered by the scope of protection of the present invention.

Claims

1. A method for preparing an in-situ interconnected sensing, storage and computing integrated device, characterized in that: The following steps are involved: forming first groove structures arranged at intervals in the substrate; sequentially growing a bottom electrode, a functional layer, a top electrode, and a first isolation layer of a neuromorphic device in the first groove structure to complete filling of the first groove structure; forming a second isolation layer on the surface of the substrate between the first groove structures; Etching a plurality of through holes distributed at intervals in the first isolation layer so as to penetrate the first isolation layer; forming a bottom electrode of the sensor device so as to fill the through hole and cover the surface of the first isolation layer and the surface of the substrate between the second isolation layer; forming second groove structures arranged at intervals on the bottom electrode of the sensor device, wherein positions of the second groove structures correspond to positions of the through holes; forming a functional layer of a sensor device on the bottom and sidewalls of the second groove structure; A top electrode of the photoelectric sensor is formed on the functional layer of the sensor device so as to fill the second groove structure, thereby completing the preparation of an in-situ interconnected sensing, storage and computing integrated device. The photoelectric sensor collects the light signal and directly inputs it vertically into the neuromorphic device for processing and storage, realizing the integrated function of sensing, storage and computing. The functional layer of the neuromorphic device is a hafnium-doped thin film; the functional layer of the sensor device includes a first functional layer and a second functional layer, wherein the first functional layer is a nanosheet and the second functional layer is an inorganic perovskite nanocrystal; the nanosheet is PtTe2, PtSe2, PdTe2, PdSe2, SnTe2 or SnSe2.

2. The method for preparing an in-situ interconnected sensing, storage and computing integrated device according to claim 1, characterized in that: The inorganic perovskite nanocrystals are CsPbBr quantum dots, CsPbCl quantum dots or CsPbI quantum dots.

3. An in-situ interconnected sensing, storage and computing integrated device, characterized in that: include: A substrate having first groove structures arranged at intervals; A neuromorphic device comprising a bottom electrode, a functional layer and a top electrode, which are sequentially formed in the first groove structure, a first isolation layer formed on the top electrode of the neuromorphic device, completely filling the first groove structure and having a plurality of spaced-apart through holes; a second isolation layer formed on the surface of the substrate between the first groove structures; a bottom electrode of the sensor device, which fills the through hole and covers the surface of the first isolation layer and the surface of the substrate between the second isolation layer; Second groove structures arranged at intervals are formed on the bottom electrode of the sensor device, and positions of the second groove structures correspond to positions of the through holes; a functional layer of the sensor device, formed on the bottom and sidewalls of the second groove structure; The top electrode of the photosensor is formed on the functional layer of the sensor device and fills the second groove structure. The photoelectric sensor collects the light signal and directly inputs it vertically into the neuromorphic device for processing and storage, realizing the integrated function of sensing, storage and computing. The functional layer of the neuromorphic device is a hafnium-doped thin film; the functional layer of the sensor device includes a first functional layer and a second functional layer, wherein the first functional layer is a nanosheet and the second functional layer is an inorganic perovskite nanocrystal; the nanosheet is PtTe2, PtSe2, PdTe2, PdSe2, SnTe2 or SnSe2.

4. The in-situ interconnected sensing, storage and computing integrated device according to claim 3, characterized in that: The inorganic perovskite nanocrystals are CsPbBr quantum dots, CsPbCl quantum dots or CsPbI quantum dots.

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