A current mirror circuit and a current source

Abstract

This invention provides a current mirror circuit and a current source, comprising at least a current mirror module and a compensation module. The current mirror module copies the input current to its output terminal and outputs current to drive other subsystems. The compensation module is connected to the input terminal of the current mirror module. By introducing a first compensation current identical to the input current of the current mirror module and mirroring this first compensation current to the input terminal of the current mirror module, the ratio of the output current to the input current of the current mirror module is maintained at N:1, thereby improving the accuracy of the current mirror circuit. The mirroring factor of the first compensation current is (N+1):1, where N is greater than or equal to 1. The compensation module minimizes the negative impact of process angle and ambient temperature on the mirroring factor, thus improving the accuracy of the current mirror circuit. It has a simple structure and wide application.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design and application technology, and in particular to a current mirror circuit and a current source. Background Technology

[0002] A current mirror is used to mirror the input current so that the output current is at least twice the input current, and to provide the output current to drive other subsystems. In transistor-based current mirrors, the output current is easily affected by the transistor's process curve and ambient temperature, making it difficult to achieve the set mirror ratio.

[0003] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a current mirror circuit and a current source to solve the problem that, due to the influence of device process angle and ambient temperature, the current mirror is difficult to meet the set mirror ratio for current driving.

[0005] To achieve the above and other related objectives, the present invention provides a current mirror circuit, which includes at least: a current mirror module and a compensation module, wherein:

[0006] The current mirror module copies the input current to the output terminal and outputs current to drive other subsystems;

[0007] The compensation module is connected to the input terminal of the current mirror module. By introducing a first compensation current that is the same as the input current of the current mirror module, and copying the first compensation current to the input terminal of the current mirror module after a mirror operation, the ratio of the output current of the current mirror module to the input current of the current mirror module is maintained at N:1, thereby improving the accuracy of the current mirror circuit. The mirror operation of the first compensation current is performed by a factor of (N+1):1, where N is greater than or equal to 1.

[0008] Optionally, the current mirror module includes: a first current source, a first NPN transistor, and a second NPN transistor, wherein: the input terminal of the first current source is connected to the operating voltage to provide input current; the collector of the first NPN transistor is connected to the output terminal of the first current source, the base of the first NPN transistor is connected to the collector of the first NPN transistor, and the emitter of the first NPN transistor is connected to a reference ground; the base of the second NPN transistor is connected to the base of the first NPN transistor, and the emitter of the second NPN transistor is connected to a reference ground, wherein the current output through the collector of the second NPN transistor drives other subsystems.

[0009] Optionally, the compensation module includes: a first compensation unit and a second compensation unit, wherein: the first compensation unit introduces a first compensation current that is the same as the input current of the current mirror module; the second compensation unit is connected between the output terminal of the first compensation unit and the input terminal of the current mirror module, and is used to perform a mirror operation on the first compensation current to generate a second compensation current, and copy the second compensation current to the input terminal of the current mirror module.

[0010] Optionally, the first compensation unit includes: a second current source, a third NPN transistor, and a fourth NPN transistor, wherein: the input terminal of the second current source is connected to the operating voltage, providing a first compensation current that is the same as the input current of the current mirror module; the collector of the third NPN transistor is connected to the output terminal of the second current source, and the emitter of the third NPN transistor is connected to a reference ground; the base of the fourth NPN transistor is connected to the collector of the third NPN transistor, and the emitter of the fourth NPN transistor is connected to the base of the third NPN transistor.

[0011] Optionally, the third NPN transistor has the same parameters as the first NPN transistor.

[0012] Optionally, the current provided by the second current source is equal to the current provided by the first current source.

[0013] Optionally, the second compensation unit includes a third current source and a fourth current source, wherein: the input terminal of the third current source is connected to the operating voltage, and the output terminal of the third current source is connected to the collector of the fourth NPN transistor; the input terminal of the fourth current source is connected to the operating voltage, and the output terminal of the fourth current source is connected to the output terminal of the first current source, and the second compensation current is output through the fourth current source, wherein the ratio of the current provided by the third current source to the current provided by the fourth current source is 1:(N+1).

[0014] To achieve the above and other related objectives, the present invention provides a current source for providing current to drive other subsystems, the current source including at least one of the aforementioned current mirror circuits.

[0015] As described above, the current mirror circuit and current source of the present invention have the following beneficial effects:

[0016] 1) The current mirror circuit and current source of the present invention minimize the negative impact of process angle and ambient temperature on the mirror magnification based on the compensation module, thereby improving the accuracy of the current mirror circuit.

[0017] 2) The current mirror circuit and current source of the present invention have a simple structure and wide application. Attached Figure Description

[0018] Figure 1 The diagram shown is a schematic representation of an exemplary current mirror device of the present invention.

[0019] Figure 2 The diagram shown is a structural schematic of another exemplary current mirror device of the present invention.

[0020] Figure 3 The diagram shown is a schematic of the current mirror circuit of the present invention.

[0021] Explanation of reference numerals in the attached figures

[0022] 1. Current mirror circuit

[0023] 11 Compensation Module

[0024] 111 First Compensation Unit

[0025] 112 Second Compensation Unit

[0026] 12 Current Mirror Module Detailed Implementation

[0027] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0028] Please see Figures 1 to 3 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. The illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0029] Figure 1 A schematic diagram of a current mirror device is shown. The current provided by the current source Iin1 is divided into two branches. The first branch current Ic01 flows to the collector of NPN transistor Q01, and the second branch current Ib_tot1 flows to the base of NPN transistors Q01 and Q11. Wherein, Ic01 = Iin1 - Ib_tot1; Ib_tot1 = Ib01 + Ib11, where Ib01 is the base current of NPN transistor Q01 and Ib11 is the base current of NPN transistor Q11. According to the design principle of a current mirror, the desired ratio of the output current Iout1 to the input current (i.e., the current of the current source Iin1) is N1, where N1 is the mirror value and is greater than or equal to 1. However, in actual operation, due to the influence of the base currents of NPN transistors Q01 and Q11, the actual input current of the current mirror device is Ic01. Since Ic01 = Iin1 - Ib_tot1, the output current of the current mirror device is N1*(Iin1 - Ib_tot1). The ratio of N1*(Iin1 - Ib_tot1) to the current of the current source Iin1 is less than N1, resulting in the current mirror device not achieving the required mirroring operation of the current source Iin1. Therefore, with... Figure 1 The current mirror device on display, whether used as a load element or to provide bias current, causes a loss of performance in the entire circuit, thus limiting the application scenarios of the current mirror device.

[0030] Figure 2 A schematic diagram of another current mirror device is shown. The current provided by the current source Iin2 is divided into two branches. The first branch current Ic02 flows to the collector of NPN transistor Q02, and the second branch current Ib22 flows to the base of NPN transistor Q22, where Ic02 = Iin2 - Ib22; and Ic02=β Q02 *Ib02, where Ie22 represents the emitter current of the NPN transistor Q22, β Q22 Ib02 represents the amplification factor of NPN transistor Q22, Ib12 represents the base current of NPN transistor Q02, Ib12 represents the base current of NPN transistor Q12, and N2 is the ratio of the desired output current Iout2 to the input current (i.e., the current provided by the current source Iin2) of this current mirror device; that is, N2 is the mirror value. Furthermore, Thus, the output current Iout2 is obtained, where, β Q02 This represents the amplification factor of the NPN transistor Q02, because β is typically... Q02 With β Q22Both are relatively large, so the output current Iout2 is approximately equal to N2*Iin2. Therefore, the following method is adopted. Figure 2 The current mirror device shown can typically obtain a relatively accurate N2-fold current mirror.

[0031] However, adopting Figure 2 The prerequisite for the current mirror device shown to obtain an accurate current mirror is β. Q02 *(β Q22 +1) >> N2+1, meaning the value of the second branch current Ib22 is much smaller than the current provided by the current source Iin2. Therefore, only when N2 is relatively small or β Q02 With β Q22 Only with a sufficiently large current can a relatively accurate N² current mirror be obtained. However, the following conditions apply: Figure 2 The current mirror device shown will exhibit deviations, resulting in the inability to obtain a relatively accurate N² current mirror, including:

[0032] 1) When the process angle of the current mirror device changes or the ambient temperature rises, it will cause β to... Q02 With β Q22 A sharp decline.

[0033] 2) When the mirror factor N2 of the current mirror device is large, the prerequisite for obtaining an accurate current mirror cannot be met: β Q02 *(β Q22 +1)>>N2+1, at this time the value of the output current Iout2 is large, so NPN transistor Q22 needs to provide a larger base current to NPN transistor Q12. The increase of the base current Ib22 of NPN transistor Q22 will lead to an increase in the collector current of NPN transistor Q22. If the base current Ib22 of NPN transistor Q22 increases too much, it cannot be ignored compared with the current source Iin2.

[0034] 3) When the mirror factor N2 of the current mirror device is large, the collector current of the NPN transistor Q22 increases. When it exceeds a certain value, β Q22 It will decrease as the collector current of NPN transistor Q22 increases, which in turn causes the base current Ib22 of NPN transistor Q22 to increase even faster.

[0035] It's important to note that a process corner refers to the range within which the speed fluctuations of a transistor in an integrated circuit are limited to a rectangle defined by its four corners. The manufacturing process must ensure that the transistor's performance falls within this rectangular range; if it exceeds this range, the tested transistor is scrapped. This method ensures a high yield rate for transistor devices. More detailed explanations of the process corner's meaning will not be elaborated upon here.

[0036] Therefore, the present invention provides a current mirror circuit and a current source, as detailed below:

[0037] like Figure 3 As shown, this embodiment provides a current mirror circuit 1, which includes a current mirror module 12 and a compensation module 11, wherein:

[0038] like Figure 3 As shown, the current mirror module 12 copies the input current to the output terminal and outputs the current to drive other subsystems.

[0039] Specifically, as an example, the current mirror module 12 includes: a first current source Iin11, a first NPN transistor Q1, and a second NPN transistor Q2, wherein: the input terminal of the first current source Iin11 is connected to the operating voltage VDD to provide input current; the collector of the first NPN transistor Q1 is connected to the output terminal of the first current source Iin11, the base of the first NPN transistor Q1 is connected to the collector of the first NPN transistor Q1, and the emitter of the first NPN transistor Q1 is connected to the reference ground GND; the base of the second NPN transistor Q2 is connected to the base of the first NPN transistor Q1, and the emitter of the second NPN transistor Q2 is connected to the reference ground GND, wherein the collector of the second NPN transistor Q2 outputs current Iout3 to drive other subsystems.

[0040] It should be noted that the current provided by the first current source Iin11 is divided into two branches. The first branch current Ic1 flows to the collector of the first NPN transistor Q1, and the second branch current Ib1_tot flows to the bases of the first NPN transistor Q1 and the second NPN transistor Q2. Here, Ic1 = Iin11 - Ib1_tot; Ib1_tot = Ib1 + Ib2, where Ib1 is the base current of the first NPN transistor Q1, and Ib2 is the base current of the second NPN transistor Q2. According to... Figure 1 It can be seen that without the introduction of compensation module 11, due to the influence of the base currents of the first NPN transistor Q1 and the second NPN transistor Q2, the ratio of the output current Iout3 to the current of the first current source Iin11 is difficult to reach the designed N times current mirror, where N is greater than or equal to 1. The specific principles will not be elaborated here.

[0041] like Figure 3As shown, the compensation module 11 is connected to the input terminal of the current mirror module 12. By introducing a first compensation current identical to the input current of the current mirror module 12, and mirroring this first compensation current to the input terminal of the current mirror module 12, the ratio of the output current Iout3 of the current mirror module 12 to its input current is maintained at N:1 (i.e., N is the mirror value of the current mirror module 12, and also the mirror value of the current mirror circuit 1), thereby improving the accuracy of the current mirror circuit 1. The mirroring factor for the first compensation current is (N+1):1, where N is greater than or equal to 1. It should be noted that the input current of the current mirror module 12 is the current provided by the first current source Iin11.

[0042] Specifically, as an example, such as Figure 3 As shown, the compensation module 11 includes a first compensation unit 111 and a second compensation unit 112. The first compensation unit 111 introduces a first compensation current identical to the input current of the current mirror module 12 (the current provided by the first current source Iin11). The second compensation unit 112 is connected between the output terminal of the first compensation unit 111 and the input terminal of the current mirror module 12, and is used to mirror the first compensation current to generate a second compensation current, and copy the second compensation current to the input terminal of the current mirror module 12. It should be noted that the input terminal of the current mirror module 12 is the connection point between the first current source Iin11 and the collector of the first NPN transistor Q1.

[0043] More specifically, the first compensation unit 111 includes: a second current source Iin12, a third NPN transistor Q3, and a fourth NPN transistor Q4, wherein: the input terminal of the second current source Iin12 is connected to the operating voltage VDD, providing a first compensation current that is the same as the input current of the current mirror module 12 (i.e., the first compensation current is the current provided by the second current source Iin12, and the current provided by the second current source Iin12 is the same as the current provided by the first current source Iin11); the collector of the third NPN transistor Q3 is connected to the output terminal of the second current source Iin12, and the emitter of the third NPN transistor Q3 is connected to the reference ground GND; the base of the fourth NPN transistor Q4 is connected to the collector of the third NPN transistor Q3, and the emitter of the fourth NPN transistor Q4 is connected to the base of the third NPN transistor Q3, and the fourth NPN transistor Q4 is used to extract the base current of the third NPN transistor Q3. It should be noted that the current supplied by the second current source Iin12 is divided into two branches. Assuming the base current of the third NPN transistor Q3 is Ib3, the first branch current flows to the collector of the third NPN transistor Q3, and the second branch current flows to the base of the fourth NPN transistor Q4. The first branch current is (1+β) Q3 The second branch current is Ib3 / β. Q4Since the fourth NPN transistor Q4 is used to extract the base current of the third NPN transistor Q3, the current provided by the third current source Iin13 is approximately equal to the base current of the third NPN transistor Q3, which is Ib3, where β Q3 This is expressed as the amplification factor of the third NPN transistor Q3, β. Q4 This represents the amplification factor of the fourth NPN transistor Q4. Furthermore, the parameters of the third NPN transistor Q3 are the same as those of the first NPN transistor Q1. It should be further noted that the amplification factor of the third NPN transistor Q3 is equal to that of the first NPN transistor Q1; the current provided by the second current source Iin12 is equal to the current provided by the first current source Iin11. It should be further noted that the amplification factor of the third NPN transistor Q3 may not be equal to that of the first NPN transistor Q1, and the current provided by the second current source Iin12 may not be equal to that provided by the first current source Iin11. As long as the ratio of the output current Iout3 of the current mirror module 12 to the input current of the current mirror module 12 (the current provided by the first current source Iin11) can be maintained at N:1, the relationship between the amplification factor of any third NPN transistor Q3 and the amplification factor of the first NPN transistor Q1, as well as the relationship between the current provided by the second current source Iin12 and the current provided by the first current source Iin11, are all applicable and are not limited to this embodiment.

[0044] Specifically, as an example, such as Figure 3 As shown, the second compensation unit 112 includes a third current source Iin13 and a fourth current source Iin14, wherein: the input terminal of the third current source Iin13 is connected to the working voltage VDD, and the output terminal of the third current source Iin13 is connected to the collector of the fourth NPN transistor Q4; the input terminal of the fourth current source Iin14 is connected to the working voltage VDD, and the fourth current source Iin14 is connected to the output terminal of the first current source Iin11, and outputs a second compensation current through the fourth current source Iin14, wherein the ratio of the current provided by the third current source Iin13 to the current provided by the fourth current source Iin14 is 1:(N+1).

[0045] It should be noted that, as Figure 3 As shown, since the ratio of the current provided by the third current source Iin13 to the current provided by the fourth current source Iin14 is 1:(N+1), therefore, Iin14=(N+1)*Iin13=(N+1)*Ib3. Furthermore, the collector current Ic1 of the first NPN transistor Q1 in the current mirror module 12 is changed due to the compensation module 11. Since Ib2=N*Ib1, we can obtain:

[0046] Ic1=Iin11-Ib1_tot+Iin14=Iin11-(Ib1+Ib2)+Iin14=Iin11-(N+1)*(Ib1-Ib3); (1) At the same time, the current value provided by the first current source Iin11 can be derived, where Iin11=(1+β Q3 +1 / β Q4 Therefore, we can obtain Ib3 = Iin11 / (1+β)*Ib3. Q3 +1 / β Q4 ), and because β Q4 >>1, further deducing that Ib3 is approximately equal to Ib3=Iin11 / (1+β) Q3 When the current provided by the fourth current source Iin14 and the second branch current Ib1_tot in the current mirror module 12 can be completely canceled out, the relationship between the base current Ib1 of the first NPN transistor Q1 is: Ib1=Iin11 / (1+β) Q1 In this embodiment, the parameters of the third NPN transistor Q3 are the same as those of the first NPN transistor Q1, and the amplification factor β of the third NPN transistor Q3 can be obtained. Q3 The amplification factor β of the first NPN transistor Q1 Q1 Same, i.e., β Q3 =β Q1 Therefore, the base current Ib3 of the third NPN transistor Q3 is the same as the base current Ib1 of the first NPN transistor Q1, i.e., Ib3 = Ib1. According to the relationship (1), the collector current Ic1 of the first NPN transistor Q1 is the same as the current provided by the first current source Iin11, i.e., Ic1 = Iin11. Therefore, the relationship between the output current Iout3 of the current mirror module 12 in the current mirror circuit 1 and the first current source Iin11 is: Iout3 = N * Iin11. According to the derivation process, the output current Iout3 and the amplification factor β of the first NPN transistor Q1 are related. Q1 The amplification factor β of the third NPN transistor Q3 Q3 and the amplification factor β of the fourth NPN transistor Q4 Q4 Irrelevant.

[0047] In summary, the current mirror circuit provided in this embodiment is similar to... Figure 1 and Figure 2 Compared to the current mirror device provided, it has the following advantages:

[0048] 1) The influence of process corner on the current mirror circuit in this embodiment can be ignored because only the amplification factor β of the fourth NPN transistor Q4 is affected. Q4This will ultimately affect the mirroring accuracy of the current mirror circuit. However, the fourth NPN transistor Q4 does not provide current to the base of the first NPN transistor Q1 in the current mirror module (the current provided by the fourth current source Iin14 and the second branch current Ib1_tot in the current mirror module can completely cancel each other out). When the collector current of the fourth NPN transistor Q4 is not large, the amplification factor β can be obtained. Q4 A larger work area.

[0049] 2) The current mirror circuit in this embodiment is less affected by ambient temperature. Even if the ambient temperature rises, the amplification factor β of the fourth NPN transistor Q4 remains constant. Q4 When decreasing, as long as the following condition is met: 1 / β Q4 <<1+β Q3 This allows the current mirror circuit to obtain a very accurate mirror value N.

[0050] 3) The current mirror circuit in this embodiment can support a relatively large mirror value N. Figure 2 The current mirror device shown must satisfy the following relationship: β Q02 *(β Q22 +1)>>(N2+1), the larger N2 is, the greater the deviation of the current mirror device. However, the deviation of the current mirror circuit in this embodiment is not affected by the mirror value N.

[0051] This embodiment also provides a current source for providing current to drive other subsystems. The current source includes at least one current mirror circuit. The current source can be used as a load element or to provide bias current for use by other subsystems. Specific implementation details are not provided here.

[0052] In summary, the current mirror circuit and current source of the present invention include at least: a current mirror module and a compensation module, wherein: the current mirror module copies the input current to the output terminal and outputs current to drive other subsystems; the compensation module is connected to the input terminal of the current mirror module, and by introducing a first compensation current identical to the input current of the current mirror module, and copying the first compensation current to the input terminal of the current mirror module after a mirror operation, the ratio of the output current of the current mirror module to the input current of the current mirror module is maintained at N:1, thereby improving the accuracy of the current mirror circuit, wherein the mirror operation factor of the first compensation current is (N+1):1, and N is greater than or equal to 1. The current mirror circuit and current source of the present invention, based on the compensation module, minimize the negative impact of process angle and ambient temperature on the mirror factor, thereby improving the accuracy of the current mirror circuit. The current mirror circuit and current source of the present invention have a simple structure and wide application. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0053] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A current mirror circuit, characterized by, The current mirror circuit comprises at least a current mirror module and a compensation module, wherein: The current mirror module copies the input current to the output end and outputs the current to drive other subsystems; The compensation module is connected with the input end of the current mirror module, introduces the same first compensation current as the input current of the current mirror module, generates the second compensation current to the input end of the current mirror module, and maintains the ratio of the output current of the current mirror module to the input current of the current mirror module at N:1, so as to improve the accuracy of the current mirror circuit, wherein N is greater than or equal to 1; The compensation module comprises a first compensation unit and a second compensation unit; The first compensation unit comprises a second current source, a third NPN transistor and a fourth NPN transistor, wherein: the input end of the second current source is connected with the working voltage to provide the same first compensation current as the input current of the current mirror module; the collector of the third NPN transistor is connected with the output end of the second current source, and the emitter of the third NPN transistor is connected with the reference ground; the base of the fourth NPN transistor is connected with the collector of the third NPN transistor, and the emitter of the fourth NPN transistor is connected with the base of the third NPN transistor; The second compensation unit comprises a third current source and a fourth current source, wherein: the input end of the third current source is connected with the working voltage, and the output end of the third current source is connected with the collector of the fourth NPN transistor; the input end of the fourth current source is connected with the working voltage, and the output end of the fourth current source is connected with the input end of the current mirror module, so as to output the second compensation current through the fourth current source, wherein the ratio of the current provided by the third current source to the current provided by the fourth current source is 1:(N+1).

2. The current mirror circuit of claim 1, wherein: The current mirror module comprises: a first current source, a first NPN transistor and a second NPN transistor, wherein: the input end of the first current source is connected with the working voltage to provide the input current; the collector of the first NPN transistor is connected with the output end of the first current source, the base of the first NPN transistor is connected with the collector of the first NPN transistor, and the emitter of the first NPN transistor is connected with the reference ground; the base of the second NPN transistor is connected with the base of the first NPN transistor, and the emitter of the second NPN transistor is connected with the reference ground, wherein the current output through the collector of the second NPN transistor drives other subsystems.

3. The current mirror circuit of claim 2, wherein: The third NPN transistor has the same parameters as the first NPN transistor.

4. The current mirror circuit of claim 2, wherein: The current provided by the second current source is equal to the current provided by the first current source.

5. A current source for providing current drive to other subsystems, characterized by: The current source comprises at least one current mirror circuit according to any one of claims 1-4.

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