Bandgap reference circuits, chips, and electronic devices

Abstract

Embodiments of the present disclosure provide a bandgap reference circuit, chip, and electronic device. The bandgap reference circuit includes a bandgap reference core circuit, a current mirror circuit, a voltage control circuit, a current source circuit, and first and second shunt circuits. The bandgap reference core circuit generates a core current. The current mirror circuit generates a mirror current of the core current and provides the mirror current to the voltage control circuit via a first node. The voltage control circuit causes the voltage at the first node to have a negative temperature coefficient and controls the temperature change rate of the voltage at the first node based on the mirror current. The current source circuit generates a constant current. The first shunt circuit generates a first shunt based on the voltage at a third node and the constant current. The second shunt circuit generates a second shunt based on the voltage at the first node and the constant current and reduces the core current by the amount of the second shunt. The temperature change rate of the voltage at the third node is less than the temperature change rate of the voltage at the first node, resulting in the second shunt having a positive temperature coefficient.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of integrated circuit technology, and in particular, to a bandgap reference circuit, a chip, and an electronic device. Background Art

[0002] Bandgap reference circuits, as temperature-insensitive reference sources, are widely used in integrated circuits. Within a bandgap reference circuit, a voltage / current with a low temperature coefficient is achieved by superimposing a positive temperature coefficient voltage / current with a negative temperature coefficient voltage / current. However, existing bandgap reference circuits contain voltage / current with nonlinear temperature coefficients. To achieve a lower temperature coefficient voltage / current, in addition to compensating for the linear temperature coefficient term, higher-order curvature temperature compensation is also required. Summary of the Invention

[0003] The embodiments described herein provide a bandgap reference circuit, a chip, and an electronic device.

[0004] According to a first aspect of the present disclosure, a bandgap reference circuit is provided. The bandgap reference circuit includes a bandgap reference core circuit, a current mirror circuit, a voltage control circuit, a current source circuit, a first shunt circuit, and a second shunt circuit. The bandgap reference core circuit is configured to generate a core current and generate a reference voltage based on the core current. The current mirror circuit is configured to generate a mirror current of the core current and provide the mirror current to the voltage control circuit via a first node. The voltage control circuit is configured to give the voltage at the first node a negative temperature coefficient and control the temperature change rate of the voltage at the first node based on the mirror current. The current source circuit is configured to generate a constant current and provide the constant current to both the first and second shunt circuits via a second node. The first shunt circuit is configured to generate a first shunt based on the voltage at a third node and the constant current. The third node is a node within the bandgap reference core circuit with a negative temperature coefficient. The second shunt circuit is configured to generate a second shunt based on the voltage at the first node and the constant current, and provide the second shunt to the bandgap reference core circuit to reduce the core current by the magnitude of the second shunt. The temperature change rate of the voltage of the third node is smaller than the temperature change rate of the voltage of the first node, so that the second shunt has a positive temperature coefficient.

[0005] In some embodiments of the present disclosure, a bandgap reference core circuit includes: first to fifth transistors, first to fourth resistors, and an operational amplifier. The control electrode of the first transistor is coupled to the control electrode of the second transistor and the output terminal of the operational amplifier. The first electrode of the first transistor is coupled to a first voltage terminal. The second electrode of the first transistor is coupled to the first input terminal of the operational amplifier, the first terminal of the first resistor, and the first terminal of the second resistor. The first electrode of the second transistor is coupled to the first voltage terminal. The second electrode of the second transistor is coupled to the second input terminal of the operational amplifier, the first terminal of the third resistor, and the control electrode and second electrode of the fourth transistor. The control electrode of the third transistor is coupled to the second electrode of the third transistor and the second terminal of the second resistor. The first electrode of the third transistor is coupled to the second voltage terminal. The first electrode of the fourth transistor is coupled to the second voltage terminal. The second terminal of the first resistor is coupled to the second voltage terminal. The second terminal of the third resistor is coupled to the second voltage terminal. The control electrode of the fifth transistor is coupled to the control electrode of the first transistor. The first electrode of the fifth transistor is coupled to the first voltage terminal. The second electrode of the fifth transistor is coupled to the first terminal of the fourth resistor and the output voltage terminal. The second terminal of the fourth resistor is coupled to the second voltage terminal. The third node is any input terminal of the operational amplifier.

[0006] In some embodiments of the present disclosure, a current mirror circuit includes a sixth transistor, wherein a control electrode of the sixth transistor is coupled to a control electrode of the first transistor, a first electrode of the sixth transistor is coupled to a first voltage terminal, and a second electrode of the sixth transistor is coupled to a first node.

[0007] In some embodiments of the present disclosure, the voltage control circuit includes a seventh transistor, wherein a control electrode of the seventh transistor is coupled to a second electrode of the seventh transistor and a first node, and a first electrode of the seventh transistor is coupled to a second voltage terminal.

[0008] In some embodiments of the present disclosure, the current source circuit includes an eighth transistor, wherein a control electrode of the eighth transistor is coupled to the control electrode of the first transistor, a first electrode of the eighth transistor is coupled to the first voltage terminal, and a second electrode of the eighth transistor is coupled to the second node.

[0009] In some embodiments of the present disclosure, the first shunt circuit includes a ninth transistor, wherein a control electrode of the ninth transistor is coupled to the third node, and a first electrode of the ninth transistor is coupled to the second node.

[0010] A second electrode of the ninth transistor is coupled to the first node.

[0011] In some embodiments of the present disclosure, the second shunt circuit includes: a tenth transistor and an eleventh transistor. The control electrode of the tenth transistor is coupled to the first node. The first electrode of the tenth transistor is coupled to the second node. The second electrode of the tenth transistor is coupled to the second input of the operational amplifier. The control electrode of the eleventh transistor is coupled to the first node. The first electrode of the eleventh transistor is coupled to the second node. The second electrode of the eleventh transistor is coupled to the first input of the operational amplifier.

[0012] According to a second aspect of the present disclosure, a bandgap reference circuit is provided. The bandgap reference circuit includes: first to eleventh transistors, first to fourth resistors, and an operational amplifier. The control electrode of the first transistor is coupled to the control electrode of the second transistor and the output terminal of the operational amplifier. The first electrode of the first transistor is coupled to a first voltage terminal. The second electrode of the first transistor is coupled to a first input terminal of the operational amplifier, a first terminal of a first resistor, and a first terminal of a second resistor. The first electrode of the second transistor is coupled to the first voltage terminal. The second electrode of the second transistor is coupled to the second input terminal of the operational amplifier, a first terminal of a third resistor, and the control electrode and second electrode of a fourth transistor. The control electrode of the third transistor is coupled to the second electrode of the third transistor and the second terminal of the second resistor. The first electrode of the third transistor is coupled to the second voltage terminal. The first electrode of the fourth transistor is coupled to the second voltage terminal. The second terminal of the first resistor is coupled to the second voltage terminal. The second terminal of the third resistor is coupled to the second voltage terminal. The control electrode of the fifth transistor is coupled to the control electrode of the first transistor. The first electrode of the fifth transistor is coupled to the first voltage terminal. The second electrode of the fifth transistor is coupled to the first terminal of the fourth resistor and the output voltage terminal. The second terminal of the fourth resistor is coupled to the second voltage terminal. The control electrode of the sixth transistor is coupled to the control electrode of the first transistor. The first electrode of the sixth transistor is coupled to the first voltage terminal. The second electrode of the sixth transistor is coupled to the control electrode and the second electrode of the seventh transistor. The first electrode of the seventh transistor is coupled to the second voltage terminal. The control electrode of the eighth transistor is coupled to the control electrode of the first transistor. The first electrode of the eighth transistor is coupled to the first voltage terminal. The second electrode of the eighth transistor is coupled to the first electrode of the ninth transistor, the first electrode of the tenth transistor, and the first electrode of the eleventh transistor. The control electrode of the ninth transistor is coupled to any one input terminal of the operational amplifier. The second electrode of the ninth transistor is coupled to the second electrode of the sixth transistor. The control electrode of the tenth transistor is coupled to the control electrode of the eleventh transistor and the second electrode of the sixth transistor. The second electrode of the tenth transistor is coupled to the second input terminal of the operational amplifier. The second electrode of the eleventh transistor is coupled to the first input terminal of the operational amplifier.

[0013] According to a third aspect of the present disclosure, a chip is provided, which includes the bandgap reference circuit according to the first aspect or the second aspect of the present disclosure.

[0014] According to a fourth aspect of the present disclosure, an electronic device is provided, comprising the chip according to the third aspect of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It should be noted that the drawings described below only relate to some embodiments of the present disclosure and are not intended to limit the present disclosure.

[0016] Figure 1 is an exemplary circuit diagram of a bandgap reference circuit;

[0017] Figure 2 is used for Figure 1 Waveform diagrams of some signals of the bandgap reference circuit shown;

[0018] Figure 3 is a schematic block diagram of a bandgap reference circuit according to an embodiment of the present disclosure;

[0019] Figure 4 is an exemplary circuit diagram of a bandgap reference circuit according to an embodiment of the present disclosure; and

[0020] Figure 5 is used for Figure 4 Waveforms of some signals of the bandgap reference circuit shown.

[0021] In the drawings, reference numerals having the same last two digits correspond to the same elements. It should be noted that the elements in the drawings are schematic and not drawn to scale. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.

[0023] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal manner unless otherwise explicitly defined herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together either directly or through one or more intermediate components.

[0024] In all embodiments of the present disclosure, since the source and drain of the metal oxide semiconductor (MOS) transistor are symmetrical, and the conduction current directions between the source and drain of the N-type transistor and the P-type transistor are opposite, in the embodiments of the present disclosure, the controlled middle end of the MOS transistor is referred to as the control electrode, and the other two ends of the MOS transistor are referred to as the first electrode and the second electrode, respectively. In addition, for the convenience of unified expression, in this context, the base of the bipolar transistor (BJT) is referred to as the control electrode, the emitter of the BJT is referred to as the first electrode, and the collector of the BJT is referred to as the second electrode. In addition, terms such as "first" and "second" are only used to distinguish one component (or a part of a component) from another component (or another part of a component).

[0025] Figure 1 An exemplary circuit diagram of a bandgap reference circuit 100 is shown. Figure 1 In the example, transistors M1, M2, Q3, Q4, M5, resistors R1, R2, R3, R4, and op amp Amp form the bandgap reference core circuit. Transistors M6, Q7, R5, and R6 form the compensation circuit. Transistors M1, M2, and M5 are PMOS transistors. Transistors Q3, Q4, and Q7 are NPN bipolar transistors.

[0026] The current flowing through transistor M5 (i.e., the current flowing through transistor M1 or M2) is core current Icore. Core current Icore flows through resistor R4, thereby generating reference voltage Vref at the first terminal of resistor R4. Transistor M6 generates a mirror current of the current flowing through transistor M1. By setting the resistance values ​​of resistor R5 and resistor R6 to be equal, the currents flowing through resistor R5 and resistor R6 can be equal. Figure 1 I NL Indicates. Transistor Q3, transistor Q4, and transistor Q7 are NPN bipolar transistors, and their base-emitter voltages have negative temperature coefficients. Since the two input terminals of op amp Amp are virtually shorted, the voltages at the two input terminals are equal. Therefore, the voltages across resistor R2 both have negative temperature coefficients. By setting the parameters of transistor Q3 and transistor Q4, the current I flowing through resistor R2 can be PATA Has a positive temperature coefficient. The current I flowing through the resistor R2 PATA =Equal to the current flowing through transistor Q3 and transistor Q4 respectively. Since the base emitter voltage of transistor Q4 has a negative temperature coefficient, the current flowing through resistor R3 has a negative temperature coefficient. The current I flowing through transistor Q4 PATA The temperature coefficient of the current flowing through the resistor R3 is opposite to that of the current flowing through the transistor M1 or the transistor M2, so that the temperature coefficient of the current flowing through the transistor M1 or the transistor M2 is smaller than that of the current IPATA The temperature coefficient of transistor Q7 is smaller, so the current I CT The temperature coefficient is smaller.

[0027] According to the characteristics of bipolar transistors, the smaller the temperature coefficient of the current flowing through the bipolar transistor, the greater the temperature change rate of the base-emitter voltage of the bipolar transistor. Therefore, the temperature change rate of the base-emitter voltage of transistor Q7 is greater than the temperature change rate of the base-emitter voltage of transistor Q4. In other words, as the temperature rises, the base voltage of transistor Q7 drops faster than the base voltage of transistor Q4. Therefore, the current I NL Has a positive temperature coefficient. Current I NL The flow direction is as follows Figure 1 Reference Figure 2 It can be seen that when the core current Icore has a negative temperature coefficient, the current I NL The purpose of curvature compensation can be achieved. Compared with the core current Icore before compensation, the core current Icorr after compensation changes less with the temperature T, and is therefore more stable.

[0028] However, due to differences in component materials and processes, the core current Icore of the bandgap reference circuit 100 may have a positive temperature coefficient. Figure 1 The bandgap reference circuit 100 shown can only compensate for the core current Icore (corresponding to the reference voltage with a negative temperature coefficient) that has a negative temperature coefficient before compensation. If the core current Icore (corresponding to the reference voltage with a positive temperature coefficient) is to be compensated, it is necessary to change Icore to NL becomes a negative temperature coefficient or makes Figure 1 Medium current I NL The direction of the current is reversed. This cannot be achieved by changing the resistance values ​​of resistors R5 and R6, so Figure 1 The structure shown cannot compensate for a reference voltage with a positive temperature coefficient.

[0029] Embodiments of the present disclosure provide a bandgap reference circuit capable of compensating a reference voltage with a positive temperature coefficient. Figure 3 A schematic block diagram of a bandgap reference circuit 300 according to an embodiment of the present disclosure is shown, which includes a bandgap reference core circuit 310 , a current mirror circuit 320 , a voltage control circuit 330 , a current source circuit 340 , a first shunt circuit 350 , and a second shunt circuit 360 .

[0030] The bandgap reference core circuit 310 is coupled to the current mirror circuit 320, the first shunt circuit 350, and the second shunt circuit 360. The bandgap reference core circuit 310 is configured to generate a core current Icore and generate a reference voltage Vref according to the core current Icore.

[0031] The current mirror circuit 320 is coupled to the bandgap reference core circuit 310. The current mirror circuit 320 is coupled to the voltage control circuit 330 and the second shunt circuit 360 via the first node N1. The current mirror circuit 320 is configured to generate a mirror current I of the core current Icore. CT , and provides a mirror current I to the voltage control circuit 330 via the first node N1. CT .

[0032] The voltage control circuit 330 is coupled to the current mirror circuit 320 and the second shunt circuit 360 via the first node N1. The voltage control circuit 330 is configured to: make the voltage of the first node N1 have a negative temperature coefficient, and CT To control the temperature change rate of the voltage of the first node N1. In some embodiments of the present disclosure, the mirror current I CT The temperature coefficient of the mirror current I CT The lower the temperature coefficient of φ, the higher the temperature change rate of the voltage of the first node N1.

[0033] The current source circuit 340 is coupled to the first shunt circuit 350 and the second shunt circuit 360 via the second node N2. The current source circuit 340 is configured to generate a constant current I SUM , and provides a constant current I to both the first shunt circuit 350 and the second shunt circuit 360 via the second node N2. SUM . Constant current I SUM The sum of the currents flowing through the first shunt circuit 350 and the second shunt circuit 360 is defined.

[0034] The first shunt circuit 350 is configured to: SUM To generate the first branch I NT1 The third node N3 is a node with a negative temperature coefficient in the bandgap reference core circuit 310 .

[0035] The second shunt circuit 360 is configured to: SUM To generate the second branch I NT2 and provides a second shunt current I to the bandgap reference core circuit 310 NT2 So that the core current Icore is reduced by the second shunt I NT2 The temperature change rate of the voltage of the third node N3 is smaller than the temperature change rate of the voltage of the first node N1, so that the second shunt I NT2 Has a positive temperature coefficient.

[0036] Since the temperature change rate of the voltage of the third node N3 is smaller than the temperature change rate of the voltage of the first node N1, the first shunt I NT1 The temperature change rate is less than that of the second branch I NT2 The temperature change rate. In the first branch I NT1 With the second shunt I NT2 The sum of the constant current I SUM In the case of the first shunt I NT1 With the second shunt I NT2 The size ratio changes as the temperature increases. NT1 Descending and the second shunt I NT2 So the second branch I NT2 By subtracting the second shunt current I from the core current Icore NT2 The size of can make the core current Icore with a positive temperature coefficient (corresponding to the reference voltage Vref with a positive temperature coefficient) compensated by the negative temperature coefficient term, thereby making the output of the bandgap reference circuit 300 more stable.

[0037] In some embodiments of the present disclosure, the bandgap reference circuit 300 may further include a startup circuit (in Figure 3 (not shown). The startup circuit is coupled to the bandgap reference core circuit 310 and is configured to provide a startup current to the bandgap reference core circuit 310 during a startup phase. The startup circuit may stop providing the startup current after the bandgap reference circuit 300 enters a stable operating state. Since the startup circuit is a common circuit in bandgap reference circuits, it will not be further described in this disclosure.

[0038] Figure 4An exemplary circuit diagram of a bandgap reference circuit 400 according to an embodiment of the present disclosure is shown. The bandgap reference core circuit 410 includes: first to fifth transistors M1, M5, first to fourth resistors R1, R4, and an op amp (Amp). The control electrode of the first transistor M1 is coupled to the control electrode of the second transistor M2 and the output terminal of the op amp (Amp). The first electrode of the first transistor M1 is coupled to a first voltage terminal (V1). The second electrode of the first transistor M1 is coupled to a first input terminal of the op amp (Amp), the first terminal of the first resistor R1, and the first terminal of the second resistor R2. The first electrode of the second transistor M2 is coupled to the first voltage terminal (V1). The second electrode of the second transistor M2 is coupled to the second input terminal of the op amp (Amp), the first terminal of the third resistor R3, and the control electrode and second electrode of the fourth transistor Q4. The control electrode of the third transistor Q3 is coupled to the second electrode of the third transistor Q3 and the second terminal of the second resistor R2. The first electrode of the third transistor Q3 is coupled to the second voltage terminal (V2). The first electrode of the fourth transistor Q4 is coupled to the second voltage terminal (V2). The second terminal of the first resistor R1 is coupled to the second voltage terminal (V2). The second end of the third resistor R3 is coupled to the second voltage terminal V2. The control electrode of the fifth transistor M5 is coupled to the control electrode of the first transistor M1. The first electrode of the fifth transistor M5 is coupled to the first voltage terminal V1. The second electrode of the fifth transistor M5 is coupled to the first end of the fourth resistor R4 and the output voltage terminal Vref. The second end of the fourth resistor R4 is coupled to the second voltage terminal V2. In some embodiments of the present disclosure, the third node N3 is any one of the input terminals of the operational amplifier Amp. Figure 4 In the example of FIG, the third node N3 is the inverting input terminal of the operational amplifier Amp. However, those skilled in the art will appreciate that the third node N3 may also be the non-inverting input terminal of the operational amplifier Amp.

[0039] The current mirror circuit 420 includes a sixth transistor M6 , wherein a control electrode of the sixth transistor M6 is coupled to the control electrode of the first transistor M1 , a first electrode of the sixth transistor M6 is coupled to the first voltage terminal V1 , and a second electrode of the sixth transistor M6 is coupled to the first node N1 .

[0040] The voltage control circuit 430 includes a seventh transistor Q7 , wherein a control electrode of the seventh transistor Q7 is coupled to a second electrode of the seventh transistor Q7 and the first node N1 , and a first electrode of the seventh transistor Q7 is coupled to the second voltage terminal V2 .

[0041] The current source circuit 440 includes an eighth transistor M8. The control electrode of the eighth transistor M8 is coupled to the control electrode of the first transistor M1. The first electrode of the eighth transistor M8 is coupled to the first voltage terminal V1. The second electrode of the eighth transistor M8 is coupled to the second node N2. Figure 4In the example of , the current flowing through the eighth transistor M8 can be made smaller than the current flowing through the first transistor M1 by setting the ratio of the width-to-length ratio of the eighth transistor M8 to the width-to-length ratio of the first transistor M1. Figure 4 In an alternative embodiment, the control electrode of the eighth transistor M8 may also be coupled to the bias voltage terminal. The magnitude of the bias voltage from the bias voltage terminal can be set so that the current flowing through the eighth transistor M8 is less than the current flowing through the first transistor M1. The current flowing through the eighth transistor M8 can be specifically set according to the magnitude of the current to be compensated. In some embodiments of the present disclosure, the current flowing through the eighth transistor M8 is less than one percent of the current flowing through the first transistor M1.

[0042] The first shunting INT1 circuit 450 includes a ninth transistor M9 , wherein a control electrode of the ninth transistor M9 is coupled to the third node N3 , a first electrode of the ninth transistor M9 is coupled to the second node N2 , and a second electrode of the ninth transistor M9 is coupled to the first node N1 .

[0043] The second shunt INT2 circuit 460 includes a tenth transistor M10 and an eleventh transistor M11. The control electrode of the tenth transistor M10 is coupled to the first node N1. A first electrode of the tenth transistor M10 is coupled to the second node N2. A second electrode of the tenth transistor M10 is coupled to the second input terminal of the operational amplifier Amp. The control electrode of the eleventh transistor M11 is coupled to the first node N1. A first electrode of the eleventh transistor M11 is coupled to the second node N2. A second electrode of the eleventh transistor M11 is coupled to the first input terminal of the operational amplifier Amp.

[0044] exist Figure 4 In the example, a high voltage signal is input from the first voltage terminal V1, and the second voltage terminal V2 is grounded. The first transistor M1, the second transistor M2, the fifth transistor M5, the sixth transistor M6, the eighth transistor M8 to the eleventh transistor M11 are PMOS transistors. The third transistor Q3, the fourth transistor Q4 and the seventh transistor Q7 are NPN bipolar transistors. The first input terminal of the operational amplifier Amp is the non-inverting input terminal of the operational amplifier Amp. The second input terminal of the operational amplifier Amp is the inverting input terminal of the operational amplifier Amp. The resistance value of the first resistor R1 is equal to the resistance value of the third resistor R3. Those skilled in the art should understand that based on the above-mentioned inventive concept, Figure 4 The variation of the circuit shown should also fall within the scope of protection of the present disclosure. In this variation, the above-mentioned transistor and voltage terminal may also have the same Figure 4 Examples of different setups are shown.

[0045] exist Figure 4In the example, the third transistor Q3, the fourth transistor Q4, and the seventh transistor Q7 are NPN bipolar transistors, and their base-emitter voltages have negative temperature coefficients. Since the two input terminals of the op amp are virtually shorted, the voltages at the two input terminals are equal. Therefore, the voltages across the second resistor R2 both have negative temperature coefficients. By setting the parameters of the third transistor Q3 and the fourth transistor Q4, the current I flowing through the second resistor R2 can be PATA The current I flowing through the second resistor R2 has a positive temperature coefficient. PATA =Equal to the current flowing through the third transistor Q3 and the fourth transistor Q4 respectively. Since the base emitter voltage of the fourth transistor Q4 has a negative temperature coefficient, the current flowing through the third resistor R3 has a negative temperature coefficient. The current I flowing through the fourth transistor Q4 PATA The temperature coefficient of the current flowing through the third resistor R3 is opposite to that of the current flowing through the first transistor M1 or the second transistor M2, so that the temperature coefficient of the current flowing through the first transistor M1 or the second transistor M2 is smaller than that of the current I PATA The temperature coefficient of the seventh transistor Q7 is smaller, so the current I CT The temperature coefficient is smaller.

[0046] According to the characteristics of bipolar transistors, the smaller the temperature coefficient of the current flowing through the bipolar transistor, the greater the temperature change rate of the base-emitter voltage of the bipolar transistor. Therefore, the temperature change rate of the base-emitter voltage of the seventh transistor Q7 (the voltage of the first node N1) is greater than the temperature change rate of the base-emitter voltage of the fourth transistor Q4 (the voltage of the third node N3). Figure 5 It can be seen that as the temperature T increases, the voltage V N1 The voltage V N3 Since the first node N1 is coupled to the gates of the tenth transistor M10 and the eleventh transistor M11, and the third node N3 is coupled to the gate of the ninth transistor M9, the current I flowing through the tenth transistor M10 and the eleventh transistor M11 is NT2 The rising rate of change is greater than the current I flowing through the ninth transistor M9 NT1 The rising rate of change. Since the current I NT2 and current I NT1 The sum is a constant current, current I NT2 and current I NT1 The change in the ratio causes the current I NT2 The current I NT1 This makes the current I NT2 It has a positive temperature coefficient. According to the voltage-current relationship of the MOS transistor (the temperature coefficient of the current is the square of the temperature coefficient of the voltage), the current I NT2 Has a nonlinear positive temperature coefficient.

[0047] The current I NT2 Before compensation, the core current Icore of the bandgap reference circuit is equal to the current I flowing through the fourth transistor Q4. PATA and the current flowing through the third resistor R3. After compensation, the core current Icore of the bandgap reference circuit is equal to the current I flowing through the fourth transistor Q4. PATA The sum of the current flowing through the third resistor R3 minus the current I NT2 This is equivalent to the core current Icore being reduced by the current I NT2 That is, the change in core current Icore is Figure 5 I shown NT2 '. refer to Figure 5 It can be seen that the compensated current Icorr (Icorr=Icore+I NT2 ') Compared with the core current Icore before compensation, it is more stable.

[0048] The embodiments of the present disclosure further provide a chip. The chip includes a bandgap reference circuit according to the embodiments of the present disclosure. The chip is, for example, a power management chip.

[0049] An embodiment of the present disclosure further provides an electronic device. The electronic device includes a chip according to an embodiment of the present disclosure. The electronic device is, for example, a smart terminal device such as a tablet computer, a smart phone, etc.

[0050] In summary, the bandgap reference circuit according to the embodiment of the present disclosure can perform temperature compensation of a reference voltage with a positive temperature coefficient with a high-order curvature, thereby making the reference voltage output by the bandgap reference circuit more stable.

[0051] Unless the context clearly indicates otherwise, as used herein and in the appended claims, the singular includes the plural, and vice versa. Thus, when referring to the singular, the plural of the corresponding term is generally included. Similarly, the words "include" and "comprising" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it follows a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0052] Further aspects and scope of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present application can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended to be illustrative only and are not intended to limit the scope of the present application.

[0053] Several embodiments of the present disclosure have been described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The scope of protection of the present disclosure is defined by the appended claims.

Claims

1. A bandgap reference circuit, comprising: a bandgap reference core circuit, a current mirror circuit, a voltage control circuit, a current source circuit, a first shunt circuit, and a second shunt circuit, Wherein, the bandgap reference core circuit is configured to: generate a core current, and generate a reference voltage according to the core current; The current mirror circuit is configured to: generate a mirror current of the core current and provide the mirror current to the voltage control circuit via a first node; The voltage control circuit is configured to: make the voltage of the first node have a negative temperature coefficient, and control the temperature change rate of the voltage of the first node according to the mirror current; The current source circuit is configured to: generate a constant current and provide the constant current to both the first shunt circuit and the second shunt circuit via a second node; The first shunt circuit is configured to generate a first shunt according to a voltage of a third node and the constant current, wherein the third node is a node with a negative temperature coefficient in the bandgap reference core circuit; The second shunt circuit is configured to: generate a second shunt according to the voltage of the first node and the constant current, and provide the second shunt to the bandgap reference core circuit so that the core current is reduced by the magnitude of the second shunt; The temperature change rate of the voltage of the third node is smaller than the temperature change rate of the voltage of the first node, so that the second shunt has a positive temperature coefficient.

2. The bandgap reference circuit according to claim 1, wherein: The bandgap reference core circuit includes: first to fifth transistors, first to fourth resistors, and an operational amplifier. wherein the control electrode of the first transistor is coupled to the control electrode of the second transistor and the output terminal of the operational amplifier, the first electrode of the first transistor is coupled to the first voltage terminal, and the second electrode of the first transistor is coupled to the first input terminal of the operational amplifier, the first terminal of the first resistor, and the first terminal of the second resistor; A first electrode of the second transistor is coupled to the first voltage terminal, and a second electrode of the second transistor is coupled to the second input terminal of the operational amplifier, a first terminal of the third resistor, and a control electrode and a second electrode of the fourth transistor; A control electrode of the third transistor is coupled to the second electrode of the third transistor and the second end of the second resistor, and a first electrode of the third transistor is coupled to the second voltage end; The first electrode of the fourth transistor is coupled to the second voltage terminal; The second end of the first resistor is coupled to the second voltage end; The second end of the third resistor is coupled to the second voltage end; a control electrode of the fifth transistor coupled to the control electrode of the first transistor, a first electrode of the fifth transistor coupled to the first voltage terminal, and a second electrode of the fifth transistor coupled to the first terminal of the fourth resistor and the output voltage terminal; The second end of the fourth resistor is coupled to the second voltage end; The third node is any input terminal of the operational amplifier.

3. The bandgap reference circuit according to claim 2, wherein: The current mirror circuit includes: a sixth transistor, The control electrode of the sixth transistor is coupled to the control electrode of the first transistor, the first electrode of the sixth transistor is coupled to the first voltage terminal, and the second electrode of the sixth transistor is coupled to the first node.

4. The bandgap reference circuit according to any one of claims 1 to 3, wherein: The voltage control circuit includes: a seventh transistor, The control electrode of the seventh transistor is coupled to the second electrode of the seventh transistor and the first node, and the first electrode of the seventh transistor is coupled to the second voltage terminal.

5. The bandgap reference circuit according to any one of claims 2 to 3, wherein: The current source circuit includes: an eighth transistor, The control electrode of the eighth transistor is coupled to the control electrode of the first transistor, the first electrode of the eighth transistor is coupled to the first voltage terminal, and the second electrode of the eighth transistor is coupled to the second node.

6. The bandgap reference circuit according to any one of claims 1 to 3, wherein: The first shunt circuit includes: a ninth transistor, The control electrode of the ninth transistor is coupled to the third node, the first electrode of the ninth transistor is coupled to the second node, and the second electrode of the ninth transistor is coupled to the first node.

7. The bandgap reference circuit according to any one of claims 2 to 3, wherein: The second shunt circuit includes: a tenth transistor and an eleventh transistor, Wherein, the control electrode of the tenth transistor is coupled to the first node, the first electrode of the tenth transistor is coupled to the second node, and the second electrode of the tenth transistor is coupled to the second input terminal of the operational amplifier; A control electrode of the eleventh transistor is coupled to the first node, a first electrode of the eleventh transistor is coupled to the second node, and a second electrode of the eleventh transistor is coupled to the first input terminal of the operational amplifier.

8. A bandgap reference circuit, comprising: first to eleventh transistors, first to fourth resistors, and an operational amplifier, wherein the control electrode of the first transistor is coupled to the control electrode of the second transistor and the output terminal of the operational amplifier, the first electrode of the first transistor is coupled to the first voltage terminal, and the second electrode of the first transistor is coupled to the first input terminal of the operational amplifier, the first terminal of the first resistor, and the first terminal of the second resistor; A first electrode of the second transistor is coupled to the first voltage terminal, and a second electrode of the second transistor is coupled to the second input terminal of the operational amplifier, a first terminal of the third resistor, and a control electrode and a second electrode of the fourth transistor; A control electrode of the third transistor is coupled to the second electrode of the third transistor and the second end of the second resistor, and a first electrode of the third transistor is coupled to the second voltage end; The first electrode of the fourth transistor is coupled to the second voltage terminal; The second end of the first resistor is coupled to the second voltage end; The second end of the third resistor is coupled to the second voltage end; a control electrode of a fifth transistor coupled to the control electrode of the first transistor, a first electrode of the fifth transistor coupled to the first voltage terminal, and a second electrode of the fifth transistor coupled to the first terminal of the fourth resistor and the output voltage terminal; The second end of the fourth resistor is coupled to the second voltage end; a control electrode of a sixth transistor coupled to the control electrode of the first transistor, a first electrode of the sixth transistor coupled to the first voltage terminal, and a second electrode of the sixth transistor coupled to the control electrode and second electrode of the seventh transistor; The first electrode of the seventh transistor is coupled to the second voltage end; a control electrode of an eighth transistor coupled to the control electrode of the first transistor, a first electrode of the eighth transistor coupled to the first voltage terminal, and a second electrode of the eighth transistor coupled to the first electrode of the ninth transistor, the first electrode of the tenth transistor, and the first electrode of the eleventh transistor; The control electrode of the ninth transistor is coupled to any one input terminal of the operational amplifier, and the second electrode of the ninth transistor is coupled to the second electrode of the sixth transistor; The control electrode of the tenth transistor is coupled to the control electrode of the eleventh transistor and the second electrode of the sixth transistor, and the second electrode of the tenth transistor is coupled to the second input terminal of the operational amplifier; The second electrode of the eleventh transistor is coupled to the first input terminal of the operational amplifier.

9. A chip comprising: The bandgap reference circuit according to any one of claims 1 to 8.

10. An electronic device comprising: The chip according to claim 9.

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