Fault repair method, device, electronic equipment and storage medium

Abstract

The present invention discloses a fault repair method, device, electronic device and storage medium. The method comprises: if it is in the current extensible firmware interface pre-initialization stage, then obtaining the base address of the preset base address register of the H2B device; obtaining the fault address information and the first information check value according to the base address; wherein the fault address information and the first information check value are stored in the preset storage location corresponding to the preset base address register; performing a preset check operation on the fault address information to obtain the second information check value, and determining whether to perform the fault repair operation according to the first information check value and the second information check value. By running the technical solution provided by the embodiment of the present invention, fault handling is performed without entering the SMM mode; and it can avoid the problem that when the fault address information changes after storage, the fault handling cannot be performed, or the fault is not handled correctly if the fault address information is still used, thereby improving the accuracy and effectiveness of fault handling.

Description

Technical Field

[0001] The present invention relates to computer technology, and in particular to a fault repair method, device, electronic equipment and storage medium. Background Art

[0002] H2B (Host to BMC) device is a device in BMC (Baseboard Management Controller) used to exchange messages and data between BMC and Host, and the device adopts PCIe (Peripheral Component Interconnect Express) protocol.

[0003] When correctable and uncorrectable errors occur in the memory of the H2B device, they need to be repaired. The existing repair method is to save the fault address in the SMM (System Management Mode), read the fault address at the next restart or next boot, and execute the fault repair process. However, SMM only supports BIOS (Basic Input Output System) access and is not accessible under the operating system. Therefore, if the fault needs to be repaired, BIOS access is required, which can easily affect system performance. Summary of the invention

[0004] The present invention provides a fault repair method, device, electronic equipment and storage medium to improve the applicability and accuracy of fault repair.

[0005] According to one aspect of the present invention, a fault recovery method is provided, comprising:

[0006] If the current extensible firmware interface is in the pre-initialization phase, the base address of the preset base address register of the H2B device is obtained;

[0007] Acquire fault address information and a first information check value according to the base address; wherein the fault address information and the first information check value are stored in a preset storage location corresponding to the preset base address register;

[0008] A preset verification operation is performed on the fault address information to obtain a second information verification value, and it is determined whether to perform a fault repair operation according to the first information verification value and the second information verification value.

[0009] Optionally, the acquiring the fault address information and the first information check value according to the base address includes:

[0010] Locating the preset storage location according to the base address and preset space information of the preset storage location;

[0011] The fault address information and the first information check value are obtained from the preset storage location.

[0012] The advantage of this setting is that the specific location of the preset storage location is determined by the preset space information, which facilitates accurate and timely positioning of the preset storage location according to the base address, without the need to query the fault address information and the first information verification value from all memory areas, thereby improving the efficiency of obtaining the fault address information and the first information verification value.

[0013] Optionally, before obtaining the base address of the preset base address register of the H2B device if the current extensible firmware interface pre-initialization phase is in progress, the method further includes:

[0014] If a memory fault is detected, obtaining the fault address information of the memory fault;

[0015] The preset verification operation is performed on the fault address information to obtain the first information verification value, and the fault address information and the first information verification value are stored in the preset storage location corresponding to the preset base address register.

[0016] The advantage of such a setting is that if a memory fault is detected, the fault address information of the memory fault is obtained, so that the fault can be promptly processed according to the fault address information, thereby improving the efficiency of fault processing. A preset check operation is performed on the fault address information to obtain a first information check value, and the currently obtained fault address information is checked in time to obtain a corresponding check value, so as to facilitate subsequent verification of whether the fault address information has changed, thereby avoiding the problem that the fault repair fails if the fault address information is not found to have changed when the fault address information is used later, thereby improving the effectiveness and accuracy of fault repair. The fault address information and the first information check value are both stored in the preset storage location corresponding to the preset base address register, so that the fault address information and the first information check value can be uniformly obtained later, thereby improving the efficiency of information acquisition.

[0017] Optionally, after storing the fault address information and the first information check value in the preset storage location corresponding to the preset base address register, the method further includes:

[0018] Backing up the fault address information and the first information check value to a preset non-volatile memory;

[0019] If a power failure event occurs, the fault address information and the first information check value are read from the preset non-volatile memory to the preset storage location after the power failure event ends.

[0020] The advantage of such a setting is that if the memory type corresponding to the preset storage location is a volatile memory and there is a power outage, the information stored in the preset storage location may be lost, resulting in information loss. By backing up the fault address information and the first information check value to the preset non-volatile memory, even if there is a power outage, the fault address information and the first information check value read from the preset non-volatile memory can still be restored to the preset storage location, thereby improving the effectiveness of information storage.

[0021] Optionally, after determining whether to perform a fault repair operation according to the first information check value and the second information check value, the method further includes:

[0022] If the fault repair operation is performed, then in the driver execution environment phase after the fault repair operation is completed, updating the base address;

[0023] The fault address information and the first information check value in the preset storage location are cleared.

[0024] The advantages of this setting are: updating the base address so that corresponding changes can be made in time when the base address changes, thereby improving the effectiveness of subsequent fault information storage. The fault address information and the first information check value stored in the preset storage location are cleared to avoid the fault information of the processed fault still being stored in the preset storage location, occupying the storage space; at the same time, it is avoided that the fault information of the processed fault is repeatedly read when processing the fault in the next operation stage, thereby reducing the fault processing efficiency.

[0025] Optionally, the preset storage location is located in a shared memory space between the host end and the baseboard management controller end.

[0026] The advantage of this arrangement is that both the host side and the baseboard management controller side can read and write data from the preset storage location, which improves the flexibility of data reading and writing, and improves the convenience and efficiency of interaction between the host side and the baseboard management controller side.

[0027] According to another aspect of the present invention, there is provided a fault repair device, the device comprising:

[0028] A base address acquisition module, used for acquiring a base address of a preset base address register of an H2B device if the current extensible firmware interface pre-initialization phase is in progress;

[0029] An information acquisition module, used for acquiring fault address information and a first information check value according to the base address; wherein the fault address information and the first information check value are stored in a preset storage location corresponding to the preset base address register;

[0030] The repair operation execution determination module is used to perform a verification operation on the fault address information to obtain a second information verification value, and determine whether to execute a fault repair operation according to the first information verification value and the second information verification value.

[0031] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0032] at least one processor; and

[0033] a memory communicatively connected to the at least one processor; wherein,

[0034] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the fault repair method described in any embodiment of the present invention.

[0035] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the fault repair method described in any embodiment of the present invention when executed.

[0036] The technical solution of the embodiment of the present invention stores both the fault address information and the first information check value in a preset storage location corresponding to the preset base address register, so that the fault address information and the first information check value can be uniformly obtained through the base address of the preset base address register of the H2B device, thereby improving the efficiency of information acquisition. A preset check operation is performed on the fault address information to obtain the second information check value, and whether to perform the fault repair operation is determined based on the first information check value and the second information check value, so that the fault is processed without entering the SMM mode, and the fault address information is prevented from being changed due to errors after storage or malicious changes by humans. If the fault address information is still used, it may cause the inability to process the fault, or the fault processing error does not process the actual fault, thereby improving the accuracy and effectiveness of the fault processing.

[0037] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 A flowchart of a fault repair method provided in Embodiment 1 of the present invention;

[0039] Figure 2 A flowchart of a fault repair method provided in Embodiment 2 of the present invention;

[0040] Figure 3 A schematic diagram of the structure of a fault repair device provided in Embodiment 3 of the present invention;

[0041] Figure 4 It is a schematic diagram of the structure of an electronic device used to implement an embodiment of the present invention. DETAILED DESCRIPTION

[0042] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0043] It should be noted that the terms "first", "second", "target", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0044] Embodiment 1

[0045] Figure 1 This is a flowchart of a fault repair method provided in the first embodiment of the present invention. This embodiment is applicable to repairing correctable and uncorrectable errors in memory of H2B devices. The method can be executed by the fault repair device provided in the embodiment of the present invention, and the device can be implemented in software and / or hardware. Figure 1 , the fault repair method provided in this embodiment includes:

[0046] Step 110: If the current eFFI pre-initialization phase is in progress, then the base address of the preset base address register of the H2B device is obtained.

[0047] Among them, the Extensible Firmware Interface Pre-initialization (PEI) stage is used to wake up the CPU and initialize the memory. The current Extensible Firmware Interface Pre-initialization stage is the PEI stage experienced during the current restart or boot. If it is in the current Extensible Firmware Interface Pre-initialization stage, the memory space corresponding to the preset base address register is allocated to the H2B device, so as to obtain the base address of the preset base address register of the H2B (Host to BMC) device; the preset base address register (Base Address Register, BAR) can be BAR0, which is not limited in this embodiment; the base address of the preset base address register is the address stored in the preset base address register, which can be directly obtained by accessing the preset base address register.

[0048] Step 120: Obtain fault address information and a first information check value according to the base address; wherein the fault address information and the first information check value are stored in a preset storage location corresponding to a preset base address register.

[0049] The fault address information is the address information obtained after locating the address that generates the memory fault through the BIOS (Basic Input Output System) code when the system has a memory fault in the previous operation stage, and can be row address information. The first information check value is a value obtained after a check operation is performed on the fault address information. The fault address information and the first information check value are pre-stored in a preset storage position corresponding to a preset base address register, wherein the preset storage position is a preset position accessible through a preset base address register, such as a portion of the memory space accessible through a preset base address register, etc. There is a preset mapping relationship between the memory space and the preset base address register; wherein the memory space can be any space for storing data in the H2B device, and this embodiment does not limit this.

[0050] Obtaining the fault address information and the first information verification value according to the base address can determine the location of the memory space according to the base address, and then determine the location of the fault address information and the first information verification value in the memory space according to the preset storage location to obtain the fault address information and the first information verification value stored therein.

[0051] Optionally, obtaining the fault address information and the first information check value according to the base address includes:

[0052] Locating the preset storage location according to the base address and preset space information of the preset storage location;

[0053] Fault address information and a first information check value are obtained from a preset storage location.

[0054] Among them, the preset space information can be information related to the space occupied by the preset storage location in the memory space. The space information may include the space size and space position. For example, if the memory space is 32M in total, the space information can be the last 16M of the memory space occupied by the preset storage location. This embodiment does not limit this.

[0055] The preset storage location is located according to the base address and the preset space information. For example, if the preset space information is that the preset storage location occupies the last 16M space of the memory space, the starting address of the memory space is determined according to the base address, and then the last 16M space of the memory space where the preset storage location is located is determined according to the preset space information and the starting address, thereby obtaining the pre-stored fault address information and the first information verification value from the last 16M space of the memory space.

[0056] The advantage of this setting is that the specific location of the preset storage location is determined by the preset space information, which facilitates accurate and timely positioning of the preset storage location according to the base address, without the need to query the fault address information and the first information verification value from all memory areas, thereby improving the efficiency of obtaining the fault address information and the first information verification value.

[0057] Step 130: Perform a preset verification operation on the fault address information to obtain a second information verification value, and determine whether to perform a fault repair operation based on the first information verification value and the second information verification value.

[0058] A preset check operation is performed on the acquired fault address information, wherein the preset check operation may be a CRC (Cyclic Redundancy Check), which is not limited in this embodiment. The preset check operation used when obtaining the first information check value and the second information check value is the same.

[0059] The second information verification value currently obtained is compared with the first information verification value obtained from the preset storage location. If they are consistent, it is determined to perform a fault repair operation based on the fault address information; if they are inconsistent, the fault repair operation can be skipped, or an error report can be performed. This embodiment does not limit this.

[0060] Optionally, after determining whether to perform a fault repair operation according to the first information check value and the second information check value, the method further includes:

[0061] If a fault recovery operation is performed, then in the driver execution environment phase after the fault recovery operation is completed, the base address is updated;

[0062] The fault address information and the first information check value in the preset storage location are cleared.

[0063] The Driver execution environment (DXE) phase is used to initialize the execution environment of the hardware driver on the server.

[0064] In the driver execution environment stage, the base address is updated, and if the base address changes, it is changed; and the fault address information and the first information check value stored in the preset storage location are cleared to remove the redundant information in the preset storage location. When a memory fault occurs in the current operation stage, the address where the memory fault occurs is stored in the memory space currently corresponding to the preset base address register, so as to facilitate processing in the next operation stage.

[0065] The advantages of this setting are: updating the base address so that corresponding changes can be made in time when the base address changes, thereby improving the effectiveness of subsequent fault information storage. The fault address information and the first information check value stored in the preset storage location are cleared to avoid the fault information of the processed fault still being stored in the preset storage location, occupying the storage space; at the same time, it is avoided that the fault information of the processed fault is repeatedly read when processing the fault in the next operation stage, thereby reducing the fault processing efficiency.

[0066] The technical solution provided in this embodiment stores both the fault address information and the first information check value in a preset storage location corresponding to the preset base address register, so that the fault address information and the first information check value can be uniformly obtained through the base address of the preset base address register of the H2B device, thereby improving the efficiency of information acquisition. A preset check operation is performed on the fault address information to obtain the second information check value, and whether to perform a fault repair operation is determined based on the first information check value and the second information check value, thereby avoiding the situation where the fault address information is changed due to errors after storage or malicious human modification, etc. If the fault address information is still used, it may cause the inability to perform fault processing, or the fault processing error does not handle the actual fault, thereby improving the accuracy and effectiveness of fault processing.

[0067] The existing repair method is to repair the system under SMM through memory PPR (Post Package Repair) technology. However, the SMM mode only supports BIOS access and is not accessible under the operating system. Therefore, if the fault needs to be repaired, BIOS access is required, which can easily affect system performance. Therefore, the functions related to error handling can be implemented through the platform runtime mechanism (Platform Runtime Mechanism, PRM). However, the memory PPR technology needs to save the fault address information during the running stage, and the saving behavior needs to be performed in the SMM mode. The technical solution of this embodiment can be used to handle the fault without entering the SMM mode, solve the above problems, and implement the application of memory PPR technology in PRM for fault repair.

[0068] Embodiment 2

[0069] Figure 2 This is a flowchart of a fault repair method provided in Embodiment 2 of the present invention. This technical solution is to provide a supplementary explanation of the process before obtaining the base address of the preset base address register of the H2B device if the current extensible firmware interface is in the pre-initialization stage. Compared with the above solution, this solution is specifically optimized to include: before obtaining the base address of the preset base address register of the H2B device if the current extensible firmware interface is in the pre-initialization stage, the following is also included:

[0070] If a memory fault is detected, the fault address information of the memory fault is obtained;

[0071] A preset check operation is performed on the fault address information to obtain a first information check value, and the fault address information and the first information check value are stored in a preset storage location corresponding to a preset base address register. Specifically, the flowchart of the fault repair method is as follows: Figure 2 As shown:

[0072] Step 210: If a memory fault is detected, then obtain the fault address information of the memory fault.

[0073] A predetermined BIOS driver is run during the operating system running phase to obtain address information of where a memory failure occurs if a memory failure is detected, wherein the address information may be a row address, and the memory failure may include correctable errors and uncorrectable errors, which are not limited in this embodiment.

[0074] Step 220: Perform a preset check operation on the fault address information to obtain a first information check value, and store the fault address information and the first information check value in a preset storage location corresponding to a preset base address register.

[0075] A preset check operation is performed on the acquired fault address information. The preset check operation may be CRC, which is not limited in this embodiment.

[0076] The fault address information and the first information check value are stored in a preset storage location corresponding to the preset base address register.

[0077] Since the H2B device is disabled by default and needs to be enabled by the BMC, the preset storage location and storage format of the fault address information can be determined by the BMC enabling the H2B device through negotiation between the BIOS and the BMC. The preset storage location can be the last 16M space of the memory space corresponding to the preset base address register of the H2B device; the storage format can continue to use the format of saving addresses in the SMM mode, or change to a new format, which is not limited in this embodiment.

[0078] Optionally, after storing the fault address information and the first information check value in a preset storage location corresponding to a preset base address register, the method further includes:

[0079] Backing up the fault address information and the first information check value to a preset non-volatile memory;

[0080] If a power failure event occurs, the fault address information and the first information check value are read from the preset non-volatile memory to a preset storage location after the power failure event ends.

[0081] The fault address information and the first information check value are backed up to a preset non-volatile memory, wherein the non-volatile memory is a memory in which the stored data does not disappear after the current stops. The preset non-volatile memory can be any designated non-volatile memory in the H2B device or externally connected, and this embodiment does not limit this.

[0082] A power outage event is an event in which the H2B device loses power due to power damage, power failure, etc. If a power outage event occurs, the fault address information and the first information check value are read from the preset non-volatile memory to a preset storage location after the power outage event ends.

[0083] The advantage of such a setting is that if the memory type corresponding to the preset storage location is a volatile memory and there is a power outage, the information stored in the preset storage location may be lost, resulting in information loss. By backing up the fault address information and the first information check value to the preset non-volatile memory, even if there is a power outage, the fault address information and the first information check value read from the preset non-volatile memory can still be restored to the preset storage location, thereby improving the effectiveness of information storage.

[0084] Optionally, the preset storage location is located in a shared memory space between the host side and the baseboard management controller side.

[0085] The H2B device maps a preset size of space in the baseboard management controller Dram (dynamic random access memory) to a preset base address register, and uses this space as a shared memory space, that is, the host side can access the baseboard management controller Dram through the preset base address register, and the baseboard management controller itself can also access it; the shared memory space is used for data exchange between the host side and the baseboard management controller side.

[0086] The preset storage location may be a partial area in the shared memory space. For example, if the shared memory space is 32M, the preset storage location may be the last 16M in the shared memory space.

[0087] The advantage of this arrangement is that both the host side and the baseboard management controller side can read and write data from the preset storage location, which improves the flexibility of data reading and writing, and improves the convenience and efficiency of interaction between the host side and the baseboard management controller side.

[0088] Step 230: If the current eFFI pre-initialization phase is in progress, the base address of the preset base address register of the H2B device is obtained.

[0089] Step 240: Obtain fault address information and a first information check value according to the base address; wherein the fault address information and the first information check value are stored in a preset storage location corresponding to a preset base address register.

[0090] Step 250: Perform a preset verification operation on the fault address information to obtain a second information verification value, and determine whether to perform a fault repair operation based on the first information verification value and the second information verification value.

[0091] The embodiment of the present invention obtains the fault address information of the memory fault if a memory fault is detected, so as to facilitate the subsequent timely processing of the fault according to the fault address information, thereby improving the efficiency of fault processing. A preset verification operation is performed on the fault address information to obtain a first information verification value, and the currently obtained fault address information is verified in a timely manner to obtain a corresponding verification value, so as to facilitate the subsequent verification of whether the fault address information has changed, thereby avoiding the problem that the fault repair fails if the fault address information is not found to have changed when the fault address information is used later, thereby improving the effectiveness and accuracy of the fault repair.

[0092] The fault address information and the first information check value are both stored in a preset storage location corresponding to the preset base address register, so that the fault address information and the first information check value can be uniformly obtained later, thereby improving information acquisition efficiency.

[0093] In order to enable those skilled in the art to more clearly understand the present solution, the embodiment of the present invention also provides a specific implementation method.

[0094] Preparation stage:

[0095] Step 1. The BMC enables the H2B device, and the BIOS and BMC negotiate to determine the preset storage location and storage format of the fault address information, and add CRC check data for subsequent verification of the fault address information.

[0096] The preset storage location may be the last 16M space of the memory space corresponding to the preset base address register of the H2B device; the storage format may continue to use the format for saving addresses in the SMM mode, or change to a new format.

[0097] Step 2: determine the memory space corresponding to the preset base address register as the shared memory space between the host end and the baseboard management controller end.

[0098] The H2B device maps a preset size of space in the baseboard management controller Dram to a preset base address register and uses the space as a shared memory space, that is, the host can access the baseboard management controller Dram through the preset base address register, and the baseboard management controller itself can also access it.

[0099] Fault generation stage:

[0100] Step 1. If a memory fault is detected, obtain the fault address information of the memory fault; perform CRC check on the fault address information to obtain a first information check value, and store the fault address information and the first information check value to a preset storage location corresponding to a preset base address register.

[0101] Step 2. Back up the fault address information and the first information check value to a preset non-volatile memory; if there is a power outage event, read the fault address information and the first information check value from the preset non-volatile memory to a preset storage location after the power outage event ends.

[0102] Since the preset storage location is in the shared memory space between the host and the baseboard management controller, and the shared memory space is part of the space in the baseboard management controller Dram, and since the baseboard management controller Dram is a volatile memory, the baseboard management controller is required to perform persistence processing to ensure that the data in the shared memory space can be restored to its original state after power failure and power on again.

[0103] Troubleshooting phase:

[0104] Step 1: If the current extensible firmware interface is in the pre-initialization stage, initialize Bar0 of the H2B device, obtain the base address corresponding to Bar0, and obtain the fault address information and the first information check value in the preset storage location according to the base address.

[0105] Step 2: Perform CRC check on the fault address information to obtain a second information check value, and determine whether to perform a fault repair operation based on the first information check value and the second information check value.

[0106] If they are consistent, it is determined to perform the fault repair operation according to the fault address information; if they are inconsistent, the fault repair operation can be skipped, or an error is reported.

[0107] Step 3: If a fault repair operation is performed, then in the driver execution environment phase after the fault repair operation is completed, the H2B device is re-enumerated and the base address is updated; and the fault address information and the first information check value in the preset storage location are cleared.

[0108] Embodiment 3

[0109] Figure 3 This is a schematic diagram of the structure of a fault repair device provided in the third embodiment of the present invention. The device can be implemented by hardware and / or software, can execute a fault repair method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method. Figure 3 As shown, the device comprises:

[0110] The base address acquisition module 310 is used to acquire the base address of the preset base address register of the H2B device if the current extensible firmware interface pre-initialization phase is in progress;

[0111] A first information acquisition module 320, configured to acquire fault address information and a first information check value according to the base address; wherein the fault address information and the first information check value are stored in a preset storage location corresponding to the preset base address register;

[0112] The repair operation execution determination module 330 is used to perform a verification operation on the fault address information to obtain a second information verification value, and determine whether to execute a fault repair operation according to the first information verification value and the second information verification value.

[0113] Based on the above technical solutions, optionally, the first information acquisition module includes:

[0114] a position locating unit, configured to locate the preset storage location according to the base address and preset space information of the preset storage location;

[0115] An information acquisition unit is used to acquire the fault address information and the first information verification value from the preset storage location.

[0116] On the basis of the above technical solutions, optionally, the device further includes:

[0117] A second information acquisition module, used before the base address acquisition module, to acquire the fault address information of the memory fault if a memory fault is detected;

[0118] The information storage module is used to perform the preset verification operation on the fault address information to obtain the first information verification value, and store the fault address information and the first information verification value in the preset storage location corresponding to the preset base address register.

[0119] On the basis of the above technical solutions, optionally, the device further includes:

[0120] An information backup module, used after the information storage module, to back up the fault address information and the first information check value to a preset non-volatile memory;

[0121] The information reading module is used for reading the fault address information and the first information check value from the preset non-volatile memory to the preset storage location after the power failure event ends if there is a power failure event.

[0122] On the basis of the above technical solutions, optionally, the device further includes:

[0123] An address updating module, used for updating the base address in the driver execution environment phase after the fault repair operation is completed if the fault repair operation is performed after the repair operation is performed by the determination module;

[0124] An information clearing module is used to clear the fault address information and the first information check value in the preset storage location.

[0125] Based on the above technical solutions, optionally, the preset storage location is located in a shared memory space between the host end and the baseboard management controller end.

[0126] Embodiment 4

[0127] Figure 4 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0128] like Figure 4As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0129] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0130] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as a fault repair method.

[0131] In some embodiments, the fault repair method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the fault repair method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the fault repair method in any other appropriate manner (e.g., by means of firmware).

[0132] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0133] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0134] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0135] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0136] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0137] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0138] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0139] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A fault repair method, characterized in that: include: If the device is in the current Extensible Firmware Interface pre-initialization phase, obtaining a base address of a preset base address register of the H2B device, wherein the current Extensible Firmware Interface pre-initialization phase is a pre-Extensible Firmware Interface initialization phase experienced during the current restart or startup; Acquire fault address information and a first information check value according to the base address; wherein the fault address information and the first information check value are stored in a preset storage location corresponding to the preset base address register; Performing a preset verification operation on the fault address information to obtain a second information verification value, and determining whether to perform a fault repair operation according to the first information verification value and the second information verification value; The acquiring the fault address information and the first information check value according to the base address includes: The H2B device is enabled by the BMC, a preset storage location and a storage format of the fault address information are determined through negotiation between the BIOS and the BMC, and a memory space corresponding to the preset base address register is determined as a shared memory space between the host and the baseboard management controller; before obtaining the base address of the preset base address register of the H2B device if the current extensible firmware interface is in the pre-initialization stage, the method further includes: If a memory fault is detected, obtaining the fault address information of the memory fault; The preset verification operation is performed on the fault address information to obtain the first information verification value, and the fault address information and the first information verification value are stored in the preset storage location corresponding to the preset base address register.

2. The method according to claim 1, characterized in that: The acquiring the fault address information and the first information check value according to the base address includes: Locating the preset storage location according to the base address and preset space information of the preset storage location; The fault address information and the first information check value are obtained from the preset storage location.

3. The method according to claim 1, characterized in that After storing the fault address information and the first information check value in the preset storage location corresponding to the preset base address register, the method further includes: Backing up the fault address information and the first information check value to a preset non-volatile memory; If a power failure event occurs, the fault address information and the first information check value are read from the preset non-volatile memory to the preset storage location after the power failure event ends.

4. The method according to claim 1, characterized in that After determining whether to perform a fault repair operation according to the first information check value and the second information check value, the method further includes: If the fault repair operation is performed, then in the driver execution environment phase after the fault repair operation is completed, updating the base address; The fault address information and the first information check value in the preset storage location are cleared.

5. The method according to any one of claims 1 to 4, characterized in that: The preset storage location is located in the shared memory space between the host end and the baseboard management controller end.

6. A fault repair device, characterized in that: include: A base address acquisition module, configured to acquire a base address of a preset base address register of the H2B device if the device is in a current extensible firmware interface pre-initialization phase, wherein the current extensible firmware interface pre-initialization phase is a pre-extensible firmware interface initialization phase experienced during a current restart or startup; A first information acquisition module, configured to acquire fault address information and a first information check value according to the base address; wherein the fault address information and the first information check value are stored in a preset storage location corresponding to the preset base address register; a repair operation execution determination module, configured to perform a verification operation on the fault address information to obtain a second information verification value, and determine whether to execute a fault repair operation according to the first information verification value and the second information verification value; The first information acquisition module is further used to: enable the H2B device by the BMC end, determine the preset storage location and the storage format of the fault address information through negotiation between the BIOS and the BMC, and determine the memory space corresponding to the preset base address register as the shared memory space between the host end and the baseboard management controller end; A second information acquisition module, used before the base address acquisition module, to acquire the fault address information of the memory fault if a memory fault is detected; The information storage module is used to perform a preset verification operation on the fault address information to obtain the first information verification value, and store the fault address information and the first information verification value in the preset storage location corresponding to the preset base address register.

7. The device according to claim 6, characterized in that The first information acquisition module includes: a position locating unit, configured to locate the preset storage location according to the base address and preset space information of the preset storage location; An information acquisition unit is used to acquire the fault address information and the first information verification value from the preset storage location.

8. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the fault repair method according to any one of claims 1 to 5.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the fault repair method according to any one of claims 1 to 5 when executed.

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