A substrate comprising an acoustic resonator configured as at least one acoustic filter

Abstract

A substrate (202) includes an encapsulation layer (203), a first acoustic resonator (205), a second acoustic resonator (207), at least one first dielectric layer (240), a plurality of first interconnects (244), at least one second dielectric layer (260), and a plurality of second interconnects (264). The first acoustic resonator (205) is located in the encapsulation layer. The first acoustic resonator (205) includes a first piezoelectric substrate (250) that includes a first thickness. The second acoustic filter (207) is located in the encapsulation layer (203). The second acoustic resonator (207) includes a second piezoelectric substrate (270) that includes a second thickness that is different than the first thickness. The at least one first dielectric layer is coupled to a first surface of the encapsulation layer. The plurality of first interconnects is coupled to the first surface of the encapsulation layer. The plurality of first interconnects is located in at least the at least one first dielectric layer.

Description

[0001] CLAIM OF PRIORITY UNDER 35 U.S.C. § 119

[0002] This patent application claims priority to Non-Provisional Application Number 17 / 008,320, filed August 31, 2020, entitled “SUBSTRATE COMPRISING ACOUSTIC RESONATORS CONFIGURED AS AT LEAST ONE ACOUSTIC FILTER,” which is assigned to the assignee of the present application and hereby expressly incorporated by reference herein. TECHNICAL FIELD

[0003] Various features relate to packages and substrates, but more specifically to substrates including acoustic resonators embedded in an encapsulation layer. BACKGROUND

[0004] Figure 1 A package 100 is illustrated that includes a substrate 102, an integrated device 106, an integrated device 108, and an integrated device 109. The integrated device 106, the integrated device 108, and the integrated device 109 are coupled to a surface of the substrate 102. The substrate 102 includes at least one dielectric layer 120 and a plurality of interconnects 122. A plurality of solder interconnects 130 are coupled to the substrate 102. The integrated devices 106, 108, and 109 can occupy a large amount of space and substrate area. Small wireless devices have space constraints and can not be able to accommodate many integrated devices. Wireless devices can rely on many integrated devices to provide efficient and effective wireless communication. The relatively large size of the integrated devices can limit the wireless performance of small wireless devices because there is not much room for integrated devices to fit in small wireless devices. There is a continuing need to provide integrated devices with better form factors and smaller sizes so that the integrated devices can be implemented in smaller devices. SUMMARY

[0005] Various features relate to packages and substrates, but more specifically to substrates including acoustic resonators embedded in an encapsulation layer.

[0006] One example provides a substrate including an encapsulation layer, a first acoustic resonator, a second acoustic resonator, at least one first dielectric layer, a plurality of first interconnects, at least one second dielectric layer, and a plurality of second interconnects. The first acoustic resonator is located in the encapsulation layer. The first acoustic resonator includes a first piezoelectric substrate including a first thickness. The second acoustic resonator is located in the encapsulation layer. The second acoustic resonator includes a second piezoelectric substrate including a second thickness different from the first thickness. The at least one first dielectric layer is coupled to a first surface of the encapsulation layer. The plurality of first interconnects is coupled to the first surface of the encapsulation layer. The plurality of first interconnects is located in at least the at least one first dielectric layer. The at least one second dielectric layer is coupled to a second surface of the encapsulation layer. The plurality of second interconnects is coupled to the second surface of the encapsulation layer. The plurality of second interconnects is located in at least the at least one second dielectric layer.

[0007] Another example provides an apparatus including an integrated device and a substrate coupled to the integrated device. The substrate includes a means for encapsulation, a means for a first acoustic resonance located in the means for encapsulation, a means for a second acoustic resonance located in the means for encapsulation, at least one first dielectric layer coupled to a first surface of the means for encapsulation, a plurality of first interconnects coupled to the first surface of the means for encapsulation, wherein the plurality of first interconnects is located in at least the at least one first dielectric layer, at least one second dielectric layer coupled to a second surface of the means for encapsulation, and a plurality of second interconnects coupled to the second surface of the means for encapsulation, wherein the plurality of second interconnects is located in at least the at least one second dielectric layer.

[0008] Another example provides a method for fabricating a substrate. The method provides a first acoustic resonator including a first piezoelectric substrate including a first thickness. The method provides a second acoustic resonator including a second piezoelectric substrate including a second thickness different from the first thickness. The method forms an encapsulation layer over the first acoustic resonator and the second acoustic resonator. The method forms a plurality of first interconnects over a first surface of the encapsulation layer. The method forms at least one first dielectric layer over the first surface of the encapsulation layer. The method forms a plurality of second interconnects over a second surface of the encapsulation layer. The method forms at least one second dielectric layer over the second surface of the encapsulation layer. BRIEF DESCRIPTION OF DRAWINGS

[0009] Various features, nature, and advantages will become apparent from the specific embodiments set forth below when considered in connection with the drawings, in which like numbers on the same figures identify corresponding elements throughout.

[0010] Figure 1 A package including various integrated devices coupled to a substrate is illustrated.

[0011] Figure 2 A cross-sectional view of an example substrate including an acoustic resonator is illustrated.

[0012] Figure 3 A cross-sectional view of another example substrate including an acoustic resonator is illustrated.

[0013] Figure 4 A cross-sectional view of another example substrate including an acoustic resonator is illustrated.

[0014] Figure 5 A cross-sectional view of another example substrate including an acoustic resonator is illustrated.

[0015] Figure 6 A cross-sectional view of another example substrate including an acoustic resonator is illustrated.

[0016] Figure 7 A cross-sectional view of another example package including a substrate implemented with an acoustic resonator is illustrated.

[0017] Figure 8 A cross-sectional view of another example package including a substrate implemented with an acoustic resonator is illustrated.

[0018] Figure 9 A wafer including acoustic resonators is illustrated.

[0019] Figure 10 A wafer including acoustic resonators is illustrated.

[0020] Figure 11 A wafer including acoustic resonators is illustrated.

[0021] Figure 12 An example chart of resonant frequencies for different acoustic resonators is illustrated.

[0022] Figure 13 An example equivalent circuit for an acoustic resonator is illustrated.

[0023] Figure 14 An example chart of how several acoustic resonators filter a signal is illustrated.

[0024] Figures 15A-15F An example sequence for fabricating a substrate including a plurality of acoustic resonators is illustrated.

[0025] Figure 16 An example flowchart of a method for fabricating a substrate including a plurality of acoustic resonators is illustrated.

[0026] Figure 17Various electronic devices that can incorporate the die, integrated device, integrated passive device (IPD), device package, package, integrated circuit, and / or PCB described herein are illustrated. DETAILED DESCRIPTION

[0027] In the following description, specific details are given to provide a thorough understanding of various aspects of the disclosure. However, a person skilled in the art will understand that the aspects can be practiced without these specific details. For example, circuits can be shown in block diagrams in order to avoid obscuring aspects of the aspects in unnecessary detail. In other instances, well-known circuits, structures, and techniques can not be shown in detail in order not to obscure aspects of the disclosure.

[0028] The present disclosure describes a package that includes a substrate and an integrated device coupled to the substrate. The substrate includes an encapsulation layer, a first acoustic resonator, a second acoustic resonator, at least one first dielectric layer, a plurality of first interconnects, at least one second dielectric layer, and a plurality of second interconnects. The first acoustic resonator is located in the encapsulation layer. The first acoustic resonator includes a first piezoelectric substrate that includes a first thickness. The second acoustic resonator is located in the encapsulation layer. The second acoustic resonator includes a second piezoelectric substrate that includes a second thickness that is different than the first thickness. The at least one first dielectric layer is coupled to a first surface of the encapsulation layer. The plurality of first interconnects is coupled to the first surface of the encapsulation layer. The plurality of first interconnects is located at least in the at least one first dielectric layer. The at least one second dielectric layer is coupled to a second surface of the encapsulation layer. The plurality of second interconnects is coupled to the second surface of the encapsulation layer. The plurality of second interconnects is located at least in the at least one second dielectric layer. The design and configuration of the substrate that includes the acoustic resonators configured as at least one acoustic filter provides a better form factor and smaller size overall (while still providing effective performance capabilities) such that the package, substrate, and acoustic resonators can be implemented in smaller devices.

[0029] Exemplary package and substrate including acoustic resonators embedded in an encapsulation layer

[0030] Figure 2 An example of a substrate 202 including acoustic resonators embedded in an encapsulation layer 203 is illustrated. The substrate 202 includes the encapsulation layer 203, a first metallization portion 204, a second metallization portion 206, at least one acoustic resonator 205, at least one acoustic resonator 207, at least one acoustic resonator 209, at least one first dielectric layer 240, at least one second dielectric layer 260, a plurality of first interconnects 244, a plurality of second interconnects 264, at least one interconnect 230, at least one interconnect 234, and at least one interconnect 236.

[0031] The at least one acoustic resonator 205, the at least one acoustic resonator 207, and the at least one acoustic resonator 209 are located in an encapsulation layer 203. The at least one interconnect 230, the at least one interconnect 234, and the at least one interconnect 236 are located in the encapsulation layer 203. The at least one interconnect 230, the at least one interconnect 234, and the at least one interconnect 236 can be via interconnects that extend partially through and / or completely through the encapsulation layer 203. The encapsulation layer 203 can include a molding, a resin, and / or an epoxy. The encapsulation layer 203 can be a component for encapsulation.

[0032] The acoustic resonator 205 includes a substrate 250, a first metal layer 254, and a second metal layer 256. The first metal layer 254 is formed over and coupled to a first surface of the substrate 250. The second metal layer 256 is formed over and coupled to a second surface of the substrate 250. The substrate 250 can be a piezoelectric substrate. The substrate 250 can include a piezoelectric material (e.g., aluminum nitride (AIN), lithium niobate, lithium tantalate). The first metal layer 254 and / or the second metal layer 256 can be configured as an interconnect, an electrode, and / or a transducer.

[0033] The acoustic resonator 207 includes a substrate 270, a first metal layer 274, and a second metal layer 276. The first metal layer 274 is formed over and coupled to a first surface of the substrate 270. The second metal layer 276 is formed over and coupled to a second surface of the substrate 270. The substrate 270 can be a piezoelectric substrate. The substrate 270 can include a piezoelectric material (e.g., aluminum nitride (AIN), lithium niobate, lithium tantalate). The first metal layer 274 and / or the second metal layer 276 can be configured as an interconnect, an electrode, and / or a transducer.

[0034] The acoustic resonator 209 includes a substrate 290, a first metal layer 294, and a second metal layer 296. The first metal layer 294 is formed over and coupled to a first surface of the substrate 290. The second metal layer 296 is formed over and coupled to a second surface of the substrate 290. The substrate 290 can be a piezoelectric substrate. The substrate 250 can include a piezoelectric material (e.g., aluminum nitride (AIN), lithium niobate, lithium tantalate). The first metal layer 294 and / or the second metal layer 296 can be configured as an interconnect, an electrode, and / or a transducer.

[0035] An acoustic resonator can be a component for acoustic resonance (e.g., a component for a first acoustic resonance, a component for a second acoustic resonance, a component for a third acoustic resonance, a component for a fourth acoustic resonance, etc.). As used in this disclosure, a piezoelectric substrate can refer to a substrate comprising a piezoelectric material and / or a substrate comprising a piezoelectric layer coupled to and located above the surface of the substrate. Different implementations may use different materials for the piezoelectric material and / or the piezoelectric layer.

[0036] Acoustic resonators 205, 207, and / or 209 can be configured with different designs and configurations. Various combinations of acoustic resonators 205, 207, and / or 209 can be configured as at least one acoustic filter in the substrate. As will be further described below, different designs and configurations can allow the substrate including the acoustic resonators to have different filtering capabilities. Acoustic resonators 205, 207, and / or 209 (or any acoustic resonator) can be one of a sound wave (SAW) device, a bulk acoustic wave (BAW) device, a thin-film bulk acoustic wave resonator (FBAR), and / or a contour mode resonator (CMR).

[0037] like Figure 2 As shown, acoustic resonators 205, 207, and 209 have substrates with different thicknesses. For example, the thickness of substrate 250 of acoustic resonator 205 is greater than (i) the thickness of substrate 270 of acoustic resonator 207 and (ii) the thickness of substrate 290 of acoustic resonator 209. The thickness of substrate 290 of acoustic resonator 209 is greater than the thickness of substrate 270 of acoustic resonator 207. The thickness of the substrate (which includes piezoelectric material) of the acoustic resonator helps to define the resonant frequency of the acoustic resonator and how the acoustic resonator filters the signal. Therefore, different thicknesses result in acoustic resonators with different resonant frequencies and acoustic resonators that filter different frequencies. Note that the thickness of the substrate for the acoustic resonator is exemplary. In some implementations, two or more acoustic resonators may have substrates with the same thickness, but with different designs, configurations, and / or patterns for the (multiple) metal layers. As will be explained below at least in Figures 12-14 As further described herein, two or more acoustic resonators (with different shapes and / or designs) may be coupled in series and / or in parallel to provide at least one acoustic filter that can filter signals at a specific frequency while keeping the size and form of the acoustic filter as small and compact as possible.

[0038] A first metallization portion 204 is coupled to a first surface of the encapsulation layer 203. The first metallization portion 204 includes at least one dielectric layer 240 and a plurality of interconnects 244. The first metallization portion 204 may be a first redistribution portion. The plurality of interconnects 244 may include a plurality of redistributed interconnects. The plurality of interconnects 244 may be formed by at least one redistributed metal layer (RDL). A second metallization portion 206 is coupled to a second surface of the encapsulation layer 203. The second metallization portion 206 includes a dielectric layer 260 and a plurality of interconnects 264. The second metallization portion 206 may be a second redistribution portion. The plurality of interconnects 264 may include a plurality of redistributed interconnects. The plurality of interconnects 264 may be formed by at least one redistributed metal layer (RDL).

[0039] Multiple interconnects 244 may be coupled to at least one acoustic resonator 205, at least one acoustic resonator 207, and / or at least one acoustic resonator 209. For example, multiple interconnects 244 may be coupled to the first metal layer 254 of the acoustic resonator 205, the first metal layer 274 of the acoustic resonator 207, and at least one interconnect 234 (which is coupled to the first metal layer 294 of the acoustic resonator 209).

[0040] Multiple interconnects 264 may be coupled to at least one acoustic resonator 205, at least one acoustic resonator 207, and / or at least one acoustic resonator 209. For example, multiple interconnects 264 may be coupled to the second metal layer 256 of the acoustic resonator 205, at least one interconnect 236 (which is coupled to the second metal layer 276 of the acoustic resonator 207), and the second metal layer 296 of the acoustic resonator 209.

[0041] Multiple interconnects 264 can be coupled to multiple interconnects 244 via at least one interconnect 230. Multiple interconnects 244 and / or multiple interconnects 264 allow at least one acoustic resonator 205, at least one acoustic resonator 207, and at least one acoustic resonator 209 to be coupled together in series and / or in parallel to provide at least one acoustic filter.

[0042] like Figure 2 As shown, acoustic resonator 207 is located on a first side (e.g., the top side) of encapsulation layer 203, and acoustic resonator 209 is located on a second side (e.g., the bottom side) of encapsulation layer 203. As will be further described below, the substrate may include several acoustic resonators with different designs, configurations, shapes, and / or thicknesses. The substrate is not limited to three acoustic resonators. These acoustic resonators may be located differently within the encapsulation layer (e.g., 203).

[0043] Figure 3A substrate 302 is illustrated that includes an encapsulation layer 203, a first metallization portion 204, a second metallization portion 206, at least one acoustic resonator 205, at least one acoustic resonator 207, at least one acoustic resonator 209, at least one first dielectric layer 240, at least one second dielectric layer 260, a plurality of first interconnects 244, a plurality of second interconnects 264, at least one interconnect 230, at least one interconnect 234, and at least one interconnect 236. The substrate 302 is similar to the substrate 202. However, the substrate 302 includes acoustic resonators at different locations in the encapsulation layer 203.

[0044] As shown in Figure 3 The plurality of interconnects 244 can be coupled to the at least one acoustic resonator 205, the at least one acoustic resonator 207, and / or the at least one acoustic resonator 209. For example, the plurality of interconnects 244 can be coupled to the first metal layer 254 of the acoustic resonator 205, the at least one interconnect 236 (which is coupled to the first metal layer 274 of the acoustic resonator 207), and the at least one interconnect 234 (which is coupled to the first metal layer 294 of the acoustic resonator 209).

[0045] The plurality of interconnects 264 can be coupled to the at least one acoustic resonator 205, the at least one acoustic resonator 207, and / or the at least one acoustic resonator 209. For example, the plurality of interconnects 264 can be coupled to the second metal layer 256 of the acoustic resonator 205, the second metal layer 276 of the acoustic resonator 207, and the second metal layer 296 of the acoustic resonator 209. As shown in Figure 3 As shown in

[0046] Figure 4 A substrate 402 is illustrated that includes an encapsulation layer 203, a first metallization portion 204, a second metallization portion 206, at least one acoustic resonator 205, at least one acoustic resonator 407, at least one acoustic resonator 209, at least one first dielectric layer 240, at least one second dielectric layer 260, a plurality of first interconnects 244, a plurality of second interconnects 264, at least one interconnect 230, and at least one interconnect 234.

[0047] The substrate 402 is similar to the substrate 202. However, the substrate 402 includes different acoustic resonators at different locations in the encapsulation layer 203. For example, the acoustic resonator 407 includes a substrate 470 and a metal layer 276. The substrate 470 can be a piezoelectric substrate. The substrate 470 can include a piezoelectric material (e.g., aluminum nitride (AIN), lithium niobate, lithium tantalate). The metal layer 476 can be configured as an interconnect, an electrode, and / or a transducer.

[0048] As shown in Figure 4 The plurality of interconnects 244 can be coupled to the at least one acoustic resonator 205, the at least one acoustic resonator 407, and / or the at least one acoustic resonator 209. For example, the plurality of interconnects 244 can be coupled to the first metal layer 254 of the acoustic resonator 205 and the at least one interconnect 234 (which is coupled to the first metal layer 294 of the acoustic resonator 209).

[0049] The plurality of interconnects 264 can be coupled to the at least one acoustic resonator 205, the at least one acoustic resonator 407, and / or the at least one acoustic resonator 209. For example, the plurality of interconnects 264 can be coupled to the second metal layer 256 of the acoustic resonator 205, the metal layer 476 of the acoustic resonator 407, and the second metal layer 296 of the acoustic resonator 209. As shown in Figure 4 As shown in

[0050] Figure 5 A substrate 502 is illustrated that includes the encapsulation layer 203, the first metallization portion 204, the second metallization portion 206, the at least one acoustic resonator 205, the at least one acoustic resonator 407, the at least one acoustic resonator 209, the at least one first dielectric layer 240, the at least one second dielectric layer 260, the plurality of first interconnects 244, the plurality of second interconnects 264, the at least one interconnect 230, and the at least one interconnect 234.

[0051] The substrate 502 is similar to the substrate 302. However, the substrate 502 includes different acoustic resonators located in different locations in the encapsulation layer. For example, the acoustic resonator 407 includes the substrate 470 and the metal layer 474. The metal layer 474 can be configured as interconnects, electrodes, and / or transducers.

[0052] As shown in Figure 5 The plurality of interconnects 244 can be coupled to the at least one acoustic resonator 205, the at least one acoustic resonator 407, and / or the at least one acoustic resonator 209. For example, the plurality of interconnects 244 can be coupled to the first metal layer 254 of the acoustic resonator 205, the metal layer 474 of the acoustic resonator 407, and the at least one interconnect 234 (which is coupled to the first metal layer 294 of the acoustic resonator 209).

[0053] The plurality of interconnects 264 can be coupled to the at least one acoustic resonator 205, the at least one acoustic resonator 407, and / or the at least one acoustic resonator 209. For example, the plurality of interconnects 264 can be coupled to the second metal layer 256 of the acoustic resonator 205 and the second metal layer 296 of the acoustic resonator 209. As shown in Figure 5As shown, acoustic resonator 407 is located on a first side (e.g., top side) of encapsulation layer 203, and acoustic resonator 209 is located on a second side (e.g., bottom side) of encapsulation layer 203.

[0054] Figure 6 The illustration shows a substrate 602, which includes an encapsulation layer 203, a first metallization portion 204, a second metallization portion 206, at least one acoustic resonator 205, at least one acoustic resonator 407, at least one acoustic resonator 609, at least one first dielectric layer 240, at least one second dielectric layer 260, a plurality of first interconnects 244, a plurality of second interconnects 264, and at least one interconnect 230.

[0055] Substrate 602 is similar to substrate 302. However, substrate 602 includes different acoustic resonators located at different positions within the encapsulation layer. Acoustic resonator 407 includes substrate 470 and metal layer 476. Substrate 470 may be a piezoelectric substrate. Substrate 470 may include a piezoelectric material (e.g., aluminum nitride (AlN), lithium niobate, lithium tantalate). Metal layer 474 may be configured as interconnects, electrodes, and / or transducers.

[0056] The acoustic resonator 609 includes a substrate 690 and a metal layer 696. The substrate 690 may be a piezoelectric substrate. The substrate 690 may include a piezoelectric material (e.g., aluminum nitride (AlN), lithium niobate, lithium tantalate). The metal layer 696 may be configured as an interconnect, electrode, and / or transducer.

[0057] like Figure 6 As shown, multiple interconnects 244 can be coupled to at least one acoustic resonator 205, at least one acoustic resonator 407, and / or at least one acoustic resonator 609. For example, multiple interconnects 244 can be coupled to the first metal layer 254 of the acoustic resonator 205. Multiple interconnects 264 can be coupled to at least one acoustic resonator 205, at least one acoustic resonator 407, and / or at least one acoustic resonator 609. For example, multiple interconnects 264 can be coupled to the second metal layer 256 of the acoustic resonator 205, the metal layer 474 of the acoustic resonator 407, and the metal layer 696 of the acoustic resonator 609. Figure 6 As shown, acoustic resonators 407 and 609 are located on the second side (e.g., the bottom side) of the encapsulation layer 203.

[0058] Figure 7A package 700 including a substrate 702, an integrated device 708, and an integrated device 709 is illustrated. The integrated device 708 is coupled to the substrate 702 by a plurality of solder interconnects 780. The integrated device 709 is coupled to the substrate 702 by a plurality of solder interconnects 790. The plurality of solder interconnects 780 and / or 790 are coupled to a plurality of interconnects 244 of the substrate 702. A plurality of solder interconnects 710 are coupled to the substrate 702. For example, the plurality of solder interconnects 710 are coupled to a plurality of interconnects 264 of the substrate 702.

[0059] The substrate 702 includes the encapsulation layer 203, the first metallization portion 204, the second metallization portion 206, the acoustic resonator 205a, the acoustic resonator 207a, the acoustic resonator 207b, the acoustic resonator 209a, the at least one first dielectric layer 240, the at least one second dielectric layer 260, the plurality of interconnects 244, the plurality of interconnects 264, the at least one interconnect 230, the at least one interconnect 234, and the at least one interconnect 236.

[0060] The acoustic resonator 205a, the acoustic resonator 207a, the acoustic resonator 207b, and the acoustic resonator 209a are located in the encapsulation layer 203. The acoustic resonator 205a, the acoustic resonator 207a, the acoustic resonator 207b, and the acoustic resonator 209a can be configured to be coupled in series and / or parallel to operate as at least one acoustic filter. The integrated device 708 and / or the integrated device 709 can be coupled to the acoustic resonator 205a, the acoustic resonator 207a, the acoustic resonator 207b, and the acoustic resonator 209a by the plurality of interconnects 244, the at least one interconnect 230, and / or the plurality of interconnects 264.

[0061] Figure 8 A package 800 including a substrate 702, a substrate 802, an integrated device 708, and an integrated device 709 is illustrated. The integrated device 708 is coupled to the substrate 802 by a plurality of solder interconnects 780. The integrated device 709 is coupled to the substrate 802 by a plurality of solder interconnects 790. The plurality of solder interconnects 780 and / or 790 are coupled to a plurality of interconnects 844 of the substrate 802. A plurality of solder interconnects 710 are coupled to the substrate 702. For example, the plurality of solder interconnects 710 are coupled to a plurality of interconnects 264 of the substrate 702.

[0062] The substrate 702 includes the encapsulation layer 203, the first metallization portion 204, the second metallization portion 206, the acoustic resonator 205a, the acoustic resonator 207a, the acoustic resonator 207b, the acoustic resonator 209a, the at least one first dielectric layer 240, the at least one second dielectric layer 260, the plurality of interconnects 244, the plurality of interconnects 264, the at least one interconnect 230, the at least one interconnect 234, and the at least one interconnect 236.

[0063] Acoustic resonator 205a, acoustic resonator 207a, acoustic resonator 207b, and acoustic resonator 209a are located in encapsulation layer 203. Acoustic resonator 205a, acoustic resonator 207a, acoustic resonator 207b, and acoustic resonator 209a can be configured to be coupled in series and / or in parallel to operate as at least one acoustic filter.

[0064] Substrate 802 is coupled to substrate 702. Substrate 802 can be configured to be electrically coupled to substrate 702 by a plurality of interconnects 244. Substrate 802 includes an encapsulation layer 803, a first metallization portion 804, an acoustic resonator 807a, an acoustic resonator 807b, an acoustic resonator 807c, an acoustic resonator 809a, at least one first dielectric layer 840, a plurality of interconnects 844, at least one interconnect 830, at least one interconnect 834, and at least one interconnect 836. First metallization portion 804 includes at least one first dielectric layer 840 and a plurality of interconnects 844.

[0065] Acoustic resonator 807a, acoustic resonator 807b, acoustic resonator 807c, and acoustic resonator 809a are located in encapsulation layer 803. Acoustic resonator 807a, acoustic resonator 807b, acoustic resonator 807c, and acoustic resonator 809a can be configured to be coupled in series and / or in parallel to operate as at least one acoustic filter.

[0066] Integrated device 708 and / or integrated device 709 can be coupled to acoustic resonator 205a, acoustic resonator 207a, acoustic resonator 207b, and acoustic resonator 209a, acoustic resonator 807a, acoustic resonator 807b, acoustic resonator 807c, and acoustic resonator 809a by a plurality of interconnects 844, at least one interconnect 830, a plurality of interconnects 244, at least one interconnect 230, and / or a plurality of interconnects 264.

[0067] Although not shown, the package 800 can include at least one inductor and / or at least one capacitor. The at least one inductor and / or at least one capacitor can be configured to be coupled to the acoustic resonator 205a, the acoustic resonator 207a, the acoustic resonator 207b, and the acoustic resonator 209a, the acoustic resonator 807a, the acoustic resonator 807b, the acoustic resonator 807c, and the acoustic resonator 809a. The at least one inductor and / or at least one capacitor can be at least one surface mount device (SMD) coupled to a surface of the substrate (e.g., 802, 702). The at least one inductor and / or at least one capacitor can be a passive integrated device (e.g., a passive die). The at least one inductor and / or at least one capacitor can be defined by at least one interconnect in the first metallization portion 804, the first metallization portion 204, and / or the second metallization portion 206. For example, the at least one inductor and / or at least one capacitor can be defined by an interconnect from the plurality of interconnects 844, the plurality of interconnects 244, and / or the plurality of interconnects 264.

[0068] The at least one inductor, the at least one capacitor, the acoustic resonator 205a, the acoustic resonator 207a, the acoustic resonator 207b, and the acoustic resonator 209a, the acoustic resonator 807a, the acoustic resonator 807b, the acoustic resonator 807c, and / or the acoustic resonator 809a can be configured to be defined and operate as a diplexer.

[0069] Various acoustic resonators having various shapes, sizes, thicknesses, configurations, and / or designs can be fabricated and then combined to be located in an encapsulation layer of a substrate. Figures 9-11 Several wafers are illustrated, each wafer including a plurality of different acoustic resonators.

[0070] Figure 9 A wafer 900 including a plurality of acoustic resonators 205 is illustrated. As shown in Figure 9 The plurality of acoustic resonators 205 includes a first acoustic resonator 205a, a second acoustic resonator 205b, and a third acoustic resonator 205c, as shown in

[0071] Figure 10 A wafer 1000 including a plurality of acoustic resonators 207 is illustrated. As shown in Figure 10As shown in FIG. 7, the plurality of acoustic resonators 207 includes a first acoustic resonator 207a, a second acoustic resonator 207b, and a third acoustic resonator 207c. Each acoustic resonator (e.g., 207a, 207b, 207c) includes a substrate 270, a first metal layer 274, and a second metal layer 276. The substrate 270 includes a piezoelectric material. The substrate 270 can include a piezoelectric substrate. The plurality of acoustic resonators 207 can be fabricated together and then singulated into individual acoustic resonators (e.g., 207a, 207b, 207c).

[0072] Figure 11 FIG. illustrates a wafer 1100 including a plurality of acoustic resonators 209. As Figure 11 As shown in FIG. 7, the plurality of acoustic resonators 207 includes a first acoustic resonator 207a, a second acoustic resonator 207b, and a third acoustic resonator 207c. Each acoustic resonator (e.g., 207a, 207b, 207c) includes a substrate 270, a first metal layer 274, and a second metal layer 276. The substrate 270 includes a piezoelectric material. The substrate 270 can include a piezoelectric substrate. The plurality of acoustic resonators 207 can be fabricated together and then singulated into individual acoustic resonators (e.g., 207a, 207b, 207c).

[0073] Figures 9-11 FIG. illustrates three different thicknesses of acoustic resonators. However, the acoustic resonators are not limited to three resonators with different substrate thicknesses. There can be a fourth resonator with a fourth substrate thickness, a fifth resonator with a fifth substrate thickness, a sixth resonator with a sixth substrate thickness, a seventh resonator with a seventh substrate thickness, an eighth resonator with an eighth substrate thickness, etc. Figures 9-11 FIG. illustrates acoustic resonators 205, 207, and 209 with different substrate thicknesses. These different substrate thicknesses can affect the resonant frequency of the acoustic resonators and how the acoustic resonators filter signals of different frequencies.

[0074] Figure 12 FIG. illustrates how different acoustic resonators generate different resonant frequencies. Figure 12 FIG. illustrates signal profiles across frequencies for various acoustic resonators 205, 207, and 209. Figure 12 FIG. illustrates how using different substrate thicknesses helps control and / or specify the resonator frequency of an acoustic resonator. Figure 12 FIG. illustrates a plot 1200 showing an exemplary impedance and frequency relationship for various acoustic resonators (e.g., 205, 207, 209). The resonant frequency of an acoustic resonator can be represented by the following equation:

[0075]

[0076] where E is the Young's modulus of the piezoelectric material, p is the density of the piezoelectric material, and T is the thickness of the piezoelectric material. Thus, a thicker piezoelectric material yields a lower resonant frequency, while a thinner piezoelectric material yields a higher resonant frequency.

[0077] As will be further described in Figure 13 , an acoustic resonator can be represented by an equivalent series circuit and an equivalent parallel circuit. In Figure 12 , the equivalent series circuit (e.g., series resonant circuit) has a zero impedance at the resonant frequency, while the equivalent parallel circuit (e.g., parallel resonant circuit) has an impedance that can be infinite (e.g., by shunt at the resonant frequency).

[0078] Figure 13 An equivalent circuit 1310 of an acoustic resonator (e.g., 205, 207, 209, etc.) is illustrated. The equivalent circuit 1310 includes a first port 1312 (e.g., first electrode), a second port 1314 (e.g., second electrode), a resistor 1320, an inductor 1330, a capacitor 1340, and a capacitor 1350. The resistor 1320, the inductor 1330, and the capacitor 1340 are configured to be coupled in series. The capacitor 1350 is configured to be coupled in parallel to the resistor 1320, the inductor 1330, and the capacitor 1340. The inductor 1330 and the capacitor 1340 can help to provide series resonance for the equivalent circuit 1310. The inductor 1130 and the capacitor 1350 can help to provide parallel resonance for the circuit 1310.

[0079] Figure 14 How several acoustic resonators can be combined to provide an acoustic filter of a particular frequency range is illustrated. Figure 14 Multiple acoustic resonators 1400 that are used in combination (e.g., in series and in parallel) to provide acoustic filtering are illustrated. In Figure 14 , signals in the range of about 1.96 to 2.06 gigahertz (GHz) pass through, while signals outside of this range are filtered out by the multiple acoustic resonators 1400. However, a different number of acoustic resonators with different configurations, shapes, sizes, and / or thicknesses can be used to target a particular frequency range.

[0080] Each acoustic resonator of the multiple acoustic resonators 1400 can be any acoustic resonator described in the present disclosure. The multiple acoustic resonators 1400 include a first acoustic resonator 1400a, a second acoustic resonator 1400b, a third acoustic resonator 1400c, a fourth acoustic resonator 1400d, a fifth acoustic resonator 1400e, a sixth acoustic resonator 1400f, a seventh acoustic resonator 1400g, and an eighth acoustic resonator 1400h.

[0081] The first acoustic resonator 1400a, the third acoustic resonator 1400c, the fifth acoustic resonator 1400e, and the seventh acoustic resonator 1400g can be coupled together in parallel. The first acoustic resonator 1400a, the third acoustic resonator 1400c, the fifth acoustic resonator 1400e, and the seventh acoustic resonator 1400g can be coupled together in shunt. The second acoustic resonator 1400b, the fourth acoustic resonator 1400d, the sixth acoustic resonator 1400f, and the eighth acoustic resonator 1400h can be configured to be coupled together in series.

[0082] Exemplary sequence for fabricating a substrate including acoustic resonators

[0083] In some implementations, fabricating a substrate including acoustic resonators includes several processes. Figures 15A-15F An exemplary sequence for providing or fabricating a substrate including acoustic resonators is illustrated. In some implementations, the sequence of Figures 15A-15F may be used to provide or fabricate the substrates 202, 702, and / or 802. However, the processes of Figures 15A-15F may be used to fabricate any of the substrates described in the present disclosure.

[0084] It should be noted that the sequence of Figures 15A-15F may combine one or more stages in order to simplify and / or clarify the sequence for providing or fabricating a substrate. In some implementations, the sequence of processes can be changed or modified. In some implementations, one or more processes can be replaced or substituted without departing from the spirit of the present disclosure.

[0085] As shown in Figure 15A Stage 1 illustrates a state after a carrier 1500 is provided. The carrier 1500 can include a substrate.

[0086] Stage 2 illustrates a state after a plurality of acoustic resonators 205 (e.g., 205a, 205b) and a plurality of acoustic resonators 207 (e.g., 207a, 207b) are placed on top of the carrier 1500. The plurality of acoustic resonators 205 and / or the plurality of acoustic resonators 207 can be placed using a pick-and-place process. Different implementations can provide different numbers of acoustic resonators having different designs, shapes, thicknesses, and / or configurations.

[0087] Stage 3 illustrates a state after forming an encapsulation layer 203 over the carrier 1500. The encapsulation layer 203 can be formed using a compression and transfer molding process, a sheet molding process, or a liquid molding process. The encapsulation layer 203 can at least partially encapsulate the plurality of acoustic resonators 205 and the plurality of acoustic resonators 207. In some implementations, the encapsulation layer 203 can be formed over the plurality of acoustic resonators 205 and the plurality of acoustic resonators 207, and portions of the encapsulation layer 203 can be removed (e.g., ground) such that a top surface of the encapsulation layer 203 is coplanar with the plurality of acoustic resonators 205 and / or the plurality of acoustic resonators 207. The encapsulation layer 203 can include a molding, a resin, and / or an epoxy. The encapsulation layer 203 can be a component for encapsulation. The encapsulation layer 203 can be photo-etchable.

[0088] As shown in Figure 15B Stage 4 illustrates a state after decoupling the carrier 1500 from the encapsulation layer 203 and the plurality of acoustic resonators 205 and the plurality of acoustic resonators 207. Decoupling the carrier 1500 can include removing, separating, grinding, and / or dissolving the carrier 1500 using a mechanical process and / or a chemical process.

[0089] Stage 5 illustrates a state after forming a plurality of cavities 1501 in the encapsulation layer 203. The cavities 1501 can be formed using a laser process (e.g., laser ablation), a lithography process (e.g., exposure and development), or an etching process. The plurality of cavities 1501 can be formed over the plurality of acoustic resonators 205 and / or the plurality of acoustic resonators 207. The plurality of cavities 1501 can extend through a partial thickness of the encapsulation layer 203.

[0090] Stage 6 illustrates a state after forming a plurality of cavities 1503 in the encapsulation layer 203. The cavities 1503 can be formed using a laser process (e.g., laser ablation), a lithography process (e.g., exposure and development), or an etching process. The plurality of cavities 1503 can extend through an entire thickness of the encapsulation layer 203.

[0091] As shown in Figure 15C Stage 7 illustrates a state after forming a plurality of interconnects 230 and 234 in the plurality of cavities 1501 and / or the plurality of cavities 1503. The interconnects 230 can be formed in the cavities 1503 and the interconnects 234 can be formed in the cavities 1501 using a plating process or a pasting process. The plurality of interconnects 230 can extend through the encapsulation layer 203. The plurality of interconnects 234 can be coupled to the plurality of acoustic resonators 207. The plurality of interconnects 234 can be coupled to a metal layer (e.g., 274) of the plurality of acoustic resonators 207. The plurality of interconnects 230 and 234 can include vias (e.g., via interconnects) that partially and / or fully extend through the encapsulation layer 203.

[0092] Stage 8 illustrates the state after (i) forming a plurality of interconnects 1520 on the first surface of the encapsulation layer 203 and (ii) forming a plurality of interconnects 1530 on the second surface of the encapsulation layer 203. The plurality of interconnects 1520 and 1530 can be formed using patterning and electroplating processes. The plurality of interconnects 1520 and 1530 can be coupled to a plurality of interconnects 230 and / or 234. Some of the interconnects from the plurality of interconnects 1520 and 1530 can be coupled to acoustic resonators 205 and 207. For example, some of the interconnects from the plurality of interconnects 1520 and 1530 can be coupled to interconnects of acoustic resonator 205 (e.g., 254, 256) and / or interconnects of acoustic resonator 207 (e.g., 274, 276).

[0093] like Figure 15D As shown, stage 9 illustrates the state after (i) forming a dielectric layer 1540 over the first surface of the encapsulation layer 203, the acoustic resonator (e.g., 205), and the plurality of interconnects 1520, and (ii) forming a dielectric layer 1560 over the second surface of the encapsulation layer 203, the acoustic resonator (e.g., 205), and the plurality of interconnects 1530. Dielectric layers 1540 and 1560 can be formed using a deposition process. Dielectric layers 1540 and 1560 may comprise polyimide. However, different implementations may use different materials for dielectric layers 1540 and 1560.

[0094] Phase 10 illustrates the formation of a plurality of cavities 1541 in dielectric layer 1540 and a plurality of cavities 1561 in dielectric layer 1560. Cavities 1541 and 1561 can be formed using laser processes (e.g., laser ablation), photolithography processes (e.g., exposure and development), or etching processes.

[0095] Stage 11 illustrates a condition after (i) forming a plurality of interconnects 1542 in and / or on a dielectric layer 1540, and (ii) forming a plurality of interconnects 1562 in and / or on a dielectric layer 1560. The interconnects 1542 and 1562 can be formed using a patterning process and an electroplating process. Some of the interconnects 1542 can be formed in cavities 1541. Some of the interconnects 1562 can be formed in cavities 1561. The interconnects 1542 and 1562 can include vias, pads, and / or traces. The interconnects 1520 and 1542 can be represented by a plurality of interconnects 244. The interconnects 1530 and 1562 can be represented by a plurality of interconnects 264. The plurality of interconnects (e.g., 1520, 1542) and / or the plurality of interconnects (1530, 1562) can include redistribution interconnects. The plurality of interconnects (e.g., 1520, 1542) and / or the plurality of interconnects (1530, 1562) can be fabricated using a redistribution layer (RDL) fabrication process.

[0096] As shown in Figure 15E Stage 12 illustrates a condition after (i) a dielectric layer 1550, forming a plurality of interconnects 1552 in and / or on the dielectric layer 1550, and (ii) a dielectric layer 1570, forming a plurality of interconnects 1572 in and / or on the dielectric layer 1570. The dielectric layer 1550 is on the dielectric layer 1540. The plurality of interconnects 1552 is coupled to the plurality of interconnects 1542. The dielectric layer 1570 is on the dielectric layer 1560. The plurality of interconnects 1572 is coupled to the plurality of interconnects 1562. The processes of forming the dielectric layers (e.g., 1550, 1570) and the plurality of interconnects (e.g., 1552, 1572) can be similar to the processes described in stages 9-11 of Figure 15D Stage 12 can illustrate the substrate 202 of Figure 2

[0097] Stage 13 illustrates a condition of forming a dielectric layer 1580 on the dielectric layer 1550. The dielectric layer 1580 can be formed using a deposition process. The dielectric layer 1580 can include polyimide. Stage 13 can illustrate the substrate 702 of Figure 7

[0098] As shown in Figure 15F ​​As shown, stage 14 illustrates the state after another substrate 802 is coupled to substrate 702. Substrate 702 includes an encapsulation layer 203, an acoustic resonator 205, an acoustic resonator 207, at least one dielectric layer 240, a plurality of interconnects 244, at least one dielectric layer 260, and a plurality of interconnects 264. The at least one dielectric layer 240 may represent dielectric layers 1540, 1550, and / or 1580. The plurality of interconnects 244 may represent a plurality of interconnects 1542 and 1552. The at least one dielectric layer 260 may represent dielectric layers 1560 and / or 1570. The plurality of interconnects 264 may represent a plurality of interconnects 1562 and 1572.

[0099] Substrate 802 may include a metallization portion 804, a plurality of acoustic resonators 805, a plurality of acoustic resonators 807, an encapsulation layer 803, at least one dielectric layer 840, and a plurality of interconnects 842. Substrate 802 may be formed in a manner similar to that described with respect to substrate 702. Substrate 802 may be formed on substrate 702. For example, acoustic resonators 805 and acoustic resonators may be disposed on at least one dielectric layer 240, and encapsulation layer 803 may be formed on at least one dielectric layer 240. Metallization portion 804 may be formed on encapsulation layer 803. Metallization portion 804 includes at least one dielectric layer 840 and a plurality of interconnects 844.

[0100] Exemplary flowchart of a method for manufacturing a substrate including an acoustic resonator

[0101] Figure 16 An exemplary flowchart of a method 1600 for providing or manufacturing a substrate including an acoustic resonator is illustrated. In some implementations, a method may be used... Figure 16 Method 1600 to provide or manufacture Figure 2 Substrate 202. However, method 1600 can be used to fabricate any substrate including an acoustic resonator.

[0102] It should be noted that Figure 16 The method can combine one or more processes to simplify and / or clarify the methods used to provide or manufacture the substrate. In some implementations, the order of the processes can be changed or modified.

[0103] The method provides a carrier (e.g., 1500) at 1605. The carrier 1500 may include a substrate. Figure 15A Phase 1 is illustrated and an example of providing a carrier is described.

[0104] This method provides at least one acoustic resonator (e.g., 205, 207, 209) on a carrier (at 1610). The acoustic resonator can be positioned using pick-and-place processes. Figure 15AStage 2 of FIG. 1 illustrates and describes an example of providing and placing acoustic resonators over a carrier.

[0105] The method forms (at 1615) an encapsulation layer (e.g., 203) over the carrier and encapsulates the acoustic resonators (e.g., 205, 207, 209). The encapsulation layer 203 can be formed using a compression and transfer molding process, a sheet molding process, or a liquid molding process. The encapsulation layer 203 can encapsulate at least one acoustic resonator at least partially. In some implementations, the encapsulation layer 203 can be formed over the acoustic resonators and portions of the encapsulation layer 203 can be removed (e.g., ground) such that a top surface of the encapsulation layer 203 is coplanar with the at least one acoustic resonator (e.g., 205). The encapsulation layer 203 can include a molding compound, a resin, and / or an epoxy. The encapsulation layer 203 can be a device for encapsulation. The encapsulation layer 203 can be photo-etchable. Figure 15A Stage 3 of FIG. 1 illustrates and describes an example of forming an encapsulation layer.

[0106] Once the encapsulation layer 203 is formed, the method 1600 can decouple the carrier (e.g., 1500) from the encapsulation layer 203 and the acoustic resonators. Decoupling the carrier 1500 can include removing, separating, grinding, and / or dissolving the carrier 1500 using a mechanical process and / or a chemical process. Figure 15B Stage 4 of FIG. 1 illustrates and describes an example of carrier decoupling.

[0107] The method forms (at 1620) a plurality of interconnects (e.g., 230, 234, 236) in the encapsulation layer (e.g., 203). The interconnects can be formed after the encapsulation layer is formed and / or after the carrier 1500 is decoupled. The interconnects can include via interconnects that extend through the encapsulation layer. The interconnects can be coupled to the acoustic resonators in the encapsulation layer. Forming the interconnects (e.g., 230) in the encapsulation layer can include forming cavities in the encapsulation layer and filling the cavities with a conductive material. The interconnects can be formed in the encapsulation layer using a plating process and / or a pasting process. Figures 15B-15C Stages 5-7 of FIG. 1 illustrate and describe an example of forming interconnects in the encapsulation layer.

[0108] The method forms (at 1625) interconnects (e.g., 1520, 1530) over a surface of the encapsulation layer (e.g., 203). The interconnects can be formed over a first surface of the encapsulation layer and over a second surface of the encapsulation layer. The interconnects can be formed over the encapsulation layer using a plating process. The interconnects (e.g., 1520, 1530) can be coupled to the interconnects (e.g., 230, 234, 236) in the encapsulation layer and the at least one acoustic resonator (e.g., 205, 207, 209). Figure 15C Stage 8 of FIG. 1 illustrates and describes an example of forming interconnects over a surface of the encapsulation layer.

[0109] The method can form (at 1630) a dielectric layer (e.g., 1540, 1560) over (i) the first surface of the encapsulation layer and (ii) the second surface of the encapsulation layer. The method can also form (at 1630) additional interconnects (e.g., 1542, 1562) in and over the dielectric layer (e.g., 1540, 1560). Forming the additional interconnects can include forming cavities in the dielectric layer. Figures 15D-15E Stages 9-12 of FIG. 13 illustrate and describe an example of forming additional dielectric layers and additional interconnects.

[0110] Example Electronic Device

[0111] Figure 17 Various electronic devices can be integrated with any of the aforementioned transistors, devices, integrated devices, integrated circuit (IC) packages, integrated circuit (IC) devices, semiconductor devices, integrated circuits, dies, interposers, packages, or package-on-package (PoP). For example, a mobile phone device 1702, a laptop computer device 1704, a fixed location terminal device 1706, or a wearable device 1708 can include a device 1700 as described herein. The device 1700 can be, for example, any of the devices and / or integrated circuit (IC) packages described herein. Figure 17 The devices 1702, 1704, 1706, and 1708 illustrated are merely exemplary. Other electronic devices can also feature the device 1700, including but not limited to a group of devices (e.g., electronic devices) including mobile devices, hand-held personal communication systems (PCS) units, portable data units such as personal digital assistants, global positioning system (GPS) enabled devices, navigation devices, set-top boxes, music players, video players, entertainment units, fixed location data units such as meter reading equipment, communications devices, smartphones, tablets, computers, wearable devices (e.g., watches, glasses), Internet of Things (IoT) devices, servers, routers, electronic devices implemented in automotive vehicles such as autonomous vehicles, or any other device that stores or retrieves data or computer instructions, or any combination thereof.

[0112] Figures 2-14 , Figures 15A-15F and Figures 16-17 One or more components, processes, features, and / or functions illustrated in one or more of Figures 2-14 , Figures 15A-15F and Figures 16-17and their corresponding descriptions in this disclosure are not limited to dies and / or ICs. In some implementations, devices and / or integrated devices can be fabricated, created, provided, and / or produced using Figures 2-14 , Figures 15A-15F and Figures 16-17 and their corresponding descriptions. In some implementations, devices can include dies, integrated devices, integrated passive devices (IPDs), die packages, integrated circuit (IC) devices, device packages, integrated circuit (IC) packages, wafers, semiconductor devices, package-on-package (PoP) devices, and / or interposers.

[0113] It should be noted that the figures in this disclosure can represent actual and / or conceptual representations of various components, parts, objects, devices, packages, integrated devices, integrated circuits, and / or transistors. In some cases, the figures can not be drawn to scale. In some cases, not all components and / or parts can be shown for the sake of clarity. In some cases, the position, location, size, and / or shape of various parts and / or components in the figures can be exemplary. In some implementations, various components and / or parts in the figures can be optional.

[0114] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any implementation or aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects of the disclosure. Likewise, the term “aspects” is not meant to limit the present disclosure to a certain number of aspects. The term “coupled” is used herein to refer to a direct or indirect coupling between two objects (e.g., mechanical coupling). For example, if object A physically touches object B, and object B touches object C, then objects A and C can still be considered coupled to one another — even if they do not directly physically touch one another. The term “electrically coupled” can mean that two objects are coupled together such that electrical current (e.g., a signal, power, ground) can flow between the two objects. The two objects that are electrically coupled can or can not have electrical current flowing between them. Electromagnetic coupling can mean that a signal from one circuit and / or component affects a signal of another circuit and / or component. Electromagnetic coupling can cause crosstalk. Electromagnetic coupling can be a form of signal coupling. The use of the terms “first,” “second,” “third,” and “fourth” (and / or any higher order) is arbitrary. Any component described can be a first component, a second component, a third component, or a fourth component. For example, a component referred to as a second component can be a first component, a second component, a third component, or a fourth component. The terms “top” and “bottom” are arbitrary. A component that is on top of another component can be on top of a component that is on the bottom. A top component can be considered a bottom component and vice versa. The term “encapsulate” means that the object can partially encapsulate or completely encapsulate another object. The term “surround” means that one object can partially surround or completely surround another object. It is further noted that the term “on top of,” which can be used in the context of one component being on top of another component in this application, can mean that the component is on the other component and / or in the other component (e.g., on a surface of the component or embedded in the component). Thus, for example, a first component on top of a second component can mean (1) the first component is on top of the second component but does not directly contact the second component, (2) the first component is on the second component (e.g., on a surface thereof), and / or (3) the first component is in the second component (e.g., embedded therein). The term “about value X” or “approximately value X” used in this disclosure means within 10% of ‘value X.’ For example, a value of about 1 or approximately 1 means a value in the range of 0.9-1.1.

[0115] In some implementations, an interconnect is a device or an element or component of a package that allows or facilitates an electrical connection between two points, elements, and / or components. In some implementations, an interconnect can include a trace, a via, a pad, a pillar, a redistribution metal layer, and / or an under bump metallization (UBM) layer. In some implementations, an interconnect can include a conductive material that can be configured to provide an electrical path for a signal (e.g., a data signal), a ground, and / or a power supply. An interconnect can be part of a circuit. An interconnect can include more than one element or component. An interconnect can be defined by one or more interconnects. Different implementations can use different processes and / or sequences to form an interconnect. In some implementations, an interconnect can be formed using a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, a sputtering process, a spray process, and / or a plating process.

[0116] Furthermore, it should be noted that various disclosures contained herein can be described as processes depicted as flow tables, flow diagrams, structural diagrams, or block diagrams. Although a flow table can describe operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations can be re-arranged. A process is terminated when its operations are completed.

[0117] The various features of the present disclosure described herein can be implemented in different systems without departing from the present disclosure. It should be noted that the foregoing aspects of the present disclosure are merely examples and are not to be construed as limiting the present disclosure. The description of aspects of the present disclosure is intended to be illustrative, and not limiting. Thus, the present teachings can be readily applied to other types of apparatuses. Numerous replacements, modifications, and variations of the present teachings will be apparent to those skilled in the art.

Claims

1. A substrate comprising: an encapsulation layer having a fixed thickness; a first acoustic resonator located in the encapsulation layer, wherein the first acoustic resonator comprises: a first substrate; and a first piezoelectric layer coupled to the first substrate, wherein the first substrate and the first piezoelectric layer comprise a combined first thickness; a second acoustic resonator located in the encapsulation layer, wherein the second acoustic resonator comprises: a second substrate; and a second piezoelectric layer coupled to the second substrate, wherein the second substrate and the second piezoelectric layer comprise a combined second thickness different from the first thickness, wherein the second piezoelectric layer is a separate piezoelectric layer from the first piezoelectric layer, wherein the second substrate is a separate substrate from the first substrate, wherein the second acoustic resonator is located in the encapsulation layer to a side of the first acoustic resonator, and wherein the second acoustic resonator does not overlap the first acoustic resonator in a vertical direction; at least one first dielectric layer coupled to a first surface of the encapsulation layer; a plurality of first interconnects coupled to the first surface of the encapsulation layer, wherein the plurality of first interconnects are at least partially located in the at least one first dielectric layer; at least one second dielectric layer coupled to a second surface of the encapsulation layer, wherein each of the at least one first dielectric layer and the at least one second dielectric layer comprises a material different from the encapsulation layer; a plurality of second interconnects coupled to the second surface of the encapsulation layer, wherein the plurality of second interconnects are at least located in the at least one second dielectric layer; and a matching inductor or a matching capacitor coupled to at least one of the first acoustic resonator or the second acoustic resonator, wherein the first acoustic resonator is one of a surface acoustic wave (SAW) device, a bulk acoustic wave (BAW) device, a film bulk acoustic resonator (FBAR), or a contour mode resonator (CMR), and wherein the second acoustic resonator is a different type of acoustic resonator from the first acoustic resonator.

2. The substrate of claim 1, further comprising a plurality of via interconnects located in the encapsulation layer.

3. The substrate of claim 2, wherein the plurality of via interconnects comprises at least one first via interconnect coupled to the first acoustic resonator.

4. The substrate of claim 3, wherein the at least one first via interconnect is coupled to the plurality of first interconnects.

5. The substrate of claim 3, wherein the at least one first via interconnect is coupled to the plurality of second interconnects.

6. The substrate of claim 1, wherein the at least one first dielectric layer and the plurality of first interconnects form a first metallization portion coupled to the first surface of the encapsulation layer, and wherein the at least one second dielectric layer and the plurality of second interconnects form a second metallization portion coupled to the second surface of the encapsulation layer.

7. The substrate of claim 6, wherein the first metallization portion comprises a first redistribution portion, and wherein the second metallization portion comprises a second redistribution portion.

8. The substrate of claim 1, further comprising: a third acoustic resonator located in the encapsulation layer, wherein the third acoustic resonator comprises: a third substrate; and a third piezoelectric layer coupled to the third substrate, wherein the third substrate and the third piezoelectric layer comprise a third thickness that is different from the combination of the first thickness and the second thickness; and a fourth acoustic resonator located in the encapsulation layer, wherein the fourth acoustic resonator comprises: a fourth substrate; and a fourth piezoelectric layer coupled to the fourth substrate, wherein the fourth substrate and the fourth piezoelectric layer comprise a fourth thickness that is different from the combination of the first thickness, the second thickness, and the third thickness.

9. The substrate of claim 8, wherein the first acoustic resonator, the second acoustic resonator, the third acoustic resonator, and the fourth acoustic resonator are configured as an acoustic filter.

10. The substrate of claim 1, wherein the first acoustic resonator, the second acoustic resonator, the inductor, and the capacitor are configured as a diplexer.

11. An apparatus comprising: an integrated device; and a substrate coupled to the integrated device, the substrate comprising: a means for encapsulation; a means for a first acoustic resonance located in the means for encapsulation, wherein the means for a first acoustic resonance comprises: a first substrate and a first piezoelectric layer coupled to the first substrate, wherein the first substrate and the first piezoelectric layer comprise a first thickness in combination; a means for a second acoustic resonance located in the means for encapsulation, wherein the means for a second acoustic resonance comprises: a second substrate and a second piezoelectric layer coupled to the second substrate, wherein the second substrate and the second piezoelectric layer comprise a second thickness that is different from the combination of the first thickness, wherein the second piezoelectric layer is a piezoelectric layer separate from the first piezoelectric layer, wherein the second substrate is a substrate separate from the first substrate; wherein the means for a second acoustic resonance is located lateral to the means for a first acoustic resonance in the means for encapsulation, and wherein the means for a second acoustic resonance does not overlap the means for a first acoustic resonance in a vertical direction; at least one first dielectric layer coupled to a first surface of the means for encapsulation; a plurality of first interconnects coupled to the first surface of the means for encapsulation, wherein the plurality of first interconnects are at least partially located in the at least one first dielectric layer; at least one second dielectric layer coupled to a second surface of the means for encapsulation, wherein each of the at least one first dielectric layer and the at least one second dielectric layer comprises a material that is different from the encapsulation; a plurality of second interconnects coupled to the second surface of the means for encapsulation, wherein the plurality of second interconnects are at least located in the at least one second dielectric layer; wherein the means for encapsulation is coupled with the at least one first dielectric layer, wherein the component for a first acoustic resonance is one of a surface acoustic wave (SAW) device, a bulk acoustic wave (BAW) device, a film bulk acoustic resonator (FBAR), or a contour mode resonator (CMR), wherein the component for a second acoustic resonance is a different type of component for acoustic resonance than the component for the first acoustic resonance; and a matching inductor or a matching capacitor coupled to at least one of the component for the first acoustic resonance or the component for the second acoustic resonance.

12. The apparatus of claim 11, further comprising a plurality of via interconnects in the component for encapsulation.

13. The apparatus of claim 12, wherein the plurality of via interconnects includes at least one first via interconnect coupled to the component for the first acoustic resonance.

14. The apparatus of claim 11, wherein the at least one first dielectric layer and the plurality of first interconnects form a first metallization portion coupled to the first surface of the component for encapsulation, and wherein the at least one second dielectric layer and the plurality of second interconnects form a second metallization portion coupled to the second surface of the component for encapsulation.

15. The apparatus of claim 11, further comprising a component for a third acoustic resonance and a component for a fourth acoustic resonance, wherein the component for the first acoustic resonance, the component for the second acoustic resonance, the component for the third acoustic resonance, and the component for the fourth acoustic resonance are configured as an acoustic filter.

16. The apparatus of claim 11, wherein the apparatus comprises a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smart phone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an Internet of Things (IoT) device, and a device in an automotive vehicle.

17. A method for fabricating a substrate, comprising: providing a first acoustic resonator comprising a first substrate and a first piezoelectric layer coupled to the first substrate, wherein the first substrate and the first piezoelectric layer comprise a first combined thickness; providing a second acoustic resonator comprising a second substrate and a second piezoelectric layer coupled to the second substrate, wherein the first substrate and the second piezoelectric layer comprise a second combined thickness different from the first combined thickness, wherein the second piezoelectric layer is a piezoelectric layer separate from the first piezoelectric layer, wherein the second substrate is a substrate separate from the first substrate; forming an encapsulation layer over the first acoustic resonator and the second acoustic resonator, wherein the second acoustic resonator is located to a side of the first acoustic resonator in the encapsulation layer, and wherein the second acoustic resonator does not overlap the first acoustic resonator in a vertical direction, forming a plurality of first interconnects over a first surface of the encapsulation layer; forming at least one first dielectric layer over the first surface of the encapsulation layer; forming a plurality of second interconnects over a second surface of the encapsulation layer; forming at least one second dielectric layer over the second surface of the encapsulation layer, wherein each of the at least one first dielectric layer and the at least one second dielectric layer comprises a different material than the encapsulation layer; and providing a matching inductor or a matching capacitor coupled to at least one of the first acoustic resonator or the second acoustic resonator, wherein the at least one first dielectric layer and the plurality of first interconnects form a first metallization portion coupled to the first surface of the encapsulation layer, wherein the at least one second dielectric layer and the plurality of second interconnects form a second metallization portion coupled to the second surface of the encapsulation layer, wherein the encapsulation layer is coupled to the at least one first dielectric layer, wherein the first acoustic resonator is one of a surface acoustic wave (SAW) device, a bulk acoustic wave (BAW) device, a film bulk acoustic resonator (FBAR), or a contour mode resonator (CMR), and wherein the second acoustic resonator is a different type of acoustic resonator than the first acoustic resonator.

18. The method of claim 17, further comprising forming a plurality of via interconnects in the encapsulation layer.

19. The method of claim 17, further comprising a third acoustic resonator and a fourth acoustic resonator, wherein the first acoustic resonator, the second acoustic resonator, the third acoustic resonator, and the fourth acoustic resonator are configured as an acoustic filter.

Images