Method and system for determining performance of mos devices

Abstract

The embodiment of the present disclosure provides a MOS device performance determination method and a determination system, wherein the method comprises: applying an excitation signal to the MOS device, testing the substrate current of the MOS device to obtain a first response current; determining the phase difference between the excitation signal and the first response current to obtain a first phase difference; after the performance of the MOS device is degraded, applying the first stress condition and the excitation signal to the MOS device, and testing the substrate current of the MOS device at intervals of a first preset time length to obtain at least one second response current; determining the phase difference between the excitation signal and each second response current to obtain at least two second phase differences; when the test parameters meet a preset termination condition, determining the performance of the MOS device based on the first phase difference and the second phase difference corresponding to the last measured second response current; and the difference between the frequency of the excitation signal and the characteristic frequency of the Si-SiO2 interface in the MOS device is within a first preset range.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor device testing, and relates to, but is not limited to, a MOS device performance determination method and a determination system. BACKGROUND

[0002] Negative Bias Temperature Instability (NBTI) has a recovery effect, that is, after the stress is removed, the performance of a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET, referred to as MOS for short) device can be recovered within a certain time. The recovery speed and degree of the performance of the MOS device are related to the stress application time, the recovery time, the recovery temperature, and the like.

[0003] Researching the NBTI recovery effect has important guiding significance for designing the toggle signal of NBTI. However, the current NBTI recovery effect test method cannot reflect the NBTI recovery effect law in situ and in real time, and is also easily affected by the subsequent modules. SUMMARY

[0004] Embodiments of the present disclosure provide a MOS device performance determination method and a determination system.

[0005] In a first aspect, embodiments of the present disclosure provide a MOS device performance determination method, which comprises: applying an excitation signal to a MOS device, testing a substrate current of the MOS device to obtain a first response current; determining a phase difference between the excitation signal and the first response current to obtain a first phase difference; after performance degradation of the MOS device, applying a first stress condition and the excitation signal to the MOS device, testing the substrate current of the MOS device at intervals of a first preset time length to obtain at least one second response current; determining a phase difference between the excitation signal and each of the second response currents to obtain at least two second phase differences; based on the first phase difference and a second phase difference corresponding to the last measured second response current, determining the performance of the MOS device when a test parameter meets a preset termination condition; and wherein a difference between a frequency of the excitation signal and a characteristic frequency of a silicon-silicon dioxide (Si-SiO2) interface in the MOS device is within a first preset range.

[0006] In some embodiments, the test parameter meets the preset termination condition, which comprises: a test time meets a second preset time length, or a phase change rate of the second phase difference is less than a preset first change rate.

[0007] In some embodiments, determining the performance of the MOS device based on the first phase difference and a second phase difference corresponding to a last measured second response current comprises: determining a difference between the first phase difference and the second phase difference corresponding to the last measured second response current; and determining the performance of the MOS device based on the difference.

[0008] In some embodiments, determining the performance of the MOS device based on the difference comprises: determining that the performance of the MOS device returns to the first state when the difference is within a second preset range.

[0009] In some embodiments, determining the performance of the MOS device based on the difference comprises: determining that the performance of the MOS device returns to a second state when the difference is not within the second preset range.

[0010] In some embodiments, the method further comprises: after the performance of the MOS device degrades, applying a second stress condition and the excitation signal to the MOS device, and testing the substrate current of the MOS device at intervals of the first preset time length to obtain at least one third response current; wherein the second stress condition is different from the first stress condition; determining a phase difference between the excitation signal and each of the third response currents to obtain at least two third phase differences; obtaining a first time length and a second time length; wherein the first time length is a time length corresponding to when a phase change rate of the second phase difference is less than a preset second change rate, and the second time length is a time length corresponding to when a phase change rate of the third phase difference is less than the preset second change rate; and determining a performance recovery speed of the MOS device under different stress conditions based on the first time length and the second time length.

[0011] In some embodiments, the method further comprises: applying a third stress condition to the MOS device to degrade the performance of the MOS device; wherein the third stress condition comprises a voltage stress and a temperature stress.

[0012] In some embodiments, the first stress condition comprises a voltage stress and / or a temperature stress.

[0013] In some embodiments, the method further comprises: obtaining a characteristic frequency of the Si-SiO2 interface; determining a target characteristic frequency based on the characteristic frequency of the Si-SiO2 interface and the first preset range; determining a target amplitude of the excitation signal to be generated; and adjusting an amplitude of a first clock signal having the target characteristic frequency to the target amplitude to obtain the excitation signal.

[0014] In some embodiments, the acquiring the characteristic frequency of the Si-SiO2 interface comprises: acquiring a transfer function of a system composed of the MOS device; plotting a Nyquist plot or a Bode plot of the system based on the transfer function; obtaining the characteristic frequency of the Si-SiO2 interface based on a frequency corresponding to a virtual part extreme point in the Nyquist plot, or based on a frequency corresponding to a phase angle extreme point in the Bode plot.

[0015] In some embodiments, the determining the target amplitude of the excitation signal to be generated comprises: randomly selecting an amplitude from a set of initial target amplitudes to obtain the target amplitude; the initial target amplitude is an amplitude corresponding to which the real part and the virtual part of the impedance of the MOS device satisfy a Kramers-Kroning relation.

[0016] In some embodiments, the method further comprises: adjusting the amplitude of the first clock signal with the target characteristic frequency until the real part and the virtual part of the impedance of the MOS device under test satisfy the Kramers-Kroning relation to obtain the initial target amplitude.

[0017] In some embodiments, the adjusting the amplitude of the first clock signal with the target characteristic frequency until the real part and the virtual part of the impedance of the MOS device under test satisfy the Kramers-Kroning relation to obtain the initial target amplitude comprises: applying the first stress condition and the first clock signal to the gate of the MOS device, adjusting the amplitude of the first clock signal, and testing the impedance of the MOS device; determining the amplitude corresponding to which the real part and the virtual part of each of the impedance satisfy the Kramers-Kroning relation as the initial target amplitude.

[0018] In some embodiments, the randomly selecting an amplitude from a set of initial target amplitudes to obtain the target amplitude comprises: selecting the largest amplitude from the set of initial target amplitudes to obtain the target amplitude.

[0019] In a second aspect, the present disclosure provides a system for determining performance of a MOS device, the system comprising: an applying component configured to apply an excitation signal to the MOS device and apply a first stress condition and the excitation signal to the MOS device after performance of the MOS device is degraded; a current testing component configured to test a substrate current of the MOS device to obtain a first response current, and test the substrate current of the MOS device at intervals of a first preset time length to obtain at least one second response current; and a processing component configured to determine a phase difference between the excitation signal and the first response current to obtain a first phase difference, determine a phase difference between the excitation signal and each of the second response currents to obtain at least two second phase differences, and determine the performance of the MOS device based on the first phase difference and a second phase difference corresponding to the last measured second response current when a test parameter meets a preset termination condition, wherein a difference between a frequency of the excitation signal and a characteristic frequency of a Si-SiO2 interface in the MOS device is within a first preset range.

[0020] In some embodiments, the applying component is further configured to apply a second stress condition and the excitation signal to the MOS device after performance of the MOS device is degraded, the current testing component is further configured to test the substrate current of the MOS device at intervals of the first preset time length to obtain at least one third response current, and the processing component is further configured to determine a phase difference between the excitation signal and each of the third response currents to obtain at least two third phase differences, obtain a first time length and a second time length, wherein the first time length is a time length corresponding to a case where a phase change rate of the second phase difference is less than a preset second change rate, and the second time length is a time length corresponding to a case where a phase change rate of the third phase difference is less than the preset second change rate, and determine a performance recovery speed of the MOS device under different stress conditions based on the first time length and the second time length.

[0021] In the present disclosure, first, an excitation signal is applied to the MOS device, and a substrate current of the MOS device is tested to obtain a first response current; second, a phase difference between the excitation signal and the first response current is determined to obtain a first phase difference; third, after performance of the MOS device is degraded, a first stress condition and the excitation signal are applied to the MOS device, and the substrate current of the MOS device is tested at intervals of a first preset time length to obtain at least one second response current; fourth, a phase difference between the excitation signal and each of the second response currents is determined to obtain at least two second phase differences; and finally, the performance of the MOS device is determined based on the first phase difference and a second phase difference corresponding to the last measured second response current when a test parameter meets a preset termination condition.

[0022] The determination method in the embodiments of the present disclosure has at least the following advantages: on the one hand, since the excitation signal adopted is an alternating small signal, the law of the NBTI recovery effect can be reflected in situ and in real time, so as to determine the performance of the MOS device; on the other hand, since the substrate current is tested, since the other modules can be simply controlled to be turned off through a test mode or a command in a memory such as a dynamic random access memory (DRAM), and the substrate does not change before and after the stress stage, the NBTI recovery of a certain module or device can be characterized alone, so as to avoid the influence of the subsequent modules. BRIEF DESCRIPTION OF DRAWINGS

[0023] In the drawings, which are not necessarily drawn to scale, like numerals can describe similar components in the different views. Like numerals having different letter suffixes can represent different instances of the components. The drawings illustrate generally, by way of example, various embodiments discussed in the present document.

[0024] Figure 1 NBTI effect in the related art;

[0025] Figure 2 Reaction-diffusion model of NBTI effect in the related art;

[0026] Figure 3 Interfacial Si-H bond cleavage reaction in NBTI effect in the related art;

[0027] Figure 4 NBTI recovery effect of a target device in the related art;

[0028] Figure 5 Implementation flowchart of a MOS device performance determination method provided by the embodiments of the present disclosure;

[0029] Figures 6a to 6c Interface state response under excitation signals of different frequencies;

[0030] Figure 7 Equivalent resistance circuit model of a MOS device;

[0031] Figure 8 Implementation process diagram of a MOS device performance determination method provided by the embodiments of the present disclosure;

[0032] Figure 9 Implementation flowchart of another MOS device performance determination method provided by the embodiments of the present disclosure;

[0033] Figure 10An implementation flowchart of a performance determination method of another MOS device provided by the embodiment of the present disclosure is shown in the figure.

[0034] Figure 11 A recovery effect diagram of NBTI recovery effect under different stress conditions provided by the embodiment of the present disclosure is shown in the figure.

[0035] Figure 12 A Nyquist diagram provided by the embodiment of the present disclosure is shown in the figure.

[0036] Figure 13 A Bode diagram provided by the embodiment of the present disclosure is shown in the figure.

[0037] Figure 14 A test circuit diagram of NBTI recovery effect provided by the embodiment of the present disclosure is shown in the figure.

[0038] Figure 15 A component structure diagram of a performance determination system of a MOS device provided by the embodiment of the present disclosure is shown in the figure. DETAILED DESCRIPTION

[0039] Exemplary embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. While example embodiments of the present disclosure are shown in the drawings, it is understood that the present disclosure can be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0040] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent to one skilled in the art that the present disclosure can be practiced without one or more of these specific details. In other instances, well-known features have not been described in detail in order to avoid obscuring aspects of the present disclosure.

[0041] In the drawings, the size of layers, regions, elements and their relative sizes can be exaggerated for clarity. The same reference numbers represent the same elements throughout.

[0042] It will be understood that when an element or layer is referred to as being "on", "adjacent", "connected" or "coupled" to another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected", or "directly coupled" to another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure. Similarly, a second element, component, region, layer or section discussed below could be termed a first element, component, region, layer or section without departing from the teachings of the present disclosure.

[0043] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0044] Before introducing the embodiments of the present disclosure, the NBTI effect, the NBTI recovery effect and the test method commonly used for the NBTI recovery effect are introduced.

[0045] Reference Figure 1 The NBTI effect generally refers to the performance degradation of a P-type metal oxide semiconductor field effect (PMOS) device under the action of a negative gate voltage (V G <0) applied to the gate 104, i.e. V s =0, V d =0 and V sub=0. Under NBTI stress conditions, the PMOS device channel is in a strongly inverted state. Holes in the channel are injected into the gate oxide layer 105 under the influence of the electric field, generating interface states and oxide charge, thus causing degradation of device parameters. This degradation manifests as an increase in the device's off-state current I. off Increase, threshold voltage V th Negative drift, increased subthreshold swing S, transconductance G m and leakage current I ds Decrease, etc.

[0046] The interpretation models commonly used in NBTI are as follows: Figure 2 The reaction-diffusion model is shown. Also refer to... Figure 2 and Figure 3 When the source, drain, and substrate 101 of the device are grounded, the gate 104 is under negative bias V. G This stage can be called the stress stage. After hydrogen passivation, a large number of Si-H bonds are formed at the Si-SiO2 interface 106 of the device. Under the action of a vertical electric field, the generated holes tunnel and react with the Si-H bonds, causing the Si-H bonds to break. This leaves interface defects and hydrogen atoms in the channel. The hydrogen atoms form hydrogen gas and then overflow from the gate 104 through the gate oxide layer 105. As the duration of the stress state increases, the density of interface traps increases linearly, leading to a continuous increase in the threshold voltage of the PMOS device. The reacted silicon dangling bonds attract a charge, becoming a positively charged interface trap charge. The unstable state formed in this way is called the interface state, which is a reversible electrochemical reaction.

[0047] When the gate-source voltage of the PMOS device is in a positive bias state (V G When (=0), this stage can be called the recovery stage. At this time, some of the hydrogen gas previously formed by hydrogen atoms breaks apart again after gaining energy, and under the action of the reverse electric field, it reacts with the interface trap (Si). + The Si-H bonds recombine to form new bonds. This reduces the density of interface traps in the channel, thereby restoring the threshold voltage of the PMOS device.

[0048] The NBTI recovery effect testing method in related technologies involves using the discontinuous stress method to extract key device parameters, thereby obtaining a series of device parameters and characteristics that change under certain recovery times and environmental conditions. The device parameters that need to be measured mainly include: device output characteristic I... d ~V d Linear region and saturation region transfer characteristics I d ~V g Gate current I g And so on, and extract the threshold voltage V from it. th Maximum transconductance G mmaxLinear leakage current I dlin , saturation leakage current I dsat wait.

[0049] In addition, due to the relevant technology, reference Figure 4 To monitor the NBTI recovery effect of the target device 107, it is necessary to monitor the output of the device. This output must pass through other circuit modules, such as delay-locked loop (DLL) and driver. If the subsequent devices are also in the recovery stage, the information of the target device 107 cannot be accurately given. In other words, the information of the target device is affected by the subsequent modules.

[0050] This disclosure provides a method for determining the performance of a MOS device, with reference to... Figure 5 The method includes steps S501 to S505, wherein:

[0051] Step S501: Apply an excitation signal to the MOS device and test the substrate current of the MOS device to obtain the first response current;

[0052] refer to Figure 1 When an excitation signal ΔV (also known as a perturbation signal, which is a small signal) is applied to the gate 104 of the MOS device, the ohmic contact layer (not shown) does not respond to the excitation signal ΔV; the gate oxide layer 105, due to the presence of a fixed charge, responds to the excitation signal ΔV at a low frequency; the interface state response of the Si-SiO2 interface is similar to the adsorption process, and the response is at a mid-frequency; the excitation signal ΔV causes responses at the source 102, drain 103, and channel, but the response signals are not related to the substrate current ΔI. sub This causes the interface state response of the Si-SiO2 interface to actually occur at high frequencies rather than mid frequencies; due to the presence of source 102, the depletion layer does not respond to the excitation signal ΔV.

[0053] refer to Figure 6a When the frequency of the excitation signal ΔV is higher than the characteristic frequency of the interface state, the interface state parameters have not yet responded, and the disturbance signal begins to excite in the reverse direction. In this case, the AC component of the interface state is frozen. (Reference) Figure 6b When the frequency of the excitation signal ΔV is much lower than the characteristic frequency of the interface state, the interface state response has the same frequency as the excitation signal ΔV. (Reference) Figure 6c When the frequency of the excitation signal ΔV is close to the characteristic frequency of the interface state, the interface state response lags the excitation signal ΔV by π / 4, meaning there is a phase difference of π / 4 between them. To reflect the interface state's response to the excitation signal ΔV, in this embodiment, the difference between the frequency of the excitation signal ΔV and the characteristic frequency of the Si-SiO2 interface is within a first preset range; for example, the frequency of the excitation signal ΔV is equal to the characteristic frequency of the Si-SiO2 interface.

[0054] First response current ΔI sub1 It is the substrate current I sub The AC part, which is the response current to the AC excitation signal ΔV, is also an AC signal with the same frequency as the excitation signal, but with a phase difference.

[0055] Step S502: Determine the phase difference between the excitation signal and the first response current to obtain the first phase difference;

[0056] Here, when an excitation signal with a frequency close to the characteristic frequency of the Si-SiO2 interface is applied to the gate of the MOS device, the equivalent circuit of the MOS device is as follows: Figure 7 As shown. The impedance of the equivalent circuit includes the real part Z of the impedance. Re The imaginary part Z of the impedance Im The real part of the impedance Z Re The imaginary part Z of the impedance Im With interface resistance R interface ( Figure 7 R in Chinese inf (represented) and interface capacitance C interface ( Figure 7 C inf (This indicates that) these two parameters are related. The first phase difference can reflect the real and imaginary parts of the impedance. The phase relationship between the excitation signal and the first response current is determined by the interface resistance R. interface and interface capacitance C interface The decision is made. In implementation, the phase relationship between the excitation signal and the first response current can be expressed as formula (1):

[0057]

[0058] in, Z is the phase difference between the excitation signal and the first response current; Re and Z Im These are the real and imaginary parts of the impedance, respectively; R interface and C interface These are the interface resistance and the interface capacitance, respectively.

[0059] Step S503: After the performance of the MOS device degrades, a first stress condition and an excitation signal are applied to the MOS device, and the substrate current of the MOS device is tested at a first preset time interval to obtain at least one second response current.

[0060] Here, the performance degradation of the MOS device refers to that the MOS device occurs NBTI effect, so that the performance of the MOS device is degraded. The effect of applying the first stress condition to the MOS device is to make the MOS device in the NBTI recovery stage, and the excitation signal applied is to reflect the interface state of the Si-SiO2 interface in the NBTI recovery stage, so as to be able to characterize the NBTI recovery effect in situ.

[0061] In some embodiments, the performance determination method of the MOS device can further include applying a third stress condition to the MOS device to degrade the performance of the MOS device; wherein the third stress condition includes voltage stress and temperature stress.

[0062] In some embodiments, the first stress condition includes voltage stress and / or temperature stress. The voltage stress and the temperature stress can be set as needed, for example, the voltage stress is -1.8 volts (V), and the temperature stress is 120 degrees Celsius (℃), and the embodiments of the present disclosure are not limited thereto.

[0063] Since temperature plays an important role in the reaction at the interface, i.e., the diffusion of the reaction product in the gate oxide layer, the forward reaction in the electrochemical reaction, i.e., the splitting of the Si-H bond, is an endothermic process, and the increase of temperature will increase the rate of the forward reaction. From the perspective of reversible reaction, the increase of temperature breaks the balance of the forward and reverse reactions, although the temperature increases the rate of the forward and reverse reactions to different degrees, but relatively speaking, the high temperature limits the rate of the passivation reaction. Therefore, the increase of temperature promotes the progress of the forward reaction, thereby generating more hydrogen-related substances. At the same time, high temperature increases the energy of charged particles, and the probability of being trapped by traps in the gate oxide layer is reduced. These will result in more hydrogen-related substances entering the gate, thereby reducing the positive charges that can perform de-trapping in the recovery process, reducing the H that can diffuse back to the interface to passivate the interface traps, and ultimately resulting in a decrease in the recovery amount of the device at high temperature. Therefore, it can be considered that higher temperature will increase the solidification of the damage of the gate oxide layer, and the performance recovery amount of the device in the recovery stage is reduced, thereby making the device damage more serious.

[0064] Testing the substrate current of the MOS device at intervals of the first preset time length means testing the substrate current multiple times in the NBTI recovery stage, and the time interval of the test is the first preset time length, that is, the sampling interval is the first preset time length. In implementation, the first preset time length can be set according to experience, for example, it can be 30 seconds (s) or 1 minute (min), etc., and the embodiments of the present disclosure are not limited thereto.

[0065] The second response current ΔI sub1 is the substrate current I subthe AC part, i.e. the response current of the AC excitation signal ΔV, which is also an AC signal and has the same frequency as the excitation signal but has a phase difference.

[0066] In step S504, the phase difference between the excitation signal and each second response current is determined to obtain at least two second phase differences.

[0067] In step S505, when the test parameter meets the preset termination condition, the performance of the MOS device is determined based on the first phase difference and the second phase difference corresponding to the last measured second response current.

[0068] In some embodiments, the test parameter meeting the preset termination condition includes that the test time meets a second preset time length, or the phase change rate of the second phase difference is less than a preset first change rate. In other words, the test of the NBTI recovery effect can be based on time as the cutoff condition, or based on the phase change rate as the cutoff condition.

[0069] Here, the second preset time length can be set according to the actual total length of the NBTI recovery stage and other actual conditions, for example, can be 10 min, 15 min, or 1 hour or other time lengths. The preset first change rate can also be set according to experience and actual conditions.

[0070] In the embodiments of the present disclosure, first, the excitation signal is applied to the MOS device, and the substrate current of the MOS device is tested to obtain a first response current; second, the phase difference between the excitation signal and the first response current is determined to obtain a first phase difference; third, after the performance of the MOS device is degraded, the excitation signal and the first stress condition are applied to the MOS device, and the substrate current of the MOS device is tested at intervals of a first preset time length to obtain at least one second response current; fourth, the phase difference between the excitation signal and each second response current is determined to obtain at least two second phase differences; and finally, when the test parameter meets the preset termination condition, the performance of the MOS device is determined based on the first phase difference and the second phase difference corresponding to the last measured second response current.

[0071] The determination method in the embodiments of the present disclosure has at least the following advantages: on the one hand, since the excitation signal adopted is an AC small signal, the law of the NBTI recovery effect can be reflected in situ and in real time, so as to determine the performance of the MOS device; on the other hand, since the substrate current is tested, the other modules can be easily controlled to be turned off through the test mode or the command in the memory such as the dynamic random access memory, and the substrate does not change before and after the stress stage, so the NBTI recovery of a certain module or device can be characterized alone, thereby avoiding the influence of the subsequent modules.

[0072] The above will be described in detail below with reference to the accompanying drawings. Figures 8 to 10The performance determination method of the MOS device provided by the embodiments of the present disclosure is further described.

[0073] With reference to Figure 8 and Figure 9 , the performance determination method of the MOS device is introduced by taking the test time satisfying the second preset time length as the termination condition. First, before the degradation stress is applied to the MOS device, step S11 is performed, initial phase relationship measurement, that is, the first phase difference is obtained. Then, the degradation stress is selected and applied to the MOS device (corresponding to the third stress condition), so that the MOS device degrades, and the degradation time can be t1. Next, step S12 is performed, the stress condition is selected; the recovery stress (corresponding to the first stress condition) is applied to the MOS device, so that the device gradually recovers, and the recovery time can be t2. Then, step S13 is performed, the read point interval (the substrate current of the MOS device is tested with the first preset time length as the interval) is selected, so that the intermediate process measurement is performed with the interval t3, and the substrate current is measured. Then, step S14 is performed, the phase relationship is recorded, that is, the second phase difference is recorded. Next, step S15 is performed, whether the test time satisfies the predetermined time is judged, if yes, the truncated phase relationship measurement is performed, the second phase difference at the truncation time is obtained, and the process is ended; otherwise, step S14 is continuously performed. Finally, the first phase difference and the second phase difference at the truncation time can be compared, the NBTI recovery effect is evaluated, and the closer the two are, the more obvious the recovery effect is.

[0074] With reference to Figure 8 and Figure 10 , the performance determination method of the MOS device is introduced by taking the phase change rate of the second phase difference being less than the preset first change rate as the termination condition. First, before the degradation stress is applied to the MOS device, step S21 is performed, initial phase relationship measurement, that is, the first phase difference is obtained. Then, the degradation stress is selected and applied to the MOS device (corresponding to the third stress condition), so that the MOS device degrades, and the degradation time can be t1. Next, step S22 is performed, the stress condition is selected; the recovery stress (corresponding to the first stress condition) is applied to the MOS device, so that the device gradually recovers, and the recovery time can be t2. Then, step S23 is performed, the read point interval (the substrate current of the MOS device is tested with the first preset time length as the interval) is selected, so that the intermediate process measurement is performed with the interval t3, and the measured substrate current is measured. Then, step S24 is performed, the phase relationship is recorded, that is, the second phase difference is recorded. Next, step S25 is performed, whether the phase change rate is greater than the preset first change rate is judged, if yes, the phase relationship is continuously recorded; if the phase change rate is less than the preset first change rate, the truncated phase relationship measurement is performed, the second phase difference at the truncation time is obtained, and the process is ended. Finally, the first phase difference and the second phase difference at the truncation time can be compared, the NBTI recovery effect is evaluated, and the closer the two are, the more obvious the recovery effect is.

[0075] In some embodiments, the determining the performance of the MOS device based on the first phase difference and the second phase difference corresponding to the last measured second response current in step S505 can be implemented by step S5051 to step S5052. Wherein:

[0076] In step S5051, the difference between the first phase difference and the second phase difference corresponding to the last measured second response current is determined.

[0077] Here, the last measured second response current refers to the second response current obtained by the test when the test parameters meet the preset termination condition in the NBTI recovery stage. For example, the test duration is 10 min, the test time interval is 30 s, and the number of tests required is 21 times, so the last measured second response current is the second response current obtained by the 21st measurement.

[0078] In step S5052, the performance of the MOS device is determined based on the difference.

[0079] The difference between the first phase difference and the second phase difference can reflect the performance recovery effect of the MOS device. In some embodiments, the implementation of step S5052 can include step S5521 and step S5522, wherein:

[0080] In step S5521, when the difference is within the second preset range, it is determined that the performance of the MOS device is recovered to the first state.

[0081] In step S5522, when the difference is not within the second preset range, it is determined that the performance of the MOS device is recovered to the second state.

[0082] It should be noted that the first state can refer to a state close to the performance of the MOS device before performance degradation, and when the performance of the MOS device is recovered to the first state, it indicates that the recovery effect of the recovery stage is good. The second state can refer to a state with a large difference from the performance of the MOS device before performance degradation, and when the performance of the MOS device is recovered to the second state, it indicates that the recovery effect of the recovery stage is poor.

[0083] In some embodiments, the performance determination method of the MOS device can further include step S506 to step S509, wherein:

[0084] In step S506, after the performance of the MOS device is degraded, a second stress condition and an excitation signal are applied to the MOS device, and the substrate current of the MOS device is tested at intervals of a first preset time duration to obtain at least one third response current; wherein the second stress condition is different from the first stress condition.

[0085] Step S507, determine the phase difference between the excitation signal and each third response current, to obtain at least two third phase differences;

[0086] Here, step S506 and step S507 can be implemented with reference to step S503 and step S504, and the difference includes at least that the stress condition applied to the gate of the MOS device in step S506 is different from the stress condition applied to the gate of the MOS device in step S503. The stress conditions of the two can be different in temperature stress or voltage stress, for example, the temperature in the first stress condition is 120 degrees Celsius, and the voltage stress is 1.8V; the temperature in the second stress condition is 120 degrees Celsius, and the voltage stress is 2.0V.

[0087] Step S508, obtain the first duration and the second duration; wherein the first duration is the duration corresponding to the time when the phase change rate of the second phase difference is less than the preset second change rate, and the second duration is the duration corresponding to the time when the phase change rate of the third phase difference is less than the preset second change rate;

[0088] Here, the preset second change rate can be different from the preset first change rate, and can also be the same, and the embodiments of the present disclosure are not limited thereto.

[0089] Step S509, based on the first duration and the second duration, determine the performance recovery speed of the MOS device under different stress conditions.

[0090] Reference Figure 11 First, before the aging stage of the MOS device, obtain the change rate of the phase relationship between the excitation signal and the first response current of the initial interface Second, apply a degradation stress to the MOS device to cause the performance of the device to degrade and obtain an aging interface. Then, apply different recovery conditions 1 (corresponding to the first stress condition) and recovery conditions 2 (corresponding to the second stress condition) to the MOS device. From Figure 11 It can be found from the above that the recoverable part S1 under the action of the recovery condition 1 is greater than the recoverable part S3 under the action of the recovery condition 2, and the non-recoverable part S2 under the action of the recovery condition 1 is less than the non-recoverable part S4 under the action of the recovery condition 2. In addition, from Figure 11 It can be seen from the above that under the action of the recovery condition 1, when the change rate of the phase relationship between the response current and the excitation signal is the preset second change rate Y, the time used is X1; under the action of the recovery condition 2, when the change rate of the phase relationship between the response current and the excitation signal is the preset second change rate Y, the time used is X2. Therefore, it can be concluded that under the action of the recovery condition 1, the NBTI recovery effect is better and the recovery speed is fast.

[0091] In the embodiments of the present disclosure, on one hand, the phase difference between the excitation signal and the response current is taken as a cut-off condition, and the time when the phase difference reaches a preset second change rate is obtained, so as to reflect the performance recovery speed of the MOS device in the NBTI recovery stage; on the other hand, in combination with the recovery effect and the recovery speed of the MOS device, the influence of different stress conditions on the NBTI recovery stage can be comprehensively evaluated.

[0092] In some embodiments, the performance determination method of the MOS device can further include steps S601 to S604, wherein:

[0093] In step S601, a characteristic frequency of a Si-SiO2 interface is obtained.

[0094] In implementation, the characteristic frequency of the Si-SiO2 interface can be obtained from a Nyquist diagram or a Bode diagram. The Nyquist diagram is a frequency characteristic diagram of a linear control system, and for a continuous-time linear time-invariant system, the gain and phase of the frequency response are plotted in polar coordinates. The Nyquist diagram is often used in control systems or signal processing, and can be used to determine whether a system with feedback is stable. Each point on the curve in the Nyquist diagram represents the amplitude (distance from the origin) and phase (geometric angle), and the numerous different points forming the curve reflect the response of the system to numerous different inputs. The Bode diagram is a graphical method of system frequency response, and the Bode diagram is composed of amplitude and phase angle diagrams, both of which are plotted according to the logarithmic scale of frequency, so the Bode diagram is also called a logarithmic coordinate diagram.

[0095] In some embodiments, step S601 includes steps S6011 to S6013, wherein:

[0096] In step S6011, a transfer function of a system composed of the MOS device is obtained.

[0097] If a system satisfies the following three conditions, the system is a linear time-invariant system: 1) stability, that is, the system returns to the original state after the excitation signal is removed for a period of time; 2) linearity, that is, the response signal has the same angular frequency as the excitation signal, and there is no harmonic signal; 3) causality, responding to the excitation signal and having no noise; the response signal (for example, the response current) depends only on the input (for example, the excitation signal ΔV) at this moment and before this moment.

[0098] In some embodiments, the data validity, i.e., causality, stability, linear condition, can be verified by Kramers-Kroning relation, i.e., the real part and the imaginary part of the impedance satisfy the Kramers-Kroning relation. Under the action of the excitation signal, the system composed of the MOS device is a linear time-invariant system, and the steady-state response of the system is a signal with the same frequency as the excitation signal, different amplitude and phase. The ratio of the amplitude of the output and the input A(ω) is the amplitude-frequency characteristic, and the difference between the phase of the output signal and the input signal is the phase-frequency characteristic. The relationship between the frequency characteristic and the transfer function can be referred to formula (2):

[0099] G(jω)=G(s)|s=jω formula (2);

[0100] wherein, G(jω) is the frequency characteristic, and G(s) is the transfer function.

[0101] Step S6012a, drawing the Nyquist diagram of the system based on the transfer function;

[0102] Step S6013a, obtaining the characteristic frequency of the Si-SiO2 interface based on the frequency corresponding to the extreme point of the imaginary part in the Nyquist diagram.

[0103] Referring to Figure 12 , the Nyquist diagram of the system is drawn based on the transfer function G(s) (wherein, Z' represents the real part of the frequency response, Z'' represents the imaginary part of the frequency response, R (Si-SiO2) represents the resistance of the Si-SiO2 interface), and then the extreme point C of the imaginary part Z'' in the Nyquist diagram is found, so as to obtain the angular frequency ω' corresponding to the extreme point C, and thus the characteristic frequency f1 of the Si-SiO2 interface can be obtained.

[0104] In some embodiments, step S6012a can be replaced by step S6012b, i.e., drawing the Bode diagram of the system based on the transfer function; correspondingly, step S6013a can be replaced by step S6013b, i.e., obtaining the characteristic frequency of the Si-SiO2 interface based on the frequency corresponding to the extreme point of the phase angle in the Bode diagram.

[0105] Referring to Figure 13 , the Bode diagram of the system is drawn based on the transfer function G(s), and then the extreme point D of the phase angle in the Bode diagram is found, so as to obtain the angular frequency corresponding to the extreme point D, and thus the characteristic frequency f1 of the Si-SiO2 interface can be obtained. Figure 13 As can be seen from the above table, the angular frequency corresponding to the extreme point D of the phase angle is 3.69 rad / sec, and thus the characteristic frequency f1 of the Si-SiO2 interface can be obtained.

[0106] Step S602, determining the target characteristic frequency based on the characteristic frequency of the Si-SiO2 interface and the first preset range.​

[0107] Here, the first preset range can be an error-allowed range value, for example, the first preset range is (-ξ, +ξ), and ξ can be determined according to the accuracy of the performance determination method of the MOS device. If allowed, the target characteristic frequency can be equal to the characteristic frequency f1 of the Si-SiO2 interface.

[0108] In step S603, a target amplitude of the excitation signal to be generated is determined.

[0109] When the amplitude of the excitation signal is the target amplitude, the system composed of the MOS device is a linear time-invariant system, that is, the system satisfies the causality, stability and linearity conditions.

[0110] In step S604, the amplitude of the first clock signal with the target characteristic frequency is adjusted to the target amplitude to obtain the excitation signal.

[0111] In the embodiments of the present disclosure, first, the Nyquist diagram or the Bode diagram is obtained according to the transfer function of the system in which the MOS device is located, and the characteristic frequency f1 of the Si-SiO2 interface is determined according to the Nyquist diagram or the Bode diagram, second, the target characteristic frequency is determined based on the characteristic frequency of the Si-SiO2 interface and the first preset range, then, the target amplitude of the excitation signal to be generated is obtained, and the amplitude of the first clock signal with the target characteristic frequency is adjusted to the target amplitude, thereby obtaining the excitation signal.

[0112] In some embodiments, the implementation of step S603 "determining the target amplitude of the excitation signal to be generated" can include randomly selecting an amplitude from a set of initial target amplitudes to obtain the target amplitude; the initial target amplitude is an amplitude corresponding to the real part and the imaginary part of the impedance of the MOS device satisfying the Kramers-Kroning relationship.

[0113] Here, the Kramers-Kroning relationship is a formula that mathematically relates the real part and the imaginary part of a semi-analytic function on a complex plane, and this relationship is often used for linear response functions of physical systems. The physical causality (the system response must be after the force is applied) means that the response function must satisfy the semi-analyticity on the complex plane; conversely, the analyticity of the response function means the causality of the corresponding physical system.

[0114] The initial target amplitude corresponding to the real part and the imaginary part of the impedance of the MOS device satisfying the Kramers-Kroning relationship means that when the first clock signal with the target characteristic frequency and the initial target amplitude is applied to the gate of the MOS device, the real part and the imaginary part of the impedance of the MOS device obtained by testing satisfy the Kramers-Kroning relationship; in other words, the effectiveness of the data can be verified by the Kramers-Kroning relationship.

[0115] In some embodiments, the method for determining the performance of the MOS device further comprises step S605, adjusting the amplitude of the first clock signal with the target characteristic frequency until the real part and the imaginary part of the impedance of the tested MOS device satisfy the Kramers-Kroning relationship, obtaining an initial target amplitude.

[0116] In implementation, step S605 can be realized by step S6051 and step S6052, wherein:

[0117] Step S6051, applying the first stress condition and the first clock signal to the gate of the MOS device, adjusting the amplitude of the first clock signal, and testing the impedance of the MOS device;

[0118] Wherein, step S6051 is a dynamic process, in which the amplitude of the first clock signal needs to be adjusted constantly, and the impedance of the MOS device needs to be tested constantly.

[0119] Step S6052, determining the amplitude corresponding to the real part and the imaginary part of each impedance satisfying the Kramers-Kroning relationship as the initial target amplitude.

[0120] When the real part and the imaginary part of the impedance of the tested MOS device satisfy the Kramers-Kroning relationship, the corresponding amplitude is recorded, so that at least one initial target amplitude can be obtained.

[0121] In implementation, the maximum amplitude can be selected from the set of initial target amplitudes as the target amplitude, so that the noise interference can be reduced, and the accuracy of the performance determination of the MOS device can be improved.

[0122] The test process of the NBTI recovery effect is described by taking the sinusoidal signal as the excitation signal as an example. Referring to Figure 14 , first, the characteristic frequency f1 of the Si-SiO2 interface is determined according to the Nyquist diagram or the Bode diagram;

[0123] Secondly, the frequency of the arbitrary periodic sinusoidal signal CLK (i.e. the first clock signal) is adjusted to f1;

[0124] Thirdly, the amplitude of the first clock signal with the characteristic frequency is adjusted according to the steady-state condition, i.e. the data validity is verified by the Kramers-Kroning relationship, so that at least one initial target amplitude is obtained; in implementation, the maximum amplitude can be selected from the set of initial target amplitudes as the target amplitude, the amplitude of the first clock signal with the characteristic frequency is adjusted to the target amplitude, and the excitation signal ΔV is obtained.

[0125] In some embodiments, the expression of the excitation signal (i.e., the sinusoidal signal) can refer to formula (3):

[0126] ΔV = |ΔV| x sin(ωt) Formula (3);

[0127] wherein |ΔV| is a target amplitude, and ω is related to the inverse of a target characteristic frequency. In implementation, the target amplitude can range from 15 millivolts (mV) to 25 mV, for example, the target amplitude can be 20 mV.

[0128] Finally, the excitation signal ΔV is applied to the gate of the MOS device, and the substrate current I sub of the MOS device is tested to obtain a first response current ΔI sub1 A voltage V GS (a negative voltage) is applied to the gate of the MOS device to cause the MOS device to generate NBTI effect, thereby causing the MOS device to degrade. After the MOS device degrades, the excitation signal ΔV and the first stress condition are applied to the gate of the MOS device, and the substrate current I sub of the MOS device is tested to obtain a second response current ΔI sub2 , and then a first phase difference and a second phase difference are obtained, so that the recovery effect of the NBTI recovery effect can be determined based on the first phase difference and the second phase difference to determine the performance of the MOS device. That is, by monitoring the phase difference between the response current ΔI sub and the excitation signal ΔV, the characteristics of the Si-SiO2 interface can be evaluated in situ.

[0129] The embodiments of the present disclosure also provide a MOS device performance determination system, which can refer to Figure 15 The MOS device performance determination system 150 includes:

[0130] The application component 151 is configured to apply an excitation signal to the MOS device and apply a first stress condition and the excitation signal to the MOS device after the performance of the MOS device degrades;

[0131] The current testing component 152 is configured to test the substrate current of the MOS device to obtain a first response current, and test the substrate current of the MOS device at intervals of a first preset time length to obtain at least one second response current;

[0132] The processing component 153 is configured to determine a phase difference between the excitation signal and the first response current to obtain a first phase difference, determine a phase difference between the excitation signal and each second response current to obtain at least two second phase differences, and determine the performance of the MOS device based on the first phase difference and the second phase difference corresponding to the last measured second response current when a test parameter meets a preset termination condition.

[0133] The difference between the frequency of the excitation signal and the characteristic frequency of the Si-SiO2 interface in the MOS device is within a first preset range.

[0134] Here, the current test component can include any device capable of testing current, such as a multimeter or ammeter, and the embodiments of the present disclosure are not limited thereto.

[0135] In the embodiments of the present disclosure, the MOS device performance determination system includes the above-described application component, the current test component, and the processing component. On the one hand, since the excitation signal applied to the MOS device by the application component is an alternating small signal, the NBTI recovery law can be reflected in situ and in real time. On the other hand, since the current test component tests the substrate current, the influence of the subsequent module on the test result can be avoided.

[0136] In some embodiments, the application component 151 is further configured to apply a second stress condition and an excitation signal to the MOS device after the performance degradation of the MOS device;

[0137] The current test component 152 is further configured to test the substrate current of the MOS device at intervals of a first preset time length to obtain at least one third response current; and the second stress condition is different from the first stress condition.

[0138] The processing component 153 is further configured to determine the phase difference between the excitation signal and each third response current to obtain at least two third phase differences; obtain a first time length and a second time length; the first time length is the time length corresponding to the case that the phase change rate of the second phase difference is less than a preset second change rate, and the second time length is the time length corresponding to the case that the phase change rate of the third phase difference is less than the preset second change rate; and determine the performance recovery speed of the MOS device under different stress conditions based on the first time length and the second time length.

[0139] In several embodiments provided by the present disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, another division mode can be used. For example, a plurality of units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling between the various components shown or discussed can be used.

[0140] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place or distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the embodiments.

[0141] The features disclosed in several method or device embodiments provided by the present disclosure can be arbitrarily combined, without conflict, to obtain new method embodiments or device embodiments.

[0142] The above merely describes some embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A method for determining the performance of a MOS device, characterized in that, The method includes: An excitation signal is applied to the MOS device, and the substrate current of the MOS device is tested to obtain the first response current; The phase difference between the excitation signal and the first response current is determined to obtain the first phase difference, wherein the excitation signal is an AC small signal; After the performance of the MOS device degrades, a first stress condition and the excitation signal are applied to the MOS device, and the substrate current of the MOS device is tested at a first preset time interval to obtain at least one second response current. Determine the phase difference between the excitation signal and each of the second response currents to obtain at least two second phase differences; Under the premise that the test parameters meet the preset termination conditions, the performance of the MOS device is determined based on the first phase difference and the second phase difference corresponding to the last measured second response current; wherein, the difference between the frequency of the excitation signal and the characteristic frequency of the Si-SiO2 interface in the MOS device is within a first preset range; the test parameters meeting the preset termination conditions include: the test time meeting a second preset duration, or, the phase change rate of the second phase difference being less than a preset first change rate; determining the performance of the MOS device based on the first phase difference and the second phase difference corresponding to the last measured second response current includes: determining the difference between the first phase difference and the second phase difference corresponding to the last measured second response current; and determining the performance of the MOS device based on the difference. The method further includes: After the performance of the MOS device degrades, a second stress condition and the excitation signal are applied to the MOS device, and the substrate current of the MOS device is tested at intervals of the first preset duration to obtain at least one third response current; wherein the second stress condition is different from the first stress condition; Determine the phase difference between the excitation signal and each of the third response currents to obtain at least two third phase differences; Obtain a first duration and a second duration; wherein, the first duration is the duration corresponding to when the phase change rate of the second phase difference is less than a preset second change rate, and the second duration is the duration corresponding to when the phase change rate of the third phase difference is less than the preset second change rate; Based on the first duration and the second duration, the performance recovery rate of the MOS device under different stress conditions is determined.

2. The method according to claim 1, characterized in that, Based on the difference, the performance of the MOS device is determined, including: If the difference is within a second preset range, it is determined that the performance of the MOS device has recovered to the first state; If the difference is not within the second preset range, the performance of the MOS device is determined to be restored to the second state.

3. The method according to any one of claims 1 to 2, characterized in that, The method further includes: A third stress condition is applied to the MOS device to degrade its performance. The third stress condition includes voltage stress and temperature stress.

4. The method according to any one of claims 1 to 2, characterized in that, The first stress condition includes voltage stress and / or temperature stress.

5. The method according to any one of claims 1 to 2, characterized in that, The method further includes: Obtain the characteristic frequencies of the Si-SiO2 interface; The target characteristic frequency is determined based on the characteristic frequency of the Si-SiO2 interface and the first preset range; Determine the target amplitude of the excitation signal to be generated; The amplitude of a first clock signal having the target characteristic frequency is adjusted to the target amplitude to obtain the excitation signal.

6. The method according to claim 5, characterized in that, Obtaining the characteristic frequencies of the Si-SiO2 interface includes: Obtain the transfer function of the system composed of the MOS devices; Draw the Nyquist plot or Bode plot of the system based on the transfer function; The characteristic frequencies of the Si-SiO2 interface are obtained based on the frequencies corresponding to the imaginary extreme points in the Nyquist plot, or based on the frequencies corresponding to the phase angle extreme points in the Bode plot.

7. The method according to claim 5, characterized in that, Determining the target amplitude of the excitation signal to be generated includes: Randomly select a value from the set of initial target amplitudes to obtain the target amplitude; the initial target amplitude is the amplitude corresponding to the real part and imaginary part of the impedance of the MOS device satisfying the Kramers-Kroning relationship.

8. The method according to claim 7, characterized in that, The method further includes: The amplitude of the first clock signal with the target characteristic frequency is adjusted until the real and imaginary parts of the impedance of the tested MOS device satisfy the Kramers-Kroning relationship, thus obtaining the initial target amplitude.

9. The method according to claim 8, characterized in that, The adjustment of the amplitude of the first clock signal having the target characteristic frequency until the real and imaginary parts of the impedance of the tested MOS device satisfy the Kramers-Kroning relationship, to obtain the initial target amplitude, includes: The first stress condition and the first clock signal are applied to the gate of the MOS device, the amplitude of the first clock signal is adjusted, and the impedance of the MOS device is tested. The amplitude corresponding to the real and imaginary parts of each impedance satisfying the Kramers-Kroning relationship is determined as the initial target amplitude.

10. The method according to claim 9, characterized in that, The step of randomly selecting a value from the set of initial target amplitudes to obtain the target amplitude includes: The target amplitude is obtained by selecting the largest amplitude from the set of initial target amplitudes.

11. A performance determination system for a MOS device, characterized in that, The system includes: An application component is used to: apply an excitation signal to a MOS device and, after the performance of the MOS device degrades, apply a first stress condition and the excitation signal to the MOS device, wherein the excitation signal is a small AC signal; A current testing component is used to: test the substrate current of the MOS device to obtain a first response current; and test the substrate current of the MOS device at intervals of a first preset duration to obtain at least one second response current. A processing component is configured to: determine the phase difference between the excitation signal and the first response current to obtain a first phase difference; determine the phase difference between the excitation signal and each second response current to obtain at least two second phase differences; and, under the condition that the test parameters meet a preset termination condition, determine the performance of the MOS device based on the first phase difference and the second phase difference corresponding to the last measured second response current. The difference between the frequency of the excitation signal and the characteristic frequency of the Si-SiO2 interface in the MOS device is within a first preset range; the application component is further configured to: apply a second stress condition and the excitation signal to the MOS device after the performance of the MOS device degrades; The current testing component is further configured to: test the substrate current of the MOS device at intervals of the first preset duration to obtain at least one third response current; wherein the second stress condition is different from the first stress condition; The processing component is further configured to: determine the phase difference between the excitation signal and each of the third response currents to obtain at least two third phase differences; acquire a first duration and a second duration; wherein the first duration is the duration corresponding to when the phase change rate of the second phase difference is less than a preset second change rate, and the second duration is the duration corresponding to when the phase change rate of the third phase difference is less than the preset second change rate; and determine the performance recovery speed of the MOS device under different stress conditions based on the first duration and the second duration.

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