A semiconductor heterojunction field effect transistor having a p-type doping structure
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- UNIV OF ELECTRONICS SCI & TECH OF CHINA
- Filing Date
- 2023-03-03
- Publication Date
- 2026-06-09
AI Technical Summary
Existing GaN HFET devices have low breakdown voltage when subjected to breakdown voltage, and the concentrated channel electric field leads to large leakage current. Furthermore, existing technologies may affect the frequency characteristics and on-resistance of the device while improving the breakdown voltage.
A P-type doped layer is introduced between the substrate and the gallium nitride buffer layer. The electric field peaks at the gate drain and drain edge and the channel electric field are modulated by the P-type doped layer. A multi-round alternating non-uniform doping structure is used to form electric field spikes and improve the electric field distribution.
This improves the breakdown voltage and electric field uniformity of the device, reduces leakage current, and maintains the on-resistance and frequency characteristics of the device, thus solving the problem of insufficient breakdown voltage in existing GaN HFET devices.
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Abstract
Description
Technical Field
[0001] This invention belongs to the field of microelectronics, specifically a semiconductor heterojunction field-effect transistor with a P-type doped structure. Background Technology
[0002] Gallium nitride (GaN) has advantages such as a large bandgap, high critical breakdown field strength, high electron mobility, good conductivity, radiation resistance, and chemical stability. At the same time, due to its strong spontaneous polarization effect, it can form a high-concentration and high-mobility two-dimensional electron gas conductive channel at the interface with materials such as aluminum gallium nitride (AlGaN). This makes gallium nitride-based heterojunction field-effect transistors (GaN HFETs) very promising for applications in microwave high-power devices.
[0003] Figure 1 This is a schematic diagram of a conventional enhancement-mode GaN HFET structure. From bottom to top, the structure includes: a substrate (101), a gallium nitride buffer layer (103), a gallium nitride channel layer (104), and an aluminum gallium nitride barrier layer (105). Above the aluminum gallium nitride barrier layer (105) are a source (106), a drain (110), a p-type gallium nitride layer (108), and a gate (109). The source (106) and drain (110) form ohmic contacts with the aluminum gallium nitride barrier layer (105), and the gate (109) forms ohmic contacts with the p-type gallium nitride layer (108). A passivation layer (107) covers the upper surface of the device between the source (106) and the gate (109), and between the gate (109) and the drain (110).
[0004] For conventional GaN HFET devices, the two-dimensional electron gas in the channel between the gate and drain cannot be completely depleted when subjected to withstand voltage, resulting in a narrow depletion region. The channel electric field is mainly concentrated at the gate edge or drain edge, which leads to a low breakdown voltage of the device. At the same time, since the buffer layer material is GaN, the two-dimensional electron gas in the channel cannot be confined, and a leakage path will be formed in the buffer layer, resulting in a large leakage current, which will also cause the device to break down prematurely.
[0005] To improve the breakdown voltage, various measures have been proposed, including field plate technology, back barrier, buffer layer doping, high / low K dielectric, and substrate transfer technology. In 2004, Saito et al. (Saito W, Takada Y, et al. Design and demonstration of high breakdown voltage GaN high electronmobility transistor (HEMT) using field plate structure for power electronics applications[J]. Japanese Journal of Applied Physics, 2004, 43(4): 2239-2242.) fabricated an AlGaN / GaN HEMT device with a breakdown voltage of 600V and an on-resistance of 3.3mΩ·cm using source field plate technology. 2 While using a field plate can reduce the gate edge electric field and increase the breakdown voltage, it also introduces additional parasitic capacitance, which degrades the frequency and switching characteristics of the device.
[0006] Besides field plate technology, other technologies to improve breakdown voltage have also been extensively studied. In 2010, Lu et al. proposed a substrate transfer technology in the literature (Bin Lu. High Breakdown (>1500V) AlGaN / GaN HEMTs by Substrate-Transfer Technology[J].IEEE ELECTRON DEVICE LETTERS,2010,31(9):951-953.). This technology first removes the Si substrate from the GaN HEMT and then transfers it to an insulating carrier wafer. The resulting GaN HEMT structure achieved a breakdown voltage of over 1500V and a breakdown voltage of 5.3mΩ·cm. 2 R on·sp .
[0007] In 2016, Luo Jun et al. used a structure with double buried p-type layers inserted in an N-doped buffer layer in their paper (Luo J, Zhao SL, Lin ZY, et al. Enhancement of Breakdown Voltage in AlGaN / GaN High Electron Mobility Transistors Using Double Buried p-Type Layers[J]. Chinese Physics Letters, 2016.). This structure, which partially depletes the 2DEG electron gas in the channel using the p-type buried layer, significantly improves the breakdown voltage. However, this method also partially depletes the 2DEG, leading to an increase in the device's on-resistance. The partial depletion of the 2DEG electron gas beneath the gate also affects the device's threshold voltage. N-type doping of the buffer layer also increases the device's leakage current.
[0008] Figure 2 This diagram shows a GaN HFET structure with a single uniformly doped P-type semiconductor layer. By placing a single uniformly doped P-type semiconductor layer beneath the gallium nitride buffer layer, the device's breakdown voltage can be significantly improved by enhancing the buffer layer's bandgap to suppress leakage current and improving the electric field distribution in the buffer layer and channel layer. This reduces leakage current without increasing the device's on-resistance. Its breakdown voltage is 905V, significantly higher than... Figure 1 The conventional device shown has a base breakdown voltage of 405V. However, while using a single uniformly doped P-type semiconductor layer can reduce the peak electric field at the gate and drain ends and improve the electric field distribution of the buffer and channel layers, it also introduces a high electric field peak at the drain edge, causing the breakdown point to shift from the gate-drain end to the drain edge, which can also lead to premature device breakdown. Meanwhile, its average breakdown electric field strength is still far lower than the critical breakdown electric field strength of GaN material, which is 3MV / cm.
[0009] In summary, for current applications of power electronic devices, there is a need to find a GaN-based HFET implementation with high withstand voltage, high threshold voltage, and low on-resistance. Summary of the Invention
[0010] To address the aforementioned problems or shortcomings and to solve the issue of insufficient voltage withstand capability in existing GaN HFET devices, this invention provides a semiconductor heterojunction field-effect transistor with a P-type doped structure.
[0011] A semiconductor heterojunction field-effect transistor with a P-type doped structure includes, from bottom to top: a substrate 101, a P-type doped layer 102, a gallium nitride buffer layer 103, a gallium nitride channel layer 104, and an aluminum gallium nitride barrier layer 105. Above the aluminum gallium nitride barrier layer 105, there are a source 106, a drain 110, a P-type gallium nitride layer 108, and a gate 109. The source 106 and the drain 110 form ohmic contacts with the aluminum gallium nitride barrier layer 105, and the gate 109 forms an ohmic contact with the P-type gallium nitride layer 108. A passivation layer 107 covers the upper surface of the device between the source 106 and the gate 109, and between the gate 109 and the drain 110.
[0012] The material of the p-type doped layer 102 is Al. x In y Ga z The material is N, where x+y+z=1, 0≤x≤1, 0≤y≤1, 0≤z≤1; its thickness is less than that of the gallium nitride buffer layer 103. The peak electric field at the gate drain and drain edge, as well as the average electric field of the channel, are modulated by the p-type doped layer 102, making their distribution more uniform. At the same time, the shielding effect of the gallium nitride buffer layer 103, which is thicker than the p-type doped layer 102, avoids the degradation of saturated output current and the increase of on-resistance, thereby improving the breakdown voltage and figure of merit of the device.
[0013] Furthermore, the P-type doped layer 102 is a single P-type non-uniform doped region 111, or a combination structure of non-uniform doped region 111 and P-type uniform doped region 112, or a first P-type uniform doped region 114 and a second P-type uniform doped region 115 with different doping concentrations.
[0014] Furthermore, the non-uniform doped region 111 and the P-type uniform doped region 112 are alternately arranged in multiple rounds to form a P-type doped layer 102.
[0015] Furthermore, the first P-type uniform doped region 114 and the second P-type uniform doped region 115 are alternately arranged in multiple rounds to form a P-type doped layer 102.
[0016] Furthermore, the P-type doped layer 102 includes a P-type non-uniform doped region 111, a P-type uniform doped region 112, and an intrinsic semiconductor region 113, wherein the intrinsic semiconductor region 113 is located between the P-type non-uniform doped region 111 and the P-type uniform doped region 112 and is not doped.
[0017] Furthermore, the P-type non-uniform doped region 111, the intrinsic semiconductor region 113, and the P-type uniform doped region 112 are arranged alternately in n rounds, where n≥2.
[0018] According to the principle of electric field continuity, when the above-mentioned P-type doped layer 102 is composed of more than one material and is arranged in multiple alternating layers, the electric field at the interface between the doped regions of multiple materials will change abruptly when the device is subjected to withstand voltage, and an electric field peak will be generated at the contact interface. This electric field peak can effectively modulate the channel electric field. The alternating doped regions of multiple materials can form multiple electric field peaks, resulting in better withstand voltage performance.
[0019] Furthermore, the doping concentration range of the P-type non-uniform doped region 111 is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 The doping concentration range of the P-type uniformly doped region is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 .
[0020] Furthermore, the non-uniform doping method of the P-type doped layer 102 is Gaussian doping or residual error distribution doping.
[0021] This invention addresses the issue of insufficient breakdown voltage in GaN HFET devices by introducing a P-type doped layer structure on the substrate. P-type doping of the semiconductor layer on the substrate attracts some electric field lines at the gate edge, improving electric field concentration and causing the depletion region to extend towards the drain edge. While reducing the peak electric field at the gate-drain edge, it introduces a new peak electric field at the drain edge, thereby increasing the overall average electric field distribution within the gallium nitride channel and making it more uniform. However, if the P-type doping concentration is too high, it can introduce a very high electric field peak at the drain edge, leading to premature device breakdown. Therefore, the P-type doped layer 102 on the substrate ensures that the peak electric field at the gate-drain edge is reduced without introducing a high peak electric field at the drain edge, resulting in a more uniform overall electric field distribution in the channel and thus improving the device's breakdown voltage. Simultaneously, a thicker GaN buffer layer can shield the influence of the P-type doped layer 102 on the channel, ensuring the device's forward conduction characteristics. The P-type doped layer 102 can improve the energy band of the buffer layer, prevent the two-dimensional electron gas in the gallium nitride channel from leaking into the buffer layer, and reduce the leakage current.
[0022] In summary, this invention modulates the peak electric field at the gate and drain edges, as well as the average electric field of the channel, by specifying the material and type of the P-type doped layer structure, resulting in a more uniform electric field distribution. Simultaneously, the shielding effect of the thicker gallium nitride buffer layer prevents degradation of the saturated output current and increase in on-resistance, thereby improving the device's breakdown voltage and figure of merit. While ensuring device performance, this invention effectively solves the problem of insufficient breakdown voltage in existing GaN HFET devices. Attached Figure Description
[0023] Figure 1 This is a schematic diagram of a typical gallium nitride-based heterojunction field-effect transistor (GaN HFET).
[0024] Figure 2 This is a schematic diagram of a GaN HFET structure with a single uniformly doped P-type semiconductor layer.
[0025] Figure 3 This is a schematic diagram of a semiconductor heterojunction field-effect transistor with a P-type doped structure provided in Example 1.
[0026] Figure 4 This is a schematic diagram of a semiconductor heterojunction field-effect transistor with a P-type doped structure provided in Example 2.
[0027] Figure 5 This is a schematic diagram of a semiconductor heterojunction field-effect transistor with a P-type doped structure provided in Example 3.
[0028] Figure 6 This is a schematic diagram of a semiconductor heterojunction field-effect transistor with a P-type doped structure provided in Example 4.
[0029] Figure 7 This is a schematic diagram of a semiconductor heterojunction field-effect transistor with a P-type doped structure provided in Example 5.
[0030] Figure 8 This is a schematic diagram of a semiconductor heterojunction field-effect transistor with a P-type doped structure provided in Example 6.
[0031] Figure 9 This is a schematic diagram of a semiconductor heterojunction field-effect transistor with a P-type doped structure provided in Example 7.
[0032] Figure 10 This is a comparison chart of the breakdown characteristics of Example 1, a conventional GaN HFET, and a GaN HFET with a single uniformly doped semiconductor layer of P-type.
[0033] Figure 11 This is a comparison diagram of the channel electric field distribution during breakdown of Example 1, a conventional GaN HFET, and a GaN HFET with a single uniformly doped semiconductor layer. Detailed Implementation
[0034] The present invention will now be described in further detail with reference to the embodiments and accompanying drawings.
[0035] Example 1
[0036] like Figure 3As shown, a semiconductor heterojunction field-effect transistor with a P-type doped structure includes, from bottom to top: a substrate 101, a gallium nitride buffer layer 103, a gallium nitride channel layer 104, and an aluminum gallium nitride barrier layer 105; a source 106, a drain 110, a P-type gallium nitride layer 108, and a gate 109 are disposed above the aluminum gallium nitride barrier layer 105, wherein the source 106 and the drain 110 form ohmic contacts with the aluminum gallium nitride barrier layer 105, and the gate 109 forms an ohmic contact with the P-type gallium nitride layer 108; a silicon nitride passivation layer 107 is covered between the source 106 and the gate 109 and between the gate 109 and the drain 110 on the upper surface of the device; a P-type non-uniformly doped layer 111 is also disposed between the gallium nitride buffer layer 103 and the substrate 101.
[0037] Preferably, the doping method of the P-type non-uniform doped layer 111 is Gaussian doping.
[0038] Preferably, the initial doping location of the P-type non-uniform doped layer 111 is at the source electrode 106 interface.
[0039] Preferably, the initial doping concentration of the p-type non-uniform doped layer 111 is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 .
[0040] Preferably, the doped layer is Al. x In y Ga z N material.
[0041] The simulation parameter settings for Example 1 and the comparative conventional GaN HFET and single P-GaN doped layer GaN HFET are shown in Table 1.
[0042] Table 1 Device simulation structural parameters
[0043]
[0044] Table 2 Comparison of Device Simulation Results
[0045]
[0046] As shown in Table 2, the threshold voltage and specific on-resistance are the same for all three device structures, indicating that the device structure in Example 1 did not cause degradation of the device's forward conduction characteristics. Meanwhile, the breakdown voltage of the device structure in Example 1 reached 1518V. Figure 10 The breakdown curves of the three structures are compared to demonstrate the advantages of this invention in improving pressure resistance. Figure 11The diagram shows the channel electric field distribution during breakdown of the three structures. It can be seen that Example 1 can effectively modulate the channel electric field distribution, making it more uniform.
[0047] Example 2
[0048] like Figure 4 As shown, the difference between this embodiment and Embodiment 1 is that the P-type doped layer 102 includes a P-type non-uniform doped region 111 and a P-type uniform doped region 112.
[0049] Example 3
[0050] like Figure 5 As shown, the difference between this embodiment and Embodiment 1 is that the P-type doped layer 102 includes a P-type non-uniform doped region 111 and a P-type uniform doped region 112, and the non-uniform doped region 111 and the P-type uniform doped region 112 are alternately arranged.
[0051] Example 4
[0052] like Figure 6 As shown, the difference between this embodiment and Embodiment 1 is that the P-type doped layer 102 includes a P-type non-uniform doped region 111, a P-type uniform doped region 112, and an intrinsic semiconductor region 113, wherein the intrinsic semiconductor region 113 is located between the P-type non-uniform doped region 111 and the P-type uniform doped region 112, and is not doped.
[0053] Example 5
[0054] like Figure 7 As shown, the difference between this embodiment and Embodiment 1 is that the P-type doped layer 102 includes a first P-type uniform doped region 114 and a second P-type uniform doped region 115, and the doping concentrations of the first P-type uniform doped region 114 and the second P-type uniform doped region 115 are different.
[0055] Example 6
[0056] like Figure 8 As shown, the difference between this embodiment and Embodiment 1 is that the P-type doped layer 102 includes a first P-type uniform doped region 114 and a second P-type uniform doped region 115, and the first P-type uniform doped region 114 and the second P-type uniform doped region 115 are alternately arranged.
[0057] Example 7
[0058] like Figure 9As shown, the difference between this embodiment and Embodiment 1 is that the P-type doped layer 102 includes a P-type non-uniform doped region 111, a P-type uniform doped region 112, and an intrinsic semiconductor region 113. The P-type non-uniform doped region 111, the P-type uniform doped region 112, and the intrinsic semiconductor region 113 are alternately arranged.
[0059] As can be seen from the above embodiments, this invention adds a P-type doped layer between the substrate and the gallium nitride buffer layer on the basis of the traditional gallium nitride HEMT structure. This doped layer can effectively reduce the electric field peaks at the gate drain and drain edge, while making the channel electric field distribution more uniform, thereby improving the breakdown voltage. On the one hand, when the device is in the off state and the drain voltage is continuously increasing, the P-type doped layer can attract some of the electric field lines at the gate drain and drain edge, thereby reducing their electric field peaks, and at the same time extending the depletion region towards the drain, achieving a high breakdown voltage effect. On the other hand, due to the shielding effect of the thicker gallium nitride buffer layer, the P-type doped layer will not affect the saturation conduction current and conduction resistance of the device during forward conduction. At the same time, the structure and process of this invention are relatively simple and highly practical. Ultimately, this invention effectively solves the problem of insufficient breakdown voltage of existing GaN HFET devices while ensuring device performance.
Claims
1. A semiconductor heterojunction field-effect transistor with a P-type doped structure, characterized in that: From bottom to top, the device comprises: a substrate (101), a P-type doped layer (102), a gallium nitride buffer layer (103), a gallium nitride channel layer (104), and an aluminum gallium nitride barrier layer (105). Above the aluminum gallium nitride barrier layer (105), there are a source (106), a drain (110), a P-type gallium nitride layer (108), and a gate (109). The source (106) and the drain (110) form ohmic contacts with the aluminum gallium nitride barrier layer (105), and the gate (109) forms ohmic contacts with the P-type gallium nitride layer (108). A passivation layer (107) is covered between the source (106) and the gate (109) and between the gate (109) and the drain (110) on the upper surface of the device. The material of the p-type doped layer (102) is Al. x In y Ga z N material, where x+y+z=1, 0≤x≤1, 0≤y≤1, 0≤z≤1; the thickness is less than the thickness of the gallium nitride buffer layer (103); the P-type doped layer (102) includes a P-type non-uniform doped region (111), a P-type uniform doped region (112) and an intrinsic semiconductor region (113), wherein the intrinsic semiconductor region (113) is located between the P-type non-uniform doped region (111) and the P-type uniform doped region (112) and is not doped; The initial doping location of the P-type non-uniform doped layer is at the source (106) interface.
2. The semiconductor heterojunction field-effect transistor with a P-type doped structure as described in claim 1, characterized in that: The P-type non-uniform doped region (111), the intrinsic semiconductor region (113), and the P-type uniform doped region (112) are arranged alternately in n rounds, where n≥2.
3. The semiconductor heterojunction field-effect transistor with a P-type doped structure as described in claim 1, characterized in that: The doping concentration range of the P-type non-uniformly doped region (111) is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 The doping concentration range of the P-type uniformly doped region is 1×10⁻⁶. 16 cm -3 ~1×10 20 cm -3 .
4. The semiconductor heterojunction field-effect transistor with a P-type doped structure as described in claim 1, characterized in that: The non-uniform doping mode of the P-type doped layer (102) is Gaussian doping or residual error distribution doping.