Display panel and display device

Abstract

Embodiments of the present application provide a display panel and a display device, and relate to the technical field of display, and are used to solve the technical problem of low resolution of the display panel. The display panel has a plurality of pixel units, and the display panel comprises a first device layer and a second device layer which are arranged in layers. The first device layer comprises a plurality of first pixels emitting light of a first color. The second device layer comprises a plurality of second pixels emitting light of a second color and a plurality of third pixels emitting light of a third color. Each pixel unit comprises a first pixel, a second pixel and a third pixel. In the same pixel unit, the orthographic projection of the second pixel and the third pixel on the first device layer is located in the first pixel, and the light emitted by the first pixel is emitted through at least part of the area around the second pixel and the third pixel. The display panel can reduce the volume occupied by the pixel unit on the device layer, and improve the resolution of the display panel.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Organic light-emitting diode (OLED) display panels are widely used in display devices such as mobile phones and tablets due to their advantages such as self-illumination, wide viewing angle, wide color gamut, and flexibility. In related technologies, the display panel typically contains a light-emitting device layer, within which multiple pixels are arranged in an array. However, the resolution of display panels in these technologies is relatively low. Summary of the Invention

[0003] In view of the above problems, this application provides a display panel and a display device to solve the technical problem of low resolution of the display panel.

[0004] To achieve the above objectives, the embodiments of this application provide the following technical solutions:

[0005] A first aspect of this application provides a display panel having a plurality of pixel units. The display panel includes a first device layer and a second device layer stacked together. The first device layer includes a plurality of first pixels emitting a first color light. The second device layer includes a plurality of second pixels emitting a second color light and a plurality of third pixels emitting a third color light.

[0006] Each pixel unit includes a first pixel, a second pixel, and a third pixel; within the same pixel unit, the orthographic projections of the second pixel and the third pixel onto the first device layer are located within the first pixel, and light emitted from the first pixel exits through at least a portion of the area surrounding the second pixel and the third pixel.

[0007] The display panel of this application embodiment includes a first device layer and a second device layer. The first device layer includes a plurality of first pixels that emit a first color of light. The second device layer includes a plurality of second pixels that emit a second color of light and a plurality of third pixels that emit a third color of light. Each pixel unit of the display panel includes a first pixel, a second pixel, and a third pixel. That is, within the same pixel unit, the first pixel and the second and third pixels are located in different device layers, and the light emitted by the first pixel is emitted through at least a portion of the area surrounding the second and third pixels to realize the display function of the display panel. At the same time, the size occupied by the pixel unit in one device layer is reduced, the number of pixel units in the display panel is increased, thereby improving the resolution of the display panel.

[0008] In some possible implementations, a plurality of the first pixels are arranged in a first matrix within the first device layer; a plurality of the second pixels and a plurality of the first pixels are arranged in a second matrix within the second device layer;

[0009] Along the row direction of the second matrix, the second pixel and the third pixel are arranged alternately, and the orthographic projection of adjacent second pixels and third pixels on the first device layer is located within a first pixel. The adjacent second pixels and third pixels and the first pixel form a pixel unit.

[0010] In some possible implementations, the first pixel has a first opening, and the orthographic projection of the second pixel onto the first device layer covers the first opening.

[0011] In some possible implementations, the edge of the orthographic projection of the second pixel onto the first device layer coincides with the edge of the first aperture.

[0012] In some possible implementations, a second opening is provided within the first pixel, and the orthographic projection of the third pixel onto the first device layer covers the second opening.

[0013] In some possible implementations, the edge of the orthographic projection of the third pixel onto the first device layer coincides with the edge of the second aperture.

[0014] In some possible implementations, the first pixel is a blue light pixel, the second pixel is a red light pixel, and the third pixel is a green light pixel.

[0015] In some possible implementations, the area of ​​the blue light pixel not covered by the orthographic projections of the red light pixel and the green light pixel on the first device layer is larger than the area of ​​the orthographic projection of the red light pixel on the first device layer, and is also larger than the area of ​​the orthographic projection of the green light pixel on the first device layer.

[0016] In some possible implementations, the display panel further includes an array substrate and an insulating layer, wherein the first device layer, the insulating layer and the second device layer are sequentially stacked on the array substrate.

[0017] In some possible implementations, the first device layer includes a first pixel defining layer and a first cathode layer stacked sequentially on the array substrate. The first pixel defining layer is provided with a plurality of first pixel structures spaced apart. The plurality of first pixel structures are electrically connected to the first cathode layer. Each first pixel structure has a first light-emitting material layer forming the first pixel.

[0018] The second device layer includes a second pixel defining layer and a second cathode layer stacked sequentially on the insulating layer. The second pixel defining layer is provided with a plurality of second pixel structures and a plurality of third pixel structures spaced apart. The plurality of second pixel structures and the plurality of third pixel structures are electrically connected to the second cathode layer. Each second pixel structure has a second light-emitting material layer forming the second pixel, and each third pixel structure has a third light-emitting material layer forming the third pixel.

[0019] Each pixel unit includes a first pixel structure, a second pixel structure, and a third pixel structure; within the same pixel unit, the orthographic projections of the second pixel structure and the third pixel structure onto the first pixel defining layer are located within the first pixel structure.

[0020] In some possible implementations, the first cathode layer, the insulating layer, the second pixel defining layer, and the second cathode layer are all light-transmitting materials.

[0021] In some possible implementations, the material of the first cathode layer includes magnesium or silver, and / or the material of the second cathode layer includes magnesium or silver.

[0022] In some possible implementations, the insulating layer is made of silicon oxide or silicon nitride.

[0023] In some possible implementations, the material of the second pixel defining layer is a composite organic material.

[0024] In some possible implementations, the first pixel defining layer is provided with a plurality of spaced first pixel openings;

[0025] The first device layer includes a plurality of first anode blocks and a plurality of first light-emitting units, each corresponding to a plurality of first pixel openings. The plurality of first anode blocks are spaced apart on the array substrate and electrically connected to the array substrate. The first pixel defining layer covers the array substrate and the first anode blocks, and each first pixel opening exposes the corresponding first anode block. Each first light-emitting unit includes a first light-emitting material layer, and each first light-emitting unit fills the corresponding first pixel opening, with one end in contact with the exposed surface of the first anode block and the other end in contact with the first cathode layer.

[0026] Each of the first pixel openings forms the first pixel structure with the corresponding first anode block and the first light-emitting unit.

[0027] In some possible implementations, the second pixel defining layer is provided with a plurality of second pixel openings and a plurality of third pixel openings spaced apart, and the second device layer further includes a plurality of second anode blocks, a third anode blocks, a second light-emitting unit and a third light-emitting unit;

[0028] Multiple second anode blocks and multiple third anode blocks are spaced apart on the insulating layer, and both the second anode blocks and the third anode blocks are electrically connected to the array substrate. A second pixel defining layer covers the insulating layer, the second anode blocks, and the third anode blocks, with each second pixel opening exposing a corresponding second anode block. Each second light-emitting unit has a second light-emitting material layer, and each second light-emitting unit fills a corresponding second pixel opening, with one end contacting the exposed surface of the second anode block and the other end contacting the second cathode layer. Each third pixel opening exposes a corresponding third anode block. Each third light-emitting unit has the third light-emitting material layer, and each third light-emitting unit fills a corresponding third pixel opening, with one end contacting the exposed surface of the third anode block and the other end contacting the second cathode layer.

[0029] Each second pixel opening forms a second pixel structure with the corresponding second anode block and the second light-emitting unit; each third pixel opening forms a third pixel structure with the corresponding third anode block and the third light-emitting unit.

[0030] In some possible implementations, the first anode block is provided with a first through hole and a second through hole spaced apart, the first through hole being located within the orthographic projection of the second anode block on the array substrate, the second through hole being located within the orthographic projection of the third anode block on the array substrate, and the first pixel defining layer filling the first through hole and the second through hole;

[0031] The display panel is provided with a first via and a second via. The first via passes through the insulating layer, the first cathode layer and the first pixel defining layer filled in the first via, and connects the second anode block and the array substrate. The second via passes through the insulating layer, the first cathode layer and the first pixel defining layer filled in the second via, and connects the third anode block and the array substrate.

[0032] In some possible implementations, the conductive material in the first via and the conductive material in the second via are both insulated from the first cathode layer;

[0033] In some possible implementations, the walls of both the first via and the second via are provided with insulating material;

[0034] In some possible implementations, the first cathode layer is provided with a third through hole and a fourth through hole, the orthographic projection of the third through hole on the array substrate is located within the orthographic projection of the first through hole on the array substrate, the insulating layer is filled in the third through hole, and the first via hole passes through the insulating layer filled in the third through hole and the first pixel defining layer filled in the first through hole.

[0035] The orthographic projection of the fourth through-hole on the array substrate is located within the orthographic projection of the second through-hole on the array substrate. The insulating layer fills the fourth through-hole. The second via passes through the insulating layer filled in the fourth through-hole and the first pixel defining layer filled in the second through-hole.

[0036] A second aspect of this application provides a display device including a display panel as described in any of the preceding claims.

[0037] The display device of this application embodiment includes the display panel described in any of the above claims. Therefore, the display device has the advantages of the display panel described in any of the above claims, which will not be repeated here. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a top view of a display panel in some possible implementations of embodiments of this application;

[0040] Figure 2 This is a top view of the display panel in some other possible implementations of the embodiments of this application;

[0041] Figure 3 This is a top view of the display panel in some other possible implementations of the embodiments of this application;

[0042] Figure 4 This is a top view of the display panel in some other possible implementations of the embodiments of this application;

[0043] Figure 5 for Figure 1 Schematic diagram of the cross-sectional structure along the AA direction;

[0044] Figure 6This is a schematic cross-sectional view of the AA direction in some other possible implementations of the embodiments of this application.

[0045] Explanation of reference numerals in the attached figures:

[0046] 10-pixel unit;

[0047] 110 - First pixel; 111 - First opening;

[0048] 112 - Second opening; 120 - Second pixel;

[0049] 130 - Third pixel;

[0050] 20-array substrate;

[0051] 210 - Substrate; 220 - Driving array layer;

[0052] 30 - First device layer;

[0053] 310 - First pixel limiting layer; 311 - First pixel opening;

[0054] 320 - First cathode layer; 321 - Third through hole;

[0055] 322 - Fourth through hole; 330 - First anode block;

[0056] 331 - First through hole; 332 - Second through hole;

[0057] 340 - First light-emitting unit; 350 - First pixel structure;

[0058] 40 - Insulation layer;

[0059] 50 - Second device layer;

[0060] 510 - Second pixel limiting layer; 511 - Second pixel opening;

[0061] 512 - Third pixel opening; 520 - Second cathode layer;

[0062] 530 - Second anode block; 540 - Third anode block;

[0063] 550 - Second light-emitting unit; 560 - Third light-emitting unit;

[0064] 570 - Second pixel structure; 580 - Third pixel structure;

[0065] 60 - First via;

[0066] 70 - Second via;

[0067] 80-Encapsulation layer;

[0068] 810 - First inorganic encapsulation layer; 820 - Organic encapsulation layer;

[0069] 830 - Second inorganic encapsulation layer. Detailed Implementation

[0070] As described in the background section, there is a technical problem with low resolution in display panels. Through long-term research, the inventors have discovered that this is because display panels typically include a light-emitting device layer containing multiple pixels. Due to gaps between adjacent pixels, the width of these gaps cannot be further reduced due to limitations in manufacturing processes. Furthermore, the limited space within the light-emitting device layer prevents an increase in the number of pixels, thus reducing the display panel's resolution.

[0071] To address the aforementioned technical problems, the display panel of this application embodiment is provided with a stacked first device layer and a second device layer. The first device layer includes a plurality of first pixels; the second device layer includes a plurality of second pixels and a plurality of third pixels. Each pixel unit of the display panel includes a first pixel, a second pixel, and a third pixel. That is, within the same pixel, the first pixel and the second and third pixels are located in different device layers. Furthermore, light emitted from the first pixel is emitted from at least a portion of the area surrounding the first and second pixels, thereby reducing the size occupied by the pixel unit within a single device layer, increasing the number of pixel units in the display panel, and thus improving the resolution of the display panel.

[0072] To make the above-mentioned objectives, features, and advantages of the embodiments of this application more apparent and understandable, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0073] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual proportions and are only intended to illustrate the content of the embodiments of this application. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

[0074] refer to Figure 1The display panel of this application embodiment includes a first device layer and a second device layer stacked together. The first device layer includes a plurality of first pixels 110 emitting a first color light. The second device layer includes a plurality of second pixels 120 emitting a second color light and a plurality of third pixels 130 emitting a third color light. The display panel has a plurality of pixel units 10, each pixel unit 10 including a first pixel 110, a second pixel 120, and a third pixel 130. Within the same pixel unit 10, the orthographic projections of the second pixel 120 and the third pixel 130 on the first device layer are located within the first pixel 110, and the light emitted by the first pixel 110 exits through at least a portion of the area surrounding the second pixel 120 and the third pixel 130.

[0075] The display panel of this embodiment includes a first device layer and a second device layer. The first device layer has a plurality of first pixels 110 that emit a first color of light. The second device layer includes a plurality of second pixels 120 that emit a second color of light and a plurality of third pixels 130 that emit a third color of light. Each pixel unit 10 of the display panel includes a first pixel 110, a second pixel 120, and a third pixel 130. That is, within the same pixel unit 10, the first pixel 110 and the second pixel 120 and the third pixel 130 are located in different device layers, and the light emitted by the first pixel 110 is emitted through at least a portion of the area surrounding the second pixel 120 and the third pixel 130, thereby realizing the display function of the display panel. At the same time, the size occupied by the pixel unit 10 in one device layer is reduced, the number of pixel units 10 in the display panel is increased, and thus the resolution of the display panel is improved.

[0076] It should be noted that the orthographic projections of the second pixel 120 and the third pixel 130 onto the first device layer are located within the first pixel 110, meaning that the second pixel 120 and the third pixel 130 are positioned relative to the first pixel 110. For example... Figure 1 As shown, the orthographic projections of the second pixel 120 and the third pixel 130 onto the first device layer can be located in the central region of the first pixel 110. For example... Figure 2 and Figure 3 As shown, at least one edge of the orthographic projection of the second pixel 120 and the third pixel 130 onto the first device layer may coincide with one edge of the first pixel 110. It is understood that the orthographic projection of the second pixel 120 and the third pixel 130 onto the first device layer may also be located in other areas within the first pixel 110, as long as the light emitted from the first pixel 110 can exit through at least a portion of the area surrounding the second pixel 120 and the third pixel 130.

[0077] For example, refer to Figure 1Multiple first pixels 110 can be arranged in a first matrix within the first device layer. Multiple second pixels 120 and multiple first pixels 110 can be arranged in a second matrix within the second device layer. Along the row direction of the second matrix, such as... Figure 1 In the horizontal direction shown, the second pixel 120 and the third pixel 130 can be arranged alternately. The orthographic projection of adjacent second pixels 120 and third pixels 130 on the first device layer is located within a first pixel 110. The adjacent second pixels 120 and third pixels 130 together with the first pixel 110 form a pixel unit 10. That is, a pixel unit 10 includes a first pixel 110, a second pixel 120 and a third pixel 130.

[0078] In some possible implementations of the embodiments of this application, the plurality of first pixels 110, the plurality of second pixels 120, and the plurality of third pixels 130 may be arranged in other forms. Alternatively, adjacent pixel units 10 may share a first pixel 110, a second pixel 120, and / or a third pixel 130. Further details regarding this aspect will not be elaborated upon in the embodiments of this application.

[0079] refer to Figure 1 A first aperture 111 may be provided within the first pixel 110, and the orthographic projection of the second pixel 120 on the first device layer covers the first aperture 111. Light emitted from the area where the orthographic projections of the first pixel 110 and the second pixel 120 are opposite will be blocked by the second pixel 120. Providing the first aperture 111 reduces the area of ​​this area, thereby reducing the area of ​​the first pixel 110, and consequently reducing the amount of light-emitting material required to manufacture the first pixel 110, thus lowering the material cost of the display panel. For example, refer to... Figure 4 The edge of the orthographic projection of the second pixel 120 on the first device layer can coincide with the edge of the first aperture 111, so as to minimize the area of ​​the first pixel 110 and further reduce the material cost of the display panel.

[0080] A second opening 112 may be provided within the first pixel 110, and the orthographic projection of the third pixel 130 on the first device layer covers the second opening 112. Light emitted from the area opposite the orthographic projections of the first pixel 110 and the third pixel 130 will be blocked by the third pixel 130. Providing the second opening 112 reduces the area of ​​this region, thereby reducing the area of ​​the first pixel 110, and consequently reducing the amount of light-emitting material required to manufacture the first pixel 110, thus lowering the material cost of the display panel. For example, refer to... Figure 4 The edge of the orthographic projection of the third pixel 130 on the first device layer can coincide with the edge of the second aperture 112 to minimize the area of ​​the first pixel 110, thereby further reducing the material cost of the display panel.

[0081] The light emitted by the first pixel 110, the second pixel 120, and the third pixel 130 can be of the three primary colors. By mixing the light emitted by the first pixel 110, the second pixel 120, and the third pixel 130 in different proportions, other different colors of light can be obtained, thereby realizing the display function of the display panel. For example, the first pixel 110 can be a blue light pixel, the second pixel 120 can be a red light pixel, and the third pixel 130 can be a green light pixel. It is understood that the light emitted by the first pixel 110, the second pixel 120, and the third pixel 130 can also be of other three primary colors; this embodiment will not elaborate on this further.

[0082] For example, when the first pixel 110 is a blue pixel, the second pixel 120 is a red pixel, and the third pixel 130 is a green pixel, the area of ​​the blue pixel not covered by the orthographic projections of the red and green pixels on the first device layer can be larger than the area of ​​the orthographic projections of the red pixels on the first device layer, and also larger than the area of ​​the orthographic projections of the green pixels on the first device layer. This configuration increases the area of ​​the blue pixel, thereby extending its lifespan. It makes the lifespan of the blue pixel comparable to that of the red and green pixels, thus preventing a shortened lifespan of the display panel due to the short lifespan of the blue pixels.

[0083] The display panel can be an OLED display panel, meaning that the first pixel 110 in the first device layer, the second pixel 120 and the third pixel in the second device layer can all be OLED devices. For example, refer to... Figure 5 The display panel may also include an array substrate 20 and an insulating layer 40, and the first device layer 30, the insulating layer 40 and the second device layer 50 may be stacked sequentially on the array substrate 20.

[0084] The array substrate 20 may include a substrate 210 and a driving array layer 220 disposed on the substrate 210. Exemplarily, the substrate 210 may be a rigid substrate, such as glass; or it may be a flexible substrate, such as polyimide. The driving array layer 220 contains a plurality of pixel driving circuits, which may be correspondingly disposed with and electrically connected to the first pixel 110, the second pixel 120, and the third pixel 130, thereby driving the first pixel 110, the second pixel 120, and the third pixel 130 to emit light, thus realizing the function of the display panel displaying images.

[0085] For example, refer to Figure 5The first device layer 30 may include a first pixel defining layer 310 and a first cathode layer 320 sequentially stacked on the array substrate 20. The first pixel defining layer 310 is provided with a plurality of spaced first pixel structures 350, which are electrically connected to the first cathode layer 320. Each first pixel structure 350 has a first light-emitting material layer forming a first pixel 110. The second device layer 50 may include a second pixel defining layer 510 and a second cathode layer 520 sequentially stacked on the insulating layer 40. The second pixel defining layer 510 is provided with a plurality of spaced second pixel structures 570 and a plurality of third pixel structures 580, which are electrically connected to the second cathode layer 520. Each second pixel structure 570 has a second light-emitting material layer forming a second pixel 120, and each third pixel structure 580 has a third light-emitting material layer forming a third pixel 130. Each pixel unit 10 includes a first pixel structure 350, a second pixel structure 570, and a third pixel structure 580. Within the same pixel unit 10, the orthogonal projections of the second pixel structure 570 and the third pixel structure 580 onto the first pixel defining layer 310 are located within the first pixel structure 350.

[0086] refer to Figure 5 The first pixel defining layer 310 may be provided with a plurality of spaced first pixel openings 311. The plurality of first pixel openings 311 are used to define the size of the first pixel 110. The first device layer 30 may include a plurality of first anode blocks 330 and a plurality of first light-emitting units 340, which are disposed one-to-one with the plurality of first pixel openings 311. The plurality of first anode blocks 330 are spaced apart on the array substrate 20 and electrically connected to the array substrate 20. The first pixel defining layer 310 covers the array substrate 20 and the first anode blocks 330, and each first pixel opening 311 exposes the corresponding first anode block 330. Each first light-emitting unit 340 includes a first light-emitting material layer for emitting a first color light. Each first light-emitting unit 340 fills the corresponding first pixel opening 311, with one end in contact with the exposed surface of the first anode block 330 and the other end in contact with the first cathode layer 320. Each first pixel opening 311, the corresponding first anode block 330 and the first light-emitting unit 340 form a first pixel structure 350. The array substrate 20 can inject holes and electrons into the first light-emitting unit 340 through the first anode block 330 and the first cathode layer 320, so that the first light-emitting unit 340 emits light of the first color.

[0087] The second pixel defining layer 510 is provided with a plurality of spaced second pixel openings 511 and a plurality of third pixel openings 512. The second pixel openings 511 are used to define the size of the second pixel 120, and the third pixel openings 512 are used to define the size of the third pixel 130. The second device layer 50 may further include a plurality of second anode blocks 530, a third anode block 540, a second light-emitting unit 550, and a third light-emitting unit 560. The plurality of second anode blocks 530 and the plurality of third anode blocks 540 are all spaced apart on the insulating layer 40, and the second anode blocks 530 and the third anode blocks 540 are all electrically connected to the array substrate 20. The second pixel defining layer 510 covers the insulating layer 40, the second anode blocks 530, and the third anode blocks 540, and each second pixel opening 511 exposes the corresponding second anode block 530. Each second light-emitting unit 550 includes a second light-emitting material layer for emitting a second color light. Each second light-emitting unit 550 fills a corresponding second pixel opening 511, with one end in contact with the exposed surface of the second anode block 530 and the other end in contact with the second cathode layer 520. Each second pixel opening 511, together with the corresponding second anode block 530 and the second light-emitting unit 550, forms a second pixel structure 570. The array substrate 20 can inject holes and electrons into the second light-emitting unit 550 through the second anode block 530 and the second cathode layer 520, so that the second light-emitting unit 550 emits a second color light.

[0088] Each third pixel opening 512 exposes a corresponding third anode block 540. Each third light-emitting unit 560 includes a third light-emitting material layer for emitting a third color light. Each third light-emitting unit 560 fills the corresponding third pixel opening 512, with one end in contact with the exposed surface of the third anode block 540 and the other end in contact with the second cathode layer 520. Each third pixel opening 512, the corresponding third anode block 540, and the third light-emitting unit 560 form a third pixel structure 580. The array substrate 20 can inject holes and electrons into the third light-emitting unit 560 through the third anode block 540 and the second cathode layer 520, so that the third light-emitting unit 560 emits third color light.

[0089] The materials of the first cathode layer 320, insulating layer 40, second pixel defining layer 510, and second cathode layer 520 can all be light-transmitting materials to avoid blocking the light emitted from the first pixel structure 350, allowing the light emitted from the first pixel structure 350 to exit from at least a portion of the area surrounding the second pixel structure 570 and the third pixel structure 580. For example, the material of the first cathode layer 320 may include magnesium or silver, and / or the material of the second cathode layer 520 may include magnesium or silver. The material of the insulating layer 40 may include silicon oxide or silicon nitride. The material of the second pixel defining layer 510 may be a composite organic material.

[0090] In some possible implementations of this application, a patterned connecting metal layer may be provided within the second device layer 50. This connecting metal layer connects each of the second anode blocks 530 and each of the third anode blocks 540, and is connected to the connecting lines in the display panel bezel area, so that the second anode blocks 530 and each of the third anode blocks 540 are electrically connected to the array substrate 20 via the connecting metal layer and the connecting lines. The material of the connecting metal layer can be a light-transmitting material, such as indium tin oxide (ITO), to avoid blocking the light emitted from the first pixel structure 350, thereby ensuring the display effect of the display panel.

[0091] In some other possible implementations of the embodiments of this application, reference is made to Figure 5 The first anode block 530 may be provided with a first through hole 331 and a second through hole 332 spaced apart. The first through hole 331 is located within the orthographic projection of the second anode block 530 on the array substrate 20, and the second through hole 332 is located within the orthographic projection of the third anode block 540 on the array substrate 20. The first pixel defining layer 310 fills the first through hole 331 and the second through hole 332. The display panel is also provided with a first via hole 60 and a second via hole 70. The first via hole 60 passes through the insulating layer 40, the first cathode layer 320, and the first pixel defining layer 310 filled in the first through hole 331, and connects the second anode block 530 and the array substrate 20. The second via hole 70 passes through the insulating layer 40, the first cathode layer 320, and the first pixel defining layer 310 filled in the second through hole 332, and connects the third anode block 540 and the array substrate 20.

[0092] This configuration allows the use of the area where the first pixel structure 350 is opposite to the second pixel structure 570 and the third pixel structure 580—that is, the area where the light emitted by the first pixel structure 350 is blocked by the second pixel structure 570 and the third pixel structure 580—to provide a first via 60 and a second via 70 to electrically connect the second anode block 530 and the array substrate 20, and the third anode block 540 and the array substrate 20. This eliminates the need for connecting lines in the bezel area of ​​the display panel, which is beneficial for achieving a narrower bezel in the display panel.

[0093] It should be noted that the first via 60 and the second via 70 refer to through holes with conductive material formed inside, so as to make electrical connections between different layers of the display panel.

[0094] The conductive material in the first via 60 and the conductive material in the second via 70 can both be insulated from the first cathode layer 320, so as to avoid short circuits in the second pixel structure 570 and the third pixel structure 580 caused by the conductive materials in the first via 60 and the second via 70 being interconnected with the first cathode layer 320.

[0095] In some possible implementations of the embodiments of this application, reference is made to Figure 5 The walls of both the first via 60 and the second via 70 may be provided with insulating material. The insulating material insulates the conductive material within the first via 60 from the first cathode layer 320.

[0096] In some other possible implementations of the embodiments of this application, reference is made to Figure 6 The first cathode layer 320 is provided with a third through-hole 321 and a fourth through-hole 322. The orthographic projection of the third through-hole 321 on the array substrate 20 lies within the orthographic projection of the first through-hole 331 on the array substrate 20. An insulating layer 40 is filled within the third through-hole 321. A first via 60 passes through the insulating layer 40 filled within the third through-hole 321 and the first pixel defining layer 310 filled within the first through-hole 331. The insulating layer 40 filled within the third through-hole 321 can insulate the conductive material within the first via 60 from the first cathode layer 320.

[0097] The orthographic projection of the fourth via 322 on the array substrate 20 lies within the orthographic projection of the second via 332 on the array substrate 20. An insulating layer 40 fills the fourth via 322. A second via 70 passes through the insulating layer 40 filling the fourth via 322 and the first pixel defining layer 310 filling the second via 332. The insulating layer 40 filling the fourth via 322 can insulate the conductive material within the second via 70 from the first cathode layer 320.

[0098] refer to Figure 6 The display panel may further include an encapsulation layer 80, which is disposed on the side of the second device layer 50 facing away from the insulating layer 40. The encapsulation layer 80 encapsulates the second device layer 50 and the first device layer 30 to prevent external moisture, oxygen, etc., from entering the first light-emitting unit 340 of the second device layer 50, and the second light-emitting unit 550 and the third light-emitting unit 560 of the first device layer 30, thus preventing the first light-emitting unit 340, the second light-emitting unit 550, and the third light-emitting unit 560 from malfunctioning. For example, the encapsulation layer 80 may include a first inorganic encapsulation layer 810, an organic encapsulation layer 820, and a second inorganic encapsulation layer 830 sequentially stacked on the side of the second device layer 50 facing away from the insulating layer 40.

[0099] This application also provides a display device including the display panel described above. Since the display device of this application includes the aforementioned display panel, it possesses the advantages of the aforementioned display panel, which will not be elaborated upon further here.

[0100] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display panel, characterized in that, The display panel has multiple pixel units. The display panel includes an array substrate, an insulating layer, and a first device layer and a second device layer stacked on top of each other. The first device layer, the insulating layer, and the second device layer are stacked sequentially on the array substrate. The first device layer includes multiple first pixels that emit a first color light. The second device layer includes multiple second pixels that emit a second color light and multiple third pixels that emit a third color light. Each pixel unit includes a first pixel, a second pixel, and a third pixel; within the same pixel unit, the orthographic projections of the second pixel and the third pixel onto the first device layer are located within the first pixel, and light emitted from the first pixel exits through at least a portion of the area surrounding the second pixel and the third pixel.

2. The display panel according to claim 1, characterized in that, The plurality of first pixels are arranged in a first matrix within the first device layer; the plurality of second pixels and the plurality of first pixels are arranged in a second matrix within the second device layer; Along the row direction of the second matrix, the second pixel and the third pixel are arranged alternately, and the orthographic projection of adjacent second pixels and third pixels on the first device layer is located within a first pixel. The adjacent second pixels and third pixels and the first pixel form a pixel unit.

3. The display panel according to claim 2, characterized in that, The first pixel has a first opening, and the orthographic projection of the second pixel onto the first device layer covers the first opening.

4. The display panel according to claim 3, characterized in that, The edge of the orthographic projection of the second pixel onto the first device layer coincides with the edge of the first aperture.

5. The display panel according to claim 4, characterized in that, The first pixel has a second opening, and the orthographic projection of the third pixel onto the first device layer covers the second opening.

6. The display panel according to claim 5, characterized in that, The edge of the orthogonal projection of the third pixel onto the first device layer coincides with the edge of the second aperture.

7. The display panel according to claim 1, characterized in that, The first pixel is a blue light pixel, the second pixel is a red light pixel, and the third pixel is a green light pixel.

8. The display panel according to claim 7, characterized in that, The area of ​​the blue light pixel not covered by the orthographic projections of the red light pixel and the green light pixel on the first device layer is larger than the area of ​​the orthographic projection of the red light pixel on the first device layer, and is also larger than the area of ​​the orthographic projection of the green light pixel on the first device layer.

9. The display panel according to claim 1, characterized in that, The first device layer includes a first pixel defining layer and a first cathode layer stacked sequentially on the array substrate. The first pixel defining layer is provided with a plurality of first pixel structures spaced apart. The plurality of first pixel structures are electrically connected to the first cathode layer. Each first pixel structure has a first light-emitting material layer forming the first pixel. The second device layer includes a second pixel defining layer and a second cathode layer stacked sequentially on the insulating layer. The second pixel defining layer is provided with a plurality of second pixel structures and a plurality of third pixel structures spaced apart. The plurality of second pixel structures and the plurality of third pixel structures are electrically connected to the second cathode layer. Each second pixel structure has a second light-emitting material layer forming the second pixel, and each third pixel structure has a third light-emitting material layer forming the third pixel. Each pixel unit includes the first pixel structure, the second pixel structure, and the third pixel structure; Within the same pixel unit, the orthogonal projections of the second pixel structure and the third pixel structure onto the first pixel defining layer are located within the first pixel structure.

10. The display panel according to claim 9, characterized in that, The first cathode layer, the insulating layer, the second pixel defining layer, and the second cathode layer are all light-transmitting materials.

11. The display panel according to claim 10, characterized in that, The material of the first cathode layer includes magnesium or silver, and / or the material of the second cathode layer includes magnesium or silver.

12. The display panel according to claim 11, characterized in that, The insulating layer is made of silicon oxide or silicon nitride.

13. The display panel according to claim 12, characterized in that, The material of the second pixel defining layer is a composite organic material.

14. The display panel according to any one of claims 9-10, characterized in that, The first pixel defining layer is provided with a plurality of first pixel openings spaced apart; The first device layer includes a plurality of first anode blocks and a plurality of first light-emitting units, which are arranged one-to-one with the plurality of first pixel openings. The plurality of first anode blocks are spaced apart on the array substrate and are electrically connected to the array substrate. The first pixel defining layer covers the array substrate and the first anode block, and each first pixel opening exposes the corresponding first anode block; each first light-emitting unit includes the first light-emitting material layer, and each first light-emitting unit fills the corresponding first pixel opening, with one end in contact with the exposed surface of the first anode block and the other end in contact with the first cathode layer; Each of the first pixel openings forms the first pixel structure with the corresponding first anode block and the first light-emitting unit.

15. The display panel according to claim 14, characterized in that, The second pixel defining layer is provided with a plurality of second pixel openings and a plurality of third pixel openings spaced apart, and the second device layer further includes a plurality of second anode blocks, a third anode blocks, a second light-emitting unit and a third light-emitting unit; Multiple second anode blocks and multiple third anode blocks are spaced apart on the insulating layer, and both the second anode blocks and the third anode blocks are electrically connected to the array substrate. A second pixel defining layer covers the insulating layer, the second anode blocks, and the third anode blocks, with each second pixel opening exposing a corresponding second anode block. Each second light-emitting unit has a second light-emitting material layer, and each second light-emitting unit fills a corresponding second pixel opening, with one end contacting the exposed surface of the second anode block and the other end contacting the second cathode layer. Each third pixel opening exposes a corresponding third anode block. Each third light-emitting unit has the third light-emitting material layer, and each third light-emitting unit fills a corresponding third pixel opening, with one end contacting the exposed surface of the third anode block and the other end contacting the second cathode layer. Each second pixel opening forms a second pixel structure with the corresponding second anode block and the second light-emitting unit; each third pixel opening forms a third pixel structure with the corresponding third anode block and the third light-emitting unit.

16. The display panel according to claim 15, characterized in that, The first anode block is provided with a first through hole and a second through hole spaced apart. The first through hole is located within the orthographic projection of the second anode block on the array substrate, and the second through hole is located within the orthographic projection of the third anode block on the array substrate. The first pixel defining layer fills the first through hole and the second through hole. The display panel is provided with a first via and a second via. The first via passes through the insulating layer, the first cathode layer and the first pixel defining layer filled in the first via, and connects the second anode block and the array substrate. The second via penetrates the insulating layer, the first cathode layer, and the first pixel defining layer filled in the second via, and connects the third anode block and the array substrate.

17. The display panel according to claim 16, characterized in that, The conductive material in the first via and the conductive material in the second via are both insulated from the first cathode layer.

18. The display panel according to claim 17, characterized in that, The walls of both the first and second vias are provided with insulating material.

19. The display panel according to claim 18, characterized in that, The first cathode layer is provided with a third through hole and a fourth through hole. The orthographic projection of the third through hole on the array substrate is located within the orthographic projection of the first through hole on the array substrate. The insulating layer is filled in the third through hole. The first via hole passes through the insulating layer filled in the third through hole and the first pixel limiting layer filled in the first through hole. The orthographic projection of the fourth through-hole on the array substrate is located within the orthographic projection of the second through-hole on the array substrate. The insulating layer fills the fourth through-hole. The second via passes through the insulating layer filled in the fourth through-hole and the first pixel defining layer filled in the second through-hole.

20. A display device, characterized in that, Includes the display panel as described in any one of claims 1-19.

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