Voltage drop violation repair method, related apparatus, and medium

Abstract

The present disclosure provides a voltage drop violation repair method, related devices and media. The method comprises: when a large-scale simultaneous flip occurs in a module in a chip, obtaining a standard cell in the module where a voltage drop violation occurs; obtaining a first voltage drop violation cause of the standard cell in the module where the voltage drop violation occurs; determining an optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause according to a preset corresponding relationship between voltage drop violation causes and priorities of candidate voltage drop violation repair strategies; and repairing the voltage drop violation of the standard cell in the module where the voltage drop violation occurs by using the optimal voltage drop violation repair strategy. The present disclosure can improve the repair effect of voltage drop violation and reduce the impact of other problems caused by repairing voltage drop violation on the signing and approval indicators of the chip in the case of a large-scale simultaneous flip in the module in the chip.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of integrated circuit design, in particular to a voltage drop violation repair method, related device and medium. BACKGROUND

[0002] With the development of integrated circuit chip production process, in the design process of integrated circuit chips such as field programmable logic gate array and application specific integrated circuit, the characteristic size and interconnection width of standard cell used are continuously reduced, and the circuit integration is higher and higher. High performance and high integration will cause high current density, and then the voltage drop (IR-drop) phenomenon will occur. For a large-scale simultaneous flip module existing in a chip, a large number of registers exist in the module and a large number of registers exist in the case of simultaneous transition from a static state to a working state, which will form a large transient current, resulting in a large voltage drop from the pad (PAD) of the power supply network to the logic unit in the module, causing a large-scale voltage drop violation of the entire module, and further affecting the function of the chip. For the chip with voltage drop violation, the power supply / ground interconnection is usually enhanced to enhance the power supply network capability, so as to repair the voltage drop through the enhanced power supply network. However, this method has little effect on the voltage drop caused by the large-scale simultaneous flip of the module in the chip. Moreover, this method will occupy a large amount of routing resources, especially in the late stage of the project, which will seriously affect the routing of signal interconnection, further affect the physical verification and timing convergence of the chip, and further affect the tape-out time point, which reduces the effect of voltage drop violation repair and makes other problems caused by voltage drop violation still affect the signoff index of the chip. SUMMARY

[0003] In order to solve the above technical problems, the present disclosure provides a voltage drop violation repair method, related device and medium, which can improve the repair effect of voltage drop violation and reduce the influence of other problems caused by voltage drop violation on the signoff index of the chip in the case of a large-scale simultaneous flip module in the chip.

[0004] According to a first aspect of the present disclosure, a voltage drop violation repair method is provided, comprising:

[0005] When a large-scale simultaneous flip occurs in a module in a chip, acquiring a standard cell in the module that has a voltage drop violation;

[0006] Acquiring a first voltage drop violation reason of the standard cell in the module that has the voltage drop violation;

[0007] According to a predetermined corresponding relationship between the voltage drop violation reason and the priority of the candidate voltage drop violation repair strategy, determining the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation reason.

[0008] The optimal voltage drop violation repair strategy is used to repair the standard cell in the module where the voltage drop violation occurs.

[0009] Optionally, when a large-scale simultaneous flip occurs in the module in the chip, the candidate voltage drop violation cause of the standard cell in the module where the voltage drop violation occurs includes that the transient current on the top metal layer of the power network exceeds a preset threshold,

[0010] When the first voltage drop violation cause is that the transient current on the top metal layer of the power network exceeds the preset threshold, the determination of the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause according to the preset correspondence between the priority of the voltage drop violation cause and the candidate voltage drop violation repair strategy includes:

[0011] The optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause is determined to be increasing the density of the metal winding on the top metal layer of the power network and / or widening the width of the metal winding.

[0012] Optionally, when a large-scale simultaneous flip occurs in the module in the chip, the candidate voltage drop violation cause of the standard cell in the module where the voltage drop violation occurs includes that the transient current on the bottom metal layer of the power network exceeds a preset threshold,

[0013] When the first voltage drop violation cause is that the transient current on the bottom metal layer of the power network exceeds the preset threshold, the determination of the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause according to the preset correspondence between the priority of the voltage drop violation cause and the candidate voltage drop violation repair strategy includes:

[0014] The optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause is determined to be replacing the standard cell in the module where the voltage drop violation occurs with a standard cell having a lower driving capability.

[0015] Optionally, after the standard cell in the module where the voltage drop violation occurs is obtained when a large-scale simultaneous flip occurs in the module in the chip, the voltage drop violation repair method further includes:

[0016] The cell density of the standard cell in the module where the voltage drop violation occurs in the chip is obtained.

[0017] When the cell density is lower than a preset threshold, the determination of the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause according to the preset correspondence between the priority of the voltage drop violation cause and the candidate voltage drop violation repair strategy includes:

[0018] The optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause is to replace all physical units in the chip with decoupling units.

[0019] Optionally, when the module in the chip has a large-scale simultaneous flip, after obtaining the standard units in the module that have voltage drop violations, the voltage drop violation repair method further includes:

[0020] obtaining the unit density of the standard units in the module that have voltage drop violations in the module,

[0021] when the unit density is lower than a preset threshold, replacing the standard units in the module that have voltage drop violations with standard units having a lower driving capability includes:

[0022] replacing the standard units in the module that have voltage drop violations with standard units having a first driving capability level one by one.

[0023] Optionally, when the module in the chip has a large-scale simultaneous flip, after obtaining the standard units in the module that have voltage drop violations, the voltage drop violation repair method further includes:

[0024] obtaining the unit density of the standard units in the module that have voltage drop violations in the module,

[0025] when the unit density is higher than a preset threshold, replacing the standard units in the module that have voltage drop violations with standard units having a lower driving capability includes:

[0026] replacing all the standard units in the module with standard units having a second driving capability level that has a lower driving capability;

[0027] when there are still standard units in the module that have voltage drop violations, replacing the standard units in the module that have voltage drop violations with standard units having a first driving capability level that has a lower driving capability one by one, wherein the second driving capability level is higher than the first driving capability level.

[0028] Optionally, when the chip has sufficient timing margin, replacing the standard units in the module that have voltage drop violations with standard units having a lower driving capability includes:

[0029] replacing all the standard units in the chip that have a driving capability level higher than a second driving capability level with standard units having the second driving capability level.

[0030] According to a second aspect of the present disclosure, a voltage drop violation repair device is provided, including:

[0031] The voltage drop violation standard cell obtaining unit is configured to obtain a standard cell in which a voltage drop violation occurs in the module when a large-scale simultaneous flip occurs in the module in the chip.

[0032] The first voltage drop violation reason obtaining unit is configured to obtain a first voltage drop violation reason of the standard cell in which the voltage drop violation occurs in the module.

[0033] The optimal voltage drop violation repair strategy determining unit is configured to determine an optimal voltage drop violation repair strategy corresponding to the first voltage drop violation reason according to a preset correspondence between voltage drop violation reasons and priorities of candidate voltage drop violation repair strategies.

[0034] The voltage drop violation repair unit is configured to repair the voltage drop violation of the standard cell in which the voltage drop violation occurs in the module by using the optimal voltage drop violation repair strategy.

[0035] According to a third aspect of the present disclosure, an electronic device is provided, which includes a processor, a memory, and a program stored in the memory and executable on the processor, and when the program is executed by the processor, the steps of the method described above are implemented.

[0036] According to a fourth aspect of the present disclosure, a storage medium is provided, which stores a computer program or instructions, and when the computer program or instructions are executed by a processor, the steps of the method described above are implemented.

[0037] According to an embodiment of the present disclosure, when a large-scale simultaneous flip occurs in a module in a chip, a standard cell in which a voltage drop violation occurs in the module is obtained; a first voltage drop violation reason of the standard cell in which the voltage drop violation occurs in the module is obtained; an optimal voltage drop violation repair strategy corresponding to the first voltage drop violation reason is determined according to a preset correspondence between voltage drop violation reasons and priorities of candidate voltage drop violation repair strategies; and the voltage drop violation of the standard cell in which the voltage drop violation occurs in the module is repaired by using the optimal voltage drop violation repair strategy. In the case where there is a large-scale simultaneous flip module in the chip, the priorities of the candidate voltage drop violation repair strategies corresponding to different voltage drop violation reasons are different, the optimal voltage drop violation repair strategy most suitable for the voltage drop violation caused by the first voltage drop violation reason is determined according to the preset correspondence between the voltage drop violation reasons and the priorities of the candidate voltage drop violation repair strategies, and thus the voltage drop violation of the standard cell in which the voltage drop violation occurs in the module is repaired by using the optimal voltage drop violation repair strategy, which can improve the repair effect of the voltage drop violation and reduce the influence of other problems caused by the repair of the voltage drop violation on the chip qualification index in the case where there is a large-scale simultaneous flip module in the chip.

[0038] It should be noted that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1 A flowchart of a voltage drop violation repair method according to an embodiment of the present disclosure is shown;

[0040] Figure 2 A waveform diagram of transient current generated when a large-scale simultaneous flip of a module in a chip occurs according to an embodiment of the present disclosure is shown;

[0041] Figure 3 A schematic diagram of a circuit layout of a module in a chip according to an embodiment of the present disclosure is shown;

[0042] Figure 4 A structural diagram of a voltage drop violation repair apparatus according to an embodiment of the present disclosure is shown;

[0043] Figure 5 A structural diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0044] In order to facilitate the understanding of the present disclosure, the present disclosure will be described more fully below with reference to the accompanying drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in different forms, and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thorough and comprehensive.

[0045] The following concepts are used herein:

[0046] Voltage drop (IR-drop): refers to a phenomenon of voltage drop on a power mesh or voltage rise on a ground mesh in an integrated circuit. With the development of semiconductor technology, the width of metal winding is becoming narrower, so the resistance value of metal winding per unit length is rising, so there is a certain voltage drop in the entire chip. The existence of voltage drop will make the actual voltage of the standard cell smaller than the ideal voltage, causing the transition time of the standard cell to be larger, the circuit delay to be increased, and the setup time and hold time of the circuit to be affected, and in severe cases, logic function errors and failures will occur.

[0047] In the chip manufacturing process, chip design is undoubtedly the most important step, mainly including front-end design and back-end design. Among them, the front-end is mainly responsible for logic implementation, usually using verilog, Very-High-Speed Integrated Circuit Hardware Description (VHDL) and other languages to describe the behavior level. The back-end is mainly responsible for converting the front-end design into a real schematic and layout, tape-out, mass production. In the chip back-end design process, before the chip design data is delivered to the chip manufacturer for production, a series of analysis and verification of the design data is usually needed to ensure that the design data meets the delivery standard, which is called signoff, which is beneficial to the relevant technical personnel to correct the defects of the design data before tape-out, thereby saving costs. With the increasingly advanced chip technology, the width of the metal winding in the power network and the ground network is getting narrower, resulting in the resistance value of the unit line length becoming larger and larger, and the power supply voltage is getting smaller and smaller, so the voltage drop has a more and more obvious influence on the performance of the chip. Therefore, whether the voltage drop analysis result of the chip meets the signoff standard is a necessary step before the chip is delivered to production. When the voltage drop analysis result of the chip does not meet the signoff standard (i.e., there is a voltage drop violation in the chip), the voltage drop violation needs to be repaired to ensure that the chip can work normally.

[0048] Figure 1 A flowchart of a voltage drop violation repair method provided by an embodiment of the present disclosure is shown. Referring to Figure 1 , the voltage drop violation repair method includes steps S110 to S140.

[0049] In step S110, when a large-scale simultaneous flip occurs in a module in the chip, a standard cell in the module that has a voltage drop violation is obtained.

[0050] For a module with large-scale simultaneous flip in the chip, there are a large number of registers in the module and a large number of registers exist simultaneously from the static state to the working state, which will form a large transient current, resulting in a large voltage drop from the pad (PAD) of the power network to the standard cell in the module, so that the whole module has a large-scale voltage drop violation, and then affects the function of the chip. It should be understood that there are a large number of standard cells in the integrated circuit chip, which can include a variety of types of standard cells such as combinational logic, sequential logic, functional units and special type units, and various standard cells are the basic part in the back-end design process of the integrated circuit chip. Common standard cells can include inverters, AND gates, registers, selectors, full adders, etc. In order to facilitate understanding of the transient current generated when a large-scale simultaneous flip occurs in a module in a chip, Figure 2 A waveform diagram of the transient current generated when a large-scale simultaneous flip occurs in a module in a chip is shown according to some embodiments of the present disclosure. As shown in Figure 2 The horizontal axis is time t and the vertical axis is the current i flowing through the pad (PAD) of the power network in the chip. At the time t1 and t2 when the large-scale simultaneous flip occurs in the module in the chip, the current i flowing through the pad (PAD) of the power network in the chip changes abruptly, generating a large transient current. According to the formula U=L(di / dt) for calculating the inductive voltage drop, the voltage drop on the pad (PAD) of the power network can be obtained. Because of the large transient current, the slope of the current waveform is very large, that is, di / dt becomes very large, so that a large voltage drop is generated from the pad (PAD) of the power network to the standard cell in the module. At the same time, the large transient current distributed on the power network will also cause an abnormally large voltage drop between the metal layers.

[0051] In some embodiments, when a large-scale simultaneous flip occurs in a module in a chip, a voltage drop violation analysis tool (for example, Redhawk) is used to analyze the voltage drop violation of the module in the chip, and the standard cell in the module that occurs voltage drop violation (also referred to as voltage drop violation standard cell) is obtained. In one example, when the voltage drop analysis result of the standard cell does not meet the signature standard, it is considered that the standard cell has a voltage drop violation. Since the voltage drop violation analysis using the voltage drop violation analysis tool can use any related technology, it is not described here. Figure 3 A structural diagram of the circuit layout of a module is shown according to some embodiments of the present disclosure. In some embodiments, Figure 3 The circuit layout of a module in a chip is shown, and the chip includes Figure 3 A plurality of modules are shown. As shown in Figure 3As shown, the module includes a plurality of standard cells 310-1, 310-2,..., 310-M,..., 310-N. In one example, the module shown is subjected to voltage drop violation analysis using a voltage drop violation analysis tool, resulting in voltage drop violation standard cells 310-2, 310-8, 310-10 and 310-N. It should be understood that the number of standard cells in the module that experience voltage drop violation is typically large when a large-scale simultaneous flip occurs in the module in the chip, and only four voltage drop violation standard cells 310-2, 310-8, 310-10 and 310-N are shown here for the sake of convenience of description. Figure 3 As shown, the module includes a plurality of standard cells 310-1, 310-2,..., 310-M,..., 310-N. In one example, the module shown is subjected to voltage drop violation analysis using a voltage drop violation analysis tool, resulting in voltage drop violation standard cells 310-2, 310-8, 310-10 and 310-N. It should be understood that the number of standard cells in the module that experience voltage drop violation is typically large when a large-scale simultaneous flip occurs in the module in the chip, and only four voltage drop violation standard cells 310-2, 310-8, 310-10 and 310-N are shown here for the sake of convenience of description.

[0052] In step S120, a first voltage drop violation cause of the standard cell in the module that experiences voltage drop violation is obtained.

[0053] In some embodiments, in the circuit design of the integrated circuit chip, the power network is above the circuit layout. The power network includes a plurality of metal layers, and the metal layers are coupled through vias. The top metal layer of the power network has bumps for coupling the signals of the power network to the pins of the package, and the signals of the power network are coupled to the wires on the printed circuit board through the pins of the package. Since the actual system power supply passes through the printed circuit board and the package to the bumps on the surface of the chip, and then reaches the standard cells through the pads in contact with the bumps and the power network inside the chip, system power plane noise and path voltage drop are generated on this series of power distribution networks. When a large-scale simultaneous flip occurs in the module in the chip, the transient current on the top metal layer of the power network exceeds the preset threshold (i.e., the transient current on the top metal layer of the power network is large) and / or the transient current on the bottom metal layer of the power network exceeds the preset threshold (i.e., the transient current on the bottom metal layer of the power network is large). In the case where the transient current on the top metal layer of the power network exceeds the preset threshold and the transient current on the bottom metal layer of the power network exceeds the preset threshold, a large voltage drop is generated from the pads (PADs) of the power network to the standard cells in the module, causing a large-scale voltage drop violation in the entire module. It can be understood that when a large-scale simultaneous flip occurs in the module in the chip, the voltage drop violation causes of the standard cells that experience voltage drop violation include the transient current on the top metal layer of the power network exceeding the preset threshold and the transient current on the bottom metal layer of the power network exceeding the preset threshold.

[0054] In step S130, according to the correspondence between the preset voltage drop violation causes and the priorities of the candidate voltage drop violation repair strategies, the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause is determined.

[0055] In some embodiments, for the voltage drop violation occurred in the standard cells in the module when large-scale simultaneous flipping of the module in the chip occurs, the candidate voltage drop violation repair strategies include increasing the density of the metal routing on the top metal layer of the power network and / or widening the width of the metal routing, replacing all the physical cells in the chip with decoupling cells, and replacing the standard cells in the module where the voltage drop violation occurs with standard cells with lower driving capability. It can be understood that the three candidate voltage drop violation repair strategies have respective advantages and disadvantages, and when repairing the voltage drop violation caused by a specific voltage drop violation cause, the optimal one can be selected based on the principle of minimizing the design changes to the chip. Therefore, in some embodiments, a correspondence between the voltage drop violation causes and the priorities of the candidate voltage drop violation repair strategies is pre-set, and for different voltage drop violation causes, the optimal voltage drop violation repair strategy is determined from the candidate voltage drop violation repair strategies according to the priority of the corresponding candidate voltage drop violation repair strategy.

[0056] In some embodiments, the first voltage drop violation cause of the standard cells in the module where the voltage drop violation occurs is that the transient current on the top metal layer of the power network exceeds a preset threshold. The metal routing on the top metal layer of the power network has the characteristics of large current and long routing, and at the same time, the metal routing on the top metal layer of the power network is closest to the power network pad (PAD) in terms of physical location. The optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause is to increase the density of the metal routing on the top metal layer of the power network and / or widen the width of the metal routing. Increasing the density of the metal routing on the top metal layer of the power network in the hotspot area can effectively disperse large current, and widening the width of the metal routing on the top metal layer of the power network in the hotspot area can effectively reduce the resistance value of the metal routing per unit length. Therefore, the voltage drop from the power network pad (PAD) to the standard cells in the module can be effectively reduced, thereby improving the repair effect of the voltage drop violation caused by the transient current on the top metal layer of the power network exceeding the preset threshold. In addition, the routing of the signal line usually does not use the top metal layer of the power network, so changing the routing of the top metal layer of the power network will not affect the existing design of the routing of the signal line, so that the repair effect of the voltage drop violation is improved while reducing the impact of other problems caused by repairing the voltage drop violation on the sign-off indicators of the chip.

[0057] In some embodiments, the first voltage drop violation cause for a standard cell in the module is that the transient current on the bottom metal layer of the power network exceeds a preset threshold. The optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause is to replace the standard cell in the module that has the voltage drop violation with a standard cell with lower drive capability. Drive capability is an important performance indicator of a standard cell. The naming of standard cells in the process library will clearly indicate the area level of the standard cell. The drive capability of a standard cell decreases as the area decreases. Therefore, the area level in the naming of a standard cell can represent its drive capability. In one example, the naming of the standard cell includes "Dx". The number "x" after the letter "D" represents the drive capability of the standard cell. The larger the number, the greater the drive capability. The drive capability of the standard cell determines the charging and discharging magnitude of the device during operation. The smaller the drive capability, the smaller the charging and discharging current value. Therefore, by reducing the driving capability of the standard cell that causes voltage drop violations in the module, the magnitude of the transient current in the bottom metal layer of the power network can be effectively reduced, thereby effectively reducing the voltage drop generated from the power network pads to the standard cell in the module, and thus improving the repair effect of voltage drop violations caused by transient currents on the top metal layer of the power network exceeding a preset threshold.

[0058] In some embodiments, when a large-scale simultaneous flip-flop occurs in a module of a chip, after obtaining the standard cells in the module that have experienced voltage drop violations, the voltage drop violation repair method further includes: obtaining the cell density of the standard cells in the module that have experienced voltage drop violations. In some embodiments, the cell density of the standard cells in the module that have experienced voltage drop violations is the ratio between the number of standard cells in the module that have experienced voltage drop violations and the total number of standard cells in the module. (Reference) Figure 3 The circuit layout of a module in the chip shown is as follows: Figure 3 As shown, the module includes multiple standard units 310-1, 310-2, ..., 310-M, ..., 310-N. In one example, a voltage drop violation analysis tool is used to... Figure 3The module shown performs voltage drop violation analysis to obtain voltage drop violation standard cells 310-2, 310-8, 310-10 and 310-N. The standard cells in the module that have voltage drop violations have a cell density of 4 / N in the module. In some embodiments, in the case of a large-scale simultaneous flip in the chip, when the cell density of the standard cells in the module that have voltage drop violations is lower than a preset threshold (for example, the standard cells in the module that have voltage drop violations account for a small portion of the total number of standard cells in the module), the standard cells in the module that have voltage drop violations are replaced one by one with standard cells of a first drive capability level (for example, D6) with lower drive capability. According to practical experience, standard cells with a drive capability level of D10 or above are prone to voltage drop violations. Therefore, when the cell density of the standard cells in the module that have voltage drop violations is lower than the preset threshold, the standard cells in the module that have voltage drop violations are replaced one by one with standard cells of the first drive capability level with lower drive capability, so that the voltage drop violations in different modules can be repaired without affecting other standard cells, which improves the repair effect of voltage drop violations and reduces the impact of other problems caused by repairing voltage drop violations on the chip's sign-off indicators.

[0059] In some embodiments, in the case of a large-scale simultaneous flip of a module in a chip, when the density of the standard cells in the module that violate the voltage drop rule is higher than a preset threshold (e.g., the standard cells in the module that violate the voltage drop rule account for a large portion of the total number of standard cells in the module), all the standard cells in the module are replaced with standard cells of a second drive capability level that has a lower drive capability. In some embodiments, the second drive capability level is one level lower than the drive capability of the standard cells in the module. In one example, the drive capability of the standard cells in the module is D12, and all the standard cells in the module are replaced with standard cells of drive capability level D10. In another example, the drive capability of the standard cells in the module is D10, and all the standard cells in the module are replaced with standard cells of drive capability level D8. In some embodiments, after all the standard cells in the module are replaced with standard cells of the second drive capability level that has a lower drive capability, the module is analyzed for voltage drop rule violations using a voltage drop rule violation analysis tool (e.g., Redhawk), and the standard cells in the module that still violate the voltage drop rule are identified. In the case where there are still standard cells in the module that violate the voltage drop rule, the standard cells in the module that violate the voltage drop rule are replaced one by one with standard cells of a first drive capability level (e.g., D6). It should be understood that, in the case of a large-scale simultaneous flip of a module in a chip, when the density of the standard cells in the module that violate the voltage drop rule is higher than a preset threshold, all the standard cells in the module are replaced with standard cells of a second drive capability level that has a lower drive capability, and after all the standard cells in the module are replaced with standard cells of the second drive capability level that has a lower drive capability, in the case where there are still standard cells in the module that violate the voltage drop rule, the standard cells in the module that violate the voltage drop rule are replaced one by one with standard cells of a first drive capability level that is lower than the second drive capability level, so that, through two replacements of standard cells, the number of standard cells in the module that violate the voltage drop rule is first reduced on a large scale, and then the voltage drop rule violations that still occur in the module are repaired in a targeted manner, so as to minimize the impact on the timing of the chip, thereby improving the repair effect of the voltage drop rule violations while reducing the impact of other problems caused by repairing the voltage drop rule violations on the sign-off indicators of the chip.

[0060] In some embodiments, in the case of a large-scale simultaneous flip of a module in a chip, when there is sufficient timing margin in the chip, all the standard cells in the chip that have a drive capability level higher than a second drive capability level (e.g., D10) are replaced with standard cells of the second drive capability level. It should be noted that this voltage drop rule repair strategy makes a large change to the standard cells in the chip and can greatly reduce the charging and discharging current on the entire chip, but generally affects the setup time of the overall chip, so it needs to be used when there is sufficient timing margin in the chip.

[0061] In some embodiments, when the module in the chip occurs large-scale simultaneous flip, after the standard cell in which the voltage drop violation occurs in the module is obtained, the voltage drop violation repair method further comprises: obtaining the cell density of the standard cell in which the voltage drop violation occurs in the module in the chip. In some embodiments, the cell density of the standard cell in which the voltage drop violation occurs in the module in the chip is the ratio between the number of the standard cell in which the voltage drop violation occurs in the module and the total number of the standard cells in the chip. In some embodiments, when the module in the chip occurs large-scale simultaneous flip, when the cell density of the standard cell in which the voltage drop violation occurs in the module in the chip is lower than a preset threshold, no matter whether the first voltage drop violation reason of the standard cell in which the voltage drop violation occurs in the module is that the transient current on the bottom metal layer of the power network exceeds a preset threshold or that the transient current on the top metal layer of the power network exceeds a preset threshold, the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation reason is determined to be that all the physical cells in the chip are replaced by decoupling cells. The decoupling cells have the characteristics of passing alternating current and resisting direct current, and when the transient current increases, the decoupling cells can offset part of the current in the charging and discharging process, thereby effectively reducing the voltage drop generated from the pad (PAD) of the power network to the standard cell in the module. At the same time, the decoupling cells have the function of a filter and can filter out some glitches of the transient current. In an example, when the cell density of the standard cell in which the voltage drop violation occurs in the module in the chip is about 70%, replacing all the filler cells in the chip by decoupling cells can reduce the voltage drop generated from the pad (PAD) of the power network to the standard cell in the module by 10%-20%, and at the same time, will not affect the timing and routing of the chip. In this way, when the module in the chip occurs large-scale simultaneous flip, when the cell density of the standard cell in which the voltage drop violation occurs in the module in the chip is lower than a preset threshold, by replacing all the physical cells in the chip by decoupling cells, the effect of repairing the voltage drop violation is improved, and at the same time, the influence of other problems caused by repairing the voltage drop violation on the sign-off indicators of the chip is reduced.

[0062] In step S140, the optimal voltage drop violation repair strategy is adopted to repair the voltage drop violation of the standard cell in the module.

[0063] Figure 4 A structural schematic diagram of a voltage drop violation repair apparatus provided by an embodiment of the present disclosure is shown. Referring to Figure 4 The voltage drop violation repair apparatus provided by the embodiment of the present disclosure comprises a voltage drop violation standard cell obtaining unit 410, a first voltage drop violation reason obtaining unit 420, an optimal voltage drop violation repair strategy determining unit 430, and a voltage drop violation repair unit 440.

[0064] The voltage drop violation standard cell acquisition unit 410 is configured to acquire standard cells in the module that have experienced voltage drop violations when a large-scale simultaneous flip-flop occurs in the module of the chip. The first voltage drop violation cause acquisition unit 420 is configured to acquire the first voltage drop violation cause of the standard cells in the module that have experienced voltage drop violations. The optimal voltage drop violation repair strategy determination unit 430 is configured to determine the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause based on a preset correspondence between the priorities of voltage drop violation causes and candidate voltage drop violation repair strategies. The voltage drop violation repair unit 440 is configured to use the optimal voltage drop violation repair strategy to perform voltage drop violation repair on the standard cells in the module that have experienced voltage drop violations.

[0065] Since the specific implementation of the voltage drop violation repair device has been described in detail in the above method embodiments, the specific implementation of the voltage drop violation repair device described above can be found in the aforementioned voltage drop violation repair method embodiments, and will not be repeated here.

[0066] This disclosure also provides an electronic device, such as... Figure 5 As shown, it includes a memory 520, a processor 510, and a program stored in the memory 520 and executable on the processor 510. When the program is executed by the processor 510, it can implement the various processes of each embodiment of the voltage drop violation repair method described above and achieve the same technical effect. To avoid repetition, it will not be described again here.

[0067] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by instructions, or by instructions controlling related hardware. These instructions can be stored in a computer-readable storage medium and loaded and executed by a processor. Therefore, this disclosure also provides a storage medium storing a computer program or instructions that, when executed by a processor, can implement the various processes in the embodiments of the voltage drop violation repair methods described above.

[0068] Since the instructions stored in the storage medium can execute the steps in the voltage drop violation repair method provided in the embodiments of this disclosure, the beneficial effects achievable by the voltage drop violation repair method provided in the embodiments of this disclosure can be realized, as detailed in the preceding embodiments, and will not be repeated here. The specific implementation of each of the above operations can be found in the preceding embodiments, and will not be repeated here.

[0069] In summary, according to the embodiments of the present disclosure, when a module in a chip occurs large-scale simultaneous flips, a standard cell in which a voltage drop violation occurs in the module is acquired; a first voltage drop violation cause of the standard cell in which the voltage drop violation occurs in the module is acquired; according to a preset corresponding relationship between the voltage drop violation cause and a priority of a candidate voltage drop violation repair strategy, an optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause is determined; and the optimal voltage drop violation repair strategy is used to repair the voltage drop violation of the standard cell in which the voltage drop violation occurs in the module. In the case that there is a module with large-scale simultaneous flips in the chip, the priorities of the candidate voltage drop violation repair strategies corresponding to different voltage drop violation causes are different, the optimal voltage drop violation repair strategy most suitable for the voltage drop violation caused by the first voltage drop violation cause is determined according to the preset corresponding relationship between the voltage drop violation cause and the priority of the candidate voltage drop violation repair strategy, and thus the optimal voltage drop violation repair strategy is used to repair the voltage drop violation of the standard cell in which the voltage drop violation occurs in the module. Therefore, in the case that there is a module with large-scale simultaneous flips in the chip, the repair effect of the voltage drop violation can be improved, and the influence of other problems caused by the repair of the voltage drop violation on the sign-off indicators of the chip can be reduced.

[0070] Finally, it should be noted that: obviously, the above embodiments are only examples for clearly illustrating the present disclosure, and are not limitations of the embodiments. Based on the above description, other different forms of changes or variations can be made by those of ordinary skill in the art. Here, all the embodiments cannot be exhausted, and the obvious changes or variations derived therefrom are still within the protection scope of the present disclosure.

Claims

1. A method for repairing voltage drop violations, characterized in that, include: When a large-scale simultaneous flip-flop occurs in a module of a chip, a standard cell in the module that has a voltage drop violation is obtained. The candidate voltage drop violation causes of the standard cell in the module include: transient current on the top metal layer of the power network exceeding a preset threshold and transient current on the bottom metal layer of the power network exceeding a preset threshold. Obtain the first voltage drop violation cause of the standard unit in the module where the voltage drop violation occurred; Based on the pre-defined correspondence between the causes of voltage drop violations and the priorities of candidate voltage drop violation repair strategies, the optimal voltage drop violation repair strategy corresponding to the first cause of voltage drop violation is determined. The optimal voltage drop violation repair strategy is used to repair the voltage drop violation in the standard unit that has a voltage drop violation in the module. Specifically, if the first voltage drop violation is caused by a transient current on the bottom metal layer of the power network exceeding a preset threshold, the cell density of the standard cell causing the voltage drop violation in the module is obtained. If the cell density is higher than the preset threshold, all standard cells in the module are replaced with standard cells of the second driving capability level, which has a lower driving capability. If there are still standard cells causing voltage drop violations in the module, each standard cell causing the voltage drop violation in the module is replaced with a standard cell of the first driving capability level, which has a lower driving capability. The second driving capability level is higher than the first driving capability level. When the first voltage drop violation is caused by a transient current on the top metal layer of the power network exceeding a preset threshold, determining the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation based on the preset correspondence between the priority of the voltage drop violation cause and the candidate voltage drop violation repair strategy includes: determining the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause as increasing the density of the metal winding on the top metal layer of the power network and / or widening the width of the metal winding.

2. The voltage drop violation repair method according to claim 1, characterized in that, When a large-scale simultaneous flip-flop occurs in a module within the chip, after obtaining the standard cell in the module where a voltage drop violation has occurred, the voltage drop violation repair method further includes: Obtain the cell density of the standard cell in the chip where the voltage drop violation occurred in the module. When the cell density is lower than a preset threshold, determining the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause based on the preset correspondence between the priorities of voltage drop violation causes and candidate voltage drop violation repair strategies includes: The optimal voltage drop violation repair strategy corresponding to the cause of the first voltage drop violation is determined to be to replace all physical units in the chip with decoupling units.

3. The voltage drop violation repair method according to claim 1, characterized in that, When a large-scale simultaneous flip-flop occurs in a module within the chip, after obtaining the standard cell in the module where a voltage drop violation has occurred, the voltage drop violation repair method further includes: Obtain the cell density of the standard cell in the module where the voltage drop violation occurred. When the cell density is below a preset threshold, replacing the standard cell in the module that has a voltage drop violation with a standard cell with lower drive capability includes: Replace each standard unit in the module that has a voltage drop violation with a standard unit of the first drive capability level that has a lower drive capability.

4. The voltage drop violation repair method according to claim 1, characterized in that, When the chip has sufficient timing margin, replacing the standard cell that causes a voltage drop violation in the module with a standard cell with lower drive capability includes: All standard cells in the chip with a driving capability level higher than the second driving capability level are replaced with standard cells with the second driving capability level.

5. A voltage drop violation repair device, characterized in that, include: The voltage drop violation standard cell acquisition unit is configured to acquire standard cells in the module that have experienced voltage drop violations when a large-scale simultaneous flip-flop occurs in the module in the chip. The candidate voltage drop violation reasons for the standard cells in the module that have experienced voltage drop violations include: transient current on the top metal layer of the power network exceeding a preset threshold and transient current on the bottom metal layer of the power network exceeding a preset threshold. The first voltage drop violation cause acquisition unit is configured to acquire the first voltage drop violation cause of the standard unit in the module where the voltage drop violation occurs; The optimal voltage drop violation repair strategy determination unit is configured to determine the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause based on the preset correspondence between the voltage drop violation cause and the priority of the candidate voltage drop violation repair strategies. The voltage drop violation repair unit is configured to use the optimal voltage drop violation repair strategy to repair the voltage drop violation in the standard unit of the module that has a voltage drop violation. Specifically, if the first voltage drop violation is caused by a transient current on the bottom metal layer of the power network exceeding a preset threshold, the cell density of the standard cell causing the voltage drop violation in the module is obtained. If the cell density is higher than the preset threshold, all standard cells in the module are replaced with standard cells of the second driving capability level, which has a lower driving capability. If there are still standard cells causing voltage drop violations in the module, each standard cell causing the voltage drop violation in the module is replaced with a standard cell of the first driving capability level, which has a lower driving capability. The second driving capability level is higher than the first driving capability level. When the first voltage drop violation is caused by a transient current on the top metal layer of the power network exceeding a preset threshold, determining the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation based on the preset correspondence between the priority of the voltage drop violation cause and the candidate voltage drop violation repair strategy includes: determining the optimal voltage drop violation repair strategy corresponding to the first voltage drop violation cause as increasing the density of the metal winding on the top metal layer of the power network and / or widening the width of the metal winding.

6. An electronic device, characterized in that, include: A processor, a memory, and a program stored in the memory and executable on the processor, wherein the program, when executed by the processor, implements the steps of the method as described in any one of claims 1 to 4.

7. A storage medium, characterized in that, The storage medium stores a computer program or instructions, which, when executed by a processor, implement the steps of the method as described in any one of claims 1 to 4.

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