Signal transmission method, controller, source driver and electronic device

By using a low-voltage differential signal interface in the display panel to transmit configuration data and image data in two modes, the problem of excessive signal routing space occupation is solved, and flexible embedding of control functions in the display panel and cost savings are achieved.

CN116129784BActive Publication Date: 2026-01-23BEIJING ESWIN COMPUTING TECH CO LTD +1
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Patent Information

Application Number
CN202211566801.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-07
Publication Date
2026-01-23
Estimated Expiration
2042-12-07

AI Technical Summary

Technical Problem

In the existing technology, the signal transmission method of the display panel results in excessive signal routing space occupation, especially when the number of source drivers is large, making it impossible to flexibly embed multiple control functions.

Method used

Display signals, including configuration data and image data, are provided to the source driver in at least two modes within a single frame display cycle via a low-voltage differential signal interface. This multiplexing of the low-voltage differential signal interface reduces the number of interfaces, enabling greater flexibility and cost savings in signal transmission.

Benefits of technology

The number of signal transmission interfaces and lines has been reduced, ensuring flexible integration of various control functions, improving display efficiency and reducing costs.

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Abstract

The present disclosure relates to a signal transmission method, a controller, a source driver and an electronic device. The signal transmission method is used for transmitting a display signal from the controller to the source driver. The signal transmission method comprises: in a frame display period, providing the display signal to the source driver in at least two modes through a low-voltage differential signal interface, the display signal provided by the at least two modes comprising configuration data and image data, the configuration data being used for configuring the source driver, so that the source driver processes the image data according to the configuration data. The method can multiplex the low-voltage differential signal interface, so that it is used for providing the image data and the configuration data to the source driver, thereby reducing the number of interfaces used for signal transmission, saving cost, and enabling flexible embedding of various control functions into the source driver.
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Description

Technical Field

[0001] Embodiments of this disclosure relate to a signal transmission method, a controller, a source driver, and an electronic device. Background Technology

[0002] In the field of display technology, for example, the pixel array of a liquid crystal display panel or an organic light-emitting diode (OLED) display panel typically includes multiple rows of gate lines and multiple columns of data lines intersecting the gate lines. The timing controller (T-con) of the display panel needs to provide gate signals and data signals to the multiple rows of gate lines and multiple columns of data lines through gate driving circuits and source driving circuits, respectively, so as to form the grayscale voltage required for each gray level of the displayed image in the pixel units of each row in a manner such as, for example, line-by-line scanning, thereby displaying a frame of image. Summary of the Invention

[0003] At least one embodiment of this disclosure provides a signal transmission method for a controller to transmit display signals to a source driver. The method includes: providing display signals to the source driver in at least two modes via a low-voltage differential signal interface within a display frame period. The display signals provided in the at least two modes include configuration data and image data. The configuration data is used to configure the source driver so that the source driver processes the image data according to the configuration data.

[0004] For example, in a signal transmission method provided in an embodiment of this disclosure, the display signal includes a display sub-signal provided by each of at least two modes, and each display sub-signal includes a mode recognition signal. The mode recognition signal is used to indicate to the source driver the mode to which the display sub-signal belongs, so that the source driver can parse the display sub-signal according to the mode to which the display sub-signal belongs to obtain configuration data or image data.

[0005] For example, in a signal transmission method provided in an embodiment of this disclosure, each mode provides one or more display sub-signals. Within a frame display period, providing display signals to the source driver in at least two modes via a low-voltage differential signal interface includes: within a frame display period, providing display signals to the source driver sequentially in at least two modes using a low-voltage differential signal interface, and for each mode, providing one or more display sub-signals to the source driver sequentially using a low-voltage differential signal interface.

[0006] For example, in a signal transmission method provided in one embodiment of this disclosure, a trigger signal is provided to the source driver before each display sub-signal is provided to the source driver, wherein the trigger signal is used to notify the source driver to perform a transmission operation for the at least two modes.

[0007] For example, in a signal transmission method provided in an embodiment of this disclosure, providing the trigger signal to the source driver includes: providing the source driver with a data transmission control signal and a data polarity inversion control signal, and obtaining the trigger signal based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver, wherein the first transition edge of the data polarity inversion control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity inversion control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

[0008] One embodiment of this disclosure provides another signal transmission method for a source driver to acquire display signals from a controller, the source driver including a low-voltage differential signal interface, the method comprising: receiving, through the low-voltage differential signal interface, display signals provided by the controller in at least two modes for a display period of one frame; parsing the display signals to acquire configuration data and image data; and processing the image data according to the configuration data.

[0009] For example, in a signal transmission method provided in an embodiment of this disclosure, the display signal includes a display sub-signal provided by each of the at least two modes, and each display sub-signal includes a pattern recognition signal. Parsing the display signal to obtain the configuration data and the image data includes: obtaining the pattern recognition signal; determining the mode to which the display sub-signal belongs based on the pattern recognition signal; and parsing the display sub-signal based on the mode to which the display sub-signal belongs to obtain the configuration data or the image data.

[0010] For example, in a signal transmission method provided in an embodiment of this disclosure, each mode provides one or more display sub-signals. Receiving the display signal provided by the controller in at least two modes within a frame display period through the low-voltage differential signal interface includes: within a frame display period, sequentially receiving the display signal provided by the controller in the at least two modes through the low-voltage differential signal interface, and for each mode, sequentially receiving the one or more display sub-signals through the low-voltage differential signal interface.

[0011] For example, in a signal transmission method provided in one embodiment of this disclosure, the method further includes: receiving a trigger signal provided by the controller before receiving each display sub-signal, and performing a transmission operation for the at least two modes in response to the trigger signal.

[0012] For example, in a signal transmission method provided in an embodiment of this disclosure, the trigger signal is obtained based on the relative timing relationship between a data transmission control signal and a data polarity inversion control signal provided by the source driver, wherein the first transition edge of the data polarity inversion control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity inversion control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

[0013] For example, in a signal transmission method provided in an embodiment of this disclosure, the configuration data includes row configuration data, at least one of the at least two modes is a row configuration mode, and the display sub-signal provided by the row configuration mode includes the row configuration data and the row image data.

[0014] For example, in a signal transmission method provided in an embodiment of this disclosure, the display sub-signal provided by the row configuration mode includes: combined data formed by combining the row configuration data of each row and the row image data of each row in the image data.

[0015] For example, in a signal transmission method provided in an embodiment of this disclosure, the configuration data includes frame configuration data, and at least one of the at least two modes includes a frame configuration mode, wherein the display sub-signal provided by the frame configuration mode includes the frame configuration data.

[0016] For example, in a signal transmission method provided in an embodiment of this disclosure, the configuration data includes a correction signal, at least one of the at least two modes includes a correction configuration mode, the display sub-signal provided by the correction configuration mode includes the correction signal, and the correction signal is used to correct the timing of the clock signal of the source driver and the display signal.

[0017] For example, in a signal transmission method provided in one embodiment of this disclosure, at least two modes include a line configuration mode and a frame configuration mode. The display sub-signal provided by the line configuration mode includes line configuration data and the image data, and the display sub-signal provided by the frame configuration mode includes frame configuration data.

[0018] For example, in a signal transmission method provided in an embodiment of this disclosure, at least two modes further include a correction configuration mode, wherein the display sub-signal provided by the correction configuration mode includes a correction signal, which is used to correct the timing of the clock signal of the source driver and the display signal.

[0019] For example, in a signal transmission method provided in an embodiment of this disclosure, the frame configuration mode and the correction configuration mode are during the vertical blanking period of a frame display cycle.

[0020] For example, in a signal transmission method provided in an embodiment of this disclosure, the frame configuration mode includes a power control sub-mode, which provides the source driver with data signals at least during the vertical blanking period.

[0021] For example, in a signal transmission method provided in an embodiment of this disclosure, during the power-on process of the display device, the display signals transmitted between the controller and the source driver are, in sequence, the display sub-signal provided by the calibration configuration mode and the display sub-signal provided by the frame configuration mode; and after the display device enters the working state, the display signals transmitted between the controller and the source driver are, in sequence, the display sub-signal provided by the row configuration mode, the display sub-signal provided by the frame configuration mode, and the display sub-signal provided by the calibration configuration mode.

[0022] At least one embodiment of this disclosure provides a controller for transmitting display signals to a source driver. The controller includes a low-voltage differential signal interface configured to provide the display signals to the source driver in at least two modes within a frame display period. The display signals provided in the at least two modes include configuration data and image data. The configuration data is used to configure the source driver such that the source driver processes the image data according to the configuration data.

[0023] At least one embodiment of this disclosure provides a source driver for acquiring display signals from a controller. The source driver includes: a low-voltage differential signal interface configured to receive display signals provided by the controller in at least two modes within a one-frame display period, the display signals provided in at least two modes including configuration data and image data; a parsing unit configured to parse the display signals to acquire the configuration data and the image data; and a configuration unit configured to configure according to the configuration data and process the image data according to the configuration data.

[0024] At least one embodiment of this disclosure provides an electronic device, including a controller provided in any embodiment of this disclosure; a source driver provided in any embodiment of this disclosure; and a display panel connected to the source driver to receive a drive signal provided by the source driver, wherein the drive signal is generated based on the display signal. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0026] Figure 1A A schematic diagram of a circuit driving system architecture for a display panel is shown.

[0027] Figure 1B This diagram illustrates a structure in which the timing controller TCON and the source driver are connected via a mini-LVDS interface.

[0028] Figure 1C An architecture diagram of an application signal transmission method provided by at least one embodiment of the present disclosure is shown;

[0029] Figure 1D A flowchart of a signal transmission method provided in at least one embodiment of this disclosure is shown;

[0030] Figure 2A A schematic diagram is shown illustrating the signal format of a display sub-signal provided in a row configuration mode according to at least one embodiment of the present disclosure;

[0031] Figure 2B This diagram illustrates the signal format of a display sub-signal provided in a frame configuration mode according to at least one embodiment of the present disclosure;

[0032] Figure 2C This diagram illustrates the signal format of a display sub-signal provided by a calibration configuration mode according to at least one embodiment of the present disclosure;

[0033] Figure 3A and 3B This diagram illustrates a signal format of a display signal provided by a controller to a source driver according to at least one embodiment of the present disclosure;

[0034] Figure 4A A timing diagram of a trigger signal PSI provided in at least one embodiment of the present disclosure is shown;

[0035] Figure 4B A timing diagram of a single-mode indication signal provided in at least one embodiment of the present disclosure is shown;

[0036] Figure 5 A flowchart of another signal transmission method provided by at least one embodiment of the present disclosure is shown;

[0037] Figure 6 At least one embodiment of the present disclosure is shown. Figure 5 Flowchart of step S520;

[0038] Figure 7 A flowchart of another signal transmission method provided by at least one embodiment of the present disclosure is shown;

[0039] Figure 8 A schematic block diagram of a controller provided in at least one embodiment of the present disclosure is shown.

[0040] Figure 9 A schematic block diagram of a source driver provided in at least one embodiment of this disclosure is shown; and

[0041] Figure 10 A schematic block diagram of an electronic device provided in at least one embodiment of the present disclosure is shown. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0043] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0044] The various driving circuits used in display panels typically include scan driver integrated circuits (also known as gate drivers or G-ICs), data driver integrated circuits (also known as source drivers or SD-ICs), and controllers. The controller is mainly used to convert data signals, control signals, and clock signals received from external sources (such as storage devices, network modems, etc.) into data signals, gate signals, control signals, and clock signals suitable for the source drivers and gate drivers, for driving the image display of the display panel. For example, the controller can be a timing controller (TCON). The source drivers are mainly used to receive digital signals (display signals or image signals) and control signals provided by the aforementioned controller, converting the digital signals into corresponding analog grayscale voltage signals through digital-to-analog conversion, and inputting them into the pixel units of each column of the pixel array of the display panel. The gate drivers are mainly used to enable each row of pixel units in the pixel array, for example, row by row (or every other row), and, under the action of control signals, cooperate with the source drivers to input the required data signals to the corresponding pixel units for the enabled pixel units, so that the pixel units can display according to the data signals.

[0045] During the display process, video and animation are composed of countless frames displayed sequentially in chronological order (e.g., frame rate of 60Hz or 120Hz). Each frame is a complete image displayed on the display panel. During the display of a frame, the gate driver sequentially activates each row of pixel units in the pixel array from the first row to the last row for scanning. During this scanning process, the source driver inputs the necessary data signals for each row of pixel units into the activated pixel units, thus completing the scanning and display of a frame. For example, due to the manufacturing process of the pixel units in the display panel, the display screen needs to be continuously refreshed to achieve a clear, complete, and high-quality display effect. Each refresh requires displaying one frame, and multiple consecutively displayed frames visually constitute a static or dynamic image.

[0046] Figure 1A A schematic diagram of a circuit driving system architecture for a display panel is shown. Figure 1A As shown, the circuit-driven system architecture includes a timing controller (TCON), a gate driver (G-IC), a source driver (SD-IC), and a display panel. The architecture also includes a power management integrated circuit (PMIC), a gamma circuit, and a common electrode voltage (Vcom) circuit.

[0047] The input voltage Vin of the power management integrated circuit is, for example, 5V or 12V, while the output voltage includes the digital operating voltage DVDD provided to each IC, the analog voltage AVDD provided to the Gamma and Vcom circuits, the gate turn-on voltage VGH provided to the gate driver G-IC, and the turn-off voltage VGL, etc. The common electrode voltage (Vcom) circuit is used to provide a common voltage for the pixel array.

[0048] The timing controller TCON outputs control signals including those provided to the gate driver G-IC and the source driver SD-IC. For example, the control signals provided to the source driver SD-IC include the start horizontal (STH) signal for the start of horizontal data transmission, the clock pulse horizontal (CPH) signal, the data transmission control signal Load, and the data polarity inversion signal POL. Similarly, the control signals provided to the gate driver G-IC include the start vertical (STV) signal representing the start of a frame scan, the clock pulse vertical (CPV) signal, and the enable signal.

[0049] For example, the digital interface type of the input terminals of the timing controller TCON can be, for example, Low-Voltage Differential Signaling (LVDS), Embedded Display Port (eDP) interface, and V-by-One (Vx1) interface. The digital interface type of the output terminals of the timing controller TCON can be, for example, mini-LVDS, used for communication with the source driver SD-IC.

[0050] LVDS interfaces transmit signals in wire pairs, including a clock pair and several signal pairs. For example, an LVDS signal pair includes three control signals: a vertical sync signal, a horizontal sync signal, and an enable signal. The mini-LVDS interface is similar to the LVDS interface, also transmitting signals using differential signal pairs; however, unlike LVDS signal pairs, the mini-LVDS signal pairs do not transmit control signals. These control signals are transmitted through separate signal lines or differential signal pairs.

[0051] Figure 1B A schematic diagram shows a structure in which the timing controller TCON and the source driver are connected via a mini-LVDS interface. Figure 1BAs shown, the timing controller TCON provides control signals and image data signals to multiple source drivers. These source drivers may include, for example, source driver SD#1, source driver SD#2, etc. The number of source drivers depends on the physical resolution of the display panel; for a single display panel, this may require dozens or even hundreds. Each source driver is connected via clock signal pairs for transmitting clock signals, mini-LVDS signal pairs for transmitting image data signals, and control signal lines for transmitting multiple control signals. The mini-LVDS signal pairs can be 3 or 6 pairs. The control signal lines may or may not be differential pairs. The mini-LVDS signal lines and the multiple control signal lines are independent of each other.

[0052] For example, the timing controller TCON and the source driver SD#1 are connected via mini-LVDS signal pairs for transmitting data signals, LOAD control signal lines for transmitting data transmission control signals LOAD, POL control signal lines for transmitting control signals POL, and POL2 control signal lines for transmitting control signals POL2; TCON and the source driver SD#2 are also connected via mini-LVDS signal pairs, LOAD control signal lines, and data polarity inversion control signal lines (e.g., POL control signal lines, POL2 control signal lines, and POLC control signal lines).

[0053] Other control signal lines may also be included between each source driver and TCON, such as horizontal dot inversion (H2DOT) control signal lines, bias voltage (PWRC) control signal lines, etc.

[0054] like Figure 1B As shown, the mini-LVDS signal pairs are only used to transmit image data signals and not to transmit control signals such as polarity inversion configuration information or data transmission control information. Therefore, there are multiple signal lines and multiple signal line interfaces between the timing controller and the source drivers, resulting in a large amount of signal routing space occupied in the display panel, especially when the number of source drivers is large. If the available signal routing space in the display panel is insufficient to accommodate these multiple data lines, then some commonly used control functions cannot be flexibly embedded into the source drivers.

[0055] To address this, embodiments of this disclosure provide a signal transmission method for a controller to transmit display signals to a source driver. This signal transmission method includes providing the display signals to the source driver via a low-voltage differential signal interface in at least two modes within one display frame period. The display signals provided in at least two modes include configuration data and image data. The configuration data is used to configure the source driver, causing the source driver to process the image data according to the configuration data. This signal transmission method can reuse the low-voltage differential signal interface, allowing it to be used for both providing image data and configuration data to the source driver, thereby reducing the number of interfaces used for signal transmission, saving costs, and ensuring that various control functions can be flexibly embedded into the source driver.

[0056] Figure 1C An architecture diagram of an application signal transmission method provided by at least one embodiment of the present disclosure is shown.

[0057] like Figure 1C As shown, the architecture includes a timing controller 110, a source driver 120, and a display panel 130.

[0058] The timing controller 110 provides the source driver 120 with image data signals, control signals, and clock signals suitable for the source driver. The source driver 120 receives the digital signals (including image data signals and control signals) provided by the timing controller 110, converts the digital signals into corresponding analog grayscale voltage signals through digital-to-analog conversion, and inputs them into the pixel array of the display panel 130. Descriptions of the gate drive circuit, etc., are omitted here to avoid redundancy. The embodiments of this disclosure do not limit the specific structure or implementation of the timing controller 110, source driver 120, display panel 130, gate driver, etc.

[0059] Figure 1D A flowchart illustrating a signal transmission method provided by at least one embodiment of this disclosure is shown. For example, the signal transmission method provided by the embodiments of this disclosure is applicable to both LVDS interfaces and mini-LVDS interfaces.

[0060] like Figure 1D As shown, the signal transmission method includes steps S10 and S20. Figure 1D The signal transmission method described herein is, for example, derived from... Figure 1C The timing controller 110 executes this. For example, this signal transmission method is used for the timing controller 110 to transmit display signals to the source driver 120.

[0061] Step S10: Obtain the display signal.

[0062] Step S20: During a display cycle of one frame, display signals are provided to the source driver in at least two modes through a low-voltage differential signal interface. The display signals provided in at least two modes include configuration data and image data. The configuration data is used to configure the source driver so that the source driver processes the image data according to the configuration data.

[0063] For step S10, the display signal may include, for example, image data and configuration data. For instance, the timing controller 110 receives an LVDS differential signal from an external source and analyzes the LVDS differential signal to separate image data, such as RGB data.

[0064] In the embodiments provided in this disclosure, the display signals provided by the low-voltage differential signal interface include both configuration data (e.g., control signals) and image data; therefore, multiple control signal lines independent of mini-LVDS or LVDS signal lines are no longer required between the controller and the source driver. For example, Figure 1B The LOAD control signal line, data polarity inversion control signal line (e.g., POL control signal line, POL2 control signal line, and POLC control signal line), horizontal dot inversion (H2DOT) control signal line, bias voltage (PWRC) control signal line, etc., can be omitted. For example, the signal transmission method provided in the embodiments of this disclosure includes only mini-LVDS signal lines and clock signal lines between the source driver and the controller, and each of the source driver and the controller may only include a mini-LVDS interface and a clock signal interface. Of course, the source driver and the controller may also include other interfaces for backup, such as the LOAD control signal line, the data polarity inversion control signal line POL, etc.

[0065] Therefore, embodiments of this disclosure reduce the number of interfaces and signal lines used for signal transmission, and ensure that various control functions can be flexibly embedded into the source driver.

[0066] For example, configuration data can be generated by the timing control module in the timing controller. This configuration data is used to configure the source driver, enabling it to receive and store the configuration data before processing image data. For instance, the source driver outputs image data to the pixel array based on the timing provided by the configuration data.

[0067] In some embodiments of this disclosure, the configuration data includes control signals required during the display of RGB data by the pixel array. For example, if the display panel is a liquid crystal display panel, then the polarity of the liquid crystal molecules needs to be controlled during the display of RGB data by the liquid crystal display panel. The control signals may include data polarity inversion control signals (e.g., POL control signals, POL2 control signals, and POLC control signals). As another example, a row data start signal is needed during the display of RGB data by the pixel array. The control signals may include a row data start signal STH. Furthermore, the display panel may also be an OLED display panel, etc., and the embodiments of this disclosure do not limit this.

[0068] The configuration data can be set by those skilled in the art according to actual needs. This disclosure does not limit the configuration data. The above-mentioned data polarity reversal control signal, frame scan start signal and row data start signal are only examples.

[0069] For step S20, in embodiments of this disclosure, the low-voltage differential signal interface includes multiple pairs of transmission lines, each pair of transmission lines including two complementary differential signals, through which image data and configuration data are transmitted. For example, the low-voltage differential signal interface can be a mini-LVDS interface or an LVDS interface, etc.

[0070] A display cycle includes, for example, an active frame and a vertical blanking period (VBP). During the active frame, for example, pixels in the pixel array display image data line by line, while during the vertical blanking period, preparation is made for the display of the next frame of image data.

[0071] In some embodiments of this disclosure, for example, display signals are provided to the source driver sequentially in at least two modes via a low-voltage differential signal interface.

[0072] For example, the display signal includes display sub-signals provided by each of at least two modes. For example, the display sub-signals provided by each mode include configuration data and image data. As another example, the at least two modes include a first mode and a second mode, where the first mode includes configuration data and image data, and the second mode includes configuration data. As yet another example, the first mode includes configuration data, and the second mode includes image data.

[0073] In some embodiments of this disclosure, at least one of at least two modes is a row configuration mode, the configuration data includes row configuration data, and the display sub-signals provided by the row configuration mode include row configuration data and row image data.

[0074] The row configuration mode provides display sub-signals for displaying image data for a row of pixels. Row image data, for example, is the RGB data corresponding to that row in the pixel array. Row configuration data is used to configure the source driver, causing the source driver to respond to the row configuration data by outputting the row image data and timing control signals to the pixels in that row.

[0075] In some embodiments of this disclosure, display signals are provided to the source driver via the low-voltage differential signal interface according to at least two signal formats defined by a first signal transmission protocol. The following is in conjunction with... Figures 2A-2C This example illustrates the signal format of at least two modes defined by the first signal transmission protocol.

[0076] Figure 2A A schematic diagram is shown of the signal format of a display sub-signal provided in a row configuration mode according to at least one embodiment of the present disclosure.

[0077] exist Figure 2A The example illustrates a first and second display sub-signal provided to the source driver in row configuration mode. It is important to understand that the first and second display sub-signals are merely illustrative of the signal format for display sub-signals provided in row configuration mode and do not imply that only two display sub-signals are provided to the source driver in row configuration mode. In practice, the number of display sub-signals provided to the source driver in row configuration mode can be the same as the number of rows in the pixel array; that is, a display sub-signal is provided to each row of pixels in row configuration mode.

[0078] like Figure 2A As shown, the display sub-signals provided by the row configuration mode include row configuration data and row image data (e.g., RGB data of a row of pixels). In the following embodiments, RGB (red, green, blue) data is used as an example of image data; however, it should be noted that this disclosure is not limited to this. For example, some display devices may also use image data in forms such as RGBW (red, green, blue, white). For example, the first display sub-signal includes first row configuration data and first row RGB data, and the second display sub-signal includes second row configuration data and second row RGB data.

[0079] It should be noted that in the embodiments of this disclosure, "first" and "second" do not indicate a specific order, but are merely used to distinguish different configuration data or RGB data. The first row of RGB data refers to the RGB data of any randomly selected row of sub-pixels in the pixel array, and the first row of configuration data always corresponds to the configuration data of the RGB data of that row of sub-pixels.

[0080] In some embodiments of this disclosure, such as Figure 2AAs shown, the display sub-signals provided by the row configuration mode include combined data, which combines the row configuration data of each row with the row image data of each row in the image data. For example, the first display sub-signal is composed of the first row configuration data and the first row RGB data, and the second display sub-signal is composed of the second row configuration data and the second row RGB data. That is, the controller sequentially provides the display sub-signals corresponding to each row of pixels to the source driver. In this embodiment, the configuration data and image data of a row are combined and transmitted through a low-voltage differential signal interface, which not only realizes the multiplexing of the low-voltage differential signal interface, but also facilitates the source driver to process the image data of each row in a timely manner according to the configuration data of each row for image display.

[0081] exist Figure 2A In the signal format example shown, for each display sub-signal, the row configuration data precedes the RGB data. That is, for each display sub-signal, the controller first provides the row configuration data to the source driver, and then provides the RGB data for that row to the source driver. Providing the row configuration data to the source driver first, and then providing the RGB data for that row to the source driver, makes it easier for the source driver to process the RGB data of that row in a timely manner according to the row configuration data.

[0082] In some embodiments of this disclosure, at least one of at least two modes is a frame configuration mode, the configuration data includes frame configuration data, and the display sub-signals provided by the frame configuration mode include frame configuration data.

[0083] The display sub-signals provided by the frame configuration mode are used for displaying a frame of image. Frame configuration data, for example, is used to configure the source driver so that the source driver outputs control signals for that frame of image. Frame configuration data may include, for example, a gamma setting signal, an AMP offset control signal, a shift direction selection signal, etc.

[0084] Figure 2B A schematic diagram of the signal format of a display sub-signal provided by a frame configuration mode according to at least one embodiment of the present disclosure is shown.

[0085] like Figure 2B As shown, the display sub-signals provided by the frame configuration mode include frame configuration data and invalid data.

[0086] In some embodiments of this disclosure, for example, a frame configuration mode is applied during vertical blanking. During vertical blanking, the pixel array does not display image data, therefore the display sub-signals provided by the frame configuration mode may include invalid data.

[0087] In other embodiments of this disclosure, if the data length of the frame configuration data is the same as the data length of the combined data provided by the row configuration mode, the display sub-signals provided by the frame configuration mode may also not include invalid data. In embodiments of this disclosure, invalid data may, for example, refer to data signals at a logic invalid level.

[0088] exist Figure 2B In the signal format example shown, for each display sub-signal, the frame configuration data is placed before the invalid data. That is, for each display sub-signal, the controller first provides the frame configuration data to the source driver, and then provides the invalid data to the source driver.

[0089] In some embodiments of this disclosure, at least one of at least two modes includes a calibration configuration mode, the configuration data includes a calibration signal, and the display sub-signal provided by the calibration configuration mode includes a calibration signal, for example, the calibration signal is used to calibrate the timing of the clock signal of the source driver and the display signal.

[0090] In some embodiments of this disclosure, the controller provides a correction signal to the source driver in a correction configuration mode during vertical blanking.

[0091] For example, the transmission of display signals depends on clock signals. Ideally, the rising edge of the clock signal should be aligned with the midpoint of the effective logic level of the display signal. However, in practice, delays in the clock or display signals can cause misalignment between the rising edge of the clock signal and the midpoint of the effective logic level of the display signal. Therefore, correction is required for the clock or display signal. For example, a correction signal might be used to align the rising edge of the clock signal with the midpoint of the effective logic level of the display signal.

[0092] The frame configuration mode and the correction configuration mode enable the source driver to perform frame configuration and timing correction during vertical blanking to prepare for the display of the next image frame. Since frame configuration and timing correction are performed during vertical blanking, time is saved and display efficiency is improved.

[0093] Figure 2C A schematic diagram of the signal format of a display sub-signal provided by a correction configuration mode according to at least one embodiment of the present disclosure is shown.

[0094] like Figure 2C As shown, the display sub-signal provided by the calibration configuration mode includes a calibration signal. For example, in at least one example, the calibration signal may include the delay time length of a clock signal or a data signal used to calculate the delay time length of the clock signal. Those skilled in the art can set the calibration signal according to relevant calibration methods.

[0095] In some embodiments of this disclosure, each display sub-signal may further include a pattern recognition signal. The pattern recognition signal is used to indicate to the source driver the mode to which the display sub-signal belongs, so that the source driver can parse the display sub-signal according to the mode to which the display sub-signal belongs to obtain configuration data or image data.

[0096] like Figures 2A-2C As shown, the display sub-signals provided by the line configuration mode include a pattern recognition signal A to indicate that the display sub-signal belongs to the line configuration mode; the display sub-signals provided by the frame configuration mode include a pattern recognition signal B to indicate that the display sub-signal belongs to the frame configuration mode; and the display sub-signals provided by the correction configuration mode include a pattern recognition signal C to indicate that the display sub-signal belongs to the correction configuration mode.

[0097] like Figures 2A-2C As shown, the pattern recognition signal of the display sub-signal provided in each mode can be located before the configuration data. That is, the controller first provides the pattern recognition signal of each display sub-signal to the source driver, and then provides the configuration data of that display sub-signal to the source driver. For example, for the row configuration mode, the controller first provides the pattern recognition signal A to the source driver, then provides the row configuration data to the source driver, and then provides the row image data to the source driver. As another example, for the frame configuration mode, the controller first provides the pattern recognition signal B to the source driver, then provides the frame configuration data to the source driver, and then provides invalid data to the source driver. As yet another example, for the correction configuration mode, the controller first provides the pattern recognition signal C to the source driver, and then provides the correction signal to the source driver. In embodiments of this disclosure, invalid data can be, for example, a logic invalid level signal, such as a low-level signal.

[0098] Each display sub-signal includes a pattern recognition signal, which enables the source driver to correctly parse and process subsequently received data according to the pattern to which the display sub-signal belongs, in order to obtain line configuration data, frame configuration data, or correction signals, etc.

[0099] In some embodiments of this disclosure, at least two modes include a line configuration mode and a frame configuration mode. The display sub-signals provided by the line configuration mode include line configuration data and image data, while the display sub-signals provided by the frame configuration mode include frame configuration data. Please refer to the description above for an explanation of the line configuration mode and the frame configuration mode.

[0100] In some embodiments of this disclosure, at least two modes also include a calibration configuration mode. The calibration configuration mode provides a display sub-signal including a calibration signal used to correct the timing of the source driver's clock signal and the display signal. Please refer to the description above for an explanation of the calibration configuration mode.

[0101] In some embodiments of this disclosure, since RGB image data needs to be transmitted during image display but not during vertical blanking, display sub-signals are transmitted in different modes during image display and vertical blanking.

[0102] For example, at least two modes include a line configuration mode and a frame configuration mode. During image display, the display sub-signals required for displaying image data per line of pixels are transmitted to the source driver according to the line configuration mode, while during vertical blanking, the display sub-signals required during vertical blanking are transmitted to the source driver according to the frame configuration mode. For example, the frame configuration mode and the correction configuration mode during vertical blanking within a frame display cycle.

[0103] In some embodiments of this disclosure, the frame configuration mode includes a power control sub-mode that provides data signals, such as invalid data, from the source driver at least during vertical blanking to control (e.g., reduce) the power consumption of the source driver at least during vertical blanking, thereby controlling the overall power consumption of the system.

[0104] For example, the frame configuration data includes power configuration sub-data used to reduce the power consumption of the source driver, at least during vertical blanking. For example, in response to the power configuration sub-data, the source driver enters a low-power operating state, in which at least some circuit modules of the source driver are powered down, thereby reducing the power consumption of the source driver, at least during vertical blanking. The data signal provided by the power control sub-mode may, for example, be a logic invalid level. In embodiments of this disclosure, for example, the logic invalid level may be a low-level signal representing a data signal "0", and the logic valid level may, for example, be a high-level signal representing a data signal "1". During the low-power operating state of the source driver, the controller provides a logic invalid level to the source driver to reduce power consumption during vertical blanking. For example, the power configuration sub-data includes at least some circuit modules of the source driver that are disabled during vertical blanking. Those skilled in the art can define the circuit modules disabled during vertical blanking in the power configuration sub-data to issue the disabled circuit modules to the source driver, causing the source driver to disable the circuit modules in the power configuration sub-data during vertical blanking. In some embodiments of this disclosure, disabling a circuit module may mean powering off that circuit module.

[0105] For example, if the power consumption configuration subdata indicates that the circuit module disabled in the vertical blanking device includes the output driver, then the source driver is configured to power down the output driver during vertical blanking.

[0106] Figure 3A and 3B A schematic diagram of a display signal format provided by a controller to a source driver according to at least one embodiment of the present disclosure is shown.

[0107] like Figure 3A As shown, in a frame display cycle (including the image display period and the vertical blanking period), the display signals include multiple display sub-signals 301 provided in row configuration mode, display sub-signals 302 provided in frame configuration mode, and display sub-signals 303 provided in correction configuration mode.

[0108] For example, during image display, multiple display sub-signals 301 are provided in a line configuration mode, during vertical blanking, display sub-signals 302 are provided in a frame configuration mode, and display sub-signals 303 are provided in a correction configuration mode.

[0109] like Figure 3A As shown, within one frame display period, providing display signals to the source driver in at least two modes via a low-voltage differential signal interface includes: within one frame display period, providing display signals to the source driver sequentially in at least two modes using a low-voltage differential signal interface, and for each mode, providing one or more display sub-signals to the source driver sequentially using a low-voltage differential signal interface.

[0110] For example, in Figure 3A In the example, multiple display sub-signals 301 are first provided to the source driver in row configuration mode using a low-voltage differential signal interface, then display sub-signals 302 are provided to the source driver in frame configuration mode, and finally display sub-signals 303 are provided to the source driver in calibration configuration mode. For example, in the row configuration mode including multiple display sub-signals 301, multiple display sub-signals 301 are provided to the source driver sequentially using a low-voltage differential signal interface. That is, in Figure 3A In the example, multiple display sub-signals 301 are first provided to the source driver using the low-voltage differential signal interface, then display sub-signals 302 are provided to the source driver using the low-voltage differential signal interface, and then display sub-signals 303 are provided to the source driver using the low-voltage differential signal interface.

[0111] like Figure 3A As shown, each display sub-signal 301 provided in row configuration mode includes row data (LPC) and image data (e.g., RGB data). Figure 3B As shown, the row data LPC includes a pattern recognition signal A and row configuration data. For example, the pattern recognition signal A includes a reset signal RESET and a row mode start signal LPC Start. For example, the row mode start signal can be a logic invalid level, such as "000000". Please refer to the description above for the pattern recognition signal and row configuration data of the row configuration mode.

[0112] like Figure 3AAs shown, each display sub-signal 302 provided in frame configuration mode includes frame data FPC and invalid data IDLE0 and invalid data IDLE1. The display sub-signals provided in frame configuration mode include data signals 312 provided in power control sub-mode. (As shown...) Figure 3B As shown, the Frame Data Programming (FPC) includes a pattern recognition signal B and frame configuration data. For example, the pattern recognition signal B of the Frame Data Programming (FPC) is a reset signal RESET and a frame mode start signal FPC Start. For example, the frame mode start signal differs from the line mode start signal to distinguish between frame configuration mode and line configuration mode; the frame mode start signal can be, for example, a logic active level such as "111 111". Please refer to the description above for the pattern recognition signal and frame configuration data for the frame configuration mode.

[0113] During the period when the controller provides data signals 312 (including invalid data IDLE0 and invalid data IDLE1) to the source driver in power configuration sub-mode, at least some circuit modules in the source driver are in a power-down state to save power.

[0114] like Figure 3A As shown, each display sub-signal 303 provided in the calibration configuration mode includes calibration data ASC. (As...) Figure 3B As shown, the correction data ASC includes a pattern recognition signal C and a correction signal. The pattern recognition signal C can be, for example, a logic invalid level. Please refer to the description above for information about the correction signal.

[0115] like Figure 3A As shown, after transmitting the display signal for one display cycle to the source driver, the display signal for the next display cycle continues to be transmitted to the source driver.

[0116] like Figure 3A As shown, before providing each display sub-signal to the source driver, a trigger signal PSI is provided to the source driver. The trigger signal PSI is used to notify the source driver to perform a transfer operation for at least two modes.

[0117] In some embodiments of this disclosure, the controller can transmit display signals to the source driver in a single mode, in addition to transmitting display signals to the source driver in at least two modes.

[0118] In this embodiment, the trigger signal PSI notifies the source driver of at least two modes of transmission operations, which facilitates compatibility between the source driver and the controller with other transmission operations besides the at least two modes. For example, in addition to at least two modes of transmission operations, the controller and the source driver can also compatiblely perform single-mode transmission operations. For example, a display signal that can be transmitted in at least two modes conforms to a first signal transmission protocol, and a display signal that can be transmitted to the source driver in a single mode conforms to a second signal transmission protocol. If the controller and the source driver perform at least two modes of transmission operations, the controller first provides the source driver with the trigger signal PSI as an indication signal for at least two modes of transmission operations; if the controller and the source driver perform a single-mode transmission operation, the controller first provides the source driver with a single-mode indication signal different from the trigger signal PSI. The second signal transmission protocol can be a protocol different from the first signal transmission protocol, such as some transmission protocols in related technologies. By setting the trigger signal, signal line multiplexing can be achieved, enabling the chip to have multiple functions, thereby reducing the difficulty of promoting the first signal transmission protocol.

[0119] In some embodiments of this disclosure, providing a trigger signal to the source driver includes: providing a data transmission control signal and a data polarity inversion control signal to the source driver, and obtaining the trigger signal based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver. The first transition edge of the data polarity inversion control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity inversion control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

[0120] The data polarity inversion control signal controls the polarity reversal of the source driver's output data signal by switching between high and low levels, thereby achieving AC driving of the LCD. The data transmission control signal is used to latch the data input to the source driver and the data polarity inversion signal on the rising edge, and to release the data to the panel on the falling edge.

[0121] In this example, the controller and source driver can be connected via mini-LVDS, POL, and LOAD signal lines. Therefore, other control signal lines such as POL2 and POLC, H2DOT (Horizontal Dot Inversion) and PWRC (Bias Voltage Control) lines can be omitted, either wholly or partially. Thus, this example not only reduces the number of signal lines between the controller and source driver but also informs the source driver which transmission operation to perform to ensure compatibility with single-mode transmission operations.

[0122] Figure 4AA timing diagram of a trigger signal PSI provided in at least one embodiment of the present disclosure is shown.

[0123] like Figure 4A As shown, the trigger signal PSI includes a data transmission control signal LOAD and a data polarity inversion control signal POL. The first transition edge (e.g., rising edge) of the data polarity inversion control signal POL is later than the second transition edge (e.g., rising edge) of the data transmission control signal LOAD. The first transition state (e.g., high level state) of the data polarity inversion control signal POL after the first transition edge coincides with the second transition state (e.g., high level state) of the data transmission control signal LOAD after the second transition edge for at least a portion of the time.

[0124] In some embodiments of this disclosure, for example, the driver in the controller can be adjusted such that, within the same cycle of the data transmission control signal LOAD and the data polarity inversion control signal POL, the data polarity inversion control signal POL occurs later than the data transmission control signal LOAD by a time length tS2, thereby causing the rising edge of the data polarity inversion control signal POL to occur later than the rising edge of the data transmission control signal LOAD. The data polarity inversion control signal POL and the data transmission control signal LOAD are simultaneously at a high level for a time length tH2 after their rising edges.

[0125] Figure 4B A timing diagram of a single-mode indication signal provided in at least one embodiment of the present disclosure is shown.

[0126] like Figure 4B As shown, the single-mode indication signal includes a data transmission control signal LOAD' and a data polarity inversion control signal POL', and the first transition edge (e.g., rising edge) of the data polarity inversion control signal POL' precedes the second transition edge (e.g., rising edge) of the data transmission control signal LOAD', and the first transition state (e.g., high level state) of the data polarity inversion control signal POL' after the first transition edge coincides with the second transition state (e.g., high level state) of the data transmission control signal LOAD' after the second transition edge at least for a portion of the time.

[0127] In some embodiments of this disclosure, for example, the driver in the controller can be adjusted such that, within the same cycle of the data transmission control signal LOAD' and the data polarity inversion control signal POL', the data polarity inversion control signal POL' precedes the data transmission control signal LOAD' by a time length tS1, thereby causing the rising edge of the data polarity inversion control signal POL' to precede the rising edge of the data transmission control signal LOAD'.

[0128] Figure 4A and Figure 4BThe embodiments can distinguish between single-mode transmission operations and transmission operations with at least two modes through data transmission control signals and data polarity reversal control signals, without requiring modifications to the interface hardware circuitry, making them easy to implement. Thus, the same set of controllers and source drivers can select to implement either the first or second signal transmission protocol as needed, without requiring separate sets of controllers and source drivers for the first and second signal transmission protocols. Therefore, this reduces design, development, manufacturing, and management costs for suppliers.

[0129] like Figure 3A As shown, the frame configuration mode includes a power configuration sub-mode. The display sub-signal 302 provided in frame configuration mode includes data signals 312 (including invalid signals IDLE0 and IDLE1) provided to the source driver in power configuration sub-mode. During the period when the controller provides invalid signals IDLE0 and IDLE1 to the source driver in power configuration sub-mode, at least a portion of the circuitry in the source driver is in a power-down state to conserve power. Figure 3A In the example, before providing the invalid signal IDLE0 to the source driver in power configuration sub-mode, the controller provides the trigger signal PSI to the source driver again to indicate that the source driver is entering a low-power operating state. Please refer to [link to trigger signal PSI] for details. Figure 4A The description.

[0130] In some embodiments of this disclosure, the signal transmission method is applied to a display device. For example, it is applied to... Figure 1C The display panel 130 shown. During the power-on process of the display device, the display signals transmitted between the controller and the source driver are, in sequence, the display sub-signals provided by the calibration configuration mode and the display sub-signals provided by the frame configuration mode; and after the display device enters the working state, the display signals transmitted between the controller and the source driver are, in sequence, the display sub-signals provided by the row configuration mode, the display sub-signals provided by the frame configuration mode, and the display sub-signals provided by the calibration configuration mode.

[0131] During the power-on process of the display device, the controller first provides a calibration signal to the source driver, and then provides frame configuration data to the source driver, enabling the controller to prepare for image display in advance. No image display occurs during the power-on process, therefore, it is not necessary to provide display sub-signals to the source driver in line configuration mode. After the source driver is configured according to the calibration signal and the frame configuration data, the display device enters the operating state. After the display device enters the operating state, the controller provides multiple display sub-signals to the source driver in line configuration mode, frame configuration mode, and calibration configuration mode.

[0132] For example, the controller first provides row configuration data and row image data to the source driver in row configuration mode, causing the display device to sequentially display the image data of each row to display a complete frame of image. After the display device displays a complete frame of image, it enters the vertical blanking period. During the vertical blanking period, the controller first provides frame configuration data to the source driver in frame configuration mode, causing the source driver to perform frame configuration. For example, the source driver enters a low-power state based on the frame configuration data, and then the controller provides a logic invalid level to the source driver in correction configuration mode. During the vertical blanking period, the source driver is configured according to the frame configuration data and correction configuration data to prepare for the display of the next frame of image.

[0133] Figure 5 A flowchart of another signal transmission method provided by at least one embodiment of the present disclosure is shown.

[0134] like Figure 5 As shown, the signal transmission method includes steps S510 to S530. Figure 5 The signal transmission method shown is, for example, by Figure 1C The source driver 120 performs this operation. For example, this signal transmission method is used for the source driver 120 to receive display signals from the timing controller 110.

[0135] Step S510: Receive the display signal within a frame display period provided by the controller in at least two modes via the low-voltage differential signal interface.

[0136] Step S520: Analyze the display signal to obtain configuration data and image data.

[0137] Step S530: Process the image data according to the configuration data.

[0138] For step S510, for example in Figure 1C In the example, controller 110 sends a display signal for one display cycle to source driver 120 via its own low-voltage differential signal interface. Source driver 120 receives the display signal from controller 110 via its own low-voltage differential signal interface. Please refer to the description above for at least two modes and one display cycle.

[0139] For step S520, please refer to the above description regarding the configuration data and image data. For example, extracting line configuration data and line image data from the display signal. Another example is extracting frame configuration data and correction configuration data from the display signal.

[0140] For step S530, for example, during the row image data display process, the rotation of liquid crystal molecules is driven according to the row configuration data, and the digital signal is converted into a corresponding analog grayscale voltage data signal according to the frame configuration data.

[0141] The line configuration data, frame configuration data, and correction configuration data are similar to the embodiments described above; please refer to the description above.

[0142] Figure 6 At least one embodiment of the present disclosure is shown. Figure 5 The flowchart for step S520. (See attached flowchart.) Figure 6 As shown, step S520 includes steps S521 to S523. In this embodiment, the display signal includes a display sub-signal provided by each of at least two modes, and each display sub-signal includes a pattern recognition signal. Please refer to the description above for the display sub-signals and the pattern recognition signal.

[0143] Step S521: Acquire pattern recognition signal.

[0144] Step S522: Determine the mode to which the display sub-signal belongs based on the pattern recognition signal.

[0145] Step S523: Analyze the display sub-signal according to the mode to which the display sub-signal belongs to obtain configuration data or image data.

[0146] For example, the pattern recognition signal is Figure 3B The pattern recognition signal A shown indicates that the sub-signal belongs to the row configuration mode.

[0147] For example, the pattern recognition signal is Figure 3B The pattern recognition signal B shown indicates that the sub-signal belongs to the frame configuration mode.

[0148] For example, the pattern recognition signal is Figure 3B The pattern recognition signal C shown indicates that the sub-signal belongs to the correction configuration mode.

[0149] After determining the mode to which the display sub-signal belongs based on the pattern recognition signal, the source driver parses the display sub-signal according to the mode to which the display sub-signal belongs. For example, parsing a display sub-signal provided in a row configuration mode yields row configuration data and row image data; parsing a display sub-signal provided in a frame configuration mode yields frame configuration data; and parsing a display sub-signal provided in a correction configuration mode yields a correction signal.

[0150] In some embodiments of this disclosure, step S510 includes: receiving display signals provided by the controller in at least two modes sequentially through a low-voltage differential signal interface within a display frame period, and for each mode, receiving one or more display sub-signals sequentially through the low-voltage differential signal interface.

[0151] For example, the source driver receives, sequentially via a low-voltage differential signal interface, at least one display sub-signal provided by the controller in row configuration mode, at least one display sub-signal provided in frame configuration mode, and at least one display sub-signal provided in calibration configuration mode.

[0152] In some embodiments of this disclosure, the transmission method performed by the source driver may further include receiving a trigger signal provided by the controller before receiving each display sub-signal, and performing a transmission operation for at least two modes in response to the trigger signal.

[0153] In some embodiments of this disclosure, the trigger signal is obtained based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver, wherein the first transition edge of the data polarity inversion control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity inversion control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

[0154] The trigger signal may be, for example, the trigger signal PSI described in the foregoing embodiments. For embodiments of the trigger signal, please refer to the description above.

[0155] Figure 7 A flowchart illustrating another signal transmission method provided by at least one embodiment of this disclosure is shown. Figure 7 As shown, the signal transmission method includes steps S701 to S712. Steps S701 to S712 can be performed by the source driver, for example.

[0156] Step S701: Power on the source driver.

[0157] Step S702: Determine whether a trigger signal PSI has been acquired. For example, determine whether the rising edge of the data polarity inversion control signal POL is later than the rising edge of the data transmission control signal LOAD within the same cycle. If the rising edge of the data polarity inversion control signal POL is later than the rising edge of the data transmission control signal LOAD, then the trigger signal PSI has been acquired. If the rising edge of the data polarity inversion control signal POL is earlier than the rising edge of the data transmission control signal LOAD, then a non-trigger signal (e.g., the single-mode indicator signal described above) has been acquired.

[0158] If the trigger signal PSI is obtained, proceed to step S703; if the trigger signal PSI is not obtained, proceed to step S711 to execute.

[0159] Step S703: Determine whether the display sub-signal includes a reset signal. If the display sub-signal does not include a reset signal, then the display sub-signal is provided in the calibration configuration mode. If the display sub-signal includes a reset signal, then continue to determine whether the display sub-signal is provided in the frame configuration mode or the row configuration mode. That is, if the display sub-signal includes a reset signal, then execute step S704; if the display sub-signal does not include a reset signal, then jump to step S710.

[0160] Step S704: Determine whether the line mode start signal (LPC Start) and the frame mode start signal (FPC Start) have been received. That is, determine whether the display sub-signal includes the line mode start signal (LPC Start) or the frame mode start signal (FPC Start).

[0161] If a line mode start signal (LPC Start) is received, proceed to step S708; if a frame mode start signal (FPC Start) is received, proceed to step S705.

[0162] Step S705: Continue to receive frame configuration data using the low-voltage differential signal interface.

[0163] Step S706: Determine whether the low-power operating state is enabled. For example, the source driver enters the low-power operating state based on the frame configuration data.

[0164] If the frame configuration data enables the low-power operating state, then proceed to step S707; if the frame configuration data does not enable the low-power operating state, then return to proceed to step S702.

[0165] Step S707: The source driver enters a low-power operating state. For example, in the low-power operating state, at least a portion of the source driver's circuitry is powered down, thereby reducing the source driver's power consumption at least during vertical blanking. At least a portion of the circuitry may be configured in the frame configuration data.

[0166] Step S708: Continue to receive row configuration data using the low-voltage differential signal interface.

[0167] Step S709: Continue to receive line image data using the low-voltage differential signal interface.

[0168] Step S710: Receive the calibration signal provided by the controller in calibration configuration mode.

[0169] Step S711: Receive reset signal.

[0170] Step S712: Receive image data.

[0171] For example, in steps S701 to S710, the reset signal and image data provided by the controller to the source driver conform to the first signal transmission protocol. In steps S711 and S712, for example, the reset signal and image data provided by the controller to the source driver conform to the second signal transmission protocol.

[0172] Figure 8 A schematic block diagram of a controller 800 provided in at least one embodiment of the present disclosure is shown. The controller 800 is used to transmit display signals to a source driver.

[0173] For example, such as Figure 8 As shown, the controller 800 includes a display signal acquisition unit 810 and a low-voltage differential signal interface 820.

[0174] The display signal acquisition unit 810 is configured to acquire display signals. For example, the display signal acquisition unit 810 generates display signals that are provided to the source driver in at least two modes.

[0175] The display signal acquisition unit 810 can, for example, perform... Figure 1D Step S10 is described.

[0176] The low-voltage differential signal interface 820 is configured to provide display signals to the source driver in at least two modes within a single frame display cycle. The display signals provided in at least two modes include configuration data and image data. The configuration data is used to configure the source driver so that the source driver processes the image data according to the configuration data.

[0177] The low-voltage differential signal interface 820 can, for example, perform... Figure 1D Step S20 is described.

[0178] The controller 800 can reuse the low-voltage differential signal interface, which can be used to provide both image data and configuration data to the source driver, thereby reducing the number of interfaces used for signal transmission and ensuring that a variety of control functions can be flexibly embedded into the source driver.

[0179] Figure 9 A schematic block diagram of a source driver 900 provided in at least one embodiment of the present disclosure is shown. The source driver 900 is used to acquire display signals from a controller.

[0180] For example, such as Figure 9 As shown, the source driver 900 includes a low-voltage differential signal interface 910, a parsing unit 920, and a configuration unit 930.

[0181] The low-voltage differential signal interface 910 is configured to receive display signals provided by the controller in at least two modes during a display period of one frame, the display signals provided in at least two modes including configuration data and image data.

[0182] The low-voltage differential signal interface 910 can, for example, perform... Figure 5 Step S510 is described.

[0183] The parsing unit 920 is configured to parse the display signal to obtain configuration data and image data. For example, the parsing unit 920 can perform... Figure 5 Step S520 is described.

[0184] Configuration unit 930 is configured to perform configuration based on configuration data and to process image data based on the configuration data. Configuration unit 930 may, for example, perform... Figure 5 Step S530 is described.

[0185] The source driver 900 can reuse the low-voltage differential signal interface, which can be used to provide both image data and configuration data to the source driver, thereby reducing the number of interfaces used for signal transmission and ensuring that various control functions can be flexibly embedded into the source driver.

[0186] For example, the display signal acquisition unit 810, the parsing unit 920, and the configuration unit 930 can be hardware, software, firmware, or any feasible combination thereof. For example, the display signal acquisition unit 810, the parsing unit 920, and the configuration unit 930 can be dedicated or general-purpose circuits, chips, or devices, or a combination of a processor and memory. The embodiments of this disclosure do not limit the specific implementation of the above-mentioned units.

[0187] It should be noted that in the embodiments of this disclosure, each unit of the controller 800 and the source driver 900 corresponds to each step of the aforementioned signal transmission method. For the specific functions of the controller 800 and the source driver 900, please refer to the relevant description of the signal transmission method, which will not be repeated here. Figure 8 The controller 800 shown and Figure 9 The components and structure of the source driver 900 shown are merely exemplary and not limiting. The controller 800 and the source driver 900 may also include other components and structures as needed.

[0188] Figure 10 A schematic block diagram of an electronic device 1000 provided in at least one embodiment of this disclosure is shown. For example... Figure 10 As shown, the electronic device 1000 includes a controller 1010, a source driver 1020, and a display panel 1030.

[0189] Controller 1010 executes the above. Figure 1D The described signal transmission method. The source driver 1020, for example, executes the above... Figure 5The described signal transmission method. The display panel 1030 is, for example, a liquid crystal display panel, used to receive drive signals (i.e., grayscale voltage signals) provided by the source driver 1020 and display images.

[0190] Electronic device 1000 can be any electronic device with image display function, including but not limited to smartphones, tablets, laptops, monitors, televisions, etc.

[0191] This electronic device can reuse a low-voltage differential signal interface, which can be used to provide both image data and configuration data to the source driver, thereby reducing the number of interfaces used for signal transmission and ensuring that various control functions can be flexibly embedded into the source driver.

[0192] Although the above points have been made, the following points still need to be clarified:

[0193] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0194] (2) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0195] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure should be determined by the scope of protection of the claims.

Claims

1. A signal transmission method for a controller to transmit a display signal to a source driver, the method comprising: Within one frame display cycle, the display signal is provided to the source driver via a low-voltage differential signal interface in at least two modes, wherein the display signal provided in the at least two modes includes configuration data and image data. The configuration data is used to configure the source driver, so that the source driver processes the image data according to the configuration data. The display signal includes a display sub-signal provided by each of the at least two modes. The method further includes: Before providing the display sub-signal to the source driver, a trigger signal is provided to the source driver, wherein the trigger signal is used to notify the source driver to perform a transmission operation for the at least two modes. Providing the trigger signal to the source driver includes: The source driver is provided with a data transmission control signal and a data polarity inversion control signal, and the trigger signal is obtained based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver. Wherein, the first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least part of the time.

2. The method according to claim 1, wherein, Each of the aforementioned display sub-signals includes a pattern recognition signal. The pattern recognition signal is used to indicate to the source driver the mode to which the display sub-signal belongs, so that the source driver can parse the display sub-signal according to the mode to which the display sub-signal belongs to obtain the configuration data or the image data.

3. The method according to claim 2, wherein, Each mode provides one or more display sub-signals. During a single frame display cycle, providing the display signal to the source driver via the low-voltage differential signal interface in at least two modes includes: Within one frame display cycle, the display signal is sequentially provided to the source driver in at least two modes using the low-voltage differential signal interface. In each of the aforementioned modes, the low-voltage differential signal interface sequentially provides one or more display sub-signals to the source driver.

4. A signal transmission method for a source driver to acquire a display signal from a controller, the source driver including a low-voltage differential signal interface, the method comprising: The controller provides display signals within a one-frame display period in at least two modes via the low-voltage differential signal interface. The display signal is parsed to obtain configuration data and image data; as well as The image data is processed according to the configuration data. The display signal includes a display sub-signal provided by each of the at least two modes. The method further includes: Before receiving each display sub-signal, a trigger signal provided by the controller is received, and in response to the trigger signal, a transmission operation for the at least two modes is performed. The trigger signal is obtained based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver. Wherein, the first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least part of the time.

5. The method according to claim 4, wherein, Each of the aforementioned display sub-signals includes a pattern recognition signal. Parsing the display signal to obtain the configuration data and the image data includes: Acquire the pattern recognition signal; The mode to which the display sub-signal belongs is determined based on the pattern recognition signal; and The configuration data or the image data are obtained by parsing the display sub-signal according to the mode to which the display sub-signal belongs.

6. The method according to claim 4, wherein, Each mode provides one or more display sub-signals. Receiving the display signal within a frame display period provided by the controller in at least two modes through the low-voltage differential signal interface includes: Within one frame display cycle, the display signals provided by the controller in at least two modes are received sequentially through the low-voltage differential signal interface. In each of the aforementioned modes, one or more display sub-signals are received sequentially through the low-voltage differential signal interface.

7. The method according to any one of claims 2 to 6, wherein, The configuration data includes row configuration data, and at least one of the at least two modes is a row configuration mode. The display sub-signals provided by the row configuration mode include the row configuration data and the row image data.

8. The method according to claim 7, wherein, The display sub-signals provided by the row configuration mode include: Combined data is formed by combining the row configuration data of each row and the row image data of each row in the image data.

9. The method according to any one of claims 2 to 6, wherein, The configuration data includes frame configuration data, and at least one of the at least two modes includes a frame configuration mode, wherein the display sub-signals provided by the frame configuration mode include the frame configuration data.

10. The method according to any one of claims 2 to 6, wherein, The display sub-signal provided by the configuration data includes a correction signal, and at least one of the at least two modes includes a correction configuration mode, wherein the display sub-signal provided by the correction configuration mode includes a correction signal. The correction signal is used to correct the timing of the clock signal of the source driver and the display signal.

11. The method according to claim 2 or 5, wherein, The at least two modes include line configuration mode and frame configuration mode. The display sub-signals provided by the row configuration mode include row configuration data and the image data. The display sub-signals provided by the frame configuration mode include frame configuration data.

12. The method according to claim 11, wherein, The at least two modes also include a calibration configuration mode, wherein the calibration configuration mode provides a display sub-signal including a calibration signal, which is used to calibrate the timing of the source driver's clock signal and the display signal.

13. The method according to claim 12, wherein, The frame configuration mode and the correction configuration mode are during the vertical blanking period within the frame display cycle.

14. The method according to claim 13, wherein, The frame configuration mode includes a power control sub-mode that provides the source driver with data signals at least during the vertical blanking period.

15. The method according to claim 12, applied to a display device, wherein, During the power-on process of the display device, the display signals transmitted between the controller and the source driver are, in sequence, the display sub-signals provided by the calibration configuration mode and the display sub-signals provided by the frame configuration mode; as well as After the display device enters the working state, the display signals transmitted between the controller and the source driver are, in sequence, the display sub-signals provided by the row configuration mode, the display sub-signals provided by the frame configuration mode, and the display sub-signals provided by the correction configuration mode.

16. A controller for transmitting display signals to a source driver, the controller comprising: A low-voltage differential signal interface is configured to provide the display signal to the source driver in at least two modes within one frame display cycle, wherein the display signal provided in the at least two modes includes configuration data and image data. The configuration data is used to configure the source driver, so that the source driver processes the image data according to the configuration data. The display signal includes a display sub-signal provided by each of the at least two modes. The low-voltage differential signal interface is also configured as follows: Before providing the display sub-signal to the source driver, a trigger signal is provided to the source driver, wherein the trigger signal is used to notify the source driver to perform a transmission operation for the at least two modes. Providing the trigger signal to the source driver includes: The source driver is provided with a data transmission control signal and a data polarity inversion control signal, and the trigger signal is obtained based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver. Wherein, the first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least part of the time.

17. A source driver for acquiring a display signal from a controller, the source driver comprising: A low-voltage differential signal interface is configured to receive display signals provided by the controller in at least two modes within a display period of one frame, wherein the display signals provided in the at least two modes include configuration data and image data; The parsing unit is configured to parse the display signal to obtain the configuration data and the image data; and The configuration unit is configured to configure according to the configuration data and process the image data according to the configuration data. The display signal includes a display sub-signal provided by each of the at least two modes. The low-voltage differential signal interface is also configured to receive a trigger signal provided by the controller before receiving each display sub-signal, and to perform a transmission operation for the at least two modes in response to the trigger signal. The trigger signal is obtained based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver. Wherein, the first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least part of the time.

18. An electronic device comprising: The controller according to claim 16; The source driver of claim 17, wherein the source driver is connected to the controller via the low-voltage differential signal interface; as well as A display panel is connected to the source driver to receive drive signals provided by the source driver, wherein the drive signals are generated based on the display signals.

Citation Information

Patent Citations

  • Time schedule controller, source electrode driving chip, driving circuit and driving control method

    CN115240584A