LED epitaxial structure and preparation method thereof

Abstract

The present application discloses an LED epitaxial structure and a preparation method thereof. In the structure, a superlattice current expansion layer includes periodically arranged superlattice units, and the superlattice units include sequentially arranged (Al x1 Ga 1‑x1 ) 0.5 In 0.5 P potential well layer, (Al y1 Ga 1‑y1 ) 0.5 In 0.5 P first barrier layer and (Al y2 Ga 1‑y2 ) 0.5 In 0.5 The second barrier layer P has a structure with a value of 0<x1<y1<y2≤1. When electrons transition, the two barrier layers block the lateral current, increasing its lateral expansion. Electrons accumulate in the thicker first barrier layer and then tunnel through the thinner second barrier layer, providing a larger longitudinal current. This is achieved by introducing a double barrier layer and adjusting its composition and thickness to ensure both lateral current expansion and longitudinal current expansion. This improves crystal growth quality, reduces the operating voltage of the LED chip, increases carrier injection efficiency, and ultimately improves LED chip performance.

Description

Technical Field

[0001] The present application relates to the technical field of light emitting diodes, and in particular to an LED epitaxial structure and a preparation method thereof. Background Art

[0002] Light-emitting diodes (LEDs), as solid-state active light-emitting sources, offer long operating life, fast response time, high brightness, reliability, and environmental friendliness. They are currently widely used in lighting, display, and communications. AlGaInP is an excellent material for producing red, orange, and yellow light. Growing it on a lattice-matched GaAs substrate easily yields high-quality, low-defect red and yellow LED epitaxial structures. However, the inherent poor light absorption and thermal conductivity of the GaAs substrate severely limits the light extraction efficiency of red LEDs, impacting the device's electro-optical conversion efficiency. A flip-chip LED chip structure can effectively address this issue.

[0003] However, in flip-chip LED chips, the electrode area is much smaller than the light-emitting area, and the current is primarily confined to the area directly below the opaque electrode, resulting in severe electrode absorption and low light extraction efficiency. In this case, a current spreading layer with high conductivity is usually grown on top of the corresponding confinement layer to reduce the current density directly below the electrode, allowing the current to spread as evenly as possible throughout the device, thereby increasing the light emission in the non-electrode area.

[0004] Currently, superlattice current spreading layers, as one of the mainstream current spreading layers, adopt a superlattice structure with multiple periods of alternating well and barrier layers. A single barrier layer with a high Al content blocks electrons, thereby increasing the lateral expansion of current and improving device brightness. However, this also brings a series of problems: electrons in this type of superlattice require higher energy to cross the high barrier layer, thereby raising the operating voltage; while the high barrier layer restricts electron transitions and increases the lateral expansion of current, it also weakens the longitudinal current to a certain extent, resulting in a decrease in the quantum well carrier injection efficiency, affecting the brightness and anti-static breakdown performance of the LED chip; the high Al content of the barrier layer increases the carbon and oxygen contamination brought by Al, which can easily affect the crystal growth quality of materials such as AlGaInP in the device. Summary of the Invention

[0005] To solve the above technical problems, the embodiments of the present application provide an LED epitaxial structure and a preparation method thereof, which, while ensuring the lateral and vertical expansion of the current, reduces the operating voltage of the LED chip, improves the carrier injection efficiency, improves the brightness and anti-static breakdown performance of the LED chip, reduces the carbon and oxygen pollution caused by Al, and improves the crystal growth quality of materials such as AlGaInP.

[0006] To achieve the above objectives, the present invention provides the following technical solutions:

[0007] An LED epitaxial structure, comprising:

[0008] substrate;

[0009] a superlattice current spreading layer located on one side of the substrate, the superlattice current spreading layer comprising periodically arranged superlattice units, the superlattice units comprising a potential well layer, a first barrier layer, and a second barrier layer sequentially arranged in a direction away from the substrate;

[0010] A first-type semiconductor layer, an active layer, and a second-type semiconductor layer are located on a side of the superlattice current spreading layer away from the substrate and arranged in sequence in a direction away from the substrate;

[0011] Wherein, the potential well layer is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P layer, the first barrier layer is (Al y1 Ga 1-y1 ) 0.5 In 0.5 P layer, the second barrier layer is (Al y2 Ga 1-y2 ) 0.5 In 0.5 P layer, 0<x1<y1<y2≤1;

[0012] In a direction perpendicular to the plane where the substrate is located, the thickness of the first barrier layer is a first thickness d1, the thickness of the second barrier layer is a second thickness d2, and d1>d2.

[0013] Optionally, the thickness d1 of the first barrier layer satisfies: 5nm≤d1≤50nm.

[0014] Optionally, the thickness d2 of the second barrier layer satisfies: d2≤10 nm.

[0015] Optionally, the thickness d1 of the first barrier layer and the thickness d2 of the second barrier layer satisfy: d1>2d2.

[0016] Optionally, in a direction perpendicular to the plane of the substrate, the potential well layer has a thickness of a third thickness d3, where 1 nm ≤ d3 ≤ 20 nm.

[0017] Optionally, the period number n of the superlattice unit satisfies: 1≤n≤50.

[0018] Optionally, the LED epitaxial structure further includes a window layer, and the window layer is located on a side of the second-type semiconductor layer facing away from the substrate.

[0019] A method for preparing an LED epitaxial structure, comprising:

[0020] providing a substrate;

[0021] forming a superlattice current spreading layer on one side of the substrate, the superlattice current spreading layer comprising periodically arranged superlattice units, the superlattice units comprising a potential well layer, a first barrier layer, and a second barrier layer sequentially arranged in a direction away from the substrate;

[0022] Wherein, the potential well layer is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P layer, the first barrier layer is (Al y1 Ga 1-y1 ) 0.5 In 0.5 P layer, the second barrier layer is (Al y2 Ga 1-y2 ) 0.5 In 0.5 P layer, 0<x1<y1<y2≤1;

[0023] In a direction perpendicular to the plane of the substrate, the thickness of the first barrier layer is a first thickness d1, the thickness of the second barrier layer is a second thickness d2, and d1>d2;

[0024] On a side of the superlattice current spreading layer away from the substrate, a first-type semiconductor layer, an active layer and a second-type semiconductor layer are sequentially formed along a direction away from the substrate.

[0025] Optionally, also include:

[0026] A window layer is formed on a side of the second-type semiconductor layer facing away from the substrate.

[0027] Compared with the existing technology, the above technical solution has the following advantages:

[0028] Compared with the existing LED epitaxial structure, the superlattice current expansion layer includes a periodically alternating arrangement of potential well layers and a single barrier layer with a high Al component. In the LED epitaxial structure provided by the embodiment of the present application, the superlattice current expansion layer includes a periodically arranged superlattice unit, and the superlattice unit includes (Al x1 Ga 1-x1 ) 0.5 In 0.5 P potential well layer, (Al y1 Ga 1-y1 ) 0.5 In 0.5 P first barrier layer and (Al y2 Ga1-y2 ) 0.5 In 0.5 P second barrier layer, since the higher the Al component in the AlGaInP material, the higher the potential barrier, therefore, set 0<x1<y1<y2≤1, so that the barrier height of the potential well layer, the barrier height of the first barrier layer and the barrier height of the second barrier layer increase in sequence, so that in the process of electrons jumping from the potential well layer to the first barrier layer, due to the obstruction of the first barrier layer, part of the lateral expansion current is provided, and since the second barrier layer has a higher potential barrier, and in the direction perpendicular to the plane of the substrate, the thickness d1 of the first barrier layer is greater than the thickness d2 of the second barrier layer, therefore, electrons can The larger first barrier layer accumulates, that is, the blocking of the second barrier layer and the high thickness of the first barrier layer jointly enhance the binding effect on electrons, thereby expanding the lateral expansion current. Moreover, the thickness d2 of the second barrier layer can be thinner, so that after the electrons in the first barrier layer accumulate to a certain extent, they can pass through the second barrier layer by tunneling, thereby providing most of the longitudinal expansion current, that is, while ensuring the lateral expansion of the current, the longitudinal expansion of the current is enhanced, thereby reducing the operating voltage of the LED chip, improving the carrier injection efficiency, and improving the brightness and anti-static breakdown performance of the LED chip.

[0029] Moreover, in the superlattice current expansion layer of the LED epitaxial structure provided in the embodiment of the present application, the Al component of the first barrier layer can be relatively low, and although the Al component of the second barrier layer is relatively high, the thickness d2 of the second barrier layer is relatively thin. Therefore, the overall Al content in the superlattice current expansion layer of the LED epitaxial structure can be lower than the Al content in the superlattice current expansion layer of the existing LED epitaxial structure, thereby reducing the carbon and oxygen pollution brought by Al and improving the crystal growth quality of materials such as AlGaInP. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0031] Figure 1 Schematic diagram of the energy band structure of the superlattice current spreading layer in the existing LED epitaxial structure;

[0032] Figure 2 A schematic structural diagram of an LED epitaxial structure provided in an embodiment of the present application;

[0033] Figure 3A schematic structural diagram of a superlattice current spreading layer in an LED epitaxial structure provided in an embodiment of the present application;

[0034] Figure 4 A schematic diagram of the energy band structure of a superlattice current spreading layer in an LED epitaxial structure provided in an embodiment of the present application;

[0035] Figure 5 A schematic structural diagram of another LED epitaxial structure provided in an embodiment of the present application;

[0036] Figure 6 A schematic flow chart of a method for preparing an LED epitaxial structure provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0038] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0039] Secondly, this application is described in detail with reference to schematic diagrams. When describing the embodiments of this application, for ease of explanation, cross-sectional views of device structures may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely illustrative and should not limit the scope of protection of this application. Furthermore, in actual production, the three-dimensional dimensions of length, width, and depth should be included.

[0040] It should be noted that the terms "first" and "second" in the description and claims of this application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0041] Figure 1 The schematic diagram of the energy band structure of the superlattice current spreading layer in the existing LED epitaxial structure is shown in FIG. Figure 1 As shown, the superlattice current spreading layer used in the existing LED epitaxial structure usually includes periodically alternating (Al x Ga 1-x ) 0.5 In 0.5 The P potential well layer M1 and the high Al composition (Al y Ga1-y ) 0.5 In 0.5 P single barrier layer M2. Since the higher the Al component in the AlGaInP material, the higher the potential barrier, the barrier height of the barrier layer M2 is significantly greater than the barrier height of the potential well layer M1, and the thickness of the barrier layer M2 is usually large. Therefore, when the electrons in the potential well layer M1 "jump" across the barrier layer M2 to reach another potential well layer M1, the electrons are blocked by the high potential barrier and high thickness of the barrier layer M2, thereby achieving lateral expansion of the current and improving the brightness of the LED chip.

[0042] However, as mentioned in the background technology section, although the superlattice current expansion layer used in the existing LED epitaxial structure improves the lateral expansion of the current, it also brings a series of problems: y Ga 1-y ) 0.5 In 0.5 The potential barrier of the P barrier layer M2 is high and thick, so electrons need higher energy to cross the barrier layer M2, thereby raising the operating voltage; while the high barrier layer M2 limits electron transitions and increases the lateral expansion of current, it also weakens the longitudinal expansion current to a certain extent, resulting in reduced quantum well carrier injection, affecting the brightness and anti-static breakdown performance of the LED chip; the high Al component of the barrier layer M2 increases the carbon and oxygen pollution brought by Al, which easily affects the crystal growth quality of materials such as AlGaInP in the device.

[0043] Based on the above research, the embodiment of the present application provides an LED epitaxial structure and a preparation method thereof. Compared with the existing LED epitaxial structure, the superlattice current expansion layer includes a periodically alternating arrangement of a potential well layer and a high Al component and thick single barrier layer. In the LED epitaxial structure provided by the embodiment of the present application, the superlattice current expansion layer includes a periodically arranged superlattice unit, and the superlattice unit includes (Al) arranged in sequence in the direction away from the substrate. x1 Ga 1-x1 ) 0.5 In 0.5 P potential well layer, (Al y1 Ga 1-y1 ) 0.5 In 0.5 P first barrier layer and (Al y2 Ga 1-y2 ) 0.5 In 0.5P second barrier layer, since the higher the Al component in the AlGaInP material, the higher the potential barrier, therefore, set 0<x1<y1<y2≤1, so that the barrier height of the potential well layer, the barrier height of the first barrier layer and the barrier height of the second barrier layer increase in sequence, so that in the process of electrons jumping from the potential well layer to the first barrier layer, due to the obstruction of the first barrier layer, part of the lateral expansion current is provided, and since the second barrier layer has a higher potential barrier, and in the direction perpendicular to the plane of the substrate, the thickness d1 of the first barrier layer is greater than the thickness d2 of the second barrier layer, therefore, electrons can The larger first barrier layer accumulates, that is, the blocking of the second barrier layer and the high thickness of the first barrier layer jointly enhance the binding effect on electrons, thereby expanding the lateral expansion current. Moreover, the thickness d2 of the second barrier layer can be thinner, so that after the electrons in the first barrier layer accumulate to a certain extent, they can pass through the second barrier layer by tunneling, thereby providing most of the longitudinal expansion current, that is, while ensuring the lateral expansion of the current, the longitudinal expansion of the current is enhanced, thereby reducing the operating voltage of the LED chip, improving the carrier injection efficiency, and improving the brightness and anti-static breakdown performance of the LED chip.

[0044] Moreover, in the superlattice current expansion layer of the LED epitaxial structure provided in the embodiment of the present application, the Al component of the first barrier layer can be relatively low, and although the Al component of the second barrier layer is relatively high, the thickness d2 of the second barrier layer is relatively thin. Therefore, the overall Al content in the superlattice current expansion layer of the LED epitaxial structure can be lower than the Al content in the superlattice current expansion layer of the existing LED epitaxial structure, thereby reducing the carbon and oxygen pollution brought by Al and improving the crystal growth quality of materials such as AlGaInP.

[0045] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0046] Figure 2 A schematic diagram of the structure of an LED epitaxial structure provided in an embodiment of the present application is shown. Figure 2 As shown, the LED epitaxial structure includes:

[0047] substrate 10;

[0048] The superlattice current spreading layer 20 is located on one side of the substrate 10. Figure 3 The schematic diagram of the structure of the superlattice current spreading layer 20 is shown in FIG. Figure 3 As shown, the superlattice current spreading layer 20 includes periodically arranged superlattice units 21, and the superlattice unit 21 includes a potential well layer B1, a first barrier layer B2, and a second barrier layer B3 sequentially arranged in a direction away from the substrate 10;

[0049] Located on the side of the superlattice current spreading layer 20 away from the substrate 10, the first-type semiconductor layer 30, the active layer 40 and the second-type semiconductor layer 50 are sequentially arranged in a direction away from the substrate 10;

[0050] Among them, the potential well layer B1 is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P layer, the first barrier layer B2 is (Al y1 Ga 1-y1 ) 0.5 In 0.5 P layer, the second barrier layer B3 is (Al y2 Ga 1-y2 ) 0.5 In 0.5 P layer, 0<x1<y1<y2≤1;

[0051] In a direction perpendicular to the plane of the substrate 10 , the thickness of the first barrier layer B2 is a first thickness d1 , and the thickness of the second barrier layer B3 is a second thickness d2 , where d1 > d2 .

[0052] Figure 4 FIG. 1 shows a schematic diagram of the energy band structure of the superlattice current spreading layer in the LED epitaxial structure provided in the embodiment of the present application, as shown in FIG. Figure 4 As shown, since the higher the Al component of the AlGaInP material, the higher its potential barrier is, in the embodiment of the present application, it is set that 0<x1<y1<y2≤1, so that the potential barrier height of the potential well layer B1, the potential barrier height of the first barrier layer B2 and the potential barrier height of the second barrier layer B3 increase successively.

[0053] It should be noted that Figure 4 The lateral direction in corresponds to Figure 2 and Figure 3 The Z direction is perpendicular to the plane of the substrate 10, that is, the longitudinal direction of the LED epitaxial structure, and Figure 2 and Figure 3 The lateral direction (X direction) in corresponds to the lateral direction of the LED epitaxial structure.

[0054] Combine Figure 2-Figure 4 As shown, in the Z direction perpendicular to the plane of the substrate 10, the thickness d1 of the first barrier layer B2 is greater than the thickness d2 of the second barrier layer B3, that is, the thickness d1 of the first barrier layer B2 is larger, and the thickness d2 of the second barrier layer B3 is smaller.

[0055] It can be understood that in the process of electrons jumping from the potential well layer B1 to the first barrier layer B2, the blocking effect of the first barrier layer B2 provides part of the lateral expansion current for the LED chip. Since the second barrier layer B3 has a higher potential barrier and the thickness d1 of the first barrier layer B2 is larger in the Z direction perpendicular to the plane of the substrate, electrons can accumulate at the first barrier layer B2. That is, the blocking effect of the second barrier layer B3 and the high thickness of the first barrier layer B2 jointly enhance the binding effect on the electrons at the first barrier layer B2, thereby further expanding the lateral expansion current of the LED chip.

[0056] Furthermore, since the thickness d2 of the second barrier layer B3 is relatively small, the electrons in the first barrier layer B2 can tunnel through the second barrier layer B3 after accumulating to a certain extent, thereby providing most of the longitudinal expansion current and reducing the operating voltage of the LED chip.

[0057] It can be seen that the LED epitaxial structure provided in the embodiment of the present application can improve the longitudinal expansion of the current while ensuring the lateral expansion of the current, thereby reducing the operating voltage of the LED chip, improving the carrier injection efficiency, and improving the brightness and anti-static breakdown performance of the LED chip.

[0058] Moreover, in the superlattice current expansion layer 20 of the LED epitaxial structure provided in the embodiment of the present application, the Al component of the first barrier layer B2 can be relatively low, and although the Al component of the second barrier layer B3 is relatively high, the thickness d2 of the second barrier layer B3 is relatively thin. Therefore, the overall Al content in the superlattice current expansion layer of the LED epitaxial structure can be lower than the Al content in the superlattice current expansion layer of the existing LED epitaxial structure, thereby reducing the carbon and oxygen pollution brought by Al and improving the crystal growth quality of materials such as AlGaInP.

[0059] It should be noted that in the embodiment of the present application, the first-type semiconductor layer 30 and the second-type semiconductor layer 50 have different doping types. Optionally, if the first type is N-type, the second type is P-type. Conversely, if the first type is P-type, the first type is N-type.

[0060] Optionally, the first-type semiconductor layer 30 may be an N-type AlInP confinement layer, and the second-type semiconductor layer 50 may be a P-type AlInP confinement layer.

[0061] Based on the above embodiment, optionally, in one embodiment of the present application, as Figure 2 As shown, the LED epitaxial structure further includes a window layer 60 , which is located on the side of the second-type semiconductor layer 50 facing away from the substrate 10 and can be used to achieve the functions of conducting electricity or emitting light for the LED chip.

[0062] Optionally, the window layer 60 may be a P-type doped GaP window layer.

[0063] Since the superlattice current spreading layer 20 is made of AlGaInP material, and the AlGaInP material is grown on a lattice-matched GaAs substrate, it is easy to obtain a red-yellow LED chip with high lattice quality and low defect density. Therefore, optionally, the substrate 10 can be a GaAs substrate 10, that is, the superlattice current spreading layer 20, the first-type semiconductor layer 30, the active layer 40 and the second-type semiconductor layer 50 are formed in sequence on the GaAs substrate 10.

[0064] In practical applications, in order to obtain LED epitaxial structures with high lattice quality and low defect density, such as Figure 5 As shown, before forming the superlattice current spreading layer 20 on the GaAs substrate 10, other film layers are usually formed. Optionally, before forming the superlattice current spreading layer 20 on the GaAs substrate 10, a GaAs buffer layer 11, a GaInP etching stop layer 12, a GaAs ohmic contact layer 13 and an (Al) layer 14 are sequentially formed along the Z direction away from the GaAs substrate 10. X Ga 1-X ) 0.5 In 0.5 P roughened layer 14 .

[0065] Considering that the characteristics of the GaAs substrate 10 such as poor light absorption and thermal conductivity seriously limit the light extraction efficiency of the LED chip, thereby affecting the electro-optical conversion efficiency of the device, a flip-chip LED chip structure is usually used to solve this problem.

[0066] In other words, the LED epitaxial structure provided in the embodiments of the present application can be used to prepare flip-chip LED chips. Specifically, after forming a stacked structure comprising at least a superlattice current spreading layer 20, a first-type semiconductor layer 30, an active layer 40, a second-type semiconductor layer 50, and a window layer 60 on one side of a GaAs substrate 10, the stacked structure is bonded to a receiving substrate on the side of the window layer 60 facing away from the GaAs substrate 10 through chip processing techniques, and the GaAs substrate 10 is removed to obtain a flip-chip reverse-polarity LED chip. A receiving substrate with good thermal conductivity and a low thermal expansion coefficient, such as a Si substrate, is typically used to eliminate stress caused by differences in thermal expansion coefficients, thereby improving the yield and performance of the flip-chip reverse-polarity LED chip.

[0067] In addition, the application of omnidirectional reflector (ODR) and light output surface roughening technology further enhances the light extraction efficiency of flip-chip reverse polarity LED chips. Therefore, (Al X Ga 1-X ) 0.5 In 0.5 P roughened layer 14 roughens the surface.

[0068] The present application does not limit the specific Al composition and thickness of the first barrier layer B2 and the second barrier layer B3 in the superlattice current expansion layer 20. It is understandable that the specific Al composition and thickness of the first barrier layer B2 and the second barrier layer B3 in the superlattice current expansion layer 20 can be adjusted to achieve regulation of the lateral and longitudinal expansion currents and reduce the operating voltage of the LED chip, as described in detail below.

[0069] It is understood that a larger thickness d1 of the first barrier layer B2 in the Z direction perpendicular to the plane of the substrate 10 can enhance the electron confinement capability of the first barrier layer B2, thereby providing a larger lateral spreading current. Therefore, optionally, the thickness d1 of the first barrier layer B2 in the Z direction perpendicular to the plane of the substrate 10 satisfies the following condition: 5 nm ≤ d1 ≤ 50 nm, thereby increasing the lateral spreading current.

[0070] In the Z direction perpendicular to the plane of substrate 10, a smaller thickness of second barrier layer B3 makes it easier for electrons to tunnel from first barrier layer B2 through second barrier layer B3, providing a larger longitudinal spreading current and reducing the operating voltage of the LED chip. Therefore, optionally, in the Z direction perpendicular to the plane of substrate 10, the thickness d2 of second barrier layer B3 satisfies: d2 ≤ 10 nm to increase the longitudinal spreading current.

[0071] It can be understood that when the thickness d1 of the first barrier layer B2 is large, that is, the high thickness of the first barrier layer B2 can enhance the ability of the first barrier layer B2 to bind electrons, thereby providing a larger lateral expansion current. At the same time, when the thickness d2 of the second barrier layer B3 is small, that is, the second barrier layer B3 has a lower thickness, it can greatly increase the probability of electron tunneling, thereby providing a larger longitudinal expansion current and reducing the operating voltage of the LED chip. Therefore, optionally, the thickness d1 of the first barrier layer B2 and the thickness d2 of the second barrier layer B3 satisfy: d1>2d2.

[0072] It is understandable that the size of LED chips in practical applications is limited, and LED chips are gradually developing towards miniaturization and thinness. Therefore, optionally, in the Z direction perpendicular to the plane of the substrate 10, the thickness of the potential well layer B1 is a third thickness d3 that satisfies: 1 nm ≤ d3 ≤ 20 nm.

[0073] Optionally, the period number n of the periodically arranged superlattice units 21 in the superlattice current spreading layer 20 satisfies: 1≤n≤50.

[0074] Figure 5 A specific LED epitaxial structure provided in the embodiment of the present application is shown to provide a more specific description of the LED epitaxial structure in the embodiment of the present application. Figure 5As shown, the LED epitaxial structure includes:

[0075] n-GaAs substrate 10;

[0076] On one side of the n-GaAs substrate 10, an n-GaAs buffer layer 11, an n-GaInP etching stop layer 12, an n-GaAs ohmic contact layer 13, an n-(Al X Ga 1-X ) 0.5 In 0.5 P roughening layer 14, n-AlGaInP superlattice current spreading layer 20, n-AlInP confinement layer 30, active layer 40, p-AlInP confinement layer 50 and p-GaP window layer 60;

[0077] The n-AlGaInP superlattice current spreading layer 20 includes periodically arranged superlattice units 21, and the superlattice units 21 include n-(AlGaInP) superlattice units 21 arranged in sequence along the Z direction away from the substrate 10. x1 Ga 1-x1 ) 0.5 In 0.5 P potential well layer B1, n-(Al y1 Ga 1-y1 ) 0.5 In 0.5 P first barrier layer B2 and n-(Al y2 Ga 1-y2 ) 0.5 In 0.5 P second barrier layer B3, 0<x1<y1<y2≤1;

[0078] In the Z direction perpendicular to the plane where the substrate 10 is located, the thickness of the first barrier layer B2 is a first thickness d1, the thickness of the second barrier layer B3 is a second thickness d2, and d1>d2.

[0079] Since the higher the Al component of the AlGaInP material, the higher its potential barrier is, in the embodiment of the present application, it is set that 0<x1<y1<y2≤1, so that the potential barrier height of the potential well layer B1, the potential barrier height of the first barrier layer B2 and the potential barrier height of the second barrier layer B3 increase in sequence.

[0080] In the Z direction perpendicular to the plane of the substrate 10 , the thickness d1 of the first barrier layer B2 is greater than the thickness d2 of the second barrier layer B3 , that is, the thickness d1 of the first barrier layer B2 is larger, and the thickness d2 of the second barrier layer B3 is smaller.

[0081] The present application ensures both lateral and longitudinal expansion of the current by adjusting the barrier height and thickness of the first barrier layer B2 and the second barrier layer B3.

[0082] Specifically, in the process of electrons jumping from the potential well layer B1 to the first barrier layer B2, the blocking of the first barrier layer B2 provides part of the lateral expansion current; and the blocking of the second barrier layer B3 and the high thickness of the first barrier layer B2 jointly enhance the binding effect on the electrons, and the lateral expansion current is further enhanced.

[0083] When electrons accumulate to a certain level in the first barrier layer B2, they can tunnel through the second barrier layer B3 with a smaller thickness. Therefore, the introduction of the ultra-thin second barrier layer B3 greatly increases the tunneling probability of electrons while limiting the electrons, enhances the longitudinal expansion current, and reduces the operating voltage of the LED chip.

[0084] Therefore, the embodiment of the present application can improve the longitudinal expansion of the current while ensuring the lateral expansion of the current, thereby reducing the operating voltage of the LED chip, improving the carrier injection efficiency, and improving the brightness and anti-static breakdown performance of the LED chip.

[0085] Moreover, in the superlattice current expansion layer 20 of the LED epitaxial structure provided in the embodiment of the present application, the Al component of the first barrier layer B2 can be relatively low, and although the Al component of the second barrier layer B3 is relatively high, the thickness d2 of the second barrier layer B3 is relatively thin. Therefore, the overall Al content in the superlattice current expansion layer of the LED epitaxial structure can be lower than the Al content in the superlattice current expansion layer of the existing LED epitaxial structure, thereby reducing the carbon and oxygen pollution brought by Al and improving the crystal growth quality of materials such as AlGaInP.

[0086] The present application also provides a method for preparing an LED epitaxial structure. Figure 6 As shown, the preparation method comprises:

[0087] S10: Reference Figure 2 As shown, a substrate 10 is provided, wherein the substrate 10 is first type doped.

[0088] S20: Reference Figure 2 and Figure 3 As shown, a superlattice current spreading layer 20 is formed on one side of the substrate 10. The superlattice current spreading layer 20 includes periodically arranged superlattice units 21. The superlattice units 21 include a potential well layer B1, a first barrier layer B2 and a second barrier layer B3 arranged in sequence along a direction away from the substrate 10.

[0089] Among them, the potential well layer B1 is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P layer, the first barrier layer B2 is (Al y1 Ga 1-y1 ) 0.5In 0.5 P layer, the second barrier layer B3 is (Al y2 Ga 1-y2 ) 0.5 In 0.5 P layer, 0<x1<y1<y2≤1;

[0090] In the Z direction perpendicular to the plane where the substrate 10 is located, the thickness of the first barrier layer B2 is a first thickness d1, the thickness of the second barrier layer B3 is a second thickness d2, and d1>d2.

[0091] S30: Reference Figure 2 As shown, on the side of the superlattice current spreading layer 20 away from the substrate 10 , a first-type semiconductor layer 30 , an active layer 40 and a second-type semiconductor layer 50 are sequentially formed along the Z direction away from the substrate 10 .

[0092] Based on step S30, optionally, the method may further include:

[0093] S40: Reference Figure 2 As shown, a window layer 60 is formed on the side of the second-type semiconductor layer 50 facing away from the substrate 10. That is, the window layer 60 is located on the side of the second-type semiconductor layer 50 facing away from the substrate 10 and can be used to achieve the functions of conducting electricity or emitting light for the LED chip.

[0094] Optionally, the window layer 60 may be a P-type doped GaP window layer.

[0095] It can be seen that in the LED epitaxial structure prepared by this method, the superlattice current spreading layer 20 includes periodically arranged superlattice units 21, and the superlattice unit 21 includes (Al x1 Ga 1-x1 ) 0.5 In 0.5 P potential well layer B1, (Al y1 Ga 1-y1 ) 0.5 In 0.5 P first barrier layer B2 and (Al y2 Ga 1-y2 ) 0.5 In 0.5P second barrier layer B3, since the higher the Al component in the AlGaInP material, the higher the potential barrier, therefore, set 0<x1<y1<y2≤1, so that the barrier height of the potential well layer B1, the barrier height of the first barrier layer B2 and the barrier height of the second barrier layer B3 increase in sequence, so that in the process of electrons jumping from the potential well layer B1 to the first barrier layer B2, due to the obstruction of the first barrier layer B2, part of the lateral expansion current is provided, and because the second barrier layer B3 has a higher potential barrier, and in the direction perpendicular to the plane of the substrate, the thickness d1 of the first barrier layer B2 is greater than the thickness d2 of the second barrier layer B3, therefore, electrons can The electrons accumulate at the first barrier layer B2 with a larger thickness, that is, the blocking of the second barrier layer B3 and the high thickness of the first barrier layer B2 jointly enhance the binding effect on the electrons, thereby expanding the lateral expansion current. Moreover, the thickness d2 of the second barrier layer B3 can be thinner, so that after the electrons in the first barrier layer B2 accumulate to a certain extent, they can pass through the second barrier layer B3 by tunneling, thereby providing most of the longitudinal expansion current, that is, while ensuring the lateral expansion of the current, the longitudinal expansion of the current is enhanced, thereby reducing the operating voltage of the LED chip, improving the carrier injection efficiency, and improving the brightness and anti-static breakdown performance of the LED chip.

[0096] Moreover, in the superlattice current expansion layer 20 of the LED epitaxial structure prepared by this method, the Al component of the first barrier layer B2 can be relatively low, and although the Al component of the second barrier layer B3 is relatively high, the thickness d2 of the second barrier layer B3 is relatively thin. Therefore, the overall Al content in the superlattice current expansion layer of the LED epitaxial structure can be lower than the Al content in the superlattice current expansion layer of the existing LED epitaxial structure, thereby reducing the carbon and oxygen pollution brought by Al and improving the crystal growth quality of materials such as AlGaInP.

[0097] It should be noted that in the embodiment of the present application, the first-type semiconductor layer 30 and the second-type semiconductor layer 50 have different doping types. Optionally, if the first type is N-type, the second type is P-type. Conversely, if the first type is P-type, the first type is N-type.

[0098] Optionally, the first-type semiconductor layer 30 may be an N-type AlInP confinement layer, and the second-type semiconductor layer 50 may be a P-type AlInP confinement layer.

[0099] Since the superlattice current spreading layer 20 is made of AlGaInP material, and the AlGaInP material is grown on a lattice-matched GaAs substrate, it is easy to obtain a red-yellow LED chip with high lattice quality and low defect density. Therefore, optionally, the substrate 10 can be a GaAs substrate 10, that is, the superlattice current spreading layer 20, the first-type semiconductor layer 30, the active layer 40 and the second-type semiconductor layer 50 are formed in sequence on the GaAs substrate 10.

[0100] In practical applications, in order to obtain an LED epitaxial structure with high lattice quality and low defect density, other film layers are usually formed before forming the superlattice current spreading layer 20 on the GaAs substrate 10. Specifically, before forming the superlattice current spreading layer 20, refer to Figure 5 As shown, the method may further include:

[0101] Along the Z direction away from the GaAs substrate 10, a GaAs buffer layer 11, a GaInP etching stop layer 12, a GaAs ohmic contact layer 13 and an (Al X Ga 1-X ) 0.5 In 0.5 P roughened layer 14 .

[0102] Then in (Al X Ga 1-X ) 0.5 In 0.5 The side of the P roughened layer 14 facing away from the substrate 10 forms a superlattice current spreading layer 20 .

[0103] Considering that the characteristics of the GaAs substrate 10 such as poor light absorption and thermal conductivity seriously limit the light extraction efficiency of the LED chip, thereby affecting the electro-optical conversion efficiency of the device, a flip-chip LED chip structure is usually used to solve this problem.

[0104] In other words, the LED epitaxial structure prepared using this method can be used to prepare flip-chip LED chips. Specifically, after forming a stacked structure comprising at least a superlattice current spreading layer 20, a first-type semiconductor layer 30, an active layer 40, a second-type semiconductor layer 50, and a window layer 60 on one side of a GaAs substrate 10, the stacked structure is bonded to a receiving substrate on the side of the window layer 60 facing away from the GaAs substrate 10 through chip processing methods, and the GaAs substrate 10 is removed to obtain a flip-chip reverse-polarity LED chip. A receiving substrate with good thermal conductivity and a low thermal expansion coefficient, such as a Si substrate, is typically used to eliminate stress caused by the difference in thermal expansion coefficients, thereby improving the yield and performance of the flip-chip reverse-polarity LED chip.

[0105] In addition, the application of omnidirectional reflector (ODR) and light output surface roughening technology further enhances the light extraction efficiency of flip-chip reverse polarity LED chips. Therefore, (Al X Ga 1-X ) 0.5 In 0.5 P roughened layer 14 roughens the surface.

[0106] The present application does not limit the specific Al composition and thickness of the first barrier layer B2 and the second barrier layer B3 in the superlattice current expansion layer 20. It is understandable that the specific Al composition and thickness of the first barrier layer B2 and the second barrier layer B3 in the superlattice current expansion layer 20 can be adjusted to achieve regulation of the lateral and longitudinal expansion currents and reduce the operating voltage of the LED chip, as described in detail below.

[0107] It is understood that a larger thickness d1 of the first barrier layer B2 in the Z direction perpendicular to the plane of the substrate 10 can enhance the electron confinement capability of the first barrier layer B2, thereby providing a larger lateral spreading current. Therefore, optionally, the thickness d1 of the first barrier layer B2 in the Z direction perpendicular to the plane of the substrate 10 satisfies the following condition: 5 nm ≤ d1 ≤ 50 nm, thereby increasing the lateral spreading current.

[0108] In the Z direction perpendicular to the plane of substrate 10, a smaller thickness of second barrier layer B3 makes it easier for electrons to tunnel from first barrier layer B2 through second barrier layer B3, providing a larger longitudinal spreading current and reducing the operating voltage of the LED chip. Therefore, optionally, in the Z direction perpendicular to the plane of substrate 10, the thickness d2 of second barrier layer B3 satisfies: d2 ≤ 10 nm to increase the longitudinal spreading current.

[0109] It can be understood that when the thickness d1 of the first barrier layer B2 is large, that is, the high thickness of the first barrier layer B2 can enhance the ability of the first barrier layer B2 to bind electrons, thereby providing a larger lateral expansion current. At the same time, when the thickness d2 of the second barrier layer B3 is small, that is, the second barrier layer B3 has a lower thickness, it can greatly increase the probability of electron tunneling, thereby providing a larger longitudinal expansion current and reducing the operating voltage of the LED chip. Therefore, optionally, the thickness d1 of the first barrier layer B2 and the thickness d2 of the second barrier layer B3 satisfy: d1>2d2.

[0110] It is understandable that the size of LED chips in practical applications is limited, and LED chips are gradually developing towards miniaturization and thinness. Therefore, optionally, in the Z direction perpendicular to the plane of the substrate 10, the thickness of the potential well layer B1 is a third thickness d3 that satisfies: 1 nm ≤ d3 ≤ 20 nm.

[0111] Optionally, the period number n of the periodically arranged superlattice units 21 in the superlattice current spreading layer 20 satisfies: 1≤n≤50.

[0112] The various parts in this manual are described in a combination of parallel and progressive manners. Each part focuses on the differences from other parts, and the same or similar parts between the various parts can be referenced to each other.

[0113] With respect to the above description of the disclosed embodiments, the features described in the various embodiments in this specification may be interchanged or combined with one another to enable those skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED epitaxial structure, characterized in that: include: substrate; a superlattice current spreading layer located on one side of the substrate, the superlattice current spreading layer comprising periodically arranged superlattice units, the superlattice units comprising a potential well layer, a first barrier layer, and a second barrier layer sequentially arranged in a direction away from the substrate; A first-type semiconductor layer, an active layer, and a second-type semiconductor layer are located on a side of the superlattice current spreading layer away from the substrate and arranged in sequence in a direction away from the substrate; Wherein, the potential well layer is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P layer, the first barrier layer is (Al y1 Ga 1-y1 ) 0.5 In 0.5 P layer, the second barrier layer is (Al y2 Ga 1-y2 ) 0.5 In 0.5 P layer, 0<x1<y1<y2≤1; In a direction perpendicular to the plane where the substrate is located, the thickness of the first barrier layer is a first thickness d1, the thickness of the second barrier layer is a second thickness d2, and d1>d2.

2. The LED epitaxial structure according to claim 1, characterized in that: The thickness d1 of the first barrier layer satisfies: 5 nm ≤ d1 ≤ 50 nm.

3. The LED epitaxial structure according to claim 1, wherein: The thickness d2 of the second barrier layer satisfies: d2≤10 nm.

4. The LED epitaxial structure according to claim 1, wherein: The thickness d1 of the first barrier layer and the thickness d2 of the second barrier layer satisfy: d1>2d2.

5. The LED epitaxial structure according to claim 1, wherein: In a direction perpendicular to the plane of the substrate, the potential well layer has a thickness of a third thickness d3, where 1 nm ≤ d3 ≤ 20 nm.

6. The LED epitaxial structure according to claim 1, characterized in that: The period number n of the superlattice unit satisfies: 1≤n≤50.

7. The LED epitaxial structure according to claim 1, characterized in that: The LED epitaxial structure further includes a window layer, and the window layer is located on a side of the second-type semiconductor layer facing away from the substrate.

8. A method for preparing an LED epitaxial structure, characterized in that: include: providing a substrate; forming a superlattice current spreading layer on one side of the substrate, the superlattice current spreading layer comprising periodically arranged superlattice units, the superlattice units comprising a potential well layer, a first barrier layer, and a second barrier layer sequentially arranged in a direction away from the substrate; Wherein, the potential well layer is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P layer, the first barrier layer is (Al y1 Ga 1-y1 ) 0.5 In 0.5 P layer, the second barrier layer is (Al y2 Ga 1-y2 ) 0.5 In 0.5 P layer, 0<x1<y1<y2≤1; In a direction perpendicular to the plane of the substrate, the thickness of the first barrier layer is a first thickness d1, the thickness of the second barrier layer is a second thickness d2, and d1>d2; On a side of the superlattice current spreading layer away from the substrate, a first-type semiconductor layer, an active layer and a second-type semiconductor layer are sequentially formed along a direction away from the substrate.

9. The method for preparing an LED epitaxial structure according to claim 8, wherein: Also includes: A window layer is formed on a side of the second-type semiconductor layer facing away from the substrate.

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