semiconductor devices

Abstract

The semiconductor device comprises: a semiconductor chip (30) on which elements are formed in a SiC substrate; a heat sink (40, 50) and a terminal (60) configured to sandwich the semiconductor chip (30); and solder (90, 91, 92) forming a junction between the semiconductor chip and the heat sink. The solder (90, 91) is a lead-free solder with the following alloy composition: containing Ag at 3.2 to 3.8% by mass, Cu at 0.6 to 0.8% by mass, and Ni at 0.01 to 0.2% by mass; and, if the content of Sb is x% by mass and the content of Bi is y% by mass, then Sb and Bi are contained in such a way that x+2y≤11% by mass, x+14y≤42% by mass, and x≥5.1% by mass; furthermore, Co is contained at 0.001 to 0.3% by mass, and P is contained at 0.001 to 0.2% by mass; the remainder is Sn.

Description

[0001] Cross-referencing of related applications

[0002] This application is based on Japanese Patent Application No. 2020-129952, filed in Japan on July 31, 2020, by reference in its entirety to the contents of the base application. Technical Field

[0003] The disclosures in this specification relate to semiconductor devices. Background Technology

[0004] Patent Document 1 discloses a semiconductor device with a two-sided heat dissipation structure in which a heat dissipation component is arranged in a manner that sandwiches a semiconductor chip. The contents of prior art documents are referenced hereto as an explanation of the technical elements in this specification.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2004-296837 Summary of the Invention

[0008] In recent years, SiC has attracted attention due to its superior properties compared to Si, including a larger insulating breakdown electric field, larger band gap, higher thermal conductivity, and faster electron saturation velocity. However, SiC has a significantly higher Young's modulus, approximately three times that of Si. Therefore, in semiconductor devices with double-sided heat dissipation structures, using SiC substrates in the semiconductor chip may lead to cracks in the bonding components and within the semiconductor chip itself. Based on the above points, or other considerations not mentioned, further improvements are required for semiconductor devices.

[0009] One object of this disclosure is to provide a semiconductor device that is also suitable when a SiC substrate is used in a semiconductor chip.

[0010] The semiconductor device disclosed herein includes: a semiconductor chip having a SiC substrate on which elements are formed, a first main electrode formed on one side of the SiC substrate, and a second main electrode formed on the back side of the SiC substrate, wherein the back side is the side opposite to the first side in the thickness direction; a first heat dissipation member and a second heat dissipation member, which are heat dissipation members arranged in a manner that sandwiches the semiconductor chip, wherein the first heat dissipation member is disposed on one side and connected to the first main electrode, and the second heat dissipation member is disposed on the back side and connected to the second main electrode; and a bonding member respectively disposed between the first main electrode and the first heat dissipation member and between the second main electrode and the second heat dissipation member. A joint is formed between the hot components; at least one of the joint components is a lead-free solder with the following alloy composition: containing 3.2 to 3.8% by mass Ag, 0.6 to 0.8% by mass Cu, and 0.01 to 0.2% by mass Ni; and, if the content of Sb is x% by mass and the content of Bi is y% by mass, then Sb and Bi are contained in such a manner that x+2y≤11% by mass, x+14y≤42% by mass, and x≥5.1% by mass; furthermore, it contains 0.001 to 0.3% by mass Co and 0.001 to 0.2% by mass P; the remainder is composed of Sn.

[0011] The lead-free solder with the aforementioned alloy composition exhibits excellent creep resistance. Therefore, it can suppress semiconductor chip deformation, thereby extending the lifespan of semiconductor devices. Furthermore, even under thermal stress based on the difference in the coefficients of linear expansion between the semiconductor chip and the heat dissipation components, high connection reliability can be maintained. Thus, it is suitable for semiconductor devices using a double-sided heat dissipation structure on a SiC substrate in the semiconductor chip.

[0012] The various embodiments disclosed in this specification employ different technical means to achieve their respective purposes. The reference numerals in parentheses within the claims and their items illustratively indicate the correspondence with portions of the embodiments described later, and are not intended to limit the scope of the technology. The purposes, features, and effects disclosed in this specification will become clearer with reference to the following detailed description and accompanying drawings. Attached Figure Description

[0013] Figure 1 This is a diagram showing the schematic structure of a vehicle drive system that uses the semiconductor device of the first embodiment.

[0014] Figure 2 This is a plan view showing the semiconductor device of the first embodiment.

[0015] Figure 3 The plan view of the sealing resin body is omitted.

[0016] Figure 4 It is along Figure 2 A cross-sectional view along line IV-IV.

[0017] Figure 5 It is along Figure 2 A cross-sectional view of the V-V line.

[0018] Figure 6 This diagram is used to illustrate lead-free solder.

[0019] Figure 7 This is a cross-sectional view showing the configuration of lead-free solder.

[0020] Figure 8 This is a graph representing the simulation results of solder strain.

[0021] Figure 9 This is a cross-sectional view showing the configuration of lead-free solder in the semiconductor device of the second embodiment.

[0022] Figure 10 It is a graph showing the simulation results of strain occurring in the electrodes and solder on the component.

[0023] Figure 11 It is a graph showing the relationship between the thermal conductivity, thermal resistance and solder thickness of the solder.

[0024] Figure 12 This is a cross-sectional view showing the semiconductor device of the third embodiment.

[0025] Figure 13 This is a sectional view representing a modified example. Detailed Implementation

[0026] Hereinafter, several embodiments are described based on the accompanying drawings. In several embodiments, functionally and / or structurally corresponding parts and / or associated parts are given the same reference numerals. For details regarding corresponding parts and / or associated parts, please refer to the descriptions of other embodiments.

[0027] The semiconductor device in this embodiment is applied, for example, to a power conversion device for a mobile body driven by a rotary electric motor. Examples of mobile bodies include electric vehicles (EVs), hybrid electric vehicles (HVs), fuel cell vehicles (FCVs), flying vehicles such as drones, ships, construction machinery, and agricultural machinery. Hereinafter, an example of its application to a vehicle will be described.

[0028] (First Embodiment)

[0029] First, based on Figure 1 A general description of the vehicle's drive system structure is provided.

[0030] <Vehicle drive system>

[0031] like Figure 1As shown, the vehicle's drive system 1 includes a DC power supply 2, an electric generator 3, and a power conversion device 4.

[0032] DC power supply 2 is a DC voltage source composed of rechargeable secondary batteries. Examples of secondary batteries include lithium-ion batteries and nickel-metal hydride batteries. Electric generator 3 is a three-phase AC rotating electric motor. Electric generator 3 functions as the vehicle's driving force, i.e., an electric motor. During regeneration, electric generator 3 functions as a generator. Power conversion device 4 performs power conversion between DC power supply 2 and electric generator 3.

[0033] <Power Conversion Device>

[0034] Next, based on Figure 1 The circuit structure of the power conversion device 4 is described below. The power conversion device 4 includes a smoothing capacitor 5 and an inverter 6.

[0035] The smoothing capacitor 5 primarily smooths the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to the P-line 7 (high potential side) and the N-line 8 (low potential side). The P-line 7 is connected to the positive terminal of the DC power supply 2, and the N-line 8 is connected to the negative terminal of the DC power supply 2. The positive terminal of the smoothing capacitor 5 is connected to the P-line 7 between the DC power supply 2 and the inverter 6. Similarly, the negative terminal is connected to the N-line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel with the DC power supply 2.

[0036] Inverter 6 is a DC-AC conversion circuit. Controlled by a control circuit (not shown), inverter 6 converts DC voltage into three-phase AC voltage, which is then output to the electric generator 3. This drives the electric generator 3 to produce the specified torque. During regenerative braking of the vehicle, inverter 6 receives the rotational force from the wheels, and the three-phase AC voltage from the electric generator 3 is converted back into DC voltage by the control circuit, which is then output to line P 7. Thus, inverter 6 performs bidirectional power conversion between the DC power supply 2 and the electric generator 3.

[0037] Inverter 6 is configured with three-phase upper and lower arm circuits 9. These circuits are sometimes referred to as "legs." Each upper and lower arm circuit 9 has an upper arm 9H and a lower arm 9L. The upper arm 9H and lower arm 9L are connected in series between the P-line 7 and the N-line 8, with the upper arm 9H on the P-line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the corresponding phase winding 3a of the generator 3 via the output line 10. Inverter 6 has six arms.

[0038] Each arm has a MOSFET 11 as a switching element and a diode 12. The diode 12 is connected in anti-parallel to the MOSFET 11 for freewheeling. The diode 12 can be a parasitic diode (body diode) of the MOSFET 11, or it can be set differently from the parasitic diode.

[0039] In this embodiment, MOSFET 11 is an n-channel type. In MOSFET 11, the drain is the main electrode on the high-potential side, and the source is the main electrode on the low-potential side. In the upper arm 9H, the drain is connected to the P-line 7. In the lower arm 9L, the source is connected to the N-line 8. The source on the upper arm 9H side and the drain on the lower arm 9L side are interconnected. The anode of diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain.

[0040] The power conversion device 4, as a power conversion circuit, may also include a converter. The converter is a DC-DC conversion circuit that converts DC voltage into different DC voltage values. The converter is located between the DC power supply 2 and the smoothing capacitor 5. The converter, for example, is configured with a reactor and the aforementioned upper and lower arm circuits 9. The power conversion device 4 may also include a filter capacitor to remove power supply noise from the DC power supply 2. The filter capacitor is located between the DC power supply 2 and the converter.

[0041] The power conversion device 4 may also include a drive circuit for switching elements that constitute the inverter 6, etc. Based on drive commands from the control circuit, the drive circuit supplies a drive voltage to the gate of the corresponding arm of the MOSFET 11. By applying the drive voltage, the drive circuit drives the corresponding MOSFET to either turn on or off. Sometimes the drive circuit is referred to as a driver.

[0042] The power conversion device 4 may also include a control circuit for switching elements. The control circuit generates a drive command to operate the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. These various sensors include, for example, current sensors, rotation angle sensors, and voltage sensors. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the electric generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as the drive command. The control circuit may be configured with, for example, a microcomputer. ECU is short for Electronic Control Unit. PWM is short for Pulse Width Modulation.

[0043] Semiconductor Devices

[0044] Next, based on Figures 2-5 A general description of the structure of a semiconductor device is provided. Figure 2 It is a plan view representing a semiconductor device. Figure 3 This is to represent the internal structure of the encapsulating resin in a semiconductor device, relative to... Figure 2 The diagram of the sealing resin body has been omitted. Figure 4 It is along Figure 2 A cross-sectional view along line IV-IV. Figure 5 It is along Figure 2 A cross-sectional view of the V-V line.

[0045] Hereinafter, for some of the elements constituting a semiconductor device, an "H" indicating the upper arm 9H side and an "L" indicating the lower arm 9L side will be assigned to the end of the reference numerals. For other parts of the elements, common reference numerals will be assigned to the upper arm 9H and the lower arm 9L for convenience.

[0046] Furthermore, let the thickness direction of the SiC substrate (semiconductor chip) be the Z direction. Let the direction orthogonal to the Z direction be the X direction. Let the direction orthogonal to both the Z and X directions be the Y direction. Unless otherwise specified, the shape observed from the Z-direction plane, in other words, the shape along the XY plane defined by the X and Y directions, is defined as a planar shape. Furthermore, the planar view in the Z direction is simply represented as a planar view.

[0047] like Figures 2-5 As shown, the semiconductor device 15 includes a sealing resin body 20, a semiconductor chip 30, heat sinks 40 and 50, terminals 60, connectors 70, 71, and 72, main terminals 80, and signal terminals 85. The semiconductor device 15 constitutes an upper and lower arm circuit 9 of one phase.

[0048] The encapsulating resin body 20 encapsulates a portion of other elements constituting the semiconductor device 15. The remainder of the other elements is exposed outside the encapsulating resin body 20. The encapsulating resin body 20 is, for example, made of an epoxy resin. The encapsulating resin body 20 is formed, for example, by transfer molding. Figure 2 As shown, the sealing resin body 20 has a generally rectangular planar shape. The sealing resin body 20 has a front surface 20a and a back surface 20b opposite to the front surface 20a in the Z direction. The front surface 20a and the back surface 20b are, for example, flat surfaces.

[0049] Semiconductor chip 30 has vertically oriented elements formed on a silicon carbide (SiC) substrate 31. Semiconductor chip 30 may be referred to as a semiconductor element. The vertically oriented element is configured such that a main current flows in the thickness direction (Z-direction) of the semiconductor chip 30 (SiC substrate 31). In this embodiment, the vertically oriented element is a MOSFET 11 and a diode 12 forming one arm. Diode 12 is a parasitic diode of MOSFET 11. Alternatively, diode 12 may be formed on a different chip than MOSFET 11.

[0050] A gate electrode (not shown) is formed on the SiC substrate 31. The gate electrode may be, for example, in a trench configuration. The semiconductor chip 30 has main electrodes on each surface of the SiC substrate 31. Specifically, as main electrodes, a drain electrode 32D is provided on one side of the SiC substrate 31, and a source electrode 32S is provided on the opposite side, i.e., the back side. One side of the SiC substrate 31 is the side facing the sealing resin body 20, which is the side facing the 20a. The drain electrode 32D also serves as the cathode electrode of the diode. The source electrode 32S also serves as the anode electrode of the diode. The drain electrode 32D corresponds to the first main electrode, and the source electrode 32S corresponds to the second main electrode.

[0051] The SiC substrate 31 (semiconductor chip 30) has a generally rectangular planar shape. The semiconductor chip 30 has multiple pads 32P formed on the back side of the SiC substrate 31 at locations different from the source electrode 32S. The source electrode 32S and the pads 32P are exposed by a protective film (not shown). The drain electrode 32D is formed on approximately the entire surface of one side of the SiC substrate 31. The source electrode 32S is formed on a portion of the back side of the SiC substrate 31. The source electrode 32S is formed corresponding to the active region, which is a vertical element formation region. In plan view, the drain electrode 32D has a larger area than the source electrode 32S. The source electrode 32S has a generally rectangular planar shape.

[0052] Pad 32P is a signal electrode. Pad 32P is electrically separated from source electrode 32S. Pad 32P is formed in the Y direction at the end opposite to the formation region of source electrode 32S. Pad 32P and source electrode 32S are arranged in the Y direction.

[0053] The pads 32P include pads for the gate electrode. The semiconductor chip 30 of this embodiment has five pads 32P. Specifically, these pads are for the gate electrode, for potential detection of the source electrode 32S, for current sensing, for the anode potential of a temperature-sensing diode (temperature-sensing element) used to detect the temperature of the semiconductor chip 30, and for the cathode potential of the temperature-sensing diode. The five pads 32P are uniformly formed on one end of the semiconductor chip 30, which has a generally rectangular planar shape, and are arranged in the X direction.

[0054] The semiconductor device 15 includes at least one semiconductor chip 30H constituting the upper arm 9H. Similarly, it includes at least one semiconductor chip 30L constituting the lower arm 9L. In this embodiment, the semiconductor device 15 includes one semiconductor chip 30H and one semiconductor chip 30L. In the semiconductor device 15, the two semiconductor chips 30H and 30L have the same structure. The semiconductor chips 30H and 30L are arranged in the X direction. The semiconductor chips 30H and 30L are arranged at approximately the same position in the Z direction.

[0055] The heat sink 40 is a heat dissipation component for dissipating heat generated by the semiconductor chip 30. The heat sink 40 is disposed on one side of the semiconductor chip 30 in the Z direction and is connected to the drain electrode 32D. The heat sink 40 serves as the first heat dissipation component. The heat sink 40 is electrically connected to the drain electrode 32D and also functions as a wiring component. The heat sink 40 has a side facing the semiconductor chip 30, i.e., a facing surface 40a, and a side opposite to the facing surface 40a, i.e., a back surface 40b. The heat sink 40 is connected to the semiconductor chip 30 via solder 90. The solder 90 is located between the facing surface 40a of the heat sink 40 and the drain electrode 32D of the semiconductor chip 30, forming a solder joint.

[0056] The heat sink 40 (first wiring component) can be, for example, a metal plate made of Cu, Cu alloy, etc., a laminate made of multiple metal layers, or a DBC (Direct Bonded Copper) substrate. The heat sink 40 may have a Ni, Au, or other coating on its surface. In this embodiment, the heat sink 40 is a metal plate made of Cu. The heat sink 40 is constructed as part of the lead frame. The heat sink 40 is a thick-walled portion within the lead frame of the irregularly shaped strip. The semiconductor device 15 includes two heat sinks 40. The semiconductor device 15 includes a heat sink 40H constituting the upper arm 9H and a heat sink 40L constituting the lower arm 9L.

[0057] like Figure 3 As shown, heat sinks 40H and 40L are approximately rectangular in shape. Heat sinks 40H and 40L are arranged in the X direction. Heat sinks 40H and 40L have approximately the same thickness and are positioned approximately at the same location in the Z direction. Solder 90 is respectively located between the opposing surface 40a of heat sink 40H and the drain electrode 32D of semiconductor chip 30H, and between the opposing surface 40a of heat sink 40L and the drain electrode 32D of semiconductor chip 30L.

[0058] In a planar view along the Z direction, heat sinks 40H and 40L enclose the corresponding semiconductor chip 30. For example... Figure 4 and Figure 5As shown, the back surface 40b of heat sinks 40H and 40L is exposed from the sealing resin body 20. The back surface 40b is sometimes referred to as the heat dissipation surface or the exposed surface. The back surface 40b is approximately coplanar with the back surface 20b of the sealing resin body 20. The back surfaces 40b of heat sinks 40H and 40L are arranged in the X direction.

[0059] The heat sink 50 and terminal 60 are heat dissipation components for the semiconductor chip 30. The heat sink 50 and terminal 60 are disposed on the back side of the semiconductor chip 30 in the Z direction and are connected to the source electrode 32S. The heat sink 50 and terminal 60 function as a second heat dissipation component. The heat sink 50 and terminal 60 are electrically connected to the source electrode 32S and also function as wiring components. The heat sink 50 and terminal 60 are connected to the source electrode 32S via solder 91 and 92.

[0060] The heat sink 50 has a side facing the semiconductor chip 30 (i.e., a facing surface 50a) and a side opposite to the facing surface 50a (i.e., a back surface 50b) in the Z direction. A terminal 60 is located between the facing surface 50a of the heat sink 50 and the back surface of the semiconductor chip 30. The terminal 60 is connected to the semiconductor chip 30 via solder 91. Solder 91 is located between one end face of the terminal 60 and the source electrode 32S, forming a solder joint. The heat sink 50 is connected to the semiconductor chip 30 via solder 92. Solder 92 is located between the side of the terminal 60 opposite to one end face and the facing surface 50a of the heat sink 50, forming a solder joint.

[0061] The heat sink 50 can be, for example, a metal plate made of Cu or Cu alloy, a laminate made of multiple metal layers, or a DBC (Direct Bonded Copper) substrate. The heat sink 50 may have a Ni, Au, or other coating on its surface. In this embodiment, the heat sink 50 is a metal plate made of Cu. The semiconductor device 15 includes two heat sinks 50. The semiconductor device 15 includes a heat sink 50H constituting the upper arm 9H and a heat sink 50L constituting the lower arm 9L.

[0062] like Figure 2 and Figure 3 As shown, the heat sinks 50H and 50L have a roughly rectangular planar shape. The heat sinks 50H and 50L are arranged in the X direction. The heat sinks 50H and 50L have approximately the same thickness and are positioned approximately at the same location in the Z direction. In the Z-direction planar view, the corresponding semiconductor chip 30 and terminal 60 are included within the heat sinks 50H and 50L. The back surface 50b of the heat sinks 50H and 50L is exposed from the encapsulating resin body 20. The back surface 50b may be referred to as the heat dissipation surface or the exposed surface. The back surface 50b is approximately coplanar with one side 20a of the encapsulating resin body 20. The back surfaces 50b of the heat sinks 50H and 50L are arranged in the X direction.

[0063] Terminal 60 is located midway through the heat conduction path between the semiconductor chip 30 and the heat sink 50, transferring heat generated by the semiconductor chip 30 to the heat sink 50. As described above, the heat sink 50 in this embodiment provides wiring functionality for the source electrode 32S. Terminal 60 is located midway through the conductive path between the source electrode 32S and the heat sink 50. Terminal 60 may be referred to as a relay component. Terminal 60 functions as a pad ensuring a predetermined distance between the back surface of the semiconductor chip 30 and the heat sink 50.

[0064] Terminal 60 is a single-metal body or a metal body (laminated body) formed by stacking multiple metal layers. As a laminated body, a cladding material consisting of a Cu layer and a Cu-containing alloy layer can be used. Alternatively, an Al-containing alloy layer can be used instead of a Cu-containing alloy layer. The alloy layer may also contain Cr or Mo in addition to Cu or Al. In this embodiment, terminal 60 is a generally rectangular columnar body with a planar shape slightly smaller than the source electrode 32S in a plan view. Terminal 60 may have a coating on its surface.

[0065] The semiconductor device 15 has two terminals 60. The semiconductor device 15 has a terminal 60H constituting the upper arm 9H and a terminal 60L constituting the lower arm 9L. A bonding portion formed of solder 91 is formed between the terminals 60H and 60L and the source electrode 32S of the corresponding semiconductor chip 30H. Similarly, a bonding portion formed of solder 92 is formed between the terminals 60H and 60L and the opposing surfaces 50a of the corresponding heat sinks 50H and 50L.

[0066] Connectors 70 and 71 connect the elements constituting the upper and lower arm circuits 9. Connector 72 connects the elements constituting the semiconductor device 15. For example... Figure 2 and Figure 3 As shown, the connector 70 is connected to the heat sink 40L. The thickness of the connector 70 is thinner than that of the heat sink 40L. The connector 70 is connected to the side of the heat sink 40H side while being substantially coplanar with the opposing surface 40a of the heat sink 40L. The connector 70 has two bends, thus forming a substantially crank shape in the ZX plane. The connector 70 is covered by the sealing resin body 20. The connector 70 can be integrally connected to the heat sink 40L, or it can be provided as another component and connected by a connection. In this embodiment, the connector 70 is integrally provided with the heat sink 40L as part of the lead frame.

[0067] The connector 71 is connected to the heat sink 50H. The thickness of the connector 71 is thinner than that of the heat sink 50H. The connector 71 is connected to the side of the heat sink 50L in a state where it is substantially coplanar with the opposing surface 50a of the heat sink 50H. The connector 71 is covered by the sealing resin body 20. The connector 71 can be integrally connected to the heat sink 50H, or it can be provided as another component and connected by a connection. In this embodiment, the connector 71 is integrally provided with respect to the heat sink 50H. Solder 93 is sandwiched between the opposing surfaces of the connector 70 connected to the heat sink 40L and the connector 71 connected to the heat sink 50H to form a solder joint. The source electrode 32S of the semiconductor chip 30H and the drain electrode 32D of the semiconductor chip 30L are electrically connected to each other via the connectors 70 and 71, the heat sinks 40L and 50H, and the terminal 60H.

[0068] The connector 72 is connected to the heat sink 50L. The thickness of the connector 72 is thinner than that of the heat sink 50L. The connector 72 is connected to the side of the heat sink 50H while being substantially coplanar with the opposing surface 50a of the heat sink 50L. The connector 72 is covered by the sealing resin body 20. The connector 72 can be integrally connected to the heat sink 50L, or it can be provided as another component and connected by a connection. In this embodiment, the connector 72 is integrally provided with respect to the heat sink 50L. Alternatively, the heat sink 50H including the connector 71 and the heat sink 50L including the connector 72 can be made into a common component.

[0069] Main terminal 80 and signal terminal 85 are external connection terminals. Main terminal 80 is the terminal electrically connected to the main electrode of semiconductor chip 30. Main terminal 80 includes a positive terminal 80P, a negative terminal 80N, and an output terminal 80A. Positive terminal 80P and negative terminal 80N are power supply terminals. Positive terminal 80P is electrically connected to the positive terminal of smoothing capacitor 5. Negative terminal 80N is electrically connected to the negative terminal of smoothing capacitor 5. Positive terminal 80P may be referred to as the P terminal, a high-potential power supply terminal. Negative terminal 80N may be referred to as the N terminal, a low-potential power supply terminal.

[0070] The positive terminal 80P is connected to the heat sink 40H and is electrically connected to the drain electrode 32D of the semiconductor chip 30H via the heat sink 40H. The positive terminal 80P is connected to one end of the heat sink 40H in the Y direction. The thickness of the positive terminal 80P is thinner than that of the heat sink 40H. The positive terminal 80P is connected to the heat sink 40H substantially coplanar with the opposing surface 40a. The positive terminal 80P can be integrally connected to the heat sink 40H, or it can be connected as another component. In this embodiment, the positive terminal 80P is integrally provided with the heat sink 40H as part of the lead frame. The positive terminal 80P extends from the heat sink 40H in the Y direction and protrudes outward from the side surface 20c of the sealing resin body 20. The positive terminal 80P has a bend in the middle of the portion covered by the sealing resin body 20 and protrudes from near the center in the Z direction in the side surface 20c.

[0071] The negative terminal 80N is connected to a connector 71 connected to a heat sink 50L. The negative terminal 80N is electrically connected to the source electrode 32S of the semiconductor chip 30L via the heat sink 50L and the terminal 60L. Solder (not shown) is sandwiched between the opposing surfaces of the negative terminal 80N and the connector 71, forming a solder joint. The negative terminal 80N extends in the Y direction, protruding from the same side 20c as the positive terminal 80P beyond the sealing resin body 20. Near one end of the negative terminal 80N in the Y direction, there is a connection portion 81 that connects to the connector 71. A portion of the negative terminal 80N, including the connection portion 81, is covered by the sealing resin body 20, while the remainder protrudes from the sealing resin body 20. The thickness of the connection portion 81 is greater than the portion protruding from the sealing resin body 20. The thickness of the connection portion 81 is, for example, approximately the same as the thickness of the heat sink 40. The negative terminal 80N also has a bend, similar to the main terminal, protruding from near the center in the Z direction on the side 20c. In this embodiment, the negative terminal 80N is configured as part of the lead frame.

[0072] Output terminal 80A is connected to the connection point between the upper arm 9H and the lower arm 9L. Output terminal 80A of semiconductor device 15 is electrically connected to the corresponding phase winding 3a (stator coil) of the electric generator 3. Output terminal 80A may be referred to as the O terminal or the AC terminal. Output terminal 80A is connected to one end of heat sink 40L in the Y direction. The thickness of output terminal 80A is thinner than that of heat sink 40L. Output terminal 80A and its opposing surface 40a are approximately coplanar with heat sink 40L. Output terminal 80A can be integrally connected to heat sink 40L, or it can be connected as a separate component. In this embodiment, output terminal 80A is integrally connected to heat sink 40L as part of the lead frame.

[0073] Output terminal 80A extends from heat sink 40L in the Y direction, protruding from the same side 20c as positive terminal 80P beyond the sealing resin body 20. Output terminal 80A also has a bend, similar to positive terminal 80P, protruding from near the center in the Z direction within side 20c. The three main terminals 80 are arranged in the X direction in the order of positive terminal 80P, negative terminal 80N, and output terminal 80A.

[0074] Signal terminals 85 are electrically connected to the corresponding pads 32P of the semiconductor chip 30. In this embodiment, the connection is made via bonding wires 94. Signal terminals 85 extend in the Y direction, protruding from the side surface 20d of the encapsulating resin body 20. Side surface 20d is the surface opposite to side surface 20c in the Y direction. In this embodiment, five signal terminals 85 are provided for each semiconductor chip 30. The signal terminals 85 are also formed within a lead frame. Multiple signal terminals 85 are electrically separated from each other by cutting tie rods (not shown).

[0075] As described above, in the semiconductor device 15, a plurality of semiconductor chips 30 constituting the upper and lower arm circuits 9 of one phase are encapsulated by an encapsulating resin body 20. The encapsulating resin body 20 integrally encapsulates a portion of each of the plurality of semiconductor chips 30, a portion of each of the heat sinks 40 and 50, a terminal 60, connectors 70-72, a main terminal 80, and a portion of each of the signal terminals 85.

[0076] In the Z direction, a semiconductor chip 30 is disposed between a heat sink 40, which serves as a first heat dissipation component, a heat sink 50, which serves as a second heat dissipation component, and a terminal 60. The semiconductor chip 30 is sandwiched by heat dissipation components. This allows heat from the semiconductor chip 30 to be dissipated to both sides in the Z direction. The semiconductor device 15 has a two-sided heat dissipation structure. The back surface 40b of the heat sink 40 is substantially coplanar with the back surface 20b of the encapsulating resin body 20. The back surface 50b of the heat sink 50 is substantially coplanar with one side 20a of the encapsulating resin body 20. Since the back surfaces 40b and 50b are exposed, heat dissipation is improved.

[0077] <Methods for Manufacturing Semiconductor Devices>

[0078] Next, an example of the manufacturing method of the semiconductor device 15 described above will be explained.

[0079] First, the various elements constituting the semiconductor device 15 are prepared. For example, a lead frame is prepared. The lead frame includes a heat sink 40 (40H, 40L), a main terminal 80, and a signal terminal 85. In addition, a semiconductor chip 30, a heat sink 50, and a terminal block 60 are prepared respectively.

[0080] Next, a semiconductor chip 30 is disposed on the opposing surface 40a of the heat sink 40 via solder 90. The solder 90 is, for example, in foil form. Furthermore, pre-soldered terminals 60 (60H, 60L) on both sides are disposed on the source electrode 32S of the semiconductor chip 30 such that the solder 91 is on the semiconductor chip 30 side.

[0081] The semiconductor device 15, with its dual-sided heat dissipation structure, is sandwiched between two sides in the Z direction by a cooler (not shown). Therefore, high surface parallelism and high dimensional accuracy between surfaces are required in the Z direction. Consequently, the solder 92 is configured to absorb height deviations of the semiconductor device 15. That is, a larger amount of solder 92 is configured. In other words, a thicker solder 92 than solder 90 and 91 is configured. Furthermore, the solder is pre-positioned on the connector 70 and the connection portion 81 of the negative terminal 80N. And, a first reflow is performed in this configured state. Thus, a laminate that integrally connects the semiconductor chip 30, the heat sink 40, and the terminal 60 can be obtained.

[0082] Next, with the opposing surface 50a facing upwards, the heat sink 50 (50H, 50L) is positioned onto one side of a stage (not shown). Then, the aforementioned laminate is positioned onto the heat sink 50 with the solder 92 facing it, and a second reflow is performed. During the second reflow, a load is applied in the Z direction from the heat sink 40 side to bring the height of the semiconductor device 15 to a predetermined height. For example, by applying a load, a pad (not shown) is brought into contact with both the opposing surface 40a of the heat sink 40 and one side of the stage. This brings the height of the semiconductor device 15 to a predetermined height.

[0083] Through a second reflow, the laminate and heat sink 50 are integrated into a connection structure. Solder 92 absorbs height deviations caused by dimensional and assembly tolerances of the elements constituting semiconductor device 15. Through a second reflow, connectors 70 and 71 are connected to each other. In addition, the negative terminal 80N and connector 72 are connected.

[0084] After the connecting structure is formed, the sealing resin body 20 is formed. In this embodiment, a transfer molding method is used. The connecting structure is placed into a mold, and the sealing resin body 20 is formed. In this embodiment, the sealing resin body 20 is formed so that the heat sinks 40 and 50 are completely covered, and then it is cut after forming. The sealing resin body 20, along with a portion of the heat sinks 40 and 50, is cut together. As a result, the back surfaces 40b and 50b are exposed from the sealing resin body 20. The back surface 40b becomes substantially coplanar with one surface 20a, and the back surface 50b becomes substantially coplanar with the back surface 20b.

[0085] Next, by removing the connecting rods (not shown), the semiconductor device 15 can be obtained.

[0086] Alternatively, the sealing resin body 20 can be formed while the back surfaces 40b and 50b of the heat sinks 40 and 50 are pushed against the cavity wall of the molding die. In this case, the back surfaces 40b and 50b are exposed from the sealing resin body 20 at the point when the sealing resin body 20 is formed. Therefore, post-forming cutting is unnecessary. Furthermore, an example of performing reflow twice has been shown, but it is not a limitation. The connecting structure can also be formed with a single reflow.

[0087] Lead-free solder

[0088] Next, the lead-free solder used in the semiconductor device 15 will be described. Figure 6 This is a graph used to illustrate lead-free solder. The vertical axis represents the Sb content (x), and the horizontal axis represents the Bi content (y).

[0089] Lead-free solder has an alloy composition consisting of 3.2–3.8% by mass Ag, 0.6–0.8% by mass Cu, 0.01–0.2% by mass Ni, x% by mass Sb, y% by mass Bi, 0.001–0.3% by mass Co, 0.001–0.2% by mass P, and the remainder being Sn. The Sb content x and the Bi content y satisfy the relationships x+2y≤11% by mass, x+14y≤42% by mass, and x≥5.1% by mass. Thus, lead-free solder is an octet solder containing Ag, Cu, Ni, Sb, Bi, Co, P, and Sn. Hereinafter, lead-free solder with the above alloy composition will be simply represented as an octet solder.

[0090] The addition of Ag improves solder wettability and enhances precipitation dispersion. However, excessive addition can raise the liquidus temperature. Considering the heat resistance of the semiconductor chip 30 (SiC), it is preferable to keep the temperature below 300°C during soldering. Therefore, in order to achieve sufficient improvement in wettability and precipitation dispersion while also considering potential deviations... Figure 6 As shown, the liquidus temperature was suppressed to below 270°C, and the Ag content was set to 3.2–3.8% by mass.

[0091] The addition of Cu has the effect of preventing Cu dissolution in the Cu-welded area and strengthening the matrix by allowing Cu6Sn5, a fine intermetallic compound, to precipitate into the solder matrix. However, excessive addition leads to the precipitation of intermetallic compounds at the joint interface, accelerating crack propagation. Therefore, the Cu content is set to 0.6–0.8% by mass.

[0092] The addition of Ni strengthens the interface by refining the intermetallic compounds precipitated at the interface. However, excessive addition will cause the liquidus temperature to rise. In order to achieve sufficient interface strengthening while keeping the liquidus temperature below 270°C as mentioned above, the Ni content is set to 0.01 to 0.2% by mass.

[0093] The addition of Sb has the effects of solid solution precipitation strengthening and precipitation dispersion strengthening. By replacing Sb with Sn, it induces lattice strain, thus strengthening the Sn matrix. Bi, with an atomic radius larger than Sb, exerts a greater effect than Sb in strengthening the Sn matrix. On the other hand, if Sb and Bi are excessively present, wettability and foil processability decrease. To obtain wettability and processability according to Sn-13Sb that can be processed into foil, the Sb content needs to be set to 11% by mass or less, considering the effect of adding 3.2 to 3.8% Ag. Bi causes a similar decrease in processability with an addition amount of half that of Sb. Therefore, the content of Sb and Bi should be set as follows... Figure 6 As shown, the mass is set as x+2y≤11%.

[0094] The creep resistance is increased due to the strengthening effect of the Sn matrix with the addition of Sb and Bi. That is, creep can be suppressed to a low level. In this embodiment, in order to obtain sufficient creep resistance, such as... Figure 6 As shown, x is set to ≥ 5.1% by mass. Furthermore, regarding the effect of lower creep suppression, Bi is more effective than Sb; Bi achieves the same effect with an addition of only 1 / 4.4 of Sb. Therefore, it is also possible to add a smaller amount of Bi than Sb.

[0095] Furthermore, in the manufacture of semiconductor device 15, in order to maintain the reliability of solder joints in post-soldering molding processes, etc., such as Figure 6 As shown, the preferred solidus temperature is above 200°C. The Sn and Bi contents at a solidus temperature of 200°C can be approximated as x + 14y = 42 in the region where x ≤ 15% by mass. To ensure the solidus temperature is above 200°C, we set x + 14y ≤ 42% by mass.

[0096] Co enhances the effect of Ni. The addition of Co has the effect of refining the microstructure of the solder alloy. At concentrations below 0.001% by mass, it does not exhibit the effect of intermetallic compound precipitation at the interface to prevent interfacial crack growth. However, if added at concentrations exceeding 0.3% by mass, the intermetallic compound layer precipitated at the interface becomes thicker, accelerating crack propagation. Therefore, the Co content is set at 0.001–0.3% by mass.

[0097] P inhibits the oxidation of Sn and improves wettability. If the content of P does not exceed 0.2% by mass, the flowability of the solder alloy on the solder surface will not be hindered. On the other hand, in order to achieve the above-mentioned effects, the lower limit of the P content is preferably 0.001% or more. Therefore, the P content is set to 0.001% to 0.2% by mass.

[0098] The lead-free solder (octal solder) of the above components, while adapting to the high temperatures of the operating environment, not only extends the lifespan of the solder joints but also reduces unnecessary stress concentration on parts of the semiconductor chip caused by creep. Therefore, it can operate at high temperatures and is suitable for semiconductor chips 30 constructed from SiC substrates 31 with high Young's modulus. For example, octal solders are high-strength solders exhibiting a tensile strength of 80 MPa or higher at room temperature.

[0099] Therefore, octet solders are suitable in the semiconductor device 15 of this embodiment for solders 90, 91, and 92 that form a junction between the semiconductor chip 30 and the heat sink. At least one of solders 90, 91, and 92 is used. Solders 90, 91, and 92 correspond to the junction components. Hereinafter, the position between the drain electrode 32D and the heat sink 40 may be represented as "below the device". Similarly, the position between the source electrode 32S and the terminal 60 may be represented as "on the device", and the position between the terminal 60 and the heat sink 50 may be represented as "on the terminal" (TML).

[0100] The 8-element solder is preferably used in at least one of the solder 90 under the component and the solder 91 on the component. Figure 7 In solders 90 and 91, octyl-based solders are used, while in solder 92, a lead-free solder with lower strength than the octyl-based solders is used. Figure 7 In, relative to Figure 4 The semiconductor device 15 is illustrated in a simplified form. Figure 7 The diagram shows the common structure of the upper arm 9H and the lower arm 9L. The sealing resin body 20 is omitted.

[0101] If an octet solder is used in solder 90, high connection reliability can be maintained even under thermal stress based on the difference in the coefficients of linear expansion between the semiconductor chip 30 and the heat sink 40. Similarly, if an octet solder is used in solder 91, high connection reliability can be maintained even under thermal stress based on the difference in the coefficients of linear expansion between the semiconductor chip 30 and the terminal 60. Furthermore, EM (electromigration) and solder-plating diffusion can be suppressed on components with the highest current density and temperature.

[0102] Because the SiC substrate 31 has a high Young's modulus, if a dynamic cycling test is performed, the solder 90 and 91 around the semiconductor chip 30 may creep, potentially deforming or warping within the semiconductor chip 30 as the number of cycles increases. In contrast, by using an octet solder, creep of the solder 90 and 91 can be suppressed. Therefore, deformation of the semiconductor chip 30 can be suppressed, thereby extending the lifespan of the semiconductor device 15.

[0103] Due to its excellent creep resistance, the octet solder is effective in extending the overall lifespan of the semiconductor device 15, regardless of the structure of the heat sink 40, 50 and the terminal 60. Figure 8 This is a graph showing the simulation results of solder strain. Reference Example 1 shows the results of a structure using a lead-free solder with lower strength than octagonal solder in a semiconductor chip using a Si substrate. Reference Example 2 shows the results of a structure where the Si substrate of Reference Example 1 is replaced with a SiC substrate. The embodiment shows the results of a structure where the solder is replaced with an octagonal solder relative to Reference Example 2. Figure 8 In this document, Reference Example 1, Reference Example 2, and the Implementation Example will be referred to as Reference 1, Reference 2, and Implementation Example, respectively.

[0104] As shown in Examples 1 and 2, if Si is replaced with SiC, which has a larger Young's modulus than Si, the solder strain increases for the solder 90 under the components and the solder 91 on the components located around the semiconductor chip 30. In contrast, if an octet solder is used, the solder strain of both solder 90 and 91 can be reduced, as shown in the embodiments.

[0105] exist Figure 7 The example shown illustrates the use of high-strength octagonal solder in both solders 90 and 91, but it is not a limitation. An octagonal solder may also be used only in one of solders 90 and 91. For example... Figure 8 As shown, if SiC is used instead, the solder strain under the component becomes maximum. Therefore, it is preferable to use an octet solder at least in solder 90.

[0106] An octet solder can also be used in the solder 92 on the terminals. In the semiconductor device 15 of this embodiment, a structure is adopted in which the height deviation of the semiconductor device 15 is absorbed by the solder 92. In the case of low-strength solder, if the solder thickness is thin, cracks will occur due to increased solder stress, so the solder thickness is designed to be thicker. By using an octet solder, the lifespan of the joint can be extended, so the thickness of the solder 92 can be designed to be thinner. As a result, a semiconductor device 15 with low thermal resistance can be made.

[0107] 8-element solder can also be used in both solder 90 under the component and solder 92 on the terminal. Since 8-element solder is high-strength, the solder stress on the terminal will be higher if 8-element solder is used in solder 90. By using 8-element solder in both solder 90 and 92, the joint life can also be extended for solder 92 on the terminal.

[0108] Alternatively, octet solders can be used in all of solders 90, 91, and 92. In this case, the overall reliability of the semiconductor device 15 can be improved. In the semiconductor device 15, octet solders can also be used in all solders including solders 90, 91, and 92. For example, octet solders can also be used in solder 93.

[0109] This illustration shows an example of a semiconductor device 15 comprising multiple semiconductor chips 30 forming an upper and lower arm circuit 9 of one phase, but it is not limited to this. It may also comprise only a semiconductor chip 30 forming one arm. For example, the semiconductor device 15 may include a semiconductor chip 30 forming one arm, a pair of heat sinks 40 and 50 arranged to sandwich the semiconductor chip 30, and a terminal 60 between the semiconductor chip 30 and the heat sink 50. Furthermore, it may also comprise semiconductor chips 30 forming upper and lower arm circuits 9 of multiple phases as a package.

[0110] This illustrates an example where signal terminal 85 is connected to pad 32P via bonding wire 94, but is not limited to this. For example, signal terminal 85 can also be connected to pad 32P via solder.

[0111] (Second Implementation)

[0112] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, the structure of the main electrode of the semiconductor chip 30 was not specifically mentioned. The lead-free solder (octal solder) of the alloy composition described above is not limited to the case where the materials of the main electrodes are the same, and can also be used for different structures.

[0113] Figure 9 This is a cross-sectional view showing a portion of the semiconductor device 15 in this embodiment. Figure 9 Corresponding to Figure 7 In this embodiment, the materials of the main electrodes are different on the underside and on the topside of the element. The drain electrode 32D, which is the main electrode on the underside of the element, is formed using, for example, a TiNi-based material. The source electrode 32S, which is the main electrode on the topside of the element, is formed using, for example, an Al-based material. The source electrode 32S is formed using a soft material with a lower Young's modulus than that of the drain electrode 32D.

[0114] Figure 10This is a diagram showing the simulation results of the strain occurring in the solder 91 on the component and the source electrode 32S which is the main electrode on the upper side of the component. In Figure 10 it also shows the results of SnCu-based solder and SnNi-based solder together with the 8-component solder. Both SnCu-based and SnNi-based are lead-free solders with lower strength than the 8-component solder.

[0115] If an 8-component solder is used for the solder 91 on the component, since the 8-component solder itself has high strength, as Figure 10 shown, the strain occurring in the solder 91 becomes smaller. On the other hand, the strain occurring in the softer source electrode 32S becomes larger. In the case of using two solders with lower strength than the 8-component solder, although the strain occurring in the solder 91 is larger than that of the 8-component solder, the strain occurring in the source electrode 32S is smaller than that of the 8-component solder.

[0116] Therefore, in the present embodiment, as Figure 9 shown, as the solder 90 on the harder drain electrode 32D side and the solder 92 on the terminal 60, an 8-component solder is used, and in the solder 91 on the softer source electrode 32S, a lead-free solder with lower strength than the 8-component solder is used. Since the solder 91 is softer than the solders 90 and 92, the strain occurring in the source electrode 32S can be reduced.

[0117] Figure 11 This is a diagram showing the simulation results of the relationship between the thermal conductivity, thermal resistance, and thickness of the solder 90 under the component. In Figure 11 it shows 4 levels (t1 to t4) as the thickness of the solder 90. Each level satisfies the relationship of t1 < t2 < t3 < t4. As Figure 11 shown, the thermal conductivity of the 8-component solder is lower than that of the lead-free solder with low strength. Thus, if the thickness is the same, the thermal resistance of the 8-component solder is larger than that of the low-strength solder. Since the 8-component solder has low thermal conductivity, the solder thickness can be made thinner. By setting the thickness of the 8-component solder to, for example, 40 to 150 μm, the effects described in the previous embodiment can be achieved and the increase in thermal resistance can be suppressed. That is, the heat dissipation performance can be improved. The same also applies to the solder 92 on the terminal 60.

[0118] In the present embodiment, an example of applying the 8-component solder to both the solders 90 and 92 is shown, but it is not limited thereto. The 8-component solder can also be used only in one of the solders 90 and 92.

[0119] (Third Embodiment)

[0120] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, the heat sink 50 on the source electrode 32S side provides wiring functionality. Alternatively, the heat sink 50 may be configured not to provide wiring functionality.

[0121] Figure 12 This is a cross-sectional view showing the semiconductor device 15 of this embodiment. In this embodiment, DBC substrates are used instead of metal plates as heat sinks 40 and 50. Furthermore, a lead frame 86 is provided between the semiconductor chip 30 and the heat sink 50 instead of terminals 60. The heat sink 50 and the lead frame 86 correspond to a second heat dissipation component. The semiconductor device 15 forms an arm. That is, two semiconductor devices 15 form an upper and lower arm circuit 9 of one phase. The semiconductor device 15 of this embodiment only includes one semiconductor chip 30 with the above-described structure.

[0122] The heat sink 40 has an insulator 40x and metal bodies 40y and 40z arranged to sandwich the insulator 40x. The insulator 40x is a ceramic substrate. The metal bodies 40y and 40z are formed, for example, by containing Cu. The metal bodies 40y and 40z are directly bonded to the insulator 40x. The heat sink 40 has metal bodies 40y, insulator 40x, and metal bodies 40z stacked sequentially from the semiconductor chip 30 side. The heat sink 40 has a three-layer structure.

[0123] To suppress warping, it is preferable that the planar shapes and sizes of the metal bodies 40y and 40z are approximately identical. The planar shape of the insulator 40x, serving as an intermediate layer, is similar to that of the metal bodies 40y and 40z. The size of the insulator 40x is larger than that of the metal bodies 40y and 40z. The insulator 40x extends along the entire circumference and is positioned further outward than the metal bodies 40y and 40z. In the heat sink 40, one side of the metal body 40y becomes the opposing surface 40a. In the heat sink 40, one side of the metal body 40z becomes the back surface 40b.

[0124] Heat sink 50 has the same structure as heat sink 40. Heat sink 50 has an insulator 50x and metal bodies 50y and 50z arranged to sandwich the insulator 50x. The metal body 50y, insulator 50x, and metal body 50z are stacked sequentially from the semiconductor chip 30 side of heat sink 50. Heat sink 50 is arranged opposite heat sink 40 in the Z direction. In the Y direction, heat sink 40 is set to be longer than heat sink 50 and has an opposing region opposite heat sink 50 and a non-opposing region not opposite heat sink 50.

[0125] The lead frame 86 is configured differently from the heat sinks 40 and 50. The lead frame 86 is manufactured from a metal sheet made of materials such as Cu through stamping or other processes. The lead frame 86 has external connection terminals. The lead frame 86 has main terminals 80 and signal terminals 85. The signal terminals 85 are connected to corresponding pads 32P via solder 95. The main terminals 80 have a source terminal 80S and a drain terminal (not shown).

[0126] Figure 12 This is a cross-section including the source terminal 80S. The drain terminal (not shown) extends within the heat sink 40 to a position overlapping with a non-opposite area opposite to the signal terminal 85 side. The drain terminal does not extend to a position overlapping with the semiconductor chip 30. The drain terminal is connected to the aforementioned non-opposite area in the metal body 40y of the heat sink 40. The drain terminal is electrically connected to the drain electrode 32D via the heat sink 40 (metal body 40y). The heat sink 40 provides wiring functionality.

[0127] Source extreme sub-80S such Figure 12 As shown, the lead frame extends to overlap with the semiconductor chip 30. The source terminal 80S is connected to the source electrode 32S via solder 91. The metal body 50y of the heat sink 50 is connected to the source terminal 80S of the lead frame 86 via solder 92. The source terminal 80S is electrically connected to the source electrode 32S without passing through the heat sink 50. The heat sink 50 does not provide wiring functionality but provides heat dissipation functionality.

[0128] In the semiconductor device 15 with such a structure, a lead-free solder with the aforementioned alloy composition, i.e., an octagonal solder, can also be used in at least one of the solders 90, 91, and 92. The octagonal solder can be configured as described in the prior embodiments. Thus, the same effects as the structure described in the prior embodiments can be achieved.

[0129] The structure described in this embodiment is not limited to a semiconductor device 15 constituting one arm. For example, it can also be applied to a semiconductor device 15 constituting an upper and lower arm circuit 9 of one phase. In this case, the metal bodies 40y and 50y can be electrically separated on the upper arm 9H side and the lower arm 9L side. The negative terminal 80N is connected to the source electrode 32S of the semiconductor chip 30L via solder 91, similar to the source terminal 80S described above. The positive terminal 80P is connected to the non-opposite region in the metal body 40y on the upper arm 9H side, similar to the drain terminal. The output terminal 80A can, for example, be connected to the non-opposite region in the metal body 40y on the lower arm 9L side, similar to the positive terminal 80P. The output terminal 80A can also, for example, be connected to the source electrode 32S of the semiconductor chip 30H via solder 91, similar to the negative terminal 80N. A portion of the output terminal 80A can be connected to the upper and lower arms by connecting it to the metal body 40y on the lower arm 9L side, or the upper and lower arms can be connected by another component.

[0130] Examples of DBC substrates shown are heat sinks 40 and 50, but the invention is not limited to these. Similar to the prior embodiments, metal plates may also be used.

[0131] (Other implementation methods)

[0132] The disclosure in this specification and accompanying drawings is not limited to the illustrated embodiments. The disclosure includes the illustrated embodiments and modifications based on them that can be made by those skilled in the art. For example, the disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The disclosure can be implemented in a wide variety of combinations. The disclosure may have additional parts that can be added to the embodiments. The disclosure includes forms in which parts and / or elements of an embodiment are omitted. The disclosure includes substitutions or combinations of parts and / or elements between one embodiment and other embodiments. The technical scope of the disclosure is not limited to the description of the embodiments. Several technical scopes of the disclosure are indicated by the description of the claims, and it should be understood that all modifications within the meaning and scope equivalent to the description of the claims are also included.

[0133] The disclosure in the specification and drawings is not limited by the claims. The disclosure in the specification and drawings includes the technical ideas described in the claims, but also relates to a wider range of technical ideas beyond those described in the claims. Therefore, a variety of technical ideas can be extracted from the disclosure in the specification and drawings without being bound by the claims.

[0134] When referring to an element or layer as "above," "connected," "linked," or "combined," this can mean that the element is directly above, connected to, linked to, or combined with other elements or layers, or that there are intervening elements or layers. Conversely, when referring to an element as "directly above," "directly connected to," "directly linked to," or "directly combined" with other elements or layers, there are no intervening elements or layers. Other terms used to describe relationships between elements should be interpreted in the same way (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations relating to one or more of the associated listed items.

[0135] The spatially relative terms "inner," "outer," "inside," "lower," "lower," "upper," and "higher," etc., are used here to facilitate the description of the relationship between one element or feature and other elements or features, as illustrated in the figures. Spatially relative terms can imply different orientations of the device in use or operation, in addition to those depicted in the figures. For example, if the device in the figure is inverted, the element described as "lower" or "directly lower" to other elements or features is oriented "upper" to those elements or features. Therefore, the term "lower" can also encompass both upper and lower orientations. The device may also be oriented in other directions (or rotated to 90 degrees or other orientations), and the spatially relative designations used in this specification are interpreted accordingly.

[0136] The vehicle's drive system 1 is not limited to the structure described above. For example, an example with one electric generator 3 is shown, but it is not limited to this. Multiple electric generators may also be included. An example with an inverter 6 as a power conversion unit is shown, but it is not limited to this. Multiple power conversion units are acceptable. For example, a structure with multiple inverters may also be provided. A structure with at least one inverter and a converter may also be provided.

[0137] An example of a MOSFET 11 is shown as a device formed in the SiC substrate 31 of the semiconductor chip 30, but it is not limited to this. Any vertical element that is used in a power conversion device is acceptable. For example, it can also be used as an IGBT or SBD. An example of a MOSFET 11 formed as a vertical element is shown, but it is not limited to this. Any vertical element that carries current between the two main electrodes is acceptable. For example, it could also be an IGBT.

[0138] This illustrates an example of an arm consisting of a single semiconductor chip 30, but it is not limited to this. Multiple semiconductor chips 30 can also be connected in parallel to form an arm.

[0139] This illustration shows an example where the back surfaces 40b and 50b of the heat sinks 40 and 50 are exposed from the encapsulating resin body 20, but it is not limited to this. A structure may also be constructed where at least one of the back surfaces 40b and 50b is covered by the encapsulating resin body 20. A structure may also be constructed where at least one of the back surfaces 40b and 50b is covered by an insulating member (not shown) different from the encapsulating resin body 20. This illustration shows an example where the semiconductor device 15 includes the encapsulating resin body 20, but it is not limited to this. A structure may also be constructed without the encapsulating resin body 20.

[0140] In the structure of the upper and lower arm circuits 9 forming a single phase in the semiconductor device 15, an example is shown where the upper arm 9H and the lower arm 9L are connected by connectors 70 and 71, but this is not a limitation. It is also possible to make a structure that only has one of the connectors 70 and 71. For example, connector 70 can be connected to the heat sink 50H.

[0141] An example of a SiC substrate 31 is shown as a semiconductor substrate constituting a semiconductor chip 30. However, it is also possible to use semiconductor substrates other than SiC with a Young's modulus greater than that of Si.

[0142] In a structure where the heat sink 50 functions as a wiring component, an example is shown where a terminal 60 is positioned between the heat sink 50 and the semiconductor chip 30, but this is not a limitation. For example, it could also be as follows: Figure 13 The heat sink 50 is configured as shown in the modified example, having a main body 500 and a protrusion 501. The protrusion 501 protrudes from the surface of the main body 500 on the side of the semiconductor chip 30. Furthermore, the front end of the protrusion 501 is connected to the source electrode 32S via solder 91. In this way, the second heat dissipation component can also be configured to have only the heat sink 50. In this configuration, the solder 92 can be excluded. Preferably, at least one of the solders 90 and 91 between the semiconductor chip 30 and the heat dissipation component is a lead-free solder with the alloy composition described above.

Claims

1. A semiconductor device, characterized in that, have: A semiconductor chip has a SiC substrate on which elements are formed, a first main electrode formed on one side of the SiC substrate, and a second main electrode formed on the back side of the SiC substrate, wherein the back side is the side opposite to the first side in the thickness direction. The first heat dissipation component and the second heat dissipation component are heat dissipation components configured to sandwich the aforementioned semiconductor chip. The first heat dissipation component is disposed on one side and connected to the first main electrode, and the second heat dissipation component is disposed on the back side and connected to the second main electrode; and A connecting component is respectively located between the first main electrode and the first heat dissipation component and between the second main electrode and the second heat dissipation component, forming a connecting portion; At least one of the aforementioned joint components is a lead-free solder with the following alloy composition: It contains 3.2–3.8% by mass of Ag, 0.6–0.8% by mass of Cu, and 0.01–0.2% by mass of Ni; Furthermore, if the content of Sb is x% by mass and the content of Bi is y% by mass, then Sb and Bi are contained in a manner that satisfies x+2y≤11% by mass, x+14y≤42% by mass, and x≥5.1% by mass. Furthermore, it contains 0.001–0.3% by mass of Co and 0.001–0.2% by mass of P; The remaining part consists of Sn; The second main electrode is formed using a material with a smaller Young's modulus than the first main electrode. The bonding component that forms the joint between the second main electrode and the second heat dissipation component is a low-strength solder with a lower strength than the lead-free solder, and at least one of the remaining bonding components is the lead-free solder.

2. The semiconductor device as claimed in claim 1, characterized in that, The second heat dissipation component has a terminal connected to the second main electrode and a heat sink electrically connected to the second main electrode via the terminal. The aforementioned connecting components are respectively located between the aforementioned second main electrode and the aforementioned terminal, and between the aforementioned terminal and the aforementioned heat sink; The bonding component that forms the junction between the aforementioned terminal and the aforementioned second main electrode is the aforementioned low-strength solder.

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