Protection circuit for load switches

Abstract

The present invention discloses a protection circuit for a load switch, comprising a first current source, a current mirror circuit, a current limiting protection circuit, and a fast current limiting protection circuit. The first current source is used to provide a sampled current for the load switch, the current mirror circuit is used to convert the sampled current of the load switch into a first replica current and a second replica current that is smaller than the first replica current, the current limiting protection circuit is used to set a reference current for the current limiting protection, compare the first replica current with the reference current, and generate a current limiting protection signal based on the comparison result, and the fast current limiting protection circuit is used to compare the current difference between the first replica current and the reference current with the second replica current, and generate a fast current limiting protection signal based on the comparison result. This circuit can quickly respond to a short circuit at the load end, and can promptly limit the current to a safe range, thereby improving the safety of the system.

Description

Technical Field

[0001] The present invention relates to the technical field of power supplies, and more particularly, to a protection circuit for a load switch. Background Art

[0002] Load switches are widely used in various power management systems. They are an important component of power supply and system monitoring products, and can provide certain protection for both power supply and load.

[0003] When an abnormality occurs in the power supply or load, causing a large current to flow, it is necessary to promptly limit the current to a reasonable range. Otherwise, it will pose a significant safety hazard to the entire system. Therefore, current limiting is an almost essential function for load switches. In some applications, when an overcurrent anomaly occurs, it is not desirable to immediately disconnect the load switch, but rather to allow it to output a constant current. Therefore, existing technologies typically use a negative feedback loop to control the output current of the load switch. When an overload occurs at the load end, the load current is limited to the current limit threshold, thereby providing a certain degree of protection for the system. However, in certain extreme abnormal situations, such as short-circuit faults, the load current will increase rapidly. Due to the certain response time of the feedback loop, the current cannot be limited to a safe range in a timely manner, and a significant safety hazard still exists. Summary of the Invention

[0004] In view of the above problems, the object of the present invention is to provide a load switch protection circuit that can quickly reduce the current flowing through the load switch when the output terminal of the chip is short-circuited to the ground, thereby avoiding damage to the chip itself or the subsequent load.

[0005] According to an embodiment of the present invention, a protection circuit for a load switch is provided, comprising: a first current source, adapted to provide a sampling current of the load switch; a current mirror circuit, adapted to obtain a first replica current and a second replica current smaller than the first replica current based on the sampling current; a current limiting protection circuit, adapted to set a reference current for current limiting protection, compare the first replica current with the reference current, and provide a current limiting protection signal to the load switch when the first replica current exceeds the reference current; and a fast current limiting protection circuit, adapted to compare a current difference between the first replica current and the reference current with the second replica current, and provide a fast current limiting protection signal to the load switch when the current difference exceeds the second replica current.

[0006] Optionally, the ratio of the first copy current to the second copy current is n:1, where n is an integer greater than or equal to 1.

[0007] Optionally, the current limiting protection circuit includes: an operational amplifier, whose non-inverting input terminal is used to receive a reference voltage; a first transistor, whose first terminal is coupled to the output terminal of the first replica current, whose control terminal is coupled to the output terminal of the operational amplifier, and whose second terminal is coupled to the inverting input terminal of the operational amplifier; a current limiting resistor, whose first terminal is coupled to the second terminal of the first transistor, and whose second terminal is grounded; a second transistor, whose first terminal is coupled to a common node of the first terminal of the first transistor and the output terminal of the first replica current, and whose second terminal is grounded; and a third transistor, which forms a current mirror with the second transistor, whose first terminal is used to output the current limiting protection signal, whose control terminal is coupled to the control terminal and the first terminal of the second transistor, and whose second terminal is grounded.

[0008] Optionally, the operational amplifier operates in a negative feedback loop to set the reference current.

[0009] Optionally, when the first replica current is greater than the reference current, the second transistor mirrors the portion of the first replica current that exceeds the reference current to the third transistor to generate an effective current limiting protection signal.

[0010] Optionally, the fast current limiting protection circuit includes: a fourth transistor, which forms a current mirror with the second transistor and the third transistor, a first end of which is coupled to the output end of the second copied current, a control end is coupled to the control end of the second transistor, and a second end is grounded; a fifth transistor, a first end of which is coupled to the power supply voltage, a control end is coupled to a common node of the first end of the fourth transistor and the output end of the second copied current; and a sixth transistor, a first end of which is used to output the fast current limiting protection signal, a control end is coupled to the second end of the fifth transistor, and a second end is grounded.

[0011] Optionally, the second transistor is used to mirror the portion of the first copied current that exceeds the reference current to the fourth transistor. When the mirrored current exceeds the second copied current, the fifth transistor and the sixth transistor are turned on to generate the effective fast current limiting protection signal.

[0012] Optionally, the fast current limiting protection circuit further includes: a second current source coupled between the first terminal and the control terminal of the fifth transistor; and a third current source coupled between the control terminal and the second terminal of the sixth transistor.

[0013] Optionally, the current mirror circuit includes: a seventh transistor, a first end of which is coupled to the power supply voltage, a second end of which is coupled to the first current source, and a control end of which is coupled to the second end; an eighth transistor, a first end of which is coupled to the power supply voltage, a control end of which is coupled to the control end of the seventh transistor, and a second end for outputting the second copied current; and a ninth transistor, a first end of which is coupled to the power supply voltage, a control end of which is coupled to the control end of the seventh transistor, and a second end for outputting the first copied current.

[0014] Optionally, a size ratio of the seventh transistor, the eighth transistor, and the ninth transistor is n:1:n.

[0015] The protection circuit for a load switch provided by the present invention includes a current mirror circuit, a current limiting protection circuit, and a fast current limiting protection circuit. The current mirror circuit is used to convert the sampled current of the load switch into a first replica current and a second replica current that is smaller than the first replica current. The current limiting protection circuit is used to set a reference current for the current limiting protection, and compare the first replica current with the reference current, and generate a current limiting protection signal based on the comparison result. The fast current limiting protection circuit is used to compare the current difference between the first replica current and the reference current with the second replica current, and generate a fast current limiting protection signal based on the comparison result. The protection circuit of the present invention can react quickly when a short circuit occurs at the load end, and can promptly limit the current to a safe range, thereby improving the safety of the system.

[0016] In addition, the protection circuit of the present invention combines the current limiting protection function and the fast current limiting protection function together, has a simple circuit structure, does not require additional power consumption when the load switch has no output current, and has very low static power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0018] Figure 1 A schematic block diagram of a protection circuit according to an embodiment of the present invention is shown;

[0019] Figure 2 A schematic circuit diagram of a protection circuit according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0020] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0021] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by a programmable circuit. When an element or circuit is said to be "coupled" to another element or to be "coupled" between two nodes, it may be directly coupled or connected to the other element or there may be an intermediate element, and the connection between the elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0022] Furthermore, certain terms are used in this patent specification and claims to refer to specific components. Those skilled in the art will appreciate that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not distinguish components based on differences in name, but rather on differences in their functionality.

[0023] The present invention will be further described below with reference to the accompanying drawings and examples.

[0024] Figure 1 FIG. 1 is a schematic block diagram of a protection circuit according to an embodiment of the present invention. Figure 1 As shown, the protection circuit 100 includes a current source 110 , a current mirror circuit 120 , a current limiting protection circuit 130 and a fast current limiting protection circuit 140 .

[0025] The current source 110 is used to provide a sampled current IS0 of the load switch. In some embodiments, a current sampling circuit may be used to sample the current flowing through the load switch to obtain the sampled current IS0, which is not limited in this embodiment of the present invention.

[0026] The current mirror circuit 120 is configured to generate a first replica current IS1 and a second replica current IS2 according to the sample current IS0 , wherein the sample current IS0 , the first replica current IS1 and the second replica current IS2 have a ratio of n:1, where n is an integer greater than or equal to 1.

[0027] The current limiting protection circuit 130 is used to set a reference current Iref for current limiting protection and compare the first replica current IS1 with the reference current Iref. When the first replica current IS1 exceeds the reference current Iref, a current limiting protection signal CTR is provided to the load switch to control the gate voltage of the load switch, thereby achieving the current limiting function.

[0028] The fast current limiting protection circuit is used to compare the current difference between the first replica current IS1 and the reference current Iref with the second replica current IS2. When the current difference exceeds the second replica current IS1, a fast current limiting protection signal F_CTR is provided to the load switch to control the gate voltage of the load switch, thereby implementing a fast current limiting protection function.

[0029] Figure 2 FIG. 1 shows a schematic circuit diagram of a protection circuit according to an embodiment of the present invention. Figure 2 As shown, the current mirror circuit 120 includes PMOS (Positive Channel Metal Oxide Semiconductor) transistors Mp1-Mp3. The sources of the PMOS transistors Mp1-Mp3 are coupled to the power supply voltage VDD, the gates of the PMOS transistors Mp1-Mp3 are connected to each other, the drain of the PMOS transistor Mp1 is coupled to one end of the current source 110, the drain of the PMOS transistor Mp2 is configured to output the second replica current IS2, and the drain of the PMOS transistor Mp3 is configured to output the first replica current IS1. The PMOS transistors Mp1-Mp3 form a current mirror structure, mirroring the sampled current IS0 to generate the first replica current IS1 and the second replica current IS2, respectively. The current ratio of the sampled current IS0 to the first replica current IS1 and the second replica current IS2 can be set by adjusting the transistor size ratio of the PMOS transistors Mp1-Mp3. In this embodiment, the transistor size ratio of the PMOS transistors Mp1-Mp3 is set to n:n:1, where n is an integer greater than or equal to 1.

[0030] The current-limiting protection circuit 130 includes an operational amplifier OP1, NMOS (Negative Channel Metal Oxide Semiconductor) transistors Mn1-Mn3, and a current-limiting resistor RLIM. The operational amplifier OP1 has a non-inverting input, an inverting input, and an output. The non-inverting input is used to receive a reference voltage Vref. The drain of the NMOS transistor Mn1 is coupled to the output of the first replica current IS1 (i.e., the drain of the PMOS transistor Mp3), the source is coupled to the inverting input of the operational amplifier OP1, and the gate is coupled to the output of the operational amplifier OP1. The current-limiting resistor RLIM is an externally programmable resistor with a first terminal coupled to the source of the NMOS transistor Mn1 and a second terminal connected to ground. The drain of the NMOS transistor Mn2 is coupled to a common node between the drain of the NMOS transistor Mn1 and the output of the first replica current IS1. The gate and drain are coupled to each other, and the source is grounded. The drain of the NMOS transistor Mn3 is used to output the current limiting protection signal CTR, the gate is coupled to the gate and drain of the NMOS transistor Mn2, and the source is grounded.

[0031] The operational amplifier OP1 operates in a local negative feedback loop to set the reference current Iref for current limiting protection:

[0032] Iref=Vref / RLIM (1)

[0033] Wherein, Vref is a voltage value provided by a reference voltage Vref, and RLIM is a resistance value provided by a current limiting resistor RLIM. The current magnitude of the reference current Iref can be set by setting the reference voltage Vref and the current limiting resistor RLIM.

[0034] The fast current limiting protection circuit 140 includes NMOS transistors Mn4-Mn5, a PMOS transistor Mp4, a current source 141, and a current source 142. The NMOS transistors Mn2-Mn4 form a current mirror structure. The drain of NMOS transistor Mn4 is coupled to the output terminal of the second replica current IS2 (i.e., the drain of PMOS transistor Mp2), the gate is coupled to the gate of NMOS transistor Mn2, and the source is coupled to ground. The source of PMOS transistor Mp4 is coupled to power supply voltage VDD, and the gate is coupled to the common node of the drain of NMOS transistor Mn4 and the output terminal of the second replica current IS2. The gate of NMOS transistor Mn5 is coupled to the drain of PMOS transistor Mp4, the source is grounded, and the drain is used to output the fast current limiting protection signal F_CTR. The current source 141 and the current source 142 are used to provide internal bias current. The current source 141 is coupled between the source and the gate of the PMOS transistor Mp4 , and the current source 142 is coupled between the source and the gate of the NMOS transistor Mn5 .

[0035] In the protection circuit 100 of this embodiment, when the current flowing through the load switch is zero, the current flowing through the PMOS transistors Mp1-Mp4 and the NMOS transistors Mn1-Mn5 is also zero. At this time, only the operational amplifier OP1 consumes the static current, so the circuit has very low static power consumption.

[0036] As the current flowing through the load switch increases, the currents of the sampled current IS0, the first copied current IS1, and the second copied current IS2 also gradually increase. When the first copied current IS1 exceeds the reference current Iref, the excess current flows through the NMOS transistor Mn2. Simultaneously, the NMOS transistor Mn2 copies the excess current to the NMOS transistor Mn3 through a mirroring method, thereby generating an effective current-limiting protection signal CTR to control the gate voltage of the load switch, thereby achieving the current-limiting function.

[0037] It should be noted that the current flowing through the NMOS transistor Mn1 will cause an error in the current limit value. The error can be eliminated by increasing the gain or compensating it. The final current limit value ILIMIT is:

[0038] ILIMIT=K×Vref / RLIM (2)

[0039] K is the proportionality factor, which can be adjusted by adjusting the ratio of the sampled current IS0 to the current flowing through the load switch, as well as the current ratio of the current mirror. After the proportionality factor K is fixed, the current limit value ILIMIT can be flexibly set using the external current-limiting resistor RLIM.

[0040] When a short circuit occurs, the current flowing through the load switch increases rapidly. The current limiting loop cannot react quickly, and its ability to regulate the current in a short period of time is limited. Therefore, the fast current limiting protection circuit 140 needs to be activated. To clearly illustrate the circuit's operating principle, assume that the tube size ratio of the PMOS transistors Mp1-Mp3 is 3:1:3, and the tube size ratio of the NMOS transistors Mn2 and Mn4 is 1:1. When the current flowing through the load switch rapidly increases to 1.5 times the current limit value ILIMIT, the first replica current IS1 and the second replica current IS2 are:

[0041] IS1=IS0=1.5*Iref (3)

[0042] IS2=IS0 / 3=0.5*Iref (4)

[0043] At this time, the portion of the first replica current IS1 that exceeds the reference current Iref will flow into the NMOS transistor Mn2. The NMOS transistor Mn2 will mirror this current to the NMOS transistor Mn4, that is, the current flowing through the NMOS transistor Mn4 is 0.5*Iref. At this time, the current flowing through the NMOS transistor Mn4 is exactly equal to the second replica current IS2. If the current flowing through the load switch continues to increase, the current flowing through the NMOS transistor Mn4 will exceed the second replica current IS2, the gate voltage of the PMOS transistor Mp4 will be pulled down, and the gate voltage of the NMOS transistor Mn5 will be pulled up, thereby generating an effective fast current limit protection signal F_CTR to achieve fast current limit protection. In this embodiment, the current limit value ILIMIT_F of the fast current limit protection is:

[0044] ILIMIT_F=1.5×K×Vref / RLIM (5)

[0045] Similarly, K is the proportionality factor, which can be adjusted by adjusting the ratio of the sampled current IS0 to the current flowing through the load switch, as well as the current ratio of the current mirror. After the proportionality factor K is fixed, the current limit value ILIMIT_F can be flexibly set using the external current-limiting resistor RLIM.

[0046] In summary, the protection circuit for a load switch in an embodiment of the present invention includes a current mirror circuit, a current limiting protection circuit, and a fast current limiting protection circuit. The current mirror circuit is used to convert the sampled current of the load switch into a first replica current and a second replica current that is smaller than the first replica current. The current limiting protection circuit is used to set a reference current for current limiting protection, and compare the first replica current with the reference current, and generate a current limiting protection signal based on the comparison result. The fast current limiting protection circuit is used to compare the current difference between the first replica current and the reference current with the second replica current, and generate a fast current limiting protection signal based on the comparison result. The protection circuit of the present invention can react quickly when a short circuit occurs at the load end, and can promptly limit the current to a safe range, thereby improving the safety of the system.

[0047] In addition, the protection circuit of the present invention combines the current limiting protection function and the fast current limiting protection function together, has a simple circuit structure, does not require additional power consumption when the load switch has no output current, and has very low static power consumption.

[0048] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0049] The embodiments of the present invention are described above, but these embodiments do not describe all details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and modify and use it based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. A protection circuit for a load switch, comprising: A first current source, adapted to provide a sampling current of the load switch; a current mirror circuit, adapted to obtain a first replica current and a second replica current smaller than the first replica current according to the sampled current; a current limiting protection circuit, adapted to set a reference current for current limiting protection, compare the first replica current with the reference current, and provide a current limiting protection signal to the load switch when the first replica current exceeds the reference current; as well as a fast current limiting protection circuit, adapted to compare a current difference between the first replica current and the reference current with the second replica current, and provide a fast current limiting protection signal to the load switch when the current difference exceeds the second replica current; Wherein, the current limiting protection circuit includes: an operational amplifier, wherein a non-inverting input terminal thereof is used for receiving a reference voltage; a first transistor having a first terminal coupled to the output terminal of the first replica current, a control terminal coupled to the output terminal of the operational amplifier, and a second terminal coupled to the inverting input terminal of the operational amplifier; a current limiting resistor, a first end of which is coupled to the second end of the first transistor, and a second end of which is grounded; a second transistor having a first terminal coupled to a common node of the first terminal of the first transistor and the output terminal of the first replica current, and a second terminal grounded; and A third transistor forms a current mirror with the second transistor, a first end of which is used to output the current limiting protection signal, a control end is coupled to the control end and the first end of the second transistor, and a second end is grounded. The fast current limiting protection circuit comprises: a fourth transistor, forming a current mirror with the second transistor and the third transistor, wherein a first terminal of the fourth transistor is coupled to the output terminal of the second replica current, a control terminal of the fourth transistor is coupled to the control terminal of the second transistor, and a second terminal of the fourth transistor is grounded; a fifth transistor, having a first terminal coupled to a power supply voltage and a control terminal coupled to a common node of the first terminal of the fourth transistor and the output terminal of the second replica current; a sixth transistor, having a first terminal for outputting the fast current limiting protection signal, a control terminal coupled to the second terminal of the fifth transistor, and a second terminal grounded; a second current source coupled between the first terminal and the control terminal of the fifth transistor; and A third current source is coupled between the control terminal and the second terminal of the sixth transistor, The second transistor is used to mirror the portion of the first copy current that exceeds the reference current to the fourth transistor. When the mirror current exceeds the second copy current, the fifth transistor and the sixth transistor are turned on to generate the effective fast current limiting protection signal.

2. The protection circuit according to claim 1, wherein: The ratio of the first replica current to the second replica current is n:1, where n is an integer greater than or equal to 1.

3. The protection circuit according to claim 1, wherein: The operational amplifier operates in a negative feedback loop to set the reference current.

4. The protection circuit according to claim 1, wherein: When the first replica current is greater than the reference current, the second transistor mirrors the portion of the first replica current exceeding the reference current to the third transistor to generate an effective current limiting protection signal.

5. The protection circuit according to claim 2, wherein: The current mirror circuit comprises: a seventh transistor, having a first terminal coupled to the power supply voltage, a second terminal coupled to the first current source, and a control terminal coupled to the second terminal; an eighth transistor, having a first terminal coupled to the power supply voltage, a control terminal coupled to the control terminal of the seventh transistor, and a second terminal configured to output the second replica current; and A ninth transistor has a first terminal coupled to the power supply voltage, a control terminal coupled to the control terminal of the seventh transistor, and a second terminal for outputting the first replica current. The protection circuit according to claim 5 , wherein: A size ratio of the seventh transistor, the eighth transistor, and the ninth transistor is n:1:n.

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