Wafer surface treatment process

Abstract

The application provides a wafer surface treatment process, characterized in that the process comprises the following steps: a) providing an epitaxial device, wherein the epitaxial device comprises an epitaxial chamber, an upper lamp group and a lower lamp group, the upper lamp group is arranged above the epitaxial chamber, and the lower lamp group is arranged below the epitaxial chamber; b) conveying a wafer to the epitaxial device, and performing surface cleaning on the wafer by inputting a cleaning gas, wherein in the surface cleaning step, the power proportion of the lower lamp group of the epitaxial device is 55-90%. The treatment process can inhibit the occurrence of relaxation and ensure the quality of the crystal structure of the wafer surface.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of wafer surface treatment process, in particular to a silicon germanium epitaxial wafer surface treatment process. BACKGROUND

[0002] In the prior art, in order to increase the performance of the device, it is usually necessary to form several epitaxial layers on the wafer, or the drain and source of the device also need to be realized by epitaxial process.

[0003] However, on the wafer surface, due to exposure to air, through oxidation, it is easy to form a natural oxide layer on the wafer surface, which will affect the formation quality of the subsequent epitaxial layer, therefore, in the prior art, it is usually necessary to remove the natural oxide layer before the epitaxial process, or other treatments need to be performed on the wafer surface, all of the above treatments usually need to expose the wafer to high temperature (for example, 800-980℃).

[0004] However, high temperature will cause stress release to form relaxation, destroy the crystal structure of the wafer surface, and affect the quality of the subsequent epitaxial process, and even cause process failure. SUMMARY

[0005] The purpose of the present application is to provide a wafer surface treatment process for treating the wafer surface before the next epitaxial process, to increase the quality of the epitaxial process.

[0006] In order to achieve the above purpose, the present application realizes the following technical scheme:

[0007] The present application provides a wafer surface treatment process, comprising the following steps:

[0008] a) providing an epitaxial device, the epitaxial device comprising an epitaxial chamber, an upper lamp group and a lower lamp group, the upper lamp group being arranged above the epitaxial chamber, and the lower lamp group being arranged below the epitaxial chamber;

[0009] b) conveying a wafer to the epitaxial device, and introducing a cleaning gas to clean the surface of the wafer, wherein in the surface cleaning step, the power ratio of the lower lamp group of the epitaxial device is 55-90%.

[0010] Optionally, in the surface cleaning step, the power ratio of the lower lamp group of the epitaxial device is 65-73%.

[0011] Optionally, in the surface cleaning step, the process temperature of the surface cleaning is 605-710℃.

[0012] Optionally, in the step b), the cleaning gas comprises: chlorine-containing gas.

[0013] Optionally, the chlorine-containing gas includes at least one of HCl or Cl2.

[0014] Optionally, in the surface cleaning step, the surface cleaning time is 100-5000s, and the flow rate of the cleaning gas is 50-500sccm.

[0015] Optionally, the process further includes a step of pre-cleaning the wafer by introducing a pre-cleaning gas into a pre-cleaning device.

[0016] Optionally, the pre-cleaning is before the step b).

[0017] Optionally, the pre-cleaning gas includes a fluorine-containing gas, a nitrogen-hydrogen-containing gas, and a noble gas.

[0018] Optionally, the fluorine-containing gas includes at least one of HF, CF4, CHF3, CH2F2, CH3F, NF3, and SF6.

[0019] Optionally, the nitrogen-hydrogen-containing gas includes at least one of NH3 and N2H4.

[0020] Optionally, the noble gas includes at least one of Ar, He, and Xe.

[0021] Optionally, the cleaning gas is non-plasma.

[0022] Optionally, the pre-cleaning gas is plasma.

[0023] Compared with the prior art, the present application has the following advantages:

[0024] 1. The power ratio of the lower lamp group of the epitaxial equipment is 65-73%, which ensures the quality of the crystal structure of the wafer surface.

[0025] 2. The surface cleaning uses chlorine-containing gas, and the process temperature is 605-710℃, which further avoids the occurrence of relaxation, shortens the process time, ensures the flatness of the wafer surface, and ensures the quality of the subsequent epitaxial process. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings needed to be used in the description. Obviously, the drawings in the following description are one embodiment of the present application, and other drawings can also be obtained by those skilled in the art without creative labor:

[0027] Figure 1 is a structural schematic view of the epitaxial equipment;

[0028] Figure 2A flow chart of the processing procedure provided by the present application;

[0029] Figure 3 A particle instrument detection experiment graph for the embodiment of the present application.

[0030] Figure 4 A particle instrument detection experiment graph for the comparative example one of the present application;

[0031] Figure 5 A particle instrument detection experiment graph for the comparative example two of the present application;

[0032] Figure 6 A principle diagram of the processing procedure of the present application;

[0033] Figure 7 A wafer surface experiment graph at different temperatures when the power proportion of the fixed lower lamp group is provided by the present application. DETAILED DESCRIPTION

[0034] The scheme provided by the present application is further described in detail below in combination with the drawings and specific embodiments. The advantages and features of the present application will be more apparent according to the following description. It should be noted that the drawings are very simplified and all use non-precise proportions, only for the purpose of facilitating and clearly assisting the description of the embodiments of the present application. In order to make the purpose, features and advantages of the present application more apparent and easy to understand, please refer to the drawings. It should be noted that the structure, proportion, size and the like shown in the drawings of the present application are only used to cooperate with the content disclosed in the specification, so that those skilled in the art can understand and read, and are not used to limit the conditions of the implementation of the present application, so they do not have the technical meaning, any modification of the structure, change of the proportion relationship or adjustment of the size, without affecting the effect and purpose of the present application, should still fall within the scope of the technical content disclosed by the present application.

[0035] Figure 1A structure diagram of an epitaxial device is shown, in which an epitaxial process is performed. The epitaxial device includes an epitaxial chamber, an upper lamp group 101 and a lower lamp group 101, the upper lamp group is arranged above the epitaxial chamber, and the lower lamp group is arranged below the epitaxial chamber. The epitaxial chamber includes an upper flange 103, a lower flange 107, an upper inner liner 100, a lower inner liner 112, an upper dome 116, a lower dome 108 and an outer wall. The upper inner liner 100 is arranged above the lower inner liner 112. The upper inner liner 100 and the lower inner liner 112 are approximately cylindrical. The upper flange 103 and the lower flange 107 are approximately annular. The upper dome 116 is arranged above the upper inner liner. The lower dome 108 is arranged below the lower inner liner. The upper dome is an outwardly convex circle. The outer wall is arranged outside the upper inner liner and the lower inner liner. The upper flange 103 seals and fixes the upper dome above the outer wall. The lower flange 107 seals and fixes the lower dome 108 below the outer wall. A susceptor 105 is arranged in the epitaxial chamber for carrying a wafer 104. The susceptor is supported by a susceptor support device, which includes a pin support shaft 110, a pin 111 and a rotating support shaft 109. The rotating support shaft 109 drives the susceptor 105 to rotate and lift. When the rotating support shaft 109 drives the susceptor 105 to descend, the pin 111 falls on the pin support shaft 110. Then the pin 111 lifts the wafer 104, which is convenient for a robot to take the wafer. A preheating ring 115 is arranged around the susceptor. An air inlet 113 is arranged on one side of the outer wall. An air outlet 106 is arranged on the opposite side of the air inlet 113. Process gas 114 (such as cleaning gas) is introduced from the air inlet 113 and is drawn away from the air outlet 106. Under the heating action of the upper lamp group and the lower lamp group, the process gas is deposited on the surface of the wafer to form a thin film. The temperature can be monitored in real time by the thermometers 102 arranged above and below the epitaxial chamber.

[0036] The present application provides a wafer surface treatment process, as shown, comprising the following steps: Figure 2

[0037] a) providing an epitaxial device, the epitaxial device including an epitaxial chamber, an upper lamp group and a lower lamp group, the upper lamp group being arranged above the epitaxial chamber, and the lower lamp group being arranged below the epitaxial chamber; specifically, the epitaxial device is the epitaxial device shown in Figure 1

[0038] b) conveying a wafer 104 to the epitaxial device, and introducing a cleaning gas 114 to clean the surface of the wafer, wherein in the surface cleaning step, the power ratio of the lower lamp group of the epitaxial device is 55-90%.

[0039] c) performing an epitaxial process, the epitaxial process being performed in the epitaxial device. During the epitaxial process, the process temperature of the epitaxy is 600-950℃.

[0040] ​​Preferably, in the surface cleaning step, the power ratio of the lower lamp group of the epitaxial device is 65-73%. The power ratio of the lower lamp group is the ratio of the power of the lower lamp group to the total power (the total power of the upper lamp group and the lower lamp group), for example, when the power ratio of the upper lamp group is 30%, the power ratio of the lower lamp group is 70%.

[0041] In the surface cleaning step, the process temperature of the surface cleaning is 550-850℃, preferably 605-710℃. The cleaning gas includes a chlorine-containing gas; optionally, the chlorine-containing gas includes at least one of HCl or Cl2. The surface cleaning time is 100-5000s, preferably the surface cleaning time is 110-300s, and the flow rate of the cleaning gas is 50-500sccm. The cleaning gas is in a non-plasma state.

[0042] In the epitaxial process, optionally, the process gas of the epitaxial process includes germane and silane, and the process gas can also include a doping gas.

[0043] The process further includes the step of pre-cleaning the wafer by introducing a pre-cleaning gas into a pre-cleaning device. The pre-cleaning is performed before the step b) to remove the natural oxide layer. The pre-cleaning gas includes a fluorine-containing gas, a nitrogen-containing hydrogen gas, and a noble gas, the fluorine-containing gas includes at least one of HF, CF4, CHF3, CH2F2, CH3F, NF3, SF6, the gas flow rate of the fluorine-containing gas is 10-100sccm, preferably 30-60sccm; the nitrogen-containing hydrogen gas includes at least one of NH3 and N2H4, the gas flow rate of the nitrogen-containing hydrogen gas is 10-100sccm, preferably 30-60sccm; the noble gas includes at least one of Ar, He, Xe, and the gas flow rate of the noble gas is 200-1500sccm, preferably 400-1000sccm.

[0044] The pre-cleaning device includes a pre-cleaning chamber and an RPS (remote plasma source) arranged above the pre-cleaning chamber, the pre-cleaning gas (fluorine gas, nitrogen-containing hydrogen gas, and noble gas) forms a remote plasma through the RPS, and then is introduced into the pre-cleaning chamber to pre-clean the wafer placed in the pre-cleaning chamber to remove the natural oxide layer on the surface of the wafer.

[0045] Embodiment

[0046] 1) Perform pre-cleaning by transferring the wafer to the pre-cleaning chamber of the pre-cleaning equipment and introducing HF, NH3 and He into the pre-cleaning equipment. The gas flow rate of HF is 45 sccm, the gas flow rate of NH3 is 45 sccm and the gas flow rate of He is 780 sccm. Under the action of RPS, the pre-cleaning gas forms plasma.

[0047] Optionally, the wafer is a silicon wafer, or a silicon wafer on which at least one silicon-germanium epitaxial layer has been formed.

[0048] 2) The wafer is removed from the pre-cleaning equipment and transferred to the epitaxial equipment for surface cleaning. HCl gas is introduced into the epitaxial equipment, and the power ratio of the lower lamp group of the epitaxial equipment is adjusted to 71%. The surface cleaning process temperature is 655°C, the surface cleaning time is 150 seconds, and the gas flow rate of the cleaning gas is 350 sccm. The process temperature of the epitaxial equipment is generally the temperature measured by thermometer 102 above the epitaxial chamber.

[0049] 3) Perform the epitaxial process by introducing silane and germane into the epitaxial equipment at a process temperature of 850°C.

[0050] Between steps 2) and 3) above, the relative scattered light intensity on the wafer surface is detected using a particle analyzer, such as... Figure 3 As shown, the vertical axis represents the ratio of peak light intensity to average light intensity. It can be seen that the maximum ratio is 277.

[0051] Comparative Example 1

[0052] Repeat steps 1)-3) of the above embodiment, except that the power ratio of the lower lamp group of the epitaxial device is 58%.

[0053] Similarly, between steps 2) and 3) above, the relative scattered light intensity on the wafer surface is detected using a particle analyzer, such as... Figure 4 As shown, the maximum ratio of the vertical axis is 5240.

[0054] Comparative Example 2

[0055] Repeat steps 1)-3) of the above embodiment, except that the power ratio of the lower lamp group of the epitaxial device is 80%.

[0056] Similarly, between steps 2) and 3) above, the relative scattered light intensity on the wafer surface is detected using a particle analyzer, such as... Figure 5 As shown, the maximum ratio of the vertical axis is 9863.

[0057] From the comparison of the above three embodiments, it can be seen that the ratio of the power of the lower lamp group of the epitaxial equipment is the smallest when the power ratio is 71%, which means that the crystal structure on the wafer surface is optimal. By changing the power ratio of the lower lamp group and repeating the above embodiments, it can be determined that when the power ratio of the lower lamp group of the epitaxial equipment is 65-73%, the crystal structure on the wafer surface is in a relatively optimal state.

[0058] Figure 6 A schematic diagram is shown as follows, Figure 6 After the pre-cleaning step, the native oxide layer on the wafer surface is removed. In the surface cleaning step, the temperature of the susceptor 105 is higher than that of the upper surface of the wafer due to the high power ratio of the lower lamp group. Due to the heat conduction effect, the temperature of the bottom of the wafer 104 is higher than that of the upper surface of the wafer 104, so the bottom of the wafer 104 will expand in the G direction, thus the relaxation under high temperature can be well solved. At the same time, the chlorine-containing gas can remove the polycrystal on the wafer surface, and can also eliminate the fluctuation of the thickness of the wafer surface or micro device texture, further ensuring the flatness of the wafer surface, optimizing the crystal structure, and the process temperature of the surface cleaning is 605-710℃, which can better solve the above problems.

[0059] Figure 7 The relative scattering light intensity of the wafer surface at different temperatures is shown when the power ratio of the lower lamp group is fixed. The power ratio of the lower lamp group in this experiment is 71%. It can be seen that when the process temperature is 605-710℃, the crystal surface structure is optimal, and when the temperature exceeds 710℃, the speed of the deterioration of the crystal surface structure quality rises very quickly. This is because the inhibition of relaxation is difficult to solve when the temperature is increased, and the temperature of 605-710℃ itself is not low, so the reaction between the chlorine-containing gas and the wafer surface can be promoted quickly, thereby removing the polycrystal and fluctuation on the surface, ensuring that the process time is maintained very short (the surface cleaning time is 110-300s), and the shorter the surface cleaning time, the less the probability of relaxation, and the longer the time, the more likely it is to produce high-temperature relaxation deformation under high temperature. Moreover, the cleaning gas is non-plasma, which can prevent the wafer surface from being uneven due to the physical bombardment of the plasma, affecting the subsequent epitaxial quality, and the plasma cannot be used at a temperature above 600℃. In addition, the surface cleaning is carried out in the epitaxial chamber, so the wafer does not need to be moved during the epitaxial process, avoiding the exposure of the wafer to the air and the formation of an oxide layer, and the temperature of the epitaxial process is also very high, and the temperature difference with the surface cleaning is very small, so only a short heating is needed after the surface cleaning step to carry out the epitaxial process, which shortens the time and avoids the energy waste caused by high temperature in the surface cleaning step.

[0060] It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application cover modifications and variations of this application provided they come within the scope of the appended claims and their equivalents.

[0061] While the application has been described in detail and with reference to specific embodiments thereof, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope thereof. It is therefore intended that such changes and modifications be included within the scope of the application as defined by the appended claims.

Claims

1. A wafer surface processing process, characterized by, The method comprises the following steps: a) pre-cleaning the wafer by introducing a pre-cleaning gas into a pre-cleaning device; the pre-cleaning gas comprises a fluorine-containing gas, a nitrogen-hydrogen-containing gas, and a noble gas; providing an epitaxial device, which comprises an epitaxial chamber, an upper lamp group and a lower lamp group, the upper lamp group is arranged above the epitaxial chamber, and the lower lamp group is arranged below the epitaxial chamber; b) conveying the wafer to the epitaxial device and performing surface cleaning on the wafer by introducing a cleaning gas to remove polycrystals on the surface of the wafer; the cleaning gas comprises a chlorine-containing gas; wherein in the surface cleaning step, the power ratio of the lower lamp group of the epitaxial device is 55-90%, and the process temperature of the surface cleaning is 605-710℃; c) performing an epitaxial process in the epitaxial device.

2. The wafer surface treatment process of claim 1, wherein, In the surface cleaning step, the power ratio of the lower lamp group of the epitaxial device is 65-73%.

3. The wafer surface treatment process of claim 1, wherein, The chlorine-containing gas comprises at least one of HCl or Cl2.

4. The wafer surface treatment process of claim 1, wherein, In the surface cleaning step, the surface cleaning time is 100-5000s, and the flow rate of the cleaning gas is 50-500sccm.

5. The wafer surface treatment process of claim 1, wherein, The fluorine-containing gas comprises at least one of HF, CF4, CHF3, CH2F2, CH3F, NF3, and SF6.

6. The wafer surface treatment process of claim 1, wherein, The nitrogen-hydrogen-containing gas comprises at least one of NH3 and N2H4.

7. The wafer surface treatment process of claim 1, wherein, The noble gas comprises at least one of Ar, He, and Xe.

8. The wafer surface treatment process of claim 1, wherein, The cleaning gas is non-plasma.

9. The wafer surface treatment process of claim 1, wherein, The pre-cleaning gas is plasma.

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